Three dimensional stacked processing unit
TW202642858APending Publication Date: 2026-10-16QUALCOMM INC
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Patent Information
- Application Number
- TW115104803
- Authority / Receiving Office
- TW · TW
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2026-02-04
- Filing Date
- 2026-02-06
- Publication Date
- 2026-10-16
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Figure TWG2TA001081087_001 
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Abstract
Certain aspects of the present disclosure provide a stacked configuration for processing unit cores. According to certain aspects, an apparatus includes a stack of a first die and one or more additional dies; and at least one processing unit, comprising one or more processing cores and cache memory, distributed across at least two of the first die and the one or more additional dies.
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