Systems and methods for manufacturing a semiconductor device

Abstract

In one example, a system may include a laser-assisted bonding (LAB) tool comprising a stage block and a laser source facing the stage block. The stage block may be configured to support a first substrate and a first electronic component coupled to the first substrate, the first electronic component including a first interconnect. The laser source may be configured to emit a first laser toward the stage block to induce a first heat on the first interconnect, thereby bonding the first interconnect to the first substrate. Other examples and related methods are also disclosed herein.

Description

Technical Field

[0001] This disclosure generally relates to electronic devices, and more specifically, to bonding tools and methods for bonding semiconductor devices. [ Cross-references and citations of related applications ]

[0002] This application is a continuation-in-part of U.S. Patent Application No. 16 / 908,928, filed on June 23, 2020, entitled “Hybrid Bonding Interconnection Using Laser And Thermal Compression,” the entire contents of which are incorporated herein by reference.

[0003] All aspects of this application relate to U.S. Patent Application No. 17 / 005,021, filed August 27, 2020, entitled “System and Method for Laser Assisted Bonding Of An Electronic Device”, published as U.S. 2021 / 0082717 A1, the entire contents of which are incorporated herein by reference. Prior Technology

[0004] Previous semiconductor packages and methods for forming semiconductor packages have shortcomings, such as resulting in excessive cost, reduced reliability, relatively low performance, or excessively large package size. Further limitations and drawbacks of conventional and traditional methods will become apparent to those skilled in the art by comparing such methods with the present disclosure and referring to the accompanying drawings. Summary of the Invention

[0005] In one example, a method of manufacturing a semiconductor device includes: providing an electronic component over a substrate, wherein interconnects of the electronic component contact a conductive structure of the substrate; providing the substrate on a laser-assisted bonding (LAB) tool, wherein the LAB tool includes a stage block having a window; and heating the interconnects using a laser beam passing through the window until the interconnects are bonded to the conductive structure.

[0006] In another example, a method of manufacturing a semiconductor device includes: providing an electronic component over a first substrate side of a substrate, wherein interconnects of the electronic component contact a conductive structure of the substrate; providing the substrate in a hybrid bonding tool, the hybrid bonding tool including a laser-assisted bonding (LAB) tool and a thermal / pressure bonding (TCB) tool; applying a first heat to the interconnects through a second substrate side opposite to the first substrate side using a laser beam from the LAB tool; and applying a second heat or pressure to the interconnects through the electronic component using the TCB tool.

[0007] In another example, a system includes: a laser-assisted bonding (LAB) tool, the LAB tool including a laser source; a stage block having a window above the laser source; wherein the laser source is configured to emit a laser beam through the window to apply a first heat to an interconnect of a workpiece supported by the stage block.

[0008] In one example, a system may include a laser-assisted bonding (LAB) tool comprising a stage block and a laser source facing the stage block. The stage block may be configured to support a first substrate and a first electronic component coupled to the first substrate, the first electronic component including a first interconnect. The laser source may be configured to emit a first laser toward the stage block to induce a first heat on the first interconnect, thereby bonding the first interconnect to the first substrate.

[0009] In one example, a semiconductor device may include: a substrate having a top side and a bottom side; and a first electronic component having a first interconnect attached to the top side of the substrate by means of a first laser beam emitted toward the bottom side of the substrate.

[0010] This disclosure also includes other examples. Such examples can be found in the accompanying drawings, requests, or specifications of this disclosure. Simple Explanation of the Diagram

[0011] [Figures 1A to 1C] show cross-sectional views of an example semiconductor device.

[0012] [Figures 2A to 2B] show cross-sectional views of an example bonding tool used to bond an example semiconductor device.

[0013] [Figures 3A to 3C] show cross-sectional views of an example method for bonding an example semiconductor device.

[0014] [Figures 4A to 4C] show cross-sectional views of an example method for bonding an example semiconductor device.

[0015] [Figures 5A to 5C] show cross-sectional views of an example method for bonding an example semiconductor device.

[0016] [Figures 6A to 6D] show detailed cross-sectional views of an example bonding stage of a semiconductor device using a bonding tool.

[0017] [Figures 7A to 7C] show cross-sectional and plan views of an example bonding stage of a semiconductor device using a bonding tool. Implementation

[0018] The following describes various examples of providing semiconductor devices and methods of manufacturing semiconductor devices. Such examples are non-limiting, and the scope of the appended claims should not be limited to the specific examples disclosed. In the following discussion, the terms "example" and "for example" are non-limiting.

[0019] The accompanying drawings illustrate general construction methods and may omit descriptions and details of well-known features and techniques to avoid unnecessarily obscuring the content of this disclosure. Furthermore, the elements in the drawings are not necessarily drawn to scale. For example, the dimensions of some elements in each figure may be enlarged relative to other elements to aid in understanding the examples discussed in this disclosure. The same reference numerals in different figures denote the same elements.

[0020] The term "or" refers to any one or more items in a list connected by "or". For example, "x or y" means any element in the three-element set {(x), (y), (x, y)}. As another example, "x, y, or z" means any element in the seven-element set {(x), (y), (z), (x, y), (x, z), (y, z), (x, y, z)}.

[0021] The terms “comprises / comprising” and “includes / including” are “open” terms and specify the presence of the stated feature, but do not exclude the presence or addition of one or more other features. The terms “first,” “second,” etc., may be used herein to describe various elements, and these elements should not be limited by these terms. These terms are used only to distinguish one element from another. Thus, for example, without departing from the teachings of this disclosure, a first element discussed in this disclosure may be referred to as a second element.

[0022] Unless otherwise specified, the term "coupled" may be used to describe two elements that are in direct contact with each other or to describe two elements that are indirectly connected by one or more other elements. For example, if element A is coupled to element B, then element A may be in direct contact with element B or indirectly connected to element B through intervening element C. Similarly, the terms "above" or "on top of" may be used to describe two elements that are in direct contact with each other or to describe two elements that are indirectly connected by one or more other elements.

[0023] Figure 1A shows a cross-sectional view of an example semiconductor device 10. In the example shown in Figure 1A, the semiconductor device 10 may include a substrate 11, electronic components 12 or 13, and interconnects 121 or 131. The substrate 11 may include a dielectric structure 111 and a conductive structure 112. The substrate 11 and the interconnects 121 or 131 may provide electrical coupling between external components and electronic components 12 or 13. In some examples, at least one of electronic components 12 or 13 may include a molding compound or a molded package including a molding compound. In such examples, the molding compound or molded package may optionally include one of the electronic components 12 or 13 located inside, above, or below the molding compound or molded package.

[0024] Figure 1B shows a cross-sectional view of an example semiconductor device 20. In the example shown in Figure 1B, the semiconductor device 20 may include a substrate 11, electronic components 12, 13, or 14, and interconnects 121 or 131. The substrate 11 and electronic components 12 or 13 may be similar to those shown in Figure 1A. Electronic component 14 may include interconnects 141.

[0025] Figure 1C shows a cross-sectional view of an example semiconductor device 30. In the example shown in Figure 1C, the semiconductor device 30 may include a substrate 11, an electronic component 12, and an interconnect 121. The substrate 11 and the electronic component 12 may be similar to the substrate 11 and electronic component 12 or 13 shown in Figure 1A. Furthermore, the electronic component 12 may be longer or thinner than the electronic component 12 or 13 shown in Figure 1A.

[0026] In some instances, substrate 11 may be a preformed substrate. The preformed substrate may be manufactured prior to attachment to an electronic device and may include a dielectric layer between respective conductive layers. The conductive layer may include copper and may be formed using an electroplating process. The dielectric layer may be a relatively thick, non-photodefineable layer that can be preformed in thin film form rather than being attached in liquid form, and may contain a resin with fillers such as strands, fabrics, and / or other inorganic particles for rigid and / or structural support. Because the dielectric layer is non-photodefineable, features such as through-holes or openings can be formed using drilling or lasers. In some instances, the dielectric layer may include a prepreg material or an ajinomoto deposited film (ABF). The preformed substrate may include a permanent core structure or carrier, such as a dielectric material comprising bismaleimide triazine (BT) or FR4, and the dielectric and conductive layers may be formed on the permanent core structure. In other instances, the preformed substrate may be a coreless substrate with a permanent core structure omitted, and the dielectric and conductive layers may be formed on a sacrificial carrier and removed after the dielectric and conductive layers are formed and before attachment to an electronic device. The preformed substrate may also be referred to as a printed circuit board (PCB) or a laminated substrate. Such preformed substrates can be formed using a semi-additive process or a modified semi-additive process.

[0027] In some instances, substrate 11 may be a redistribution layer (“RDL”) substrate. In some instances, the RDL substrate may include one or more conductive redistribution layers and one or more dielectric layers that may be formed layer by layer over an electronic device to which the RDL substrate may be electrically coupled. In some instances, the RDL substrate may include one or more conductive redistribution layers and one or more dielectric layers that may be formed layer by layer over a carrier, wherein the one or more conductive redistribution layers and one or more dielectric layers may be completely or at least partially removed after the electronic device and the RDL substrate are coupled together. In some instances, window 153 shown in FIG. 2A may include or may be part of such a carrier. The RDL substrate may be manufactured layer by layer as a wafer-level substrate on a circular wafer in a wafer-level process, or as a panel-level substrate on a rectangular or square panel carrier in a panel-level process. The RDL substrate can be formed in an additive stacking process, which may include alternating stacking of one or more dielectric layers and one or more conductive layers defining corresponding conductive redistribution patterns or traces, the conductive redistribution patterns or traces being configured to collectively (a) fan the traces out of the electronic device's footprint, or (b) fan the traces into the electronic device's footprint. The conductive patterns can be formed using plating processes such as electroplating or electrodeless plating. The conductive patterns may include conductive materials, such as copper or other platingable metals. The location of the conductive patterns can be determined using photolithography processes, such as photolithography, and photoresist materials for forming photomasks. The dielectric layers of the RDL substrate can be patterned using photolithography processes that may include photomasks through which light is exposed to desired features of the photopattern, such as vias in the dielectric layer. The dielectric layers can be made of light-definable organic dielectric materials such as polyimide (PI), benzocyclobutene (BCB), or polybenzoxazole (PBO). Such dielectric materials can be spin-coated or otherwise coated in liquid form, rather than attached as a pre-formed film. To allow the desired light-defined features to be properly formed, such light-defined dielectric materials may omit structural reinforcing agents, or may be filler-free, and free of strands, fabrics, or other particles that could interfere with light from the photopatterning process. In some instances, this filler-free characteristic of filler-free dielectric materials allows for a reduced thickness of the resulting dielectric layer. Although the light-defined dielectric materials described above can be organic materials, in other instances, the dielectric material of the RDL substrate may include one or more inorganic dielectric layers. Some examples of inorganic dielectric layers may include silicon nitride (Si3N4), silicon oxide (SiO2), or silicon oxynitride (SiON). Instead of using light-defined organic dielectric materials, one or more inorganic dielectric layers can be formed by growing inorganic dielectric layers using oxidation or nitriding processes. Such inorganic dielectric layers may be filler-free, and free of strands, fabrics, or other dissimilar inorganic particles.In some instances, the RDL substrate may omit the permanent core structure or carrier, for example, by including dielectric materials such as bismaleimide triazine (BT) or FR4, and these types of RDL substrates may be referred to as coreless substrates. Other substrates described in this disclosure may also include RDL substrates.

[0028] It should be noted that the various semiconductor devices 10, 20, or 30 described herein are for the purpose of understanding this disclosure, and various other semiconductor devices may also be used in this disclosure. This disclosure can be applied to other semiconductor devices in which electronic components are connected to a substrate via interconnects.

[0029] Figure 2A shows a cross-sectional view of an example bonding tool for bonding an example semiconductor device. In the example shown in Figure 2A, the laser-assisted bonding (LAB) tool 15 may include a laser source 151, a stage block (or base chuck) 152, and a window 153.

[0030] Laser source 151 can irradiate laser beam 151A through window 153, as shown in FIG3B. Stage block 152 may include or accommodate window 153. In some instances, window 153 may include an opening through stage block 152. In some instances, the opening may be filled or covered with a transparent material such as glass or quartz, or a grating or similar structure that allows light to pass through. In some instances, stage block 152 may include ceramic material, or a portion of stage block 152 (e.g., window 153) may include ceramic material. In such instances, the ceramic stage tool may be heated by an external heat source (e.g., laser source 151) using laser beam 151A to accelerate the bonding process by heating the ceramic material. In some instances where window 153 includes ceramic, laser beam 151A does not pass through window 153 but is used to heat the ceramic window 153, which in turn heats the semiconductor device 30. In contrast, when window 153 is transparent, the semiconductor device 30 can be heated by allowing the laser beam 151A to pass through window 153, thereby heating the semiconductor device 30 during the bonding process. In some instances, the opening through stage 152 may be optional, wherein stage 152 itself may be made of a transparent material, or wherein window 153 defines the upper surface of stage 152. Window 153 may be used to support one or more substrates, such as substrate 11 as illustrated in Figures 1A through 1C. As shown in Figures 1A through 1C, the laser beam 151A generated from laser source 151 can be transmitted through window 153 to allow interconnects 121, 131, or 141 of electronic components 12, 13, or 14 to be bonded to terminals of conductive structure 112 of substrate 11. In some instances, window 153 may include a material exhibiting any amount of light transmittance to allow light of a desired wavelength (e.g., at or near the wavelength of laser beam 151A) to pass through.

[0031] Figure 2B shows a cross-sectional view of an example hybrid bonder tool for bonding example semiconductor devices. In the example shown in Figure 2B, the hybrid bonder tool 40 may include a laser-assisted bonder (LAB) tool 15 and a thermal / pressure bonder (TCB) tool 35.

[0032] LAB tool 15 may include a laser source 151, a stage block 152, and a window 153. LAB tool 15 may be similar to the LAB tool 15 shown in FIG2A. Heat / pressure joint tool 35 may include a heat / vibration / pressure plate 351 and a heater source 352.

[0033] Figures 3A to 3C show cross-sectional views of an example method for bonding an example semiconductor device. In Figures 3A to 3C, the example semiconductor device may be the semiconductor device 10 shown in Figure 1A.

[0034] Figure 3A illustrates a semiconductor device 10 and a laser-assisted bonding (LAB) tool 15 prior to laser beam irradiation during the bonding process. Electronic components 12 or 13 are shown placed on a substrate 11 but not yet fully bonded to the substrate 11 via interconnects 121 or 131, respectively. In some instances, electronic components 12 or 13 may be temporarily bonded or pre-bonded to the substrate 11 via interconnects 121 or 131, respectively. In some instances, electronic components 12 or 13 are provided above the substrate 11 such that the interconnects 121 or 131 of the electronic components contact the conductive structure 112 of the substrate 11. The substrate 11 may be provided on the LAB tool 15, which includes a stage block 152 comprising a window 153.

[0035] The substrate 11 includes a conductive structure 112 having one or more conductive layers or patterns, and a dielectric structure 111 having one or more dielectric layers interlaced with the conductive structure 112. In some instances, the substrate 11 may have a thickness ranging from about 10 micrometers (µm) to about 2,000 µm. Electronic components 12 or 13 may include, or be referred to as, semiconductor dies, semiconductor wafers, or semiconductor packages. In some instances, such semiconductor packages may include one or more semiconductor dies or wafers coupled to the substrate and packaged together with exposed interconnects 121 or 131. In some instances, the interconnects 121 or 131 of the electronic components 12 or 13 may be disposed in a flip-chip type configuration on terminals such as pads or UBM (under-bump metallization) of the conductive structure 112 of the substrate 11.

[0036] In some instances, electronic component 12 or 13 may include application-specific integrated circuitry, logic chips, microcontrollers, memory, digital signal processors, network processors, power management units, audio processors, radio frequency (RF) circuitry, or wireless baseband system-on-chip processors. In some instances, electronic component 12 or 13 may include active or passive components. Electronic component 12 or 13 may have a thickness ranging from about 10 µm to about 1,000 µm.

[0037] Interconnectors 121 or 131 can electrically connect electronic components 12 or 13 to conductive structures 112 of substrate 11, respectively. Interconnectors 121 or 131 may include conductive balls or bumps, such as solder balls or bumps; conductive pillars or rods, such as copper pillars or rods with solder tips; or metal-core solder balls or bumps with a core comprising, for example, copper or aluminum surrounded by a solder shell. Interconnectors 121 or 131 may have a diameter ranging from about 10 µm to about 1,000 µm. In some instances, interconnectors 121 or 131 may be first formed on or attached to electronic components 12 or 13, and then interconnectors 121 or 131 may be placed on substrate 11.

[0038] In the example shown in Figure 3A, the LAB tool 15 can be positioned below the semiconductor device 10. The LAB tool 15 can irradiate a laser beam from a laser source 151 to melt or reflow interconnects 121 or 131 and bond electronic components 12 or 13 to the substrate 11. Melting may include heating the interconnects to at least partially melt them, so that they can be bonded to adjacent conductive structures (e.g., conductive structures 112 of the substrate 11). In some examples, melting may be referred to as reflow. In some examples, electronic components 12 or 13 may be permanently bonded to the substrate 11.

[0039] In the example shown in Figure 3A, stage block 152 can be spaced apart from laser source 151 and can be placed above laser source 151. Stage block 152 can be separated from laser source 151 by a working distance. In some examples, the working distance can be between about 100 mm and about 1000 mm. The working distance can be preset or changed before or during laser irradiation. Stage block 152 can be installed to cover or support the periphery of window 153. Stage block 152 can be provided to cover at least some portion or the entire periphery of window 153. In some examples, the periphery of window 153 or substrate 11 can rest on stage block 152.

[0040] In the example shown in Figure 3A, window 153 can be coupled to stage 152. Window 153 can be separated from laser source 151 by a working distance. The working distance between window 153 and laser source 151 can be similar to the working distance between stage 152 and laser source 151. Window 153 can support semiconductor device 10.

[0041] Window 153 may be made of a material capable of allowing the laser beam to pass through. In some instances, window 153 may be made of quartz or glass. In some instances, window 153 may be a gap or channel defined by the inner sidewall of stage 152. In some instances, window 153 may include a material exhibiting any amount of light transmittance to allow light of a desired wavelength (e.g., at or near the wavelength of laser beam 151A) to pass through. In some instances, the transmittance of window 153 to the laser beam may be about 90% or greater to facilitate LAB processes. In some instances, the transmittance of window 153 may be less than 90%. In some instances, window 153 may include a grating or other structure that allows at least some amount of light to pass through. In some instances, window 153 may have a thickness ranging from about 1 mm to about 300 mm. In some instances, stage 152 may support a workpiece processed by LAB tool 15. The workpiece includes, for example, a substrate 11, or an electronic component 12 or 13 above the substrate 11, including interconnects 121 or 131.

[0042] Figure 3B illustrates the semiconductor device 10 and LAB tool 15 when a laser beam is irradiated during the bonding process. As shown in Figure 3B, a laser beam 151A is irradiated from a laser source 151, and heat can be applied to or transferred to interconnects 121 or 131 through window 153 and substrate 11. In some instances, when the laser beam 151A is irradiated from laser source 151, substrate 11 can be heated, and this heat can be transferred to interconnects 121 or 131. In some instances, when the laser beam 151A is irradiated from laser source 151, heat can be applied to interconnects 121 or 131. In some instances, this heat can be applied to interconnects 121 or 131 while keeping the temperature of substrate 11 lower than the temperature of the heated interconnects 121 or 131. For example, interconnects 121 or 131 can be positioned at the focal length or focusing distance within the depth of field (DOF) range of the laser beam 151A. In some instances, focusing the laser beam 151A onto interconnects 121 or 131 allows for greater heating of interconnects 121 or 131 compared to the substrate 11 or electronic components 12 or 13. This heating by the laser beam 151A melts interconnects 121 or 131 to bond them between the substrate 11 and the electronic components 12 or 13; in some instances, this bonding can be permanent. The laser source 151 can be larger than the overall size of the substrate 11, or it can be configured to irradiate the entire bottom side of the substrate 11 exposed through window 153 (i.e., the window occupies a space as large as or larger than the substrate). The laser beam 151A can be used to heat interconnects 121 or 131 of electronic components 12 or 13 through window 153 of stage 152 until interconnects 121 or 131 bond to the conductive structure 112 of the substrate 11. In some instances, when interconnect 121 or 131 is heated, interconnect 121 or 131 can be within the depth of field (DOF).

[0043] In the example shown in Figure 3B, laser beam 151A is indicated by an arrow. The substrate 11 and interconnects 121 or 131 can be placed within a region that maintains a suitable temperature for melting interconnects 121 or 131 when irradiated by laser beam 151A. The irradiation range of laser beam 151A can vary depending on the thickness and transmittance of window 153 or the working distance. Laser beam 151A can be generated by pulsed laser or continuous laser. In some examples, electronic components 12 or 13 can be located above a first side of substrate 11, and laser beam 151A can be applied to interconnects 121 or 131 from a second side of substrate 11 opposite to the first side. In some examples, stage 152 can support window 153 and substrate 11 above laser beam 151A.

[0044] In some instances, the laser beam 151A may have energy ranging from about 0.1 kilowatts (kW) to about 16 kW to adequately heat or melt the interconnects 121 or 131 and avoid overheating or damage to the dielectric structure 111 or conductive structure 112 of the substrate 11. In some instances, the laser source 151 may output one or more of the laser beams 151A with energy ranging from approximately 0.1 kW to about 100 kW, whether targeted at a specific area of ​​the stage 152 or the substrate 11 or uniformly distributed thereon. In some instances, the laser beam 151A may have a wavelength ranging from about 600 µm to about 2,000 µm to adequately heat or melt the interconnects 121 or 131 and avoid overheating or damage to the dielectric structure 111 or conductive structure 112 of the substrate 11. In some instances, the laser beam 151A may irradiate for a period ranging from approximately 100 milliseconds (ms) to approximately 30,000 ms to adequately heat or melt the interconnects 121 or 131 and avoid overheating or damage to the dielectric structure 111 or conductive structure 112 of the substrate 11. For example, the laser beam 151A may irradiate for approximately 2000 ms or less, or approximately 1000 ms or less, to adequately heat the interconnects 121 or 131 and bond them to the substrate 11. In some instances, when heat is applied to the interconnects 121 or 131 from the laser beam 151A, the temperature of the substrate 11 may be maintained at a lower temperature than that of the interconnects 121 or 131. In some instances, when heat is applied to the interconnects 121 or 131 from the laser beam 151A, the temperature of the electronic component 12 or 13 may be maintained below that of the interconnects 121 or 131. In a further example, when heat is applied to interconnect 121 or 131 from laser beam 151A, the temperature of the molding compound or molded package of adjacent electronic component 12 or 13 can be kept lower than the temperature of interconnect 121 or 131.

[0045] In some instances, when the laser beam 151A is irradiated, the temperature of the substrate 11 can be in the range of about 30 degrees Celsius (°C) to about 300°C, to properly heat or melt the interconnects 121 or 131 and avoid overheating or damage to the dielectric structure 111 or conductive structure 112 of the substrate 11. For example, the heat generated by the laser beam 151A on the substrate 11 or the interconnects 121, 131 can be in the range of about 150°C to about 350°C, for example, about 230°C to about 280°C. In some instances, when the laser beam is irradiated, the temperature of the window 153 can be in the range of about 30°C to about 300°C. In some instances, the temperature of the window 153 can be maintained in the range of about 25°C to about 150°C, for example, about 70°C to about 130°C, below the melting temperature of the interconnects 121 or 131.

[0046] Figure 3C shows the LAB tool 15 after the bonding process is completed. In the example shown in Figure 3C, when the bonding between the substrate 11 and the electronic component 12 or 13 is completed, the irradiation of the laser beam 151A can be stopped, and the semiconductor device 10 can be passed to the next stage. When the irradiation of the laser beam 151A stops, the heat supply from the laser beam can be immediately interrupted. Therefore, since the heat supply from the laser beam has stopped, the interconnect 121 or 131 can be re-cured. Curing the interconnect 121 or 131 allows for electrical or mechanical interconnection between the electronic component 12 or 13 and the substrate 11. The bonding of the next semiconductor device can be performed immediately using the laser beam 151A without a separate cooling process.

[0047] Figures 4A to 4C show cross-sectional views of an example method for bonding an example semiconductor device. The example semiconductor device 20 shown in Figures 4A to 4C may be similar to the semiconductor device 20 shown in Figure 1B.

[0048] Figure 4A shows the semiconductor device 20 and laser-assisted bonding (LAB) tool 15 before irradiation of the laser beam 151A during the bonding process. Figure 4B shows the semiconductor device 20 and LAB tool 15 when irradiated with the laser beam 151A during the bonding process. Figure 4C shows the LAB tool 15 after the bonding process is completed. In the examples shown in Figures 4A to 4C, the substrate 11, electronic components 12 or 13, and interconnects 121 or 131 of the semiconductor device 20 may be similar to the substrate, electronic components, and interconnects of the semiconductor device 10 shown in Figures 3A to 3C.

[0049] Electronic component 14 may include passive components or passive devices. Electronic component 14 may be temporarily connected to the conductive structure 112 of substrate 11 via interconnect 141. In some instances, electronic component 14 may include at least one of a resistor, capacitor, inductor, or connector. Electronic component 14 may have a thickness ranging from about 0.1 mm to about 3 mm.

[0050] In the example shown in Figure 4A, the LAB tool 15 can be located below the semiconductor device 20. The LAB tool 15 can irradiate a laser beam 151A from a laser source 151 to melt interconnects 121 or 131, 141 and bond electronic components 12 or 13, 14 to the substrate 11.

[0051] In the examples shown in Figures 4A-4C, the laser source 151, level block 152, and window 153 of the LAB tool 15 can be similar to the laser source, level block, and window of the LAB tool 15 described with respect to Figures 3A-3C. The example method shown in Figures 4A-4C can be similar to the example method described with respect to Figures 3A-3C.

[0052] Figures 5A to 5C show cross-sectional views of example methods for bonding example semiconductor devices. The example semiconductor devices shown in Figures 5A to 5C may be similar to the semiconductor device 30 shown in Figure 1C.

[0053] Figure 5A shows a semiconductor device 30 and a hybrid bonding tool 40 prior to laser beam irradiation during the bonding process. In the examples shown in Figures 5A to 5C, the substrate 11, electronic components 12, 13, and interconnects 121, 131 of the semiconductor device 30 can be similar to the substrate 11, electronic components 12 or 13, and interconnects 121 or 131 of the semiconductor device 10 shown in Figures 3A to 3C. In some examples, the electronic components 12 or 13 can be provided above one side of the substrate 11, such that the interconnects 121 or 131 of the electronic components 12 or 13 contact the conductive structure 112 of the substrate 11.

[0054] In some instances, electronic components 12 or 13 may be prone to warping during laser bonding using LAB tool 15 and the processes of Figures 3A-3C. For example, heat from the laser beam 151A in Figure 3B can be transferred to electronic components 12 or 13 during the bonding process, causing warping of electronic components 12 or 13. Such warping may occur relative to the heat transferred during LAB bonding, for example, if the area of ​​electronic components 12 or 13 is sufficiently large, or the thickness of electronic components 12 or 13 is sufficiently thin. To avoid or prevent warping, the bonding process of semiconductor device 30 can be performed using hybrid bonding tool 40. Furthermore, although Figures 5A-5C show semiconductor device 30 comprising two separate and smaller electronic components 12 and 13, in some instances, semiconductor device 30 may include a single electronic component 12, which may be longer, larger, or thinner than the electronic components 12 or 13 shown in Figures 5A-5C. In such instances, longer, larger, or thinner dies (e.g., electronic component 12) may be susceptible to warping and the effects of non-wet interconnects 121, for example, near the edges of electronic component 12. In some instances, semiconductor device 30 may include a single electronic component 12, or semiconductor device 30 may include multiple electronic components 12 and 13, as shown in FIG5A. In some instances where semiconductor device 30 includes a single electronic component, electronic component 12 may include a larger area or a thinner die thickness. For example, electronic component 12 may include an area of ​​about 1 mm × 1 mm up to about 300 mm × 300 mm or a thickness of about 30 µm to about 1 mm or 10 mm. In some instances, in addition to dies, semiconductor device 30 may also include packages, such as electronic components including dies or electronic components 12, interposers, substrates, or interconnects within a package structure. The sensitivity of such large-area semiconductor device 30 to warping and non-wet interconnects 121 can be avoided or mitigated by using a vacuum. For example, window 153 may include one or more vacuum holes therethrough to allow a vacuum to be applied to semiconductor device 30. LAB tool 15 may include a vacuum mechanism to apply a vacuum through a vacuum aperture in window 153 to force the semiconductor device 30 containing substrate 11 against window 153 during heating, thereby preventing substrate 11 from warping. In some instances, TCB tool 35 may also include a vacuum mechanism, or may employ the same vacuum mechanism as LAB tool 15, to apply a vacuum to semiconductor device 30 from the side opposite to LAB tool 15. In such instances, plate 351 may include one or more vacuum apertures for applying a vacuum to hold or force electronic components 12, 13 against plate 351, thereby preventing electronic components 12, 13 from warping and preventing interconnects 121, 131 from becoming unwetted during heating.

[0055] In the example shown in FIG5A, the hybrid bonder tool 40 may include a LAB tool 15 for irradiating a laser beam 151A from a laser source 151 below the semiconductor device 30 to bond electronic components 12 or 13 to the substrate 11. The hybrid bonder tool 40 may also include a TCB tool 35, also for bonding electronic components 12 or 13 to the substrate 11 while preventing warping of electronic components 12 or 13. The TCB tool 35 may include a plate 351 and a heater source 352, and may press the electronic components 12, 13 from above or provide a backing while applying heat to limit warping of electronic components 12, 13 during the bonding process. The plate 351 may be configured to press the top side of the electronic component 12 or 13 against the opposite side of the interconnect 121 or 131 when the laser 151A of the LAB tool 15 applies heat to the interconnect 121 or 131. The plate 351 can be configured to transfer heat, vibration or pressure to the interconnect 121 or 131 when the heat / pressure plate 351 presses the top side of the electronic component 12 or 13.

[0056] The TCB tool 35 can be positioned above the LAB tool 15. In some instances, the plate 351 can initially be spaced apart from the electronic components 12, 13, and then the plate can be lowered after the semiconductor device 30 is placed on the window 153. The plate 351 can be brought into contact with the top of the electronic components 12, 13 to maintain pressure of the electronic components 12, 13 on the substrate 11. The plate 351 can apply pressure to the electronic components 12, 13 at a level as low as about 0.1 Newtons (N) (e.g., in the range of about 1 N to about 500 N). In some instances, the plate 351 can have a thickness in the range of about 1 mm to about 5 mm.

[0057] In some instances, plate 351 can vacuum-lock electronic components 12, 13 while simultaneously pressing them down. In some instances, vacuum locking can be achieved by coupling plate 351 to a vacuum generator that creates a vacuum suction through an opening on the bottom side of plate 351 and exposing the top side of electronic component 12 or 13 to such a vacuum opening in plate 351. When heat is transferred to electronic component 12 or 13, plate 351 can remain locked to electronic component 12 or 13 while simultaneously pressing it down from above to prevent warping of electronic component 12 or 13.

[0058] Plate 351 can be coupled to heater source 352 for heating heat / pressure plate 351, which can be transferred to electronic component 12 or 13 when plate 351 is brought into contact with electronic component 12 or 13. In some instances, heater source 352 can be maintained at a preset temperature in the range of about 10°C to about 450°C.

[0059] In some instances, the TCB tool 35 may be configured to vibrate the plate 351 or induce vibrations of the electronic components 12 or 13 against the substrate 11, wherein such vibrations may induce heat due to friction on the interconnects 121 or 131. In some instances, such heat from induced vibrations on the interconnects 121 or 131 may cause or facilitate bonding of the interconnects 121 or 131 to the substrate 11.

[0060] Heat transferred from board 351 to electronic component 12 or 13 can prevent warping that may occur due to temperature mismatch between the top and bottom sides of electronic component 12 or 13. For example, when using only LAB tool 15, laser beam 151A may heat and thus expand the bottom side of electronic component 12 or 13 more than the top side, where this difference may induce warping. This warping tendency can be controlled by applying compensating heat to the top side of electronic component 12 or 13 with board 351. In some instances, when heat is applied to interconnect 121 or 131 from LAB tool 15, the temperature of substrate 11 can be maintained below the temperature of interconnect 121 or 131. In some instances, when heat is applied to interconnect 121 or 131 from LAB tool 15, the temperature of electronic component 12 or 13 using TCB tool 35 can be maintained below the temperature of interconnect 121 or 131.

[0061] Figure 5B illustrates a semiconductor device 30 and a LAB tool 15 when a laser beam 151A is irradiated during a bonding process. In the example shown in Figure 5B, an example method for bonding the semiconductor device 30 to the substrate 11 by irradiating the interconnects 121, 131 of the semiconductor device 30 with a laser beam 151A from a laser source 151 to melt them can be similar to the example methods shown in Figures 3B and 4B. In the example shown in Figure 5B, during the bonding process, a thermal / pressure bonding tool 35 can press or heat the electronic component 12 or 13 from above. In some instances, heat can be applied to the interconnects 121 or 131 via the laser beam 151A from the LAB tool 15 from the substrate side opposite the side where the electronic component 12 or 13 is placed. Heat, vibration, or pressure can be applied to the interconnects 121 or 131 via the electronic component 12 or 13 using the TCB tool 35. In some instances, the laser beam 151A may have a depth of field (DOF), and the interconnect 121 or 131 may be within the DOF when heated. In some instances, the LAB tool 15 and the TCB tool 35 may be applied simultaneously. In some instances, when heat is applied via the LAB tool 15, the window 153 may face or contact one side of the substrate 11 opposite to the side of the substrate 11 where the electronic component 12 or 13 is located.

[0062] Figure 5C shows the LAB tool 15 after the bonding process is completed. In the example shown in Figure 5C, once the bonding of the substrate 11 and the electronic component 12 or 13 is completed, the irradiation of the laser beam 151A can be interrupted, and the thermo / pressure bonder tool 35 can be separated from the semiconductor device 30 and then raised. After the thermo / pressure bonder tool 35 is separated from the semiconductor device 30, the semiconductor device 30 can be passed to the next stage.

[0063] Figures 6A to 6D show detailed cross-sectional views of example bonding levels using LAB tool 15, further illustrating the bonding levels for semiconductor devices 10, 20, and 30 described with respect to Figures 3B, 4B, and 5B.

[0064] Figure 6A illustrates semiconductor devices 10, 20, and 30 and LAB tool 15 when irradiated with a laser beam during the bonding process. Figure 6A is similar to and shares the corresponding descriptions of Figures 3B, 4B, and 5B. LAB tool 15 shares the corresponding features and elements as described with respect to Figure 2. Optionally, a TCB tool 35 may be included, used together with LAB tool 15 for hybrid bonding of semiconductor device 30 as previously described with respect to Figure 5.

[0065] As previously described with respect to stage 152, in some instances, stage 152a may comprise a transparent material such as glass or quartz, which allows the laser beam 151A to pass through stage 152a. As previously mentioned, in some instances, the transmittance of the laser beam 151A through stage 152a may be about 90% or greater to facilitate the LAB bonding process.

[0066] As shown in the figure, a laser beam 151A is irradiated from a laser source 151 toward a stage block 152a, and this laser beam 151A can pass through the stage block 152a, for example, through the window 153 portion of the stage block 152a, to reach the substrate 11 of the semiconductor devices 10, 20, 30. The laser beam 151A can deliver or induce heat on the interconnects 121, 131, 141. In some instances, the laser beam 151A can reach the substrate 11 through the stage block 152a, then pass through the substrate 11, and subsequently reach the interconnects 121, 131, 141 and heat the interconnects by thermal irradiation. In some instances, interconnects 121, 131, and 141 can be positioned at the focal length or focusing distance within the depth of field (DOF) of the laser beam 151A, and this focusing of the laser beam 151A on the interconnects 121, 131, and 141 allows the interconnects 121, 131, and 141 to be heated more than the substrate 11 or electronic components 12, 13, and 14. In some instances, the laser beam 151A can reach the substrate 11 via stage 152a, and can then induce heat in one or more areas of the substrate 11, and such heated substrate areas can heat the interconnects 121, 131, and 141 via thermal conduction.

[0067] Interconnects 121, 131, and 141 can be heated until they bond to the conductive structure 112 of the substrate 11. Thermal and time parameters can be appropriately controlled to minimize bonding time for rapid throughput, while avoiding exposure to higher temperatures to minimize excessive thermal expansion or warping of the substrate 11. In some instances, the laser beam 151A may irradiate for about 2000 ms or less, or about 1000 ms or less, to induce appropriate heating of the interconnects 121, 131, and 141 and bonding with the substrate 11. In some instances, the heat induced by the laser beam 151A on the interconnects 121, 131, 141, or the substrate 11 can be controlled to remain below about 300°C or 350°C, for example, in the range of about 150°C to about 350°C or about 230°C to about 280°C.

[0068] Figure 6B illustrates semiconductor devices 10, 20, and 30 and LAB tool 15 when irradiated with a laser beam during the bonding process. Figure 6B is similar to and shares the corresponding descriptions of Figures 3B, 4B, and 5B. LAB tool 15 shares the corresponding features and elements as described with respect to Figure 2. Optionally, a TCB tool 35 may be included, used together with LAB tool 15 for hybrid bonding of semiconductor device 30 as previously described with respect to Figure 5.

[0069] As previously described, regarding stage 152, in some instances, stage 152b may comprise an opaque material, such as ceramic, that blocks or obstructs the laser beam 151A from passing through stage 152b. In some instances, the opaque material of stage 152b may comprise a metallic material. Also as previously described, in some instances, the transmittance of laser beam 151A through stage 152 may be less than 90%, for example, 0%.

[0070] As shown, a laser beam 151A is irradiated from a laser source 151 toward a stage block 152b (e.g., toward a window 153 portion of the stage block 152b). This laser beam 151A is substantially blocked by the stage block 152b, but it can heat the stage block 152b, for example, through thermal irradiation. This heat (indicated by the upward wavy arrows) in turn can be transferred from the heated stage block 152b to heat interconnects 121, 131, and 141. In some instances, heat from the stage block 152b reaches and extends through the substrate 11 to heat interconnects 121, 131, and 141 by thermal conduction.

[0071] Interconnects 121, 131, and 141 can be heated until they bond to the conductive structure 112 of the substrate 11. Thermal and time parameters can be appropriately controlled to reduce bonding time while avoiding exposure to higher temperatures to minimize excessive thermal expansion or warping of the substrate 11. In some instances, the laser beam 151A can irradiate for approximately 10,000 ms to approximately 30,000 ms or even longer for approximately 10 minutes to induce appropriate heating of the interconnects 121, 131, and 141 and bonding with the substrate 11. In some instances, the heat induced by the laser beam 151A on the interconnects 121, 131, 141, or the substrate 11 can be controlled to remain below approximately 300°C or 350°C, for example, within the range of approximately 150°C to approximately 350°C or approximately 230°C to approximately 280°C.

[0072] Figure 6C illustrates semiconductor devices 10, 20, and 30 and LAB tool 15 when irradiated with a laser beam during the bonding process. Figure 6C is similar to and shares the corresponding descriptions of Figures 3B, 4B, and 5B. LAB tool 15 shares the corresponding features and elements as described with respect to Figure 2. Optionally, a TCB tool 35 may be included, used together with LAB tool 15 for hybrid bonding of semiconductor device 30 as previously described with respect to Figure 5.

[0073] In some instances, level block 152c may include a combination of transparent and opaque materials. For example, level block 152c may include a stack of transparent material portions 152x and opaque material portions 152y. The features, materials, or properties of the transparent portion 152x may be similar to those described with respect to level block 152a. The features, materials, or properties of the opaque portion 152y may be similar to those described with respect to level block 152b.

[0074] As shown, a laser beam 151A is irradiated from a laser source 151 toward a stage block 152c, and this laser beam 151A can pass through the transparent material portion 152x of the stage block 152c to reach the opaque material portion 152y. The laser beam 151A is essentially blocked from passing through the opaque material portion 152y, but it can be heated, for example, by thermal irradiation, to either the opaque material portion 152y or the transparent material portion 152x, thereby heating the top of the stage block 152c. This heat, indicated by the upward wavy arrow, can then be transferred to the thermal interconnects 121, 131, and 141. In some instances, heat from the stage block 152c is transferred by thermal conduction to extend through the substrate 11 and heat the interconnects 121, 131, and 141. The interconnects 121, 131, and 141 can be heated until they bond with the conductive structure 112 of the substrate 11. In some instances, because the laser beam 151A is blocked by the opaque material portion 152y and cannot reach the substrate 11, the heating of the substrate 11 or interconnects 121, 131, 141 via thermal conduction can be controlled to remain below the level where the laser beam 151A reaches and heats the substrate 11 through thermal irradiation. This thermal control can be used to prevent or limit excessive thermal expansion or warping of the substrate 11.

[0075] There may be instances where the thickness of the transparent portion 152x is greater than the thickness of the opaque portion 152y. For example, the thickness of the transparent portion 152x may range from about 1 mm to about 300 mm, and the thickness of the opaque portion 152y may range from about 100 µm to about 100 mm. In some instances, the opaque portion 152y may include one or more coatings covering the transparent portion 152x.

[0076] Interconnects 121, 131, and 141 can be heated until they bond to the conductive structure 112 of the substrate 11. Thermal and time parameters can be appropriately controlled to reduce bonding time while avoiding exposure to higher temperatures to minimize excessive thermal expansion or warping of the substrate 11. In some examples, the laser beam 151A can irradiate for approximately 5000 ms to approximately 20000 ms to induce appropriate heating of the interconnects 121, 131, and 141 and their bonding with the substrate 11. In some examples, the heat induced by the laser beam 151A on the interconnects 121, 131, 141, or the substrate 11 can be controlled to remain below approximately 300°C or 350°C, for example, within the range of approximately 150°C to approximately 350°C or approximately 230°C to approximately 280°C.

[0077] Figure 6D illustrates semiconductor devices 10, 20, and 30 and LAB tool 15 when irradiated with a laser beam during the bonding process. Figure 6D is similar to and shares the corresponding descriptions of Figures 3B, 4B, and 5B. LAB tool 15 shares the corresponding features and elements as described with respect to Figure 2. Optionally, a TCB tool 35 may be included, used together with LAB tool 15 for hybrid bonding of semiconductor device 30 as previously described with respect to Figure 5.

[0078] Level block 152d may be an embodiment of level block 152 described with respect to Figures 1-5. As previously described with respect to level block 152, in some instances, level block 152d may include a grating that allows a certain amount of laser light to pass through. In some instances, level block 152d may include a combination of transparent and opaque materials. For example, level block 152d may include a stack of transparent material portions 152x and opaque material portions 152z. The features, materials, or properties of the transparent portion 152x may be similar to those described with respect to level block 152a. The features, materials, or properties of the opaque portion 152z may be similar to those described with respect to level block 152b or opaque portion 152y.

[0079] The opaque portion 152z includes a grating or pattern of openings in the opaque material that selectively allow a laser beam 151A aligned with such openings to pass through stage 152d. In some instances, such openings may be perpendicularly aligned with interconnects 121, 131, 141 or with semiconductor devices 10, 20, 30 on substrate 11. In some instances, the opaque material is configured to be perpendicularly aligned with portions of the first substrate that are not aligned with interconnects 121, 131, 141 or with semiconductor devices 10, 20, 30.

[0080] As described with respect to the laser beam 151A passing through stage 152a in Figure 6A, such an aligned laser beam 151A will cause heating and bonding of interconnects 121, 131, 141. Conversely, a laser beam 151A misaligned with such an opening will be blocked by the opaque material of the opaque portion 152z and will not pass through stage 152d.

[0081] As shown, a laser beam 151A is irradiated from a laser source 151 toward a stage block 152d, and this laser beam 151A can pass through the transparent material portion 152x of the stage block 152d. A laser beam 151A aligned with an opening defined by a grating in the opaque portion 152z can pass through the stage block 152d to reach the substrate 11 and cause heating of the interconnects 121, 131, and 141 for bonding. A laser beam 151A misaligned with the opening of the grating in the opaque portion 152z will be substantially blocked from passing through the stage block 152d. The interconnects 121, 131, and 141 can be heated until they bond with the conductive structure 112 of the substrate 11.

[0082] The grating of the opaque portion 152z can be configured such that the areas of the substrate 11 that need to be exposed for heating the interconnects 121, 131, 141 via the laser beam 151A passing through the stage block 152d are aligned with the opening pattern. Other areas of the substrate 11 that do not need to be exposed for bonding can be aligned with the opaque material of the opaque portion 152z, or misaligned with the opening pattern, to block or shield the laser beam 151A. Such features can limit unnecessary thermal exposure of the shielded areas of the substrate 11, thereby limiting excessive thermal expansion or warping.

[0083] In some instances, the grating of the opaque portion 152z can be configured such that the opening pattern exposes a portion of the substrate 11 where the semiconductor devices 10, 20, and 30 are located, while other portions of the substrate 11 outside the periphery of the semiconductor devices 10, 20, and 30 remain shielded by the material of the opaque portion 152z.

[0084] In some instances, the grating of the opaque portion 152z can be configured such that the opening pattern exposes portions of the substrate 11 containing the interconnects 121, 131, 141, while other portions of the substrate 11 outside the periphery of the interconnects 121, 131, 141 remain shielded by the material of the opaque portion 152z. For example, as seen with respect to the semiconductor device 20, the grating is configured such that the opaque portion 152z: (a) exposes portions of the substrate 11 below the electronic components 12, 13 within the periphery of the interconnects 121, 131, and (b) shields portions of the substrate 11 below the electronic components 12, 13 outside the periphery of the interconnects 121, 131 (i.e., the laser beam is directed to the interconnects 121, 131, but does not pass through the electronic components).

[0085] There may be instances where the thickness of the transparent portion 152x is greater than the thickness of the opaque portion 152z. For example, the thickness of the transparent portion 152x may range from about 1 mm to about 300 mm, and the thickness of the opaque portion 152z may range from about 100 µm to about 100 mm. In some instances, the opaque portion 152z may include one or more patterned coatings covering the transparent portion 152x.

[0086] Interconnects 121, 131, and 141 can be heated until they bond to the conductive structure 112 of the substrate 11. Thermal and time parameters can be appropriately controlled to minimize bonding time for rapid throughput, while avoiding exposure to higher temperatures to minimize excessive thermal expansion or warping of the substrate 11. In some instances, the laser beam 151A may irradiate for about 2000 ms or less, or about 1000 ms or less, to induce appropriate heating of the interconnects 121, 131, and 141 and bonding with the substrate 11. In some instances, the heat induced by the laser beam 151A on the interconnects 121, 131, 141, or the substrate 11 can be controlled to remain below about 300°C or 350°C, for example, in the range of about 150°C to about 350°C or about 230°C to about 280°C.

[0087] In some instances, the LAB tool 15 may include a laser source 151U, which may be similar to laser source 151 but may be configured to emit a laser beam 151B toward the top side of the semiconductor devices 10, 20, 30 or the top side of the stage 152a. The laser beam 151B may be similar to laser beam 151A and may induce heating of the interconnects 121, 131, 141 from the top of the respective semiconductor devices 10, 20, 30 to aid in bonding the interconnects 121, 131, 141 to the substrate 11.

[0088] As shown in Figures 6A-6D, LAB tool 15 may be provided together with pressure tool 65 as part of hybrid connector tool 60. In some embodiments, hybrid connector tool 60 may include or may resemble hybrid connector tool 40, as described with respect to Figure 2B or Figure 5. For example, pressure tool 65 may include or may resemble TCB tool 35. Pressure tool 65 may include plate 651, which may resemble plate 351 or may provide one or more of pressure, heat, or vibration to semiconductor device 30. In some instances, plate 651 of pressure tool 65 may serve as a counterweight plate to provide pressure to the top of semiconductor device 30 (e.g., to the top of electronic component 12 or 13) without simultaneously providing heat or vibration. In some instances, the inherent weight of plate 651 may provide pressure to the top of semiconductor device 30 without requiring any additional force to push plate 651 onto semiconductor device 30. The pressure applied by plate 651 on the top side of semiconductor device 30 can prevent or limit excessive warping of semiconductor device 30, electronic components 12, 13 or substrate 11 during bonding.

[0089] In some embodiments, the laser source 151U may be used in conjunction with the pressure tool 65 during bonding. For example, the characteristics, properties, or materials of the plate 651 of the pressure tool 65 may be similar in transmittance to those described with respect to stages 152a, 152b, 152c, or 152d, such that the laser beam 151B can induce bonding of the semiconductor device 30 to the substrate 11 through the pressure tool 65.

[0090] For example, as shown in Figure 6A, plate 651 may be transparent or comprise transparent material, similar to stage 152a. Laser beam 151B from laser source 151U may pass through plate 651 and reach semiconductor device 30 or electronic components 12, 13 to induce heat for bonding interconnects 121, 131, similar to that described with respect to stage 152a and laser beam 151A.

[0091] As another example, as shown in Figure 6B, plate 651 may be opaque or comprise opaque material, similar to stage 152b. The laser beam 151B from laser source 151U may be shielded or blocked by plate 651, but plate 651 may be heated to induce heat transfer for joining interconnects 121, 131, similar to that described with respect to stage 152b and laser beam 151A.

[0092] As another example, as shown in FIG6C, plate 651 may comprise a combination or stack of transparent and opaque materials or layers, similar to stage 152c. Laser beam 151B from laser source 151U can pass through the transparent material of plate 651 and reach the opaque material of plate 651. At the opaque material, the laser beam may be blocked, but plate 651 can be heated to induce heat transfer for bonding interconnects 121, 131, similar to that described with respect to stage 152c and laser beam 151A.

[0093] As another example, as shown in FIG6D, plate 651 may include a combination or stack of transparent and opaque materials or layers defining a grating with transparent and opaque portions, similar to stage block 152d. A portion of the laser beam 151B from laser source 151U may be blocked by the opaque material of the grating of plate 651. However, a portion of the laser beam 151B from laser source 151U may pass through the transparent material and opening pattern in the grating of plate 651 to reach the top of semiconductor device 30 or electronic components 12, 13 to induce heat transfer for bonding interconnects 121, 131, similar to that described with respect to stage block 152d and laser beam 151A.

[0094] Figure 7A shows a cross-sectional view of a bonding stage for bonding interconnects of semiconductor devices using a LAB tool 75. The LAB tool 75 may include a laser source 751L configured to emit a laser beam 751A, or a laser source 751U configured to emit a laser beam 751B. Figure 7B shows a plan view of different exemplary operating conditions of the LAB tool 75 utilizing the laser beam 751A of the laser source 751L or the laser beam 751B of the laser source 751U. The LAB bonding tool 75 is shown in Figure 7A for bonding interconnects of semiconductor devices 10', 10, 20, 30 to corresponding substrates 11.

[0095] Semiconductor device 10' is shown as being placed on stage 152 and may be similar to semiconductor device 10, 20, or 30 or variations thereof. Semiconductor device 10' may include electronic components 12 or 13 on a first side of substrate 11' and may include interconnects 101' or electronic components 13' on a second side of substrate 11'. For example, in some instances, semiconductor device 10' may lack electronic components 13' on the second side of substrate 11' or may lack electronic components 13' on the first side of substrate 11', such that electronic components 12 are attached to stage 152. In some instances, interconnects 121, 131, 131', or 141 may be simultaneously bonded to the respective sides of substrate 11' via laser beams 751A or 751B of laser sources 751L or 751U. In some instances, interconnects 121 or 131 of electronic components 12 or 13 can be pre-bonded to a first side of substrate 11' via any of the first LAB bonding or hybrid bonding processes or tools described herein. Then, semiconductor device 10' can be reversed and placed on stage block 152 such that a second side of substrate 11' faces the laser source 751U of LAB tool 75, as shown in FIG7A, for bonding interconnects 101' or 131' via laser beam 751B.

[0096] LAB tool 75 may be similar to LAB tool 15 and may include a laser source 751L for aiming stage block 152. Stage block 152 may include any of one or more variations, including, but not limited to, those described with respect to stages 152a, 152b, 152c, and 152d with respect to Figures 6A-6D. Laser source 751L may be similar to laser source 151 and may include a laser emitter array 755L. In some instances, laser source 751L may be referred to as a laser emitter array, laser emitter panel, or laser diode panel.

[0097] Laser emitter 755L can emit a corresponding laser beam 751A individually, which may be similar to laser beam 151A. Laser emitter 755L and corresponding laser beam 751A can be individually vertically aligned with a portion of a target, such as a portion of stage 152 or a portion of semiconductor devices 10, 10', 20, 30. In some instances, laser beam 751A emitted by laser source 751L can exit the corresponding laser emitter 755L and proceed individually toward its corresponding target. In some instances, laser source 751L does not necessarily rely on filters, collimators, or lenses to group, aim, or guide a group of laser beams 751A. Laser source 751L may include a sufficiently large area to process many substrates simultaneously, such as RDL substrates, preformed substrates, or wafers. In some instances, the length and width of laser source 751L may be at least approximately 300 mm × 300 mm. For example, the length and width of the laser source 751L can be at least approximately 600 mm × 600 mm.

[0098] In some instances, a single laser emitter 755L may include a laser diode, such as an indium phosphide (InP), gallium nitride (GaN), zinc selenide (ZnSe), aluminum gallium arsenide (AlGaAs), indium gallium nitride (InGaN), or zinc oxide (ZnO) diode. Examples exist where a single laser emitter 755L may include more than one laser diode. In some instances, a single laser emitter 755L may include a length or width of about 100 µm to about 2 mm. In some instances, the target area of ​​a single laser emitter may include a length or width of about 100 µm to about 2 mm. In some instances, a single laser emitter 755L may emit a laser beam 751A with a power of about 10 milliwatts to about 2 watts. In some instances, a single laser emitter 755L may emit a laser beam 751A with a wavelength of about 600 µm to about 2,000 µm.

[0099] As shown in Figures 7A and 7B, the LAB tool 75 can control the laser source 751L, enabling different laser emitters 755L to selectively emit corresponding laser beams 751A toward different target areas at different power levels. For example, the LAB tool 75 can configure different individual laser emitters 755L to emit corresponding laser beams 751A at different laser power levels, such as a high-power beam 751x, a medium-power beam 751y (with lower power than the high-power beam 751x), or a low-power beam 751z (with lower power than the high-power beam 751x or the medium-power beam 751y). In some instances, such laser configurations can achieve different, adjustable, or varying power or temperature gradients on the target. In some instances, one or more laser beams 751A emitted as the low-power beam 751z may correspond to an unpowered or "off" state.

[0100] In some instances or regions, the LAB tool 75 can control the laser source 751L such that the laser emitter 755L, which is vertically aligned around the interconnects 121, 131, 141, emits a corresponding laser beam 751A in the form of a high-power beam 751x to heat the interconnects 121, 131, 141 and bond them to the substrate 11.

[0101] In some instances or regions, such as with regard to semiconductor device 20, LAB tool 75 can control laser source 751L such that laser emitter 755L, vertically aligned within the periphery of electronic components 12, 13, 14, emits a corresponding laser beam 751A in the form of a high-power beam 751x to bond electronic components 12, 13, 14 to substrate 11.

[0102] In some instances, the LAB tool 75 can control the laser source 751L so that the laser emitter 755L, which is perpendicularly aligned with the area outside the periphery of the interconnects 121, 131, 141, emits a corresponding laser beam 751A in the form of a medium-power beam 751y or a low-power beam 751z.

[0103] For example, in Figure 7A, with respect to the semiconductor device 10, a laser emitter 755L, which is perpendicularly aligned with the electronic components 12 and 13 and located outside the periphery of the interconnects 121 and 131, emits a corresponding laser beam 751A in the form of a medium-power beam 751y.

[0104] For example, in Figure 7A, with respect to semiconductor device 30, laser emitter 755L, which is perpendicularly aligned with electronic components 12, 13 and outside the periphery of interconnects 121, 131, emits a corresponding laser beam 751A in the form of a low-power beam 751z.

[0105] In some instances, such as with regard to semiconductor device 20, LAB tool 75 can control laser source 751L such that laser emitter 755L, which is perpendicularly aligned with the area between the peripheries of electronic components 12, 13, 14, emits a corresponding laser beam 751A in the form of a low-power beam 751z.

[0106] In some instances, such as with regard to semiconductor device 30, LAB tool 75 can control laser source 751L such that laser emitter 755L, which is perpendicularly aligned with the area between the periphery of electronic components 12, 13, emits a corresponding laser beam 751A in the form of a medium power beam 751y.

[0107] In some instances or regions, the LAB tool 75 can control the laser source 751L so that the laser emitter 755L, which is vertically aligned with the boundary region between the semiconductor devices 10, 10', 20, 30, emits a corresponding laser beam 751A in the form of a low-power beam 751z.

[0108] In some instances, LAB tool 75 may include a laser source 751U located above level block 152. In some instances, laser source 751U may be similar to laser source 151 or 151U. In some instances, laser source 751U may be similar to laser source 751L and may include a laser emitter array including laser emitter 755U (which may be similar to laser emitter 755L). There may be embodiments where LAB tool 75 may include laser source 751U but not laser source 751L, or embodiments that may include laser source 751L but not laser source 751U.

[0109] Laser emitter 755U can emit a corresponding laser beam 751B individually, which can be similar to laser beam 751A. Laser emitter 755U and the corresponding laser beam 751B can be individually vertically aligned with a portion of a target, such as a portion of stage 152 or a portion of semiconductor devices 10, 10', 20, 30. In some instances, the laser beam 751B emitted by laser source 751U can leave the corresponding laser emitter 755U and proceed individually toward its corresponding target. In some instances, laser source 751U does not necessarily rely on filters, collimators, or lenses to group, aim, or guide a group of laser beams 751B.

[0110] The upper laser emitter 755U of the upper laser source 751U can be aimed at the top side of the stage block 152, and the lower laser emitter 755L of the lower laser source 751L can be aimed at the bottom side of the stage block 152. The LAB tool 75 can control the laser sources 751U and 751L to simultaneously emit or modulate the laser beam 751A or 751B during the engagement of the substrate 11 with the semiconductor devices 10, 10', 20, 30 or with the interconnects 121, 131, 101' or 141.

[0111] As shown in Figures 7A and 7B, the LAB tool 75 can control the laser source 751U, enabling different laser emitters 755U to selectively emit corresponding laser beams 751B toward different target areas at different power levels. For example, the LAB tool 75 can configure different individual laser emitters 755U to emit corresponding laser beams 751B at different laser power levels, such as a high-power beam 751x, a medium-power beam 751y (with lower power than the high-power beam 751x), or a low-power beam 751z (with lower power than the high-power beam 751x or the medium-power beam 751y). In some instances, such laser configurations can achieve different, adjustable, or varying power or temperature gradients on the target. In some instances, one or more laser beams 751B emitted as the low-power beam 751z may correspond to an unpowered or "off" state.

[0112] In some instances or regions, the LAB tool 75 can control the laser source 751U such that the laser emitter 755U, which is vertically aligned within the periphery of the interconnects 121, 131, 101', 141, emits a corresponding laser beam 751B in the form of a high-power beam 751x to heat the interconnects 121, 131, 101', 141 and bond them to the substrate 11.

[0113] In some instances or regions, such as with regard to semiconductor device 20, LAB tool 75 can control laser source 751U such that laser emitter 755U, vertically aligned within the periphery of target electronic components 12, 14, emits a corresponding laser beam 751B in the form of a high-power beam 751x to bond electronic components 12, 14 to substrate 11. In some cases, not all components of the device need to be targeted. For example, also with regard to semiconductor device 20, LAB tool 75 can control laser source 751U such that laser emitter 755U, vertically aligned within the periphery of electronic component 13, emits a corresponding laser beam 751B in the form of a low-power beam 751z or a medium-power beam 751y. This adjustment can be made, for example, when electronic component 13 includes a material sensitive to laser beam 751B, or a material that can block, reflect, or impede the passage of laser beam 751B. In some instances, such materials may include molding compounds or metals, for example, for heat dissipation or for electromagnetic interference (EMI) shielding.

[0114] In some instances, the LAB tool 75 can control the laser source 751U so that the laser emitter 755U, which is perpendicularly aligned with the area outside the periphery of the interconnects 121, 131, 101', 141, emits a corresponding laser beam 751A in the form of a medium-power beam 751y or a low-power beam 751z.

[0115] As shown in Figure 7A, the pressure tool 65 may be provided together with the LAB tool 75 as part of the mixing connector tool 70. The pressure tool 65 may be as described with respect to Figure 6.

[0116] The pressure tool 65 may include or be similar to the TCB tool 35, wherein the plate 651 may be similar to or may provide one or more of pressure, heat, or vibration to the semiconductor device 30 during bonding. In some instances, the plate 651 of the pressure tool 65 may serve as a counterweight plate to apply pressure to the top of the semiconductor device 30 (e.g., to the top of electronic component 12 or 13) without simultaneously providing heat or vibration. In some instances, the inherent weight of the plate 651 may apply pressure to the top of the semiconductor device 30 without requiring any additional force to push the plate 651 onto the semiconductor device 30. The pressure applied by the plate 651 on the top side of the semiconductor device 30 may prevent or limit excessive warping of the semiconductor device 30, electronic component 12, 13, or substrate 11 during bonding.

[0117] In some embodiments, the laser source 751U may be used in conjunction with the pressure tool 65 during bonding. For example, the features, properties, or materials of the plate 651 of the pressure tool 65 may be similar to those described with respect to any of the figures in Figures 6A-6D, such that the laser beam 751B can induce bonding of the semiconductor device 30 to the substrate 11 through the pressure tool 65.

[0118] As an example, similar to that described with respect to Figure 6A, plate 651 may be transparent or comprise transparent material. A laser beam 751B (e.g., a high-power beam 751x or a medium-power beam 751y) from laser source 751U may pass through plate 651 and reach the respective target areas of semiconductor device 30 or electronic components 12, 13 to induce heat for bonding interconnects 121, 131.

[0119] As another example, similar to that described with respect to Figure 6B, plate 651 may be opaque or comprise opaque material. The laser beam 751B from laser source 751U (e.g., high-power beam 751x or medium-power beam 751y) may be shielded or blocked by plate 651, but plate 651 may be heated to induce heat transfer for joining interconnects 121, 131.

[0120] As another example, similar to that described with respect to Figure 6C, plate 651 may include a combination or stack of transparent and opaque materials or layers. A laser beam 751B (e.g., a high-power beam 751x or a medium-power beam 751y) from laser source 751U can pass through the transparent material of plate 651 and reach the opaque material of plate 651, where the laser beam may be blocked, but plate 651 can be heated to induce heat transfer for bonding interconnects 121, 131.

[0121] As another example, similar to that described with respect to FIG. 6D, plate 651 may include a combination or stack of transparent and opaque materials or layers defining a grating with transparent and opaque portions. A portion of the laser beam 751B from laser source 751U may be blocked by the opaque material of the grating of plate 651. However, a portion of the laser beam 751B from laser source 751U (e.g., a high-power beam 751x or a medium-power beam 751y) may pass through the transparent material and opening pattern in the grating of plate 651 to reach the top of semiconductor device 30 or electronic components 12, 13 to induce heat transfer for bonding interconnects 121, 131.

[0122] Figure 7C shows corresponding plan views of the semiconductor device 20 (including electronic components 12, 13, 14 on the substrate 11) and the laser source 751 (including a corresponding laser emitter 755 perpendicularly aligned with the semiconductor device 20), wherein such plan views correspond to the corresponding portions of the side view of Figure 7A. The laser source 751 may correspond to either laser source 751L or laser source 751U. The laser emitter 755 may correspond to either laser emitter 755L or 755U.

[0123] In this example, the LAB tool 75 controls a laser emitter 755, which is perpendicularly aligned with electronic components 12, 13, and 14, to emit a laser beam in the form of a high-power beam 751x (laser beam 751A or 751B in Figure 7A), thereby bonding electronic components 12, 13, and 14 to the substrate 11. In this example, the LAB tool 75 also controls a laser emitter 755, which is not perpendicularly aligned with electronic components 12, 13, and 14, to emit a laser beam in the form of a low-power beam 751z (e.g., laser beam 751A or 751B in Figure 7A).

[0124] In some instances, the LAB tool 75 may include a bonding monitor 75i that measures the temperature of multiple regions of the semiconductor device 20 in real time during bonding. The bonding monitor 75i may include, for example, an optical infrared imager or a monitor. The bonding monitor 75i may be configured to determine whether the laser beam of the laser emitter 755 has achieved the target temperature for each of these multiple regions of the semiconductor device 20. This monitoring can be used to confirm the appropriate temperature at which interconnect bonding has been achieved and to prevent temperatures that could cause overheating, thermal expansion, warping, or damage to the substrate 11 or electronic components 12, 13, 14. If the bonding monitor 75i determines that some target regions of the semiconductor device 20 are measured to be outside their target temperature range (“off-range”) during bonding, the LAB tool 75 may react in real time and selectively control individual laser emitters 755 aligned with such off-range regions to increase or decrease the power of the laser beam emitted toward such off-range regions to direct them into the target temperature range.

[0125] Examples of steps 7C1-7C4 illustrate this type of operation. As shown in Figure 7C, the amplification portion 12Z of the electronic component 12 and the amplification portion 755Z of the laser source 751 are shown. The amplification portion 755Z presents a laser emitter 755 that is perpendicularly aligned with the electronic component 12.

[0126] In step 7C1, as seen in the amplification section 755Z, the laser emitter 755 emits a laser beam at an initial or baseline power toward the region corresponding to the electronic component 12, and as seen in the amplification section 12Z, such laser beams in the electronic component 12 generate heat accordingly.

[0127] In step 7C2, the bonding monitor 75i monitors the temperature of multiple regions of the electronic component 12 during bonding, identifying off-range regions 12-1 at temperatures above their target temperature range and off-range regions 12-2 at temperatures below their target temperature range.

[0128] In step 7C3, based on monitoring information from the engagement monitor 75i, the LAB tool 75 selectively controls laser emitters 755-1 and 755-2 to adjust the power of their respective laser beams. Laser emitter 755-1 is vertically aligned with the off-range region 12-1 of the electronic component 12, and laser emitter 755-2 is vertically aligned with the off-range region 12-2 of the electronic component 12. To counteract the high temperature measured at the off-range region 12-1 of the electronic component 12, the LAB tool 75 can selectively control laser emitter 755-1 to reduce the power of its laser beam. To counteract the low temperature measured at the off-range region 12-2 of the electronic component 12, the LAB tool 75 can selectively control laser emitter 755-2 to increase the power of its laser beam.

[0129] In step 7C4, due to the laser beam adjustment of the corresponding laser emitters 755-1 and 755-2, the off-range regions 12-1 and 12-2 of the electronic component 12 reach their target temperatures. The bonding monitor 75i can continuously monitor multiple regions of the electronic component 12, allowing the LAB tool 75 to selectively control the power of the respective laser emitters 755 as needed to keep multiple regions of the electronic component 12 within their target temperature range during bonding.

[0130] This disclosure includes references to certain examples. However, those skilled in the art will understand that various changes can be made and equivalents can be substituted without departing from the scope of this disclosure. Those skilled in the art will also understand that several variations or options are inherently disclosed by the drawings supported by the specification for simplicity and clarity. For example, any of semiconductor devices 10, 10', 20, 30 may include a dielectric, such as an underfill or a similar molding compound encapsulation, surrounding any of the respective interconnects 121, 131, 141, 101' to further secure them to the respective substrates 11, 11'. As another example, any of semiconductor devices 10, 10', 20, or 30 may include, for example, an encapsulation of a molding compound covering one or more sides of substrates 11, 11' and one or more sides of elements 12, 13, 13', 14, 101'. Furthermore, modifications can be made to the disclosed examples without departing from the scope of this disclosure. Therefore, it is intended that this disclosure is not limited to the disclosed instances, but rather that it encompasses all instances within the scope of the appended request.

[0131] 7C1: Steps 7C2: Steps 7C3: Steps 7C4: Steps 10: Semiconductor devices 10': Semiconductor device 11:Substrate 11':Substrate 12: Electronic components / parts 12-1: Deviation from the range area 12-2: Deviation from the range area 12Z: Amplification section 13: Electronic components / parts 13': Electronic components / parts 14: Electronic components / parts 15: Laser-Assisted Bonding (LAB) Tools / LAB Tools 20: Semiconductor devices 30: Semiconductor devices 35: Thermal / Pressure Bonding (TCB) Tools / Thermal / Pressure Bonding Machine Tools 40: Hybrid Connector Tool 60: Hybrid Connector Tool 65: Pressure Tools 70: Hybrid Connector Tool 75: LAB Tools 75i: Connected Monitor 101': Component 111: Dielectric Structure 112: Conductive structure 121: Interconnector 131: Interconnector 131': Interconnector 141: Interconnectors 151: Laser source 151A: Laser Beam 151B: Laser Beam 151U: Laser Source 152: Level Block 152a: Level Block 152b: Level Block 152c: Level Block 152d: Level Block 152x: Transparent material part / Transparent part 152y: Opaque material portion / Opaque part 152z: Opaque material portion / Opaque part 153: Window 351: Board 352: Heater source 651: Board 751: Laser Source 751A: Laser Beam 751B: Laser Beam 751L: Laser Source 751U: Laser Source 751x: High-power beam 751y: Medium power beam 751z: Low-power beam 755: Laser Emitter 755-1: Laser Emitter 755-2: Laser Emitter 755L: Laser Emitter 755U: Laser Emitter 755Z: Amplification section

Claims

1. A method for manufacturing a semiconductor device, comprising: An electronic component is provided above a substrate, the electronic component including a body and interconnects, wherein the interconnects of the electronic component are metal and contact a conductive structure of the substrate; the substrate is provided on a laser-assisted bonding tool, wherein the laser-assisted bonding tool includes a stage block containing a window, wherein the window of the stage block includes a material that allows at least some amount of light to pass through; and the interconnects are heated using a laser beam passing through the window until the interconnects are bonded to the conductive structure. The heat applied to the interconnect is greater than the heat applied to the body of the electronic component; wherein the stage block supports the window and the substrate above the laser beam, and wherein the laser beam is guided to the interconnect through the bottom side of the window and through the substrate; wherein the substrate is located on the window, and the window is configured to support the substrate; and wherein the window is as large as or larger than the bottom side of the substrate, such that the entire bottom side of the substrate is exposed through the window.

2. The method according to claim 1, wherein the laser beam has a depth of field, and the interconnect is in the depth of field when heated.

3. The method according to claim 1, wherein the window comprises quartz.

4. The method according to claim 1, wherein the electronic component is above a first side of the substrate, and the laser beam is applied to the interconnect from a second side of the substrate opposite to the first side.

5. The method according to claim 1, further comprising maintaining the temperature of the substrate directly adjacent to the interconnect below the temperature of the interconnect when heat is applied to the interconnect from the laser beam.

6. The method according to claim 1, further comprising maintaining the temperature of the electronic component directly adjacent to the interconnect below the temperature of the interconnect when heat is applied to the interconnect from the laser beam.

7. The method according to claim 1, further comprising maintaining the temperature of a molding compound adjacent to and directly adjacent to the interconnect at a lower temperature than the temperature of the interconnect when heat is applied to the interconnect from the laser beam.

8. A method for manufacturing a semiconductor device, comprising: An electronic component is provided above a first substrate side of a substrate, wherein the electronic component comprises a semiconductor material, and wherein interconnects of the electronic component contact a conductive structure of the substrate; the substrate is provided in a hybrid bonding tool, the hybrid bonding tool comprising a laser-assisted bonding tool and a thermal / pressure bonding tool; a first heat is applied to the interconnects via a laser beam from the laser-assisted bonding tool through a second substrate side opposite to the first substrate side; The laser-assisted bonding tool applies a second heat and pressure to the interconnect via the electronic component using the heat / pressure bonding tool; wherein the laser-assisted bonding tool includes a window comprising a material that allows at least some amount of light to pass through, wherein the substrate is located on the window, and wherein the laser beam is applied to the interconnect via the window; and the laser beam is guided to the interconnect via the bottom side of the window and through the substrate.

9. The method according to claim 8, wherein the laser beam has a depth of field, and the interconnect is in the depth of field when heated.

10. The method according to claim 8, wherein the window is configured to support the substrate.

11. The method according to claim 8, wherein the heat / pressure bonding tool includes a heater source and a heat / pressure plate, wherein the second heat is applied through the heat / pressure plate using the heater source, and the pressure is applied by pressing the heat / pressure plate onto the electronic component.

12. The method according to claim 8, wherein the laser-assisted bonding tool and the heat / pressure bonding tool are applied simultaneously.

13. The method according to claim 8, further comprising maintaining the temperature of the substrate directly adjacent to the interconnect below the temperature of the interconnect when the first heat is applied to the interconnect from the laser-assisted bonding tool.

14. The method according to claim 8, further comprising, when the first heat is applied to the interconnect from the laser-assisted bonding tool, using the heat / pressure bonding tool to maintain the temperature of the electronic component directly adjacent to the interconnect below the temperature of the interconnect.

15. The method according to claim 10, wherein when the first heat is applied, the window contacts a second side of the substrate.

16. The method according to claim 8, wherein the window is the same size or larger than the second substrate, such that the entire second substrate is exposed through the window.

17. A system configured to manufacture a semiconductor device, comprising: A laser-assisted bonding tool includes: a laser source; a stage block having a window above the laser source, wherein the window of the stage block comprises a material that allows at least some amount of light to pass through; wherein the laser source is configured to guide a laser beam through the bottom side of the window to apply a first heat to an interconnect of a workpiece supported by the stage block, wherein the workpiece includes: a substrate having a first side, a second side opposite to the first side, and a conductive structure; and an electronic component located above the first side of the substrate, the electronic component including a body and a metal interconnect contacting the conductive structure of the substrate; wherein the first heat is applied to the interconnect through the second side of the substrate, wherein the heat applied to the interconnect is greater than the heat applied to the body of the electronic component; wherein the laser beam passes through the bottom side of the window and through the substrate to be guided to the interconnect; wherein the substrate is located on the window, and the window is configured to support the substrate; and wherein the window is the same size as or larger than the second side of the substrate, such that the entire second side of the substrate is exposed through the window.

18. The system of claim 17, wherein the laser beam has a depth of field (DOF) and the interconnect is located within the depth of field when heated.

19. The system according to claim 17, further comprising: A heat / pressure bonding tool comprising a heat / pressure plate; wherein: the heat / pressure plate is configured to press a top side of the electronic component opposite to the interconnect when the laser source applies a first heat to the interconnect, and the heat / pressure plate is configured to transfer a second heat or pressure to the interconnect when the heat / pressure plate presses the top side of the electronic component.

20. The system according to claim 17, wherein the window comprises quartz or ceramic.

21. A method for fabricating a semiconductor device using a laser-assisted bonding (LAB) tool, the method comprising: Provide laser source; And provide a level block, the level block including a window located above the laser source; The laser source is configured to direct a laser beam to the window to apply a first heat to an interconnect of a workpiece supported by the stage block; wherein the workpiece includes an electronic component containing the interconnect and a substrate containing a conductive structure in contact with the interconnect; wherein the laser beam is directed from below the workpiece to the interconnect and through the window; wherein when the first heat is applied to the interconnect from the laser source, the temperature of a portion of the workpiece directly adjacent to the interconnect is kept lower than the temperature of the interconnect; wherein the laser beam is directed to the interconnect through the bottom side of the window and through the substrate; wherein the workpiece is located on the window, and the window is configured to support the workpiece; and wherein the workpiece window is the same size or larger than the bottom side of the substrate of the workpiece, such that the entire bottom side of the substrate is exposed through the workpiece window.

22. The method according to request item 21, wherein: The substrate includes a first side and a second side opposite to the first side; wherein the electronic component is above the first side of the substrate and contacts the conductive structure through the interconnect; and wherein the laser source is configured to emit the laser beam to apply the first heat to the interconnect through the second side of the substrate.

23. The method according to claim 21, further comprising: A heat / pressure bonding (TCB) tool is provided, comprising a heat / pressure plate; wherein: when the laser source applies a first heat to the interconnect, the heat / pressure plate is configured to press a top side of the electronic component opposite the interconnect; and when the heat / pressure plate presses the top side of the electronic component, the heat / pressure plate is configured to transfer a second heat and pressure to the interconnect.

24. The method according to claim 21, wherein the window comprises ceramic.

25. The method according to claim 21, wherein the electronic component comprises silicon and the substrate comprises an organic dielectric material.

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