Solar cell, solar module and method for manufacturing a solar cell
Patent Information
- Application Number
- TW110147733
- Authority / Receiving Office
- TW · TW
- Patent Type
- Patents
- Current Assignee / Owner
- Priority Date
- 2020-12-30
- Filing Date
- 2021-12-20
- Publication Date
- 2026-07-11
- Estimated Expiration
- 2041-12-19
Smart Images

Figure IMG-2_DRAW_110147733-A0304-14-0001-1 
Figure IMG-2_DRAW_110147733-A0304-14-0002-2 
Figure IMG-2_DRAW_110147733-A0304-14-0002-3
Abstract
Description
Technical Field
[0001] This disclosure relates to solar cells and methods for their formation. Prior Technology
[0002] A solar module that generates electricity from sunlight contains an array of solar / photovoltaic cells, each containing a multilayer semiconductor structure configured between one or more front and back electrodes.
[0003] Typically, the substrate and the emitter layer disposed on the surface of the substrate form a pn junction (that is, one of the substrate and the emitter layer is an n-type material, and the other is a p-type material). The pn junction responds to the light incident on the solar cell and facilitates the generation of current.
[0004] A surface field layer (such as a front or back field layer) is disposed on the surface of the substrate opposite to the emitter layer. The surface field layer is doped (i.e. has the opposite charge type to the emitter layer) and configured to draw charge carriers from the substrate.
[0005] The emitter layer and surface field layer are typically formed of amorphous silicon (a-Si), while the substrate is formed of crystalline silicon (c-Si), thus achieving heterojunction technology (HJT) type solar cells.
[0006] In this type of HJT solar cell, a transparent conducting oxide (TCO) layer is interposed between the surface field layer and one of the electrodes, and a further TCO layer is interposed between the emitter layer and another electrode. The TCO layer is configured to draw charge carriers from the active layers of the solar cell (such as the surface field layer and the emitter layer) and transport them to the individual electrodes.
[0007] To maximize the efficiency of solar cells, it is crucial to maximize the photoelectronic properties of the TCO layer. However, since transparent materials are generally insulators and conductive materials tend to have metallic properties, there is a fundamental trade-off between the optical and electrical properties of such materials.
[0008] Therefore, it is still necessary to improve the optical properties of the TCO layer of this type of solar cell, as well as their charge carrier transport properties. Summary of the Invention
[0009] According to the first aspect, a solar cell is provided, comprising: a substrate (e.g., a crystalline silicon substrate); a semiconductor layer disposed on the back side of the substrate, configured such that the solar cell does not face a radiation source when in use (or is configured to face away from a radiation source); and a transparent conductive region disposed on the surface of the semiconductor layer. The transparent conductive region comprises: a first layer having a first operating function; and a second layer having a second operating function and interposed between the first layer and the semiconductor layer. The second operating function of the second layer is greater than the first operating function of the first layer. Specifically, the semiconductor layer is interposed between the substrate and the transparent conductive region.
[0010] During the operation of a known solar cell, photogenerated carriers are collected by a TCO (Transformer Coefficient of Chemical Oxide) and transported to the electrodes. This TCO layer may be constructed with a low operating function to increase its conductivity, thereby increasing the transport of photogenerated carriers to the electrodes. However, the low operating function of the TCO layer can lead to an increase in contact resistance with the semiconductor layer (such as amorphous silicon [a-Si]) on top of the solar cell where the TCO layer is disposed.
[0011] The increased contact resistance originates from the formation of a potential barrier (such as a parasitic Schottky barrier) at the interface between the TCO and the semiconductor layer. This potential barrier generates a diffusion potential, which inhibits the TCO layer from collecting photogenerated carriers, thereby reducing the efficiency of the solar cell.
[0012] The transparent conductive region of this invention has a second layer disposed between the first layer and the semiconductor layer. The second layer has a higher operating function than the first layer. Thus, the second operating function of the second layer is more suitable for matching the valence band or conduction band of the semiconductor layer, thereby reducing parasitic potential barriers. Consequently, the transparent conductive region can draw more photogenerated carriers from the semiconductor layer, thereby increasing the fill factor (FF) and efficiency of the solar cell.
[0013] Furthermore, the first layer of the transparent conductive region has a smaller operating function, resulting in lower transparency (compared to the second layer). This leads to an increase in unabsorbed photons being reflected back towards the photosensitive layers of the solar cell (such as the semiconductor layer).
[0014] The relatively low operating function of the first layer also leads to increased conductivity (compared to the second layer), thereby promoting the transfer of photogenerated charge carriers to the electrodes, which may be disposed on the outer (e.g., outermost) surface of the transparent conductive region.
[0015] The term "work function" refers to the energy difference between the Fermi level of a solid material and the energy of the free space outside the solid material (i.e., the vacuum level). Thus, this term defines the minimum energy required to release an electron from a solid material at absolute zero.
[0016] When the corresponding energy value of a material (measured in electron volts [eV]) is greater than that of another material, the working function of that material is considered to be greater than that of the other material.
[0017] The semiconductor layer is disposed on the back side of the substrate in a configuration where the solar cell does not face the radiation source during use. In this manner, a transparent conductive region is disposed on the back side of the semiconductor layer. The first layer of the transparent conductive region (which defines the outermost layer) has a low operating function and therefore low transparency (i.e., high reflectivity). Accordingly, the first layer may be configured as a light-reflecting layer that reflects photons that may have passed through the transparent conductive region back toward the solar cell. Furthermore, the increased conductivity of the first layer reduces the contact resistance with the back electrode that may be disposed on its outer surface.
[0018] It will be understood that when an element, such as a layer, film, region, or substrate, is referred to as "on," "adjacent to," or "opposite to" another element, it can be "directly on," "directly adjacent to," or "directly opposite" to that further element; alternatively, one or more intermediate elements may be present. Conversely, when an element is referred to as "directly on," "directly adjacent to," or "directly opposite to" another element, no intermediate elements are present.
[0019] The optional features will now be listed. These features can be applied individually or in any combination with any aspect.
[0020] The semiconductor layer may be constructed with a positive conductivity type (i.e., p-type). In this case, a second layer with a larger operating function in the transparent conductive region provides a closer match to the valence band of the p-type semiconductor layer, facilitating the transport of positive charge carriers (i.e., holes) across the interface between the transparent conductive region and the semiconductor layer. In particular, the larger operating function of the second layer prevents band bending at the interface with the p-type semiconductor, which would otherwise present a potential barrier (e.g., Schottky barrier) to holes driven toward the electrodes when the solar cell is in use. In this way, the second layer in the transparent conductive region increases the amount of holes drawn from the solar cell, even though the second layer has a lower conductivity than the first layer.
[0021] The second operating function of the second layer may be constructed to be smaller than the operating function of the semiconductor layer. The term "less than" may define the second operating function as "only slightly less than" the operating function of the semiconductor layer. Thus, the second operating function may be constructed to be smaller than but substantially close to (i.e., to match) the operating function of the semiconductor layer to facilitate efficient transfer of charge carriers across the interface between the two layers. In an exemplary configuration, the second operating function may be less than 5% of the operating function of the semiconductor layer, optionally less than 2%, or optionally less than 1%.
[0022] The difference between the operating function of the semiconductor layer and the operating function of the second layer of the transparent conductive region may be smaller than the difference between the operating function of the semiconductor layer and the operating function of the first layer of the transparent conductive region.
[0023] Advantageously, the operating function of the second layer is more closely matched to that of the semiconductor layer. In this way, the second layer can improve the band alignment between the semiconductor layer and the transparent conductive region compared to the first layer, thereby reducing the contact resistance at the interface between the transparent conductive region and the semiconductor layer.
[0024] Transparent conductive regions can be defined as retreated semiconductors (i.e., heavily doped semiconductors) where the Fermi level is located in the conduction band, causing the material to behave like a metal. Changes in the carrier doping concentration of the layers within the transparent conductive region can shift the operating function (including the Fermi level), thereby affecting the band alignment at the interface between the transparent conductive region and the semiconductor layer.
[0025] The operating function of the transparent conductive region depends on the material properties of the transparent conductive region material, which can be determined by controlling the parameters of the transparent conductive region fabrication process (such as deposition). In particular, the operating function of the transparent conductive region can be modified by controlling the oxygen concentration during the fabrication of the transparent conductive region layer.
[0026] At least one or each layer of the transparent conductive region may be constructed with an operating function between 3.5 eV and 6.0 eV, preferably between 4.0 and 5.5 eV.
[0027] The third layer may be disposed directly on the semiconductor layer. For example, the third layer may be configured to directly contact (e.g., deposited on) the surface of the semiconductor layer (e.g., a receiving surface). In this way, the third layer is advantageously configured to directly draw charge carriers from the semiconductor layer.
[0028] The first layer may be disposed directly on the second layer. For example, the first layer may be configured to directly contact (e.g., deposited on) the surface of the second layer (e.g., a receiving surface). Alternatively, the second layer may be disposed directly on the third layer. In this way, the interfaces between these individual layers in the transparent conductive region may have defined stages of change in operating functions.
[0029] The third working function of the third layer may be constructed to be up to 10% larger than the second working function of the second layer (e.g., up to 110% of the second working function). Alternatively, the third working function of the third layer may be constructed to be up to 15% larger than the second working function of the second layer (e.g., up to 115% of the second working function). Alternatively, the third working function of the third layer may be constructed to be at least 10% and up to 15% larger than the second working function of the second layer (e.g., at least 110% and up to 115% of the second working function).
[0030] When the third layer is directly adjacent to the semiconductor layer, the third operating function of the third layer may be configured to be greater than 5.0 eV and less than 6.0 eV, preferably 5.5 eV. In this case, the operating function of the second layer may be less than the operating function of the third layer (e.g., less than between 5.0 eV and 6.0 eV) and greater than the operating function of the first layer (e.g., greater than between 3.5 eV and 4.5 eV).
[0031] At least one layer of the transparent conductive region may be formed of a metal oxide material. At least one layer of the transparent conductive region may be formed of indium tin oxide (ITO). Alternatively, at least one layer of the transparent conductive region may be formed of one or more of the following: zinc oxide (ZnO), indium-doped tin oxide (ITO), tin oxide (SnO2), indium oxide (In2O3), and fluoride-doped tin oxide (FTO). The semiconductor layer may be formed of amorphous silicon (a-Si).
[0032] The surface on the substrate where the semiconductor layer is disposed may be a first surface of the substrate, and the solar cell may include a second semiconductor layer disposed on a second surface of the substrate opposite to the first surface. The solar cell may further include a second transparent conductive region disposed on the surface of the second semiconductor layer.
[0033] The second transparent conductive region may include: a first layer having a first operating function; and a second layer having a second operating function and interposed between the first layer and the second semiconductor layer. The second operating function of the second layer may be configured to be greater than the first operating function of the first layer.
[0034] The second semiconductor layer may be constructed with a negative conductivity type (i.e., n-type).
[0035] The second transparent conductive region may include a third layer interposed between the second and second semiconductor layers. The third layer may be directly disposed on the second semiconductor layer. For example, the third layer of the second transparent conductive region may be configured to directly contact (e.g., deposited on) the surface (e.g., a receiving surface) of the second semiconductor layer. Accordingly, the third layer is advantageously configured to directly draw charge carriers from the second semiconductor layer. The third layer may be configured with a third operating function, which may be greater than the second operating function of the second layer.
[0036] The second semiconductor layer may define the emitter layer. When the solar cell is in use, the emitter layer may be disposed on the front side of the substrate, which may be configured to face the radiation source.
[0037] At least one layer of the second transparent conductive region may be formed of a metal oxide material, and the second semiconductor layer may be composed of amorphous silicon (a-Si).
[0038] The operating functions of the first and second layers of the second transparent conductive region may be constructed in a manner similar to those of the corresponding layers of the first transparent conductive region. However, in this case, the difference between the operating functions of the transparent conductive layers will be smaller to reflect the smaller difference in the operating functions between the front electrode and the front accumulation layer.
[0039] The substrate may be composed of crystalline silicon (c-Si), such as a silicon wafer. A crystalline silicon substrate may contain a continuous crystal structure, such as monocrystalline silicon. Alternatively, the substrate may contain one or more particles with a continuous crystal structure, such as polycrystalline (or polycrystalline) silicon.
[0040] Each of the first and second layers of the transparent conductive region may be constructed with a width, length, and depth. Each such layer may be constructed such that its width and length are substantially greater than its depth. The width and length of the layers may be measured in a direction perpendicular to the surface plane of the substrate, and the depth may be measured in a direction perpendicular to the surface plane of the substrate.
[0041] The transparent conductive regions may have a thickness of less than 500 nanometers, optionally less than 200 nanometers, and optionally less than 100 nanometers. Each layer of the transparent conductive regions may have a thickness of at least 20 nanometers and no more than 50 nanometers.
[0042] The transparent conductive area on the front side may be further constructed into an anti-reflective layer or coating defining the solar cell. In this case, the layers of the transparent conductive area may be textured to provide an anti-reflective surface. The anti-reflective layer advantageously reduces the reflectivity of light incident on the solar cell and increases the selectivity of a predetermined wavelength band, thereby increasing the efficiency of the solar cell.
[0043] According to an exemplary configuration, a solar cell may include electrodes disposed on a surface opposite to the surface that forms an interface with the semiconductor layer (e.g., such that the transparent conductive region may be interposed between the substrate and the electrodes).
[0044] The solar cell may further include passivation layers, which may be disposed between a substrate and at least one or each of the first and second semiconductor layers. The passivation layers may be formed of an amorphous material and may constitute passivation of the substrate surface on which the individual semiconductor layers are disposed. The passivation layers may be composed of amorphous silicon (a-Si). The passivation layers may be undoped (e.g., formed of an intrinsically semiconductor material).
[0045] At least one or each of the semiconductor layer and / or (multiple) passivation layers may be composed of a material having a defined chemical composition. Each layer may be deposited (or, for example, diffused or implanted) onto the substrate in a sequential process.
[0046] As we have learned from the preceding text, both the substrate and the semiconductor layer may be formed from one or more semiconductor materials. Each semiconductor material may be configured with a conductivity type determined by the included doping atoms. In this way, each individual semiconductor material may be doped with atoms having a predetermined charge to increase the excess charge carriers in the overall doped material.
[0047] It will be understood that the ionization state of the doped atoms can determine the conductivity type of the doped semiconductor material. For example, a semiconductor material may be positively or negatively doped to exhibit a positive conductivity type (p-type) or a negative conductivity type (n-type), respectively. Either layer with a determined conductivity type (e.g., p-type or n-type) may form an electrostatic driving force that drives photogenerated charge carriers (e.g., electrons and holes) toward that layer. For example, p-type materials will attract electrons and repel holes, while n-type materials will attract holes and repel electrons. In some cases, the semiconductor material may be undoped (e.g., with an inherent passivation layer).
[0048] The substrate may be constructed with a first conductivity type (e.g., n-type), and the semiconductor layer may be constructed with a second conductivity type opposite to the first conductivity type (e.g., p-type), thus forming a pn junction together with the substrate.
[0049] The interface formed between the p-type and n-type materials at the pn junction allows excess electrons and holes to diffuse into the n-type and p-type materials, respectively. This relative movement of charge carriers results in the formation of a depletion region (e.g., a space charge region) at the pn junction. Once thermal equilibrium is reached, a built-in potential difference is formed across the depletion region.
[0050] During the operation of a solar cell, the multiple electron-hole pairs generated by light incident on the substrate are separated into electrons and holes by an electric field generated from the built-in potential difference at the pn junction. The separated electrons then move (e.g., tunnel) to the n-type semiconductor, and the separated holes move to the p-type semiconductor. Therefore, when the substrate is n-type and the emitter is p-type, the separated holes and electrons move to the emitter and substrate, respectively. In particular, the holes and electrons move to the individual electrodes disposed on the emitter and substrate sides of the pn junction. Accordingly, electrons become the dominant carriers in the substrate, and holes become the dominant carriers in the emitter.
[0051] According to exemplary configurations, the substrate may be formed from an n-type monocrystalline silicon wafer. At least one semiconductor layer (e.g., a first semiconductor layer) may contain at least partially doped amorphous material, thus being p-type. This configuration may facilitate the formation of heterojunction technology (HJT) type solar cells, so defined because it combines two different materials to generate a charge separation field at the pn junction. Alternatively, it will be appreciated that the solar cell can be constructed to define any type of solar cell structure. For example, the substrate and emitter may define a series junction solar cell.
[0052] When the semiconductor material is n-type, it may be constructed with impurities containing group V elements, such as phosphorus (P), arsenic (As), and antimony (Sb). When the semiconductor material is p-type, it may contain impurities containing group III elements, such as boron (B), gallium (Ga), and indium (In). The passivation layer may be constructed with a non-conductive type, thus forming the essential layer between the emitter and the substrate.
[0053] Depending on the alternative configuration, the emitter may be n-type and the substrate may be p-type, thus forming a pn junction therebetween. In this example, separate holes and electrons move toward the substrate and emitter, respectively. In particular, the holes and electrons move to individual electrodes disposed on the substrate and emitter sides of the pn junction.
[0054] At least one of the semiconductor layers (e.g., a second semiconductor layer) may be configured to have the same first conductivity type as the substrate (e.g., n-type). This semiconductor layer may define the accumulator of the solar cell and be configured to selectively filter or draw charge carriers from the substrate.
[0055] In specific cases, the substrate may be formed from a p-type single-crystal silicon wafer, and the semiconductor layer may contain at least partially doped amorphous material, thus being p-type.
[0056] Just as a semiconductor layer has a predetermined conductivity type, each layer may also be constructed with different dopant concentrations. Each doped layer may be constructed to generate electrostatic driving forces to drive photogenerated charge carriers (such as electrons and holes) toward the individual layer. The doping concentration of at least one doped layer may be increased to generate stronger electrostatic forces, resulting in increased charge transport away from the substrate.
[0057] According to an exemplary configuration, a solar cell may include: a crystalline silicon substrate; a back semiconductor layer disposed on the back side of the substrate where the solar cell does not face a radiation source when in use; a front semiconductor layer disposed on the front side of the substrate where the solar cell faces a radiation source when in use; a back transparent conductive region disposed on the surface of the back semiconductor layer; and a front transparent conductive region disposed on the surface of the front semiconductor layer. The back transparent conductive region includes: a first layer having a first operating function; and a second layer having a second operating function and interposed between the first layer and the back semiconductor layer, wherein the second operating function of the second layer is greater than the first operating function of the first layer. The front transparent conductive region includes: a first layer having a first operating function; and a second layer having a second operating function and interposed between the first layer and the front semiconductor layer, wherein the second operating function of the second layer is greater than the first operating function of the first layer. At least one of the back and front transparent conductive regions includes a third layer having a third operating function and interposed between the substrate and the individual second layers of the at least one back and front transparent conductive region, wherein the third operating function of the third layer is greater than the second operating function of the individual second layers of the at least one back and front transparent conductive region. According to an advantageous configuration, each of the front and back transparent conductive regions has at least two layers, configured such that the operating function of the individual region increases toward the substrate. Furthermore, at least one of the front and back transparent conductive regions includes a third layer, configured such that the operating function gradually (e.g., incrementally) increases toward the substrate (e.g., across all three layers). By configuring at least one of the front and back transparent conductive regions to have a gradually increasing operating function toward the substrate (e.g., across the three layers), charge absorption at the front and back electrodes is optimized, while simultaneously increasing photon transmission within the substrate.
[0058] The front transparent conductive area may be constructed with only two layers (e.g., first and second layers), while the back transparent conductive area may be constructed with three layers (e.g., first, second, and third layers). Alternatively, the back transparent conductive area may be constructed with only two layers, and the front transparent conductive area may be constructed with three layers.
[0059] Each of the front and back transparent conductive regions may include a third layer having a third operating function and interposed between the substrate and the individual second layers of the front and back transparent conductive regions (e.g., the front transparent conductive region may include a third front layer disposed between the substrate and the second front layer, and the back transparent conductive region may include a third back layer disposed between the substrate and the second back layer). The third operating function of each third layer may be greater than the second operating function of the individual second layers of the front and back transparent conductive regions (e.g., the operating function of the third front layer may be greater than the operating function of the second front layer, and the operating function of the third back layer may be greater than the operating function of the second back layer).
[0060] As described above, a solar cell may include electrodes configured opposite to the transparent conductive region and constructed to draw photogenerated charge carriers from the solar cell. The electrodes may be configured such that the transparent conductive region is interposed between the electrodes and the substrate.
[0061] When the transparent conductive region is disposed on the back side (e.g., the very back side) of the substrate, the electrode may be disposed on the back side of the transparent conductive region to define the back electrode of the solar cell.
[0062] When the transparent conductive region is disposed on the front side (e.g., the frontmost side) of the substrate, the electrode may be disposed on the front side of the transparent conductive region to define the front electrode of the solar cell.
[0063] When a solar cell includes a front transparent conductive region and a back transparent conductive region respectively disposed on the front and back sides of a substrate, the solar cell may include a front electrode disposed on the front side of the front transparent conductive region and a back electrode disposed on the back side of the back transparent conductive region. Each electrode may be configured to form an ohmic contact with the individual surfaces of the front and back transparent conductive regions.
[0064] The front and back electrodes may each comprise a plurality of finger electrodes disposed on individual surfaces of the transparent conductive region. Each finger electrode may have an axial length substantially greater than its width. The width and axial length of the finger electrode may both be measured in the direction perpendicular to the plane of the individual surface of the transparent conductive region. The finger electrode may extend laterally parallel to the width direction of the transparent conductive region.
[0065] Each of the plurality of front and / or back finger electrodes may be spaced apart across individual surfaces to define a laterally extending space between the finger electrodes. The finger electrodes may be spaced longitudinally, substantially parallel to the length direction of the transparent conductive region. Each of the plurality of finger electrodes may be substantially parallel to each other. Accordingly, the plurality of back finger electrodes may form an array of parallel, longitudinally spaced (e.g., equally spaced) finger electrodes.
[0066] It will be understood that terms such as “conductive” and “insulating” as used herein are explicitly intended to mean electrically conductive and electrically insulating, respectively. The meaning of these terms will be particularly evident given the technical context of this disclosure (photovoltaic solar cell devices). It will also be understood that the term “ohmic contact” is intended to mean a non-rectified electrical junction (i.e., a junction between two conductors exhibiting substantially linear current-voltage [IV] characteristics).
[0067] According to an exemplary configuration, a solar cell may include a substrate (e.g., a silicon substrate), a front semiconductor layer disposed on the front side of the substrate, a front transparent conductive region disposed on the front side of the front semiconductor layer, a back semiconductor layer disposed on the back side of the substrate, and a back transparent conductive region disposed on the back side of the back semiconductor layer.
[0068] The back semiconductor layer may define the emitter of the solar cell, positioned opposite the substrate to form a pn junction. The emitter may be electrically connected to the back electrode and configured such that the emitter is positioned between the back electrode and the substrate. A transparent conductive region on the back may be constructed to draw charge carriers from the emitter and transfer them to the back electrode during operation of the solar cell.
[0069] The front semiconductor layer may define the accumulator, positioned facing the front of the substrate, i.e., between the substrate layer and the front electrode. The front transparent conductive region may be constructed to draw charge carriers from the accumulator and transfer them to the front electrode during the operation of the solar cell.
[0070] According to an exemplary configuration, a solar cell may include an n-type silicon substrate, a p-type back emitter, and at least two transparent conductive layers with different operating functions, wherein the transparent conductive layer configured closest to the emitter layer has an operating function greater than that of the other of the two transparent conductive layers.
[0071] The configuration of the transparent conductive layer described above can also be applied to the p-type emitter layer configured on the front side of an n-type silicon substrate.
[0072] Alternatively, the configuration of the transparent conductive layer can be further applied to solar cells having a p-type silicon substrate and a p-type accumulation layer disposed on the front side of the substrate. However, in this configuration, the difference in the operating functions of the transparent conductive layers may be small because the difference in operating functions between the front electrode and the p-type accumulation layer is small.
[0073] The second aspect provides a solar module comprising a plurality of solar cells according to the first aspect. The plurality of solar cells may be electrically coupled together.
[0074] According to a third aspect, a method for manufacturing a solar cell includes the following steps: providing a substrate (e.g., a crystalline silicon substrate); disposing a semiconductor layer on the surface of the substrate; and disposing a transparent conductive region on the semiconductor layer, the transparent conductive region comprising a first layer and a second layer. The step of disposing the transparent conductive region includes disposing a second layer on the semiconductor layer and disposing the first layer on the second layer, such that the second layer is interposed between the first layer and the semiconductor layer. The method includes: constructing the first layer having a first operating function; and constructing the second layer having a second operating function greater than the first operating function of the first layer.
[0075] Methods for configuring a semiconductor layer on the surface of a substrate may include constructing a semiconductor layer of positive conductivity type (i.e., p-type).
[0076] The transparent conductive region may include a third layer interposed between the second layer and the semiconductor layer. In this case, the method of configuring the transparent conductive region may include configuring the third layer on the semiconductor layer before depositing the second layer. This method may include constructing the third layer with a third operating function greater than the second operating function of the second layer. The step of configuring the third layer may include directly configuring the third layer on the semiconductor layer (e.g., directly depositing the third layer onto the surface of the semiconductor layer [e.g., the receiving surface]).
[0077] The steps of configuring transparent conductive regions may involve sequentially depositing layers of the transparent conductive regions onto the semiconductor using a sputtering process or any other suitable deposition method. The sputtering process may include direct current (DC) magnetron sputtering.
[0078] The method may include at least one parameter controlling the sputtering process to determine the working function in the first and second layers. The at least one parameter may include at least one of gas composition and gas flow rate.
[0079] Alternatively, the method may involve changing the TCO deposition method to deposit different materials onto the first and second layers. The different TCO materials for the first and second layers may include at least one of zinc oxide (ZnO), indium-doped tin oxide (ITO), tin oxide (SnO2), indium oxide (In2O3), and fluoride-doped tin oxide (FTO).
[0080] The method may include a sputtering process to construct a first layer with a first oxygen flow rate, and a sputtering process to construct a second layer with a second oxygen flow rate greater than the first oxygen flow rate. The method may also include a sputtering process to construct a third layer with a third oxygen flow rate greater than the second oxygen flow rate of the second layer. Advantageously, increasing the oxygen flow rate results in a larger operating function for the transparent conductive material of the corresponding layer.
[0081] The method may involve configuring a semiconductor layer and a transparent conductive region on the back of a substrate that is not facing a radiation source when the solar cell is in use.
[0082] The surface on the substrate where the semiconductor layer is disposed may be a first surface of the substrate, and the method may include disposing a second semiconductor layer on a second surface of the substrate (the second surface being opposite to the first surface), and disposing a second transparent conductive region on the surface of the second semiconductor layer, the second transparent conductive region comprising the first layer and the second layer. The step of disposing the second transparent conductive region may include disposing the second layer on the second semiconductor layer while simultaneously disposing the first layer on the second layer, such that the second layer is interposed between the first layer and the second semiconductor layer. The method may include: constructing the first layer having a first operating function; and constructing the second layer having a second operating function greater than the first operating function of the first layer.
[0083] The second transparent conductive region may include a third layer interposed between the second layer and the second semiconductor layer. In this case, the method of configuring the second transparent conductive region may include configuring the third layer on the second semiconductor layer before depositing the second layer. This method may include constructing the third layer with a third operating function greater than the second operating function of the second layer. The step of configuring the third layer of the second transparent conductive region may include directly configuring the third layer on the second semiconductor layer (e.g., directly depositing the third layer onto the surface of the second semiconductor layer [e.g., the receiving surface]).
[0084] The method may include configuring a second semiconductor layer and a second transparent conductive region on the substrate in the form of the front side of the solar cell facing the radiation source when in use.
[0085] Methods for configuring transparent conductive regions may involve constructing at least one or each layer of transparent conductive regions such that they form an anti-reflective layer or coating of a solar cell.
[0086] The method of configuring a second semiconductor layer on a second surface of a substrate may involve constructing a second semiconductor layer of a negative conductivity type (i.e., n-type).
[0087] Before configuring at least one or each of the first and second semiconductor layers, the method may include configuring a passivation layer on the surface of a substrate such that it is interposed between the individual semiconductor layers and the substrate. The passivation layers (multiple layers) may be formed of an amorphous material. The method may include constructing the passivation layers (multiple layers) such that they are substantially undoped (i.e., inherently so).
[0088] The step of configuring at least one or each of the first and second semiconductor layers and / or passivation layers may include depositing the layers onto the substrate using a vapor deposition process. The vapor deposition process may be a plasma-enhanced chemical vapor deposition (PECVD) process.
[0089] The method may include controlling at least one parameter of the vapor deposition process to determine the structure, chemistry, and dopant composition of at least one of the first and second semiconductor layers and / or passivation layers. The vapor deposition process parameters may include gas composition and / or gas flow rate. The vapor deposition process parameters may define the temperature of the deposition chamber. The gas composition may include at least one of carbon dioxide (CO2), silane (SiH4), and hydrogen (H2).
[0090] The method may further include configuring electrodes on at least one or each of the first and second transparent conductive regions.
[0091] Each transparent conductive region may include a back side (e.g., the rearmost side) and a front side opposite the back side (e.g., the frontmost side). Accordingly, when the transparent conductive region is disposed on the back side of the substrate, the method may include disposing electrodes on the back side of the transparent conductive region to define a back electrode. When the transparent conductive region is disposed on the front side of the substrate, the method may include disposing electrodes on the front side of the transparent conductive region to define a front electrode.
[0092] The electrode may comprise a plurality of finger electrodes, and the method may include depositing the plurality of finger electrodes onto the first layer. The method may include depositing a conductive material onto the front or back side of the transparent conductive region.
[0093] Conductive materials can be deposited using various methods, including vapor deposition, plating, printing, etc. For example, conductive materials may include printable materials. Methods for depositing conductive materials may involve printing a printable precursor of the printable material onto the surface of a transparent conductive region. The method may further include curing the printable precursor according to a firing process to form finger electrodes.
[0094] Those skilled in the art will appreciate that, aside from mutually exclusive cases, features or parameters relating to any of the foregoing aspects may apply to any other aspect. Furthermore, aside from mutually exclusive cases, any feature or parameter described herein may apply to any aspect and / or be combined with any other feature or parameter described herein. Simple Explanation of the Diagram
[0095] The specific form will now be described by way of example only with reference to the diagrams, in which: [Figure 1] is a schematic diagram of the layers of an exemplary solar cell; [Figure 2] is a close-up view of the transparent conductive area on the front side of the solar cell of Figure 1; [Figure 3] is a close-up view of the transparent conductive area on the back side of the solar cell of Figure 1; and [Figure 4] is a flowchart demonstrating the method of forming the solar cell of Figure 1. Implementation
[0096] The aspects and specific details of this disclosure will now be discussed with reference to the accompanying diagrams. Those skilled in the art will understand the further aspects and specific details.
[0097] Figure 1 schematically illustrates a solar cell 10, which in particular includes a semiconductor substrate 12 comprising: a first surface (i.e., the front side) 14 on which light from a radiation source (such as the sun) is incident during normal use; and a second surface (i.e., the back side) 16 opposite to the front side 14. That is, the front side 14 may be configured to face the sun during use, while the back side 16 may be configured to face away from the sun during use.
[0098] The substrate 12 divides the solar cell 10 into a front portion 18 facing the front of the substrate 12 and a back portion 20 facing the back of the substrate 12. Light incident on the solar cell 10 passes through the front portion 18, the substrate 12, and then the back portion 20.
[0099] Each of the front and back portions 18, 20 comprises a plurality of layers configured to define separate layered structures. The front portion 18 (also referred to herein as the front layered structure 18) is configured opposite to the front side 14 of the substrate 12, and the back portion 20 (also referred to herein as the back layered structure 20) is configured opposite to the back side 16 of the substrate 12. The constituent layers of the front and back layered structures 18, 20 are sequentially deposited (or, for example, diffused or implanted) onto the respective front and back sides 14, 16 of the substrate 12.
[0100] Each of the front and back portions 18 and 20 is constructed with width, length, and depth. The width and length of each layer are measured in a direction perpendicular to the front and back portions 14 and 16 of the substrate 12. For each layer, its width and length are substantially greater than its depth, which is measured in a direction perpendicular to the front and back portions 14 and 16 of the substrate 12.
[0101] The solar cell 10 is a back-emitter solar cell (especially a back-emitter heterojunction solar cell 10). Thus, the solar cell 10 is provided with an emitter 50 and an accumulator 52 disposed on either side of the substrate 12. Accordingly, the emitter 50 forms the back side portion 20 of the portion, and the accumulator 52 forms the front side portion 18 of the portion.
[0102] According to the specific configuration of the demonstration, substrate 12 is an n-type single-crystal silicon wafer, forming a pn junction with p-type emitter layer 50. Accumulation layer 52 is constructed to have an n-type structure, allowing it to draw electrons from substrate 12. The emitter layer and accumulation layers 50 and 52 are each formed of doped amorphous silicon (a-Si) material, doped with corresponding elements to achieve a specified conductivity type, as will be understood by those skilled in the art.
[0103] The front portion 18 includes a front passivation layer 28, which is inserted between the front side 14 of the substrate 12 and the accumulator 52. The back portion 20 has a back passivation layer 30 inserted between the emitter 50 and the back side 16 of the substrate 12. Each of the passivation layers 28 and 30 is formed of an inherently amorphous silicon material, as will be understood by those skilled in the art.
[0104] The emitter layer and accumulation layers 50 and 52 each have a depth of 12 nanometers, and the passivation layers 28 and 30 each have a depth of 3 nanometers (measured in the vertical direction as shown in Figure 1).
[0105] The solar cell 10 further includes a transparent conductive (TC) region 46 (also referred to herein as the front TC region 46) disposed on the front side 54 of the accumulator 52. A further TC region 48 (also referred to herein as the back TC region 48) is disposed on the back side 44 of the emitter 50.
[0106] TC regions 46 and 48 are each textured to provide an anti-reflective surface for the solar cell 10, as shown in Figures 1 to 3. A front electrode 40 is disposed on the textured front side 56 of the front TC region 46, and a back electrode 42 is disposed on the textured back side 58 of the back TC region 48. The front and back electrodes 40 and 42 are formed of silver.
[0107] The front and back TCO regions 46 and 48 each have a thickness of less than 100 nanometers (measured in the vertical direction as shown in Figure 1), and they are each formed of indium tin oxide (ITO). However, the composition of each of the TCO regions 46 and 48 varies across its depth, as will be described in more detail below.
[0108] The front and back TC areas 46 and 48 will now be described in more detail with reference to Figures 2 and 3 respectively.
[0109] The front TC region 46 includes first, second, and third front layers 22, 24, and 26, each with a different composition. The third front layer 26 is inserted between the accumulator 52 and the second front layer 24, and the second front layer 24 is inserted between the third front layer 26 and the first front layer 22, as shown in Figure 2.
[0110] Each of the first, second, and third front layers 22, 24, and 26 has a different working function. In particular, the first front layer 22 has a first working function that is smaller than the second working function of the second front layer 24, and the second working function of the second front layer 24 is smaller than the third working function of the third front layer 26.
[0111] In TC regions 46 and 48, the working function of each layer refers to the energy difference between the Fermi level of the constituent material of that layer and the energy of the free space outside the material. When the working function energy value (measured in electron volts [eV]) of a particular layer is greater than the working function energy value of the layer it is comparing, that layer's working function is described as greater than the other layer. Furthermore, since the working function of the material is measured on a negative scale, the term "greater" means that the working function value is more negative than the comparison value.
[0112] The first operating function of the first front layer 22 is approximately 4.0 electron volts, the second operating function of the second front layer 24 is approximately 4.1 electron volts, and the third operating function of the third front layer 26 is approximately 4.2 electron volts. The operating function of the accumulation layer 52 is approximately 4.2 electron volts, and the operating function of the front electrode 40 is approximately 4.0 electron volts.
[0113] The front TC region 46 is formed by stacking transparent conductive layers, and the operating function increases in stages as it moves toward the active layer of the solar cell 10 (vertically downwards as shown in Figure 2). In this way, the third front layer 26 has the highest (e.g., the largest) operating function (i.e., among the three layers), making it have a lower conductivity than the first and second layers 22 and 24. However, this means that the third front layer 26 provides a favorable transparent window to allow access to the cumulative layer 52 immediately disposed beneath the front TC region 46.
[0114] Furthermore, the first front layer 22 is configured with a minimum (e.g., very low) operating function, resulting in a higher conductivity than the second and third layers 24 and 26. This means that the first front layer 22 provides good electrical contact with the front electrode 40. The lower operating function also reduces the transparency of the front TC region 46 on the uppermost surface of the solar cell 10. To allow for some reduction in transparency, the thickness of the first front layer 22 is made as thin as possible to increase the number of incident photons passing through the light-acting layer.
[0115] Finally, the second front layer 24 is constructed with an intermediate operating function, chosen to provide a balance between the conductivity and transparency of the first and third layers, in which the second layer is interposed. Thus, the second front layer 24 provides a photoelectric bridging between the first and third front layers 22 and 26.
[0116] Similar to the front TC region 46, the back TC region 48 also comprises a stack of three back layers 32, 34, and 36, as shown in Figure 3. Like the front layer, each of the first, second, and third back layers 32, 34, and 36 is formed of indium tin oxide. However, in contrast to the front layer, the three back layers 32, 34, and 36 are formed of different materials, causing their operating functions to increase in stages as they move toward the active layer of the solar cell 10 (vertically upwards as shown in Figure 3).
[0117] In particular, the first working function of the first back layer 32 is smaller than that of the second and third layers 34 and 36. The second working function of the second back layer 34 is smaller than that of the third layer 36 but larger than that of the first back layer 32. The third working function of the third back layer 32 is larger than that of both the first and second back layers 32 and 34.
[0118] The first operating function of the first back layer 32 is approximately 4.0 electron volts, the second operating function of the second back layer 34 is approximately 4.75 electron volts, and the third operating function of the third back layer 36 is approximately 5.5 electron volts. The operating function of the emitter layer 50 is approximately 5.5 electron volts, and the operating function of the back electrode 42 is approximately 4.0 electron volts.
[0119] Based on the specific state of the demonstration, the working function of the third layer 36 is more suitable for matching the valence band of the transmitter 50, which reduces the possibility of parasitic potential barriers forming between the TC region 48 and the transmitter 50.
[0120] Incidentally, the first back layer 32 is constructed with a relatively low operating function, resulting in lower transparency, which increases the reflectivity of the TC region 48 on the last surface of the solar cell 10. As a result, when in use, more unabsorbed photons may be reflected back by the first back layer 32 in the TC region 48 toward the photo-active layer of the solar cell 10.
[0121] The first back layer 32 is configured adjacent to the back electrode 42 of the solar cell 10, and because the first back layer 32 has a relatively low operating function, it also exhibits increased conductivity (compared to the second and third back layers 34, 36). The relatively high conductivity of the first back layer 32 results in an increase in the transfer of photogenerated charge carriers (i.e., holes) to the back electrode 42. Accordingly, the back TC region 48 can draw more photogenerated carriers from the emitter 50, thereby increasing the fill factor (FF) of the solar cell 10.
[0122] The first, second, and third front-side layers 22, 24, and 26, and the first, second, and third back-side layers 32, 34, and 36, each have a depth of approximately 30 nanometers (measured in the vertical direction as shown in Figures 2 and 3). As described above, each layer 22, 24, 26, 32, 34, and 36 is formed of indium tin oxide (ITO). The working functions of these ITO materials are constructed by adjusting the oxygen flow rate during the fabrication of the corresponding layers, as explained in more detail below.
[0123] Figure 4 shows a method 100 for forming a solar cell, such as the one described above. The method includes a first step 102: providing a crystalline silicon wafer to define a substrate 12 for the solar cell 10.
[0124] In the second method step 104, the method includes depositing front and back passivation layers 28 and 30 onto the front and back sides 14 and 16 of the substrate 12, respectively.
[0125] The third method step 106 includes depositing an accumulator 52 and an emitter 50 onto the front and back passivation layers 28 and 30, respectively. Accordingly, the accumulator and the emitter 52 and 50 define the front and back semiconductor layers, respectively.
[0126] The second and third method steps 104 and 106 involve configuring (or forming) semiconductor layers on the front and back sides 14 and 16 of the silicon wafer substrate 12. This may include deposition, diffusion, doping, and / or implantation steps. The layers form at least a portion of the front and back portions 18 and 20 of the aforementioned solar cell 10 (e.g., an emitter layer, accumulation layer, passivation layer, etc.). Each of these steps involves depositing the corresponding semiconductor material using a vapor deposition process (e.g., PECVD). Generally, the parameters of the vapor deposition process determine the composition (e.g., structural and / or chemical) of each layer and also the dopant concentration.
[0127] In the fourth method step 108, the method includes depositing the front and back third layers 26, 36 onto the accumulator and emitter 52, 50, respectively. In the fifth step 110, the method includes depositing the front and back second layers 24, 34 onto the individual front and back third layers 26, 36. In the sixth step 112, the method includes depositing the front and back first layers 22, 32 onto the individual front and back second layers 24, 34.
[0128] Steps 108, 110, and 112 of the fourth, fifth, and sixth methods each involve depositing front and back TCO layers onto the front and back surfaces of the solar cell 10. Each of these steps involves depositing the corresponding transparent conductive oxide material using a DC magnetron sputtering process. Generally, the parameters of the sputtering process determine the composition (e.g., structural and / or chemical) of each layer and also determine its electrical and optical properties. For example, the working function of the composition material of each of the front and back layers in TC regions 46 and 48 is determined by adjusting the parameters of the sputtering process. In particular, each layer in the front and back TC regions 46 and 48 is deposited using a different oxygen flow rate.
[0129] The method of depositing the first front face layer 22 involves using a first oxygen flow rate to obtain a first working function. The method of depositing the second front face layer 24 includes using a second oxygen flow rate to obtain a second working function. The method of depositing the third front face layer 26 includes using a third oxygen flow rate to construct a third working function. The first oxygen flow rate of the first front face layer 22 is greater than the second oxygen flow rate used to form the second front face layer 24. The second oxygen flow rate of the second front face layer 24 is greater than the third oxygen flow rate used to form the third front face layer 26.
[0130] The method of depositing the first back cover layer 32 involves using a first oxygen flow rate to obtain a first working function. The method of depositing the second back cover layer 34 includes using a second oxygen flow rate to obtain a second working function. The method of depositing the third back cover layer 36 includes a third oxygen flow rate to construct a third working function. The first oxygen flow rate of the first back cover layer 32 is less than the second oxygen flow rate used to form the second back cover layer 34. The second oxygen flow rate of the second back cover layer 34 is less than the third oxygen flow rate used to form the third back cover layer 36.
[0131] According to the exemplary configuration of the present invention, the front and back TC regions 46, 48 may be deposited separately. For example, method steps 108, 110, 112 may be performed sequentially on the front side of the solar cell 10, and then the corresponding steps 108, 110, 112 may be performed on the back side of the solar cell 10. Alternatively, the back layers 32, 34, 36 may be deposited first, and then the front layers 22, 24, 26 may be deposited.
[0132] Finally, the seventh method step 114 includes configuring front and back electrodes 40, 42 on the outermost surfaces of the front and back portions 18, 20 of the solar cell 10.
[0133] It will be understood that the invention is not limited to the specific embodiments described above, and various modifications and improvements can be made without departing from the concept described herein. Except in mutually exclusive cases, any feature may be used separately or in combination with any other feature, and this disclosure extends to and includes all combinations and sub-combinations of one or more features described herein.
[0134] 10: Solar cells
[0135] 12: Semiconductor substrate
[0136] 14: Front
[0137] 16: Back
[0138] 18: Front view, front layered structure
[0139] 20: Back side, back layered structure
[0140] 22: First front layer
[0141] 24: Second front layer
[0142] 26: Third front layer
[0143] 28: Front passivation layer
[0144] 30: Backside passivation layer
[0145] 32: First back layer
[0146] 34: Second back layer
[0147] 36: Third back layer
[0148] 40: Front electrode
[0149] 42: Back electrode
[0150] 44: Back
[0151] 46: Front transparent conductive area
[0152] 48: Transparent conductive area on the back
[0153] 50: Launcher
[0154] 52: Accumulator
[0155] 54: Front
[0156] 56: Engraved front
[0157] 58: Engraved back
[0158] 100: Methods for forming solar cells
[0159] 102~114: Methods and steps for forming solar cells
Claims
1. A solar cell comprising: a crystalline silicon substrate; a first semiconductor layer disposed on the back side of the substrate where the solar cell is not facing a radiation source when in use; a second semiconductor layer disposed on the front side of the substrate where the solar cell is facing the radiation source when in use; a first transparent conductive region disposed on the surface of the first semiconductor layer, wherein the first transparent conductive region comprises: a first layer having a first operating function; and a second layer having a second operating function and interposed between the first layer and the first semiconductor layer; wherein the second operating function of the second layer is greater than the first operating function of the first layer; and a second transparent conductive region disposed on the surface of the second semiconductor layer, wherein the second transparent conductive region comprises: a first layer having a first operating function; a second layer having a second operating function and interposed between the first layer and the second semiconductor layer; and a third layer interposed between the second layer and the second semiconductor layer and directly disposed on the second semiconductor layer; wherein the second operating function of the second layer is greater than the first operating function of the first layer; and wherein the third layer has a third operating function greater than the second operating function of the second layer.
2. The solar cell according to claim 1, wherein the first semiconductor layer is constructed with a positive conductivity type.
3. The solar cell according to claim 1 or 2, wherein the second operating function of the second layer of the first transparent conductive region is configured to be smaller than the operating function of the first semiconductor layer.
4. The solar cell according to claim 1 or 2, wherein the difference between the operating function of the first semiconductor layer and the operating function of the second layer of the first transparent conductive region is less than the difference between the operating function of the first semiconductor layer and the operating function of the first layer of the first transparent conductive region.
5. The solar cell according to claim 1 or 2, wherein the second operating function of the second layer of the first transparent conductive region is configured to be up to 15% larger than the first operating function of the first layer of the first transparent conductive region, optionally up to 10%; optionally, wherein the second operating function of the second layer of the first transparent conductive region is configured to be at least 10% larger than the first operating function of the first layer of the first transparent conductive region and up to 15%.
6. The solar cell according to claim 1 or 2, wherein the first transparent conductive region includes a third layer interposed between the second layer and the first semiconductor layer of the first transparent conductive region; wherein the third layer of the first transparent conductive region is configured with a third operating function that is greater than the second operating function of the second layer of the first transparent conductive region.
7. The solar cell according to claim 6, wherein the third layer of the first transparent conductive region is disposed directly on the first semiconductor layer.
8. The solar cell according to claim 7, wherein the third operating function of the third layer of the first transparent conductive region is configured to be up to 15% greater than the second operating function of the second layer of the first transparent conductive region, and optionally up to 10%.
9. The solar cell according to claim 7, wherein the third operating function of the third layer of the first transparent conductive region is configured to be smaller than the operating function of the first semiconductor layer.
10. The solar cell according to claim 1 or 2, wherein the operating function of the layer furthest from the first transparent conductive region of the substrate is configured to be greater than 3.5 eV and less than 4.5 eV, and / or the operating function of the layer closest to the first transparent conductive region of the substrate is configured to be greater than 5.0 eV and less than 6.0 eV.
11. The solar cell according to claim 1 or 2, wherein the operating function of the first semiconductor layer is greater than 5.0 electron volts and less than 6.0 electron volts.
12. The solar cell according to claim 1 or 2, wherein the first transparent conductive region has a thickness of less than 500 nanometers, and wherein each layer of the first transparent conductive region has a thickness of at least 20 nanometers and not more than 50 nanometers.
13. The solar cell according to claim 1 or 2, wherein at least one layer of the first transparent conductive region is formed of a metal oxide material, and the first semiconductor layer is composed of amorphous silicon (a-Si).
14. The solar cell according to claim 1, wherein the second semiconductor layer is constructed to have a negative conductivity type.
15. The solar cell according to claim 1, wherein the second semiconductor layer defines the accumulation layer.
16. The solar cell according to claim 1, wherein at least one layer of the second transparent conductive region is formed of a metal oxide material, and the second semiconductor layer is composed of amorphous silicon (a-Si).
17. A solar module comprising a plurality of solar cells according to any one of claims 1 to 16, wherein the plurality of solar cells are electrically coupled together.
18. A method of manufacturing a solar cell, comprising: providing a crystalline silicon substrate; configuring a first semiconductor layer on the substrate on a back side where the solar cell is not facing a radiation source when in use; configuring a second semiconductor layer on the substrate on a front side where the solar cell is facing the radiation source when in use; configuring a first transparent conductive region on the surface of the first semiconductor layer, the first transparent conductive region comprising a first layer and a second layer, wherein configuring the first transparent conductive region comprises: configuring the second layer on the first semiconductor layer; and configuring the first layer on the second layer such that the second layer is interposed between the first layer and the first semiconductor layer; wherein the method comprises: constructing the first layer having a first operating function; and constructing the second layer having a second operating function greater than the first operating function of the first layer; and configuring the second transparent conductive region on the surface of the second semiconductor layer, the second transparent conductive region comprising a first layer, a second layer and a third layer, wherein configuring the second transparent conductive region comprises: The third layer is directly configured on the second semiconductor layer; The method comprises configuring the second layer on the third layer such that the third layer is interposed between the second layer and the second semiconductor layer; and configuring the first layer on the second layer such that the second layer is interposed between the first layer and the third layer; wherein the method includes constructing the first layer having a first working function, and constructing the second layer having a second working function greater than the first working function of the first layer; and wherein the method includes constructing the third layer having a third working function greater than the second working function of the second layer.
19. The method of claim 18, wherein the method of configuring the first semiconductor layer on the surface of the substrate includes constructing the first semiconductor layer having a positive conductivity type.
20. The method of claim 18 or 19, wherein the first transparent conductive region includes a third layer interposed between the second layer of the first transparent conductive region and the first semiconductor layer, and the method of configuring the first transparent conductive region includes configuring the third layer of the first transparent conductive region on the first semiconductor layer before depositing the second layer of the first transparent conductive region; wherein the method includes constructing the third layer of the first transparent conductive region having a third operating function greater than the second operating function of the second layer of the first transparent conductive region.
21. The method of claim 20, wherein the third layer of the first transparent conductive region is disposed directly on the first semiconductor layer.
22. The method according to claim 18 or 19, wherein the step of configuring the first transparent conductive region includes sequentially depositing layers of the first transparent conductive region onto the first semiconductor layer using a sputtering process.
23. The method of claim 22, wherein the method includes controlling at least one parameter of the sputtering process to determine the operating function of at least one or each of the layers of the first transparent conductive region, wherein the at least one parameter includes at least one of gas composition, gas flow rate, and transparent conductive material.