Semiconductor devices and methods of manufacturing semiconductor devices
The semiconductor device design with offset leads and encapsulation addresses the issues of cost, reliability, and size in conventional packaging by optimizing lead placement and manufacturing processes.
Patent Information
- Application Number
- TW111114659
- Authority / Receiving Office
- TW · TW
- Patent Type
- Patents
- Current Assignee / Owner
- Priority Date
- 2021-05-24
- Filing Date
- 2022-04-18
- Publication Date
- 2026-07-11
- Estimated Expiration
- 2042-04-17
AI Technical Summary
Conventional semiconductor packaging methods result in excessive costs, reduced reliability, and relatively low performance due to unsuitable design, leading to excessively large package sizes.
A semiconductor device design featuring leads with offset steps on different planes, allowing for efficient encapsulation of electronic components while exposing lead terminals, and a manufacturing method involving reflow and laser-assisted bonding processes.
The solution enhances reliability and performance by reducing package size and cost, while maintaining electrical coupling and protection from external factors.
Abstract
Description
Technical Field
[0001] This disclosure generally relates to electronic devices, and more specifically to semiconductor devices and methods of manufacturing semiconductor devices. Prior Technology
[0002] Previous semiconductor packaging methods and methods for forming semiconductor packages were unsuitable, for example, resulting in excessive costs, reduced reliability, relatively low performance, or excessively large package sizes. By comparing such methods with the content of this disclosure and referring to the figures, those skilled in the art will readily recognize other limitations and drawbacks of conventional and traditional methods. Summary of the Invention
[0003] In one example, a semiconductor device includes a substrate with leads, the leads including lead terminals, lead steps, and lead offsets extending between the lead steps such that at least some of the lead steps reside on different planes. A first electronic component is coupled to a first lead step side and includes a first electronic component first side and a first electronic component second side opposite to the first electronic component first side. A second electronic component is coupled to a second lead step side and includes a second electronic component first side and a second electronic component second side opposite to the second electronic component first side. An encapsulation encapsulates the first electronic component, the second electronic component, and a portion of the substrate. The lead terminals are exposed from the first side of the encapsulation.
[0004] In one example, a semiconductor device includes a substrate having a first lead and a second lead. The first lead includes: a first lead terminal; a first lead step coupled to the first lead terminal and residing on a first plane; a first lead offset coupled to the first lead step; a second lead step coupled to the first lead offset and residing on a second plane different from the first plane; a second lead offset coupled to the second lead step; and a third lead step coupled to the second lead offset and residing on a third plane different from the second plane. The second lead includes: a second lead terminal; a fourth lead step coupled to the second lead terminal and residing on a fourth plane; a third lead offset coupled to the fourth lead step; a fifth lead step coupled to the third lead offset and residing on a fifth plane different from the fourth plane; a fourth lead offset coupled to the fifth lead step; and a sixth lead step coupled to the fourth lead offset and residing on a sixth plane different from the fifth plane. A first electronic component is coupled to a first lead. A second electronic component is coupled to a second lead. An encapsulation encapsulates a portion of the first electronic component, the second electronic component, and the substrate. The first lead terminal and the second lead terminal are exposed from a first side of the encapsulation.
[0005] In one example, a method of manufacturing a semiconductor device includes providing a substrate having leads. The leads include lead terminals, lead steps, and lead offsets extending between the lead steps such that at least some of the lead steps reside on different planes. The method includes coupling a first electronic component to a first lead step side. The first electronic component includes a first side of the first electronic component and a second side of the first electronic component opposite to the first side. The method includes coupling a second electronic component to a second lead step side. The second electronic component includes a first side of the second electronic component and a second side of the second electronic component opposite to the first side. The method includes providing an encapsulation encapsulating portions of the first electronic component, the second electronic component, and the substrate, wherein the lead terminals are exposed from the first side of the encapsulation. Simple Explanation of the Diagram
[0006] [Figure 1A] shows a cross-sectional view of an example semiconductor device.
[0007] [Figure 1B] shows a perspective view of an example semiconductor device.
[0008] [Figure 1C] shows a bottom view of an example semiconductor device.
[0009] [Figure 1D] shows a transparent stereoscopic view of an example semiconductor device.
[0010] [Figures 2A, 2B, 2C, 2D and 2E] show cross-sectional views of example methods for manufacturing example semiconductor devices.
[0011] [Figures 3A, 3B and 3C] show cross-sectional views of example semiconductor devices.
[0012] [Figure 4A] shows a cross-sectional view of an example semiconductor device.
[0013] [Figure 4B] shows a perspective view of an example semiconductor device.
[0014] Figure 4C shows a bottom view of an example semiconductor device.
[0015] [Figure 4D] shows a transparent 3D view of an example semiconductor device.
[0016] [Figures 4E, 4F and 4G] show cross-sectional views of example methods for manufacturing example semiconductor devices.
[0017] [Figures 4H and 4I] show cross-sectional views of an example semiconductor device.
[0018] [Figure 5A] shows a cross-sectional view of an example semiconductor device.
[0019] [Figure 5B] shows a perspective view of an example semiconductor device.
[0020] [Figure 5C] shows a bottom view of an example semiconductor device.
[0021] [Figure 5D] shows a transparent 3D view of an example semiconductor device.
[0022] [Figures 5E and 5F] show cross-sectional views of an example method for manufacturing an example semiconductor device.
[0023] [Figures 5G and 5H] show cross-sectional views of an example semiconductor device along reference lines A and B of Figure 5D, respectively. Implementation
[0024] The following discussion provides various examples of semiconductor devices and methods for manufacturing semiconductor devices. These examples are non-limiting, and the scope of the appended claims should not be limited to the specific examples disclosed. In the following discussion, the terms "example" and "for example" are non-limiting.
[0025] The drawings illustrate general construction methods and may omit descriptions and details of well-known features and techniques to avoid unnecessarily obscuring the contents of this disclosure. Furthermore, components in the drawings are not necessarily drawn to scale. For example, some components in the drawings may be enlarged relative to other components to aid in understanding the examples discussed in this disclosure. The same reference numerals in different drawings denote the same components.
[0026] The term "or" means any one or more items in a list connected by "or". For example, "x or y" means any element in the three-element set {(x), (y), (x, y)}. As another example, "x, y, or z" means any element in the seven-element set {(x), (y), (z), (x, y), (x, z), (y, z), (x, y, z)}.
[0027] The terms “comprises / comprising” and / or “includes / including” are “open” terms and specify the presence of the stated feature, but do not exclude the presence or addition of one or more other features.
[0028] The terms “first,” “second,” etc., may be used in this document to describe various elements, but these elements should not be limited by these terms. These terms are used only to distinguish one element from another. Thus, for example, without departing from the teachings of this disclosure, the first element discussed in this disclosure may be referred to as the second element.
[0029] Unless otherwise specified, the term "coupled" may be used to describe two elements that are in direct contact with each other or to describe two elements that are indirectly coupled by one or more other elements. For example, if element A is coupled to element B, then element A may be in direct contact with element B or indirectly coupled to element B by intervening element C. Similarly, the terms "above" or "on" may be used to describe two elements that are in direct contact with each other or to describe two elements that are indirectly coupled by one or more other elements.
[0030] This disclosure includes other examples. Such examples can be found in the drawings, the claims, and / or the description of this disclosure.
[0031] Figure 1A shows a cross-sectional view of the example semiconductor device 10. Figure 1B shows a perspective view of the semiconductor device 10. Figure 1C shows a bottom view of the semiconductor device 10. Figure 1D shows a perspective transparent view of the semiconductor device 10 during a later manufacturing stage. In the examples shown in Figures 1A to 1D, the semiconductor device 10 may include electronic components 11 and 12, a substrate 15, and an encapsulation 16.
[0032] Electronic components 11 and 12 may include component interconnects 111 and 121. In some instances, substrate 15 may include, or be referred to as, a lead frame. In the example shown in FIG1A, electronic components 11 and 12 may be coupled to the top and bottom portions of substrate 15.
[0033] The substrate 15, the encapsulation 16, and the component interconnects 111 and 121 protect the electronic components 11 and 12 from external factors and / or environmental exposure. The substrate 15 and the component interconnects 111 and 121 provide electrical coupling between external components and the electronic components 11 and 12.
[0034] Figures 2A, 2B, 2C, 2D, and 2E show cross-sectional views of an example method for manufacturing an example semiconductor device. Figures 2A to 2E are cross-sectional views taken along line AA of Figure 1D.
[0035] Figure 2A shows a cross-sectional view of the semiconductor device 10 during an early manufacturing stage. In the example shown in Figure 2A, the electronic component 11 may include component interconnects 111. The electronic component 11 can be coupled to the substrate 15 via the component interconnects 111. In the example shown in Figure 2A, the semiconductor device 10 may include, or be referred to as, a semiconductor component, a semiconductor die, a semiconductor wafer, or a semiconductor package. In some examples, the electronic component 11 may include at least one of application-specific integrated circuits, logic dies, microcontroller units, memory, digital signal processors, network processors, power management units, audio processors, RF circuits, sensors, or on-chip processors of a wireless baseband system. In some examples, the body of the electronic component 11 may have a thickness of about 80 µm to about 250 µm.
[0036] In some instances, the component interconnect 111 may be located or disposed on a first side of the electronic component 11. In some instances, the first side of the electronic component 11 may be referred to as the front side or active side of the electronic component 11, where a device structure may be positioned. The component interconnect 111 may be an input, output, signal, or power terminal of the electronic component 11. The component interconnect 111 may be coupled to the substrate 15. In some instances, the component interconnect 111 may comprise or be referred to as a die pad or bonding pad. For example, the component interconnect 111 may comprise a conductive material, such as a metallic material, aluminum, copper, an aluminum alloy, or a copper alloy. In some instances, the component interconnect 111 may comprise conductive balls / bumps, such as solder balls / bumps, conductive pillars (such as Cu pillars), or conductive pillars (such as Cu pillars) with solder tips. In some instances, the component interconnect 111 may have a width of about 40 µm to about 160 µm, or a thickness of about 50 µm to about 90 µm.
[0037] Figure 2B shows a cross-sectional view of the semiconductor device 10 during a later manufacturing stage. In the example shown in Figure 2B, electronic component 11 may be coupled to substrate 15. In some instances, coupling of electronic component 11 to substrate 15 may be achieved via a reflow process or a laser-assisted bonding process. In some instances, substrate 15 may include, or be referred to as, a lead frame.
[0038] The substrate 15 may include leads 151 and 152 spaced apart from each other. In some examples, leads 151 and 152 may be referred to as fingers. In some instances, the substrate 15 may have a thickness of about 100 µm to about 250 µm.
[0039] Lead 151 may include lead stairs 151a, 151b, and 151c, lead offsets 151x and 151y, and lead terminals 151z. Lead stairs 151a, 151b, and 151c, lead offsets 151x and 151y, and lead terminals 151z may be integrated with each other as identical or continuous parts. In some instances, lead stairs 151a, 151b, 151c, lead offsets 151x, 151y, or lead terminals 151z may be defined by stamping, bending, or etching.
[0040] The lead step 151a may extend generally horizontally or generally parallel to the first side of the electronic component 11. The inner end of the lead step 151a may face towards the electronic component 11, and the outer end may face away from the electronic component 11. The lead step 151a may be coupled to an adjacent lead step 151a via a tie-bar. The lead step 151a may be an example of a lead step residing on a first plane (such as a horizontal plane), as generally illustrated in FIG2B.
[0041] The lead offset 151x can be coupled to the inner end of the lead step 151a. The outer end of the lead offset 151x can be coupled to the inner end of the lead step 151a, and the lead offset 151x can be angled upwards such that the inner end of the lead offset 151x is higher than the outer end of the lead offset 151x. The lead offset 151x can be arranged at a predetermined angle relative to the lead step 151a. In some embodiments, the lead offset 151x can be referred to as a lead riser. The lead step 151b can be coupled to the inner end of the lead offset 151x.
[0042] The lead step 151b may extend substantially horizontally or substantially parallel to the lead step 151a. The inner end of the lead step 151b may face towards the electronic component 11, and the outer end may face away from the electronic component 11. The lead step 151b may have a length less than that of the lead step 151a. The lead step 151b may be an example of a lead step residing on a second plane, as generally illustrated in FIG2B, which is different from (e.g., higher than) the first plane as previously described.
[0043] The lead offset member 151y can be coupled to the inner end of the lead step 151b. The outer end of the lead offset member 151y can be coupled to the inner end of the lead step 151b, and the lead offset member 151y can be angled upwards such that the inner end of the lead offset member 151y is higher than the outer end of the lead offset member 151y. The lead offset member 151y can be arranged at a predetermined angle relative to the lead step 151b. In some embodiments, the lead offset member 151y can be referred to as a lead riser. The lead step 151c can be coupled to the inner end of the lead offset member 151y.
[0044] Lead step 151c may extend generally horizontally or generally parallel to lead step 151a. The inner end of lead step 151c may face towards electronic component 11, and the outer end may face away from electronic component 11. Lead step 151c may have a length equal to or less than the length of lead step 151b. Component interconnect 111 may be coupled to the top side of lead step 151c. Lead step 151c may be an example of a lead step residing on a third plane, as generally illustrated in FIG2B, which is different from (e.g., higher than) the previously described second plane. According to the description of the invention, lead offsets 151x and 151y are configured to extend between lead steps 151a, 151b, and 151c, such that the lead steps reside on different planes, as generally illustrated in FIG2B. The top side of the lead step 151c can be the lead step side, such as the first lead step side or the second lead step side.
[0045] In some instances, the lead terminal 151z may extend downward from the bottom side of the lead step 151a, near the outer end of the lead step 151a. The lead terminal 151z may have a length less than that of the lead step 151a.
[0046] Lead 152 may include lead steps 152a, 152b, and 152c, lead offsets 152x and 152y, and lead terminals 152z. Lead steps 152a, 152b, and 152c, lead offsets 152x and 152y, and lead terminals 152z may be integrated with each other as identical or continuous parts. In some instances, lead steps 152a, 152b, and 152c, lead offsets 152x and 152y, or lead terminals 152z may be defined by stamping, bending, or etching.
[0047] The lead step 152a may extend generally horizontally or generally parallel to the first side of the electronic component 11. The inner end of the lead step 152a may face towards the electronic component 11, and the outer end may face away from the electronic component 11. The lead step 152a may be coupled to an adjacent lead step 152a via a connecting rod. Examples of lead steps 152a may be lead steps residing on a fourth plane, as generally illustrated in Figure 2B. In some instances, the fourth plane is the same as the first plane previously described.
[0048] The lead offset member 152x can be coupled to the inner end of the lead step 152a. The outer end of the lead offset member 152x can be coupled to the inner end of the lead step 152a, and the lead offset member 152x can be angled upwards such that the inner end of the lead offset member 152x is higher than the outer end of the lead offset member 152x. The lead offset member 152x can be arranged at a predetermined angle relative to the lead step 152a. In some embodiments, the lead offset member 152x can be referred to as a lead riser. The lead step 152b can be coupled to the inner end of the lead offset member 152x.
[0049] Lead step 152b may extend generally horizontally or generally parallel to lead step 152a. The inner end of lead step 152b may face towards electronic component 11, and the outer end may face away from electronic component 11. Lead step 152b may have a length less than that of lead step 152a. Lead step 152b may be an example of a lead step residing on a fifth plane, as generally illustrated in Figure 2B, which may be different from (e.g., higher than) the fourth plane. In some instances, the fifth plane may be the same as the previously described second plane.
[0050] The lead offset member 152y can be coupled to the inner end of the lead step 152b. The outer end of the lead offset member 152y can be coupled to the inner end of the lead step 152b, and the lead offset member 152y can be angled upwards such that the inner end of the lead offset member 152y is higher than the outer end of the lead offset member 152y. The lead offset member 152y can be arranged at a predetermined angle relative to the lead step 152b. In some embodiments, the lead offset member 152y can be referred to as a lead riser. The lead step 152c can be coupled to the inner end of the lead offset member 152y.
[0051] Lead step 152c may extend generally horizontally or generally parallel to lead step 152a. The inner end of lead step 152c may face towards electronic component 11, and the outer end may face away from electronic component 11. Lead step 152c may have a length equal to or less than the length of lead step 152b. Component interconnect 111 may be coupled to the top side of lead step 152c. Lead step 152c may be an example of a lead step residing on a sixth plane different from (e.g., higher than) the fifth plane. In some instances, the sixth plane may be the same as the previously described third plane. According to the description of the invention, lead offsets 152x and 152y are configured to extend between lead steps 152a, 152b, and 152c, thus the lead steps reside on different planes, as generally illustrated in FIG2B. The top side of the lead step 152c can be the lead step side, such as the first lead step side or the second lead step side.
[0052] In some instances, the lead terminal 152z may extend downward from the bottom side of the lead step 152a, near the outer end of the lead step 152a. The lead terminal 152z may have a length less than that of the lead step 152a.
[0053] Figure 2C shows a cross-sectional view of the semiconductor device 10 during a later manufacturing stage. In the example shown in Figure 2C, electronic component 12 may be coupled to substrate 15. In some examples, a first side of electronic component 12 may be coupled to substrate 15. In some examples, the first side of electronic component 12 may be referred to as the front side or active side of electronic component 12, where a device structure may be positioned. Electronic component 12 may include component interconnects 121 of lead steps 151b and 152b coupled to leads 151 and 152. In some examples, the coupling between electronic component 12 and substrate 15 may be secured by a reflow process. In some examples, electronic component 12 may be similar to electronic component 11. In some examples, electronic component 12 and electronic component 11 may have different functionalities. In some examples, electronic component 12 may have a thickness of about 50 µm to about 160 µm. In some examples, the size of electronic component 12 may be different from (e.g., larger than) the size of electronic component 11. The bottom side of lead step 152b or the bottom side of lead step 151b can be a lead step side, such as an example of a first lead step side or a second lead step side.
[0054] Figure 2D shows a cross-sectional view of the semiconductor device 10 during a later manufacturing stage. In the example shown in Figure 2D, after electronic components 11 and 12 are coupled to substrate 15, an encapsulation 16 may encapsulate electronic components 11, 12, and substrate 15. In some examples, the encapsulation 16 may expose a second side of electronic component 11 or a second side of electronic component 12 (see Figures 1B and 1C). In some examples, the top side of the encapsulation 16 may be substantially coplanar with the second side of electronic component 11 (see Figure 1B). In some examples, the bottom side of the encapsulation 16 may be coplanar with the second side of electronic component 12 (see Figure 1C). In some examples, the second side of the first electronic component 11 and the second side of electronic component 12 may be referred to as the bottom side or passive side. The bottom sides of lead terminals 151z and 152z may be exposed to the bottom side of the encapsulation 16 (see Figure 1C). In the example shown in Figure 2D, the outer end of lead step 151a or lead step 152a may be exposed to the side of the encapsulation 16.
[0055] Encapsulant 16 may comprise, or be referred to as, molding material, protective material, molding compound, or resin. In some instances, encapsulant 16 may comprise a filler-reinforced polymer, a polymer composite, an epoxy resin, a polymer composite, a filler-containing epoxy resin, a filler-containing epoxy acrylate, or a silicone resin. For example, encapsulant 16 may be provided using compression molding, transfer molding, film-assisted molding, liquid phase encapsulant molding, vacuum lamination, or paste printing processes. In some instances, encapsulant 16 may have a thickness of about 350 µm to about 1000 µm.
[0056] Figure 2E shows a cross-sectional view of the semiconductor device 10 during a later manufacturing stage. In the example shown in Figure 2E, the substrate 15 can be individualized into individual semiconductor devices 10 by, for example, sawing. In some examples, sawing tools, such as diamond blades or laser beams, can be used to perform the sawing. The sawing can be performed along the boundary line between the encapsulation 16 and the substrate 15 (indicated by the dashed line in Figure 2E). The sawing tool can cut along the boundary line the portion between the encapsulation 16 and the substrate 15. After individualization, the substrate 15 can be exposed at the sides of the encapsulation 16. The exposed portion can be the outer ends of the lead steps 151a, 152a, and the bottom sides of the lead terminals 151z, 152z of the substrate 15.
[0057] Figures 3A, 3B, and 3C show different cross-sectional views of example semiconductor device 10 or variations thereof.
[0058] Figure 3A shows a cross-sectional view taken along line B of Figure 1D. In the example shown in Figure 3A, electronic component 11 of semiconductor device 10 may be coupled to lead 153 of substrate 15, but not necessarily to lead 154. For example, electronic component 11 may be coupled to lead step 153c of lead 153 via component interconnect 111. Electronic component 12 may be coupled to lead 154, but not necessarily to lead 153. For example, electronic component 12 may be coupled to lead step 154b of lead 154 via component interconnect 112. The top side of lead step 153c may be a lead step side, such as an example of a first lead step side or a second lead step side. The bottom side of lead step 154b may be a lead step side, such as an example of a first lead step side or a second lead step side.
[0059] Figure 3B shows a cross-sectional view of an example semiconductor device 10'. The features, components, or fabrication of semiconductor device 10' may be similar to those described with respect to Figures 2A through 2E. In the example shown in Figure 3B, semiconductor device 10' may include electronic components 11 and 12, component interconnects 111 and 121, a substrate 15, and an encapsulation 16. The sides of lead steps 153a and 154a of substrate 15 and the bottom sides of lead terminals 153z and 154z may be exposed from the encapsulation 16. In some examples, the top side of electronic component 11 may not be exposed from the top side of encapsulation 16, or may be covered by encapsulation 16. In some examples, the bottom side of electronic component 12 may not be exposed from the bottom side of encapsulation 16, or may be covered by encapsulation 16. The top side of lead step 153c or the top side of lead step 154c may be a lead step side, such as an example of a first lead step side or a second lead step side. The bottom side of lead step 153b or the bottom side of lead step 154b may be a lead step side, such as an example of a first lead step side or a second lead step side. The top side of lead step 152b may be a lead step side, such as an example of a first lead step side or a second lead step side. The bottom side of lead step 152b may be a lead step side, such as an example of a first lead step side or a second lead step side.
[0060] Figure 3C shows a cross-sectional view of an example semiconductor device 10''. The features, components, or fabrication of semiconductor device 10' may be similar to those described with respect to Figures 2A to 2E. In the example shown in Figure 3C, semiconductor device 10'' may include electronic component 11, electronic component 12, electronic component 13 between electronic components 11 and 12, substrate 15, and encapsulation 16. Electronic component 13 may be similar to electronic component 11 or electronic component 12. Component interconnect 131 may couple electronic component 13 to substrate 15, for example, to lead step 153c.
[0061] In some instances, electronic component 11 may be coupled to lead 153 but not necessarily to lead 154. Electronic component 11 may be coupled to lead step 153c of lead 153 via component interconnect 111. In some instances, electronic component 12 may be coupled to lead 154 but not necessarily to lead 153. Electronic component 12 may be coupled to lead step 154b of lead 154 via component interconnect 121. Electronic component 13 may be disposed between substrate 15 and electronic component 12. In some instances, electronic component 13 may be coupled to lead step 153c via component interconnect 131 but not necessarily to lead step 154c. In some instances, electronic component 13 may be coupled to electronic component 11 via component interconnect 131, both of which are coupled to lead 153 at lead step 153c.
[0062] In some instances, the top side of electronic component 11 or the bottom side of electronic component 12 may be exposed from the encapsulation 16. In some instances, the top side of electronic component 11 or the bottom side of electronic component 12 may be covered by the encapsulation 16. The encapsulation 16 may extend between electronic component 13 and electronic component 12, or between electronic component 13 and electronic component 11. The top side of lead step 153c may be a lead step side, such as in examples of a first lead step side or a second lead step side. The bottom side of lead step 153c may be a lead step side, such as in examples of a first lead step side or a second lead step side. The bottom side of lead step 154b may be a lead step side, such as in examples of a first lead step side or a second lead step side.
[0063] Figure 4A shows a cross-sectional view of the example semiconductor device 20. Figure 4B shows a perspective view of the example semiconductor device 20. Figure 4C shows a bottom view of the example semiconductor device 20. Figure 4D shows a transparent perspective view of the example semiconductor device 20. The features, components, or fabrication of the semiconductor device 20 may be similar to the corresponding features, components, or fabrication of other semiconductor devices or processes disclosed herein (such as semiconductor device 10 of Figures 1 and 2).
[0064] In the examples shown in Figures 4A to 4D, semiconductor device 20 may include electronic components 11 and 12, substrate 25, and encapsulation 16. Electronic components 11 and 12 may include component interconnects 111 and 121, respectively. In some examples, substrate 25 may be similar to substrate 15. Electronic components 11 and 12 may be coupled to the top and bottom sides of substrate 25.
[0065] The substrate 25 and the encapsulation 16 protect the electronic components 11 and 12 from external factors and / or environmental exposure. The substrate 25 and the component interconnects 111 and 121 provide electrical coupling between the external components and the electronic components 11 and 12.
[0066] Figures 4E, 4F, and 4G show cross-sectional views of an example method for manufacturing example semiconductor device 20 with respect to line A of Figure 4D.
[0067] Figure 4E shows a cross-sectional view of the semiconductor device 20 during an early manufacturing stage. In the example shown in Figure 4E, electronic component 11 is coupled to substrate 25 via component interconnect 111. In some examples, coupling of electronic component 11 to substrate 25 can be achieved via a reflow process. In some examples, substrate 25 may include, or be referred to as, a lead frame.
[0068] In the example shown in Figure 4E, substrate 25 may include leads 251 and 252 arranged opposite to each other. In some examples, leads 251 and 252 may have similar shapes to each other. Substrate 25 may include a paddle 259 between leads 251 and leads 252.
[0069] Lead 251 may include lead steps 151a and 151b, lead offset 151x, and lead terminal 151z. Lead steps 151a and 151b, lead offset 151x, and lead terminal 151z may be integrated with each other as identical or continuous parts. In some instances, different features of lead 251 may be defined by stamping, bending, or etching.
[0070] The lead step 151a may extend generally horizontally or generally parallel to the first side of the electronic component 11. The inner end of the lead step 151a may face the electronic component 11, and the outer end may face away from the electronic component 11. The lead step 151a may be coupled to an adjacent lead step 151a via a connecting rod.
[0071] The lead offset member 151x can be coupled to the inner end of the lead step 151a. The outer end of the lead offset member 151x can be coupled to the inner end of the lead step 151a, and the lead offset member 151x can be angled upwards such that the inner end of the lead offset member 151x is higher than the outer end of the lead offset member 151x. The lead offset member 151x can be arranged at a predetermined angle relative to the lead step 151a. In some embodiments, the lead offset member 151x can be referred to as a lead riser. The lead step 151b can be coupled to the inner end of the lead offset member 151x.
[0072] The lead step 151b may extend generally horizontally or generally parallel to the lead step 151a. The inner end of the lead step 151b may face the electronic component 11, and the outer end may face away from the electronic component 11. The lead step 151b may have a length less than that of the lead step 151a. The interconnect 111 of the electronic component 11 may be coupled to the top side of the lead step 151b.
[0073] In some instances, the lead terminal 151z may extend downward from the bottom side of the lead step 151a, near the outer end of the lead step 151a. The lead terminal 151z may have a length less than that of the lead step 151a.
[0074] Lead 252 may include lead steps 152a, 152b, lead offset 152x, and lead terminal 152z. Lead steps 152a, 152b, lead offset 152x, and lead terminal 152z may be integrated with each other as identical or continuous parts. In some instances, lead steps 152a, 152b, lead offset 152x, or lead terminal 152z may be defined by stamping, bending, or etching.
[0075] The lead step 152a may extend generally horizontally or generally parallel to the first side of the electronic component 11. The inner end of the lead step 152a may face the electronic component 11, and the outer end may face away from the electronic component 11. The lead step 152a may be coupled to an adjacent lead step 152a via a connecting rod.
[0076] The lead offset member 152x can be coupled to the inner end of the lead step 152a. The outer end of the lead offset member 152x can be coupled to the inner end of the lead step 152a, and the lead offset member 152x can be angled upwards such that the inner end of the lead offset member 152x is higher than the outer end of the lead offset member 152x. The lead offset member 152x can be arranged at a predetermined angle relative to the lead step 152a. In some embodiments, the lead offset member 152x can be referred to as a lead riser. The lead step 152b can be coupled to the inner end of the lead offset member 152x.
[0077] The lead step 152b may extend generally horizontally or generally parallel to the lead step 152a. The inner end of the lead step 152b may face the electronic component 11, and the outer end may face away from the electronic component 11. The lead step 152b may have a length less than that of the lead step 152a. The component interconnect 111 may be coupled to the top side of the lead step 152b.
[0078] In some instances, the lead terminal 152z may extend downward from the bottom side of the lead step 152a, near the outer end of the lead step 152a. The lead terminal 152z may have a length less than that of the lead step 152a.
[0079] In some instances, the blade 259 may be provided by stamping or etching portions of the substrate 25. In some instances, the blade 259 may be substantially coplanar with the lead steps 151b and 152b. In some embodiments, the blade 259 may include a ground plane. The component interconnect 111 of the electronic component 11 may be coupled to the top side of the blade 259. The blade 259 may include an extension 2591 for grounding (see FIG. 4D). In some instances, the extension 2591 may be referred to as a connecting rod or finger. The extension 2591 may be arranged to be spaced apart from the leads (251 and 252 in FIG. 4E; 253 and 254 in FIG. 4H). In some instances, the blade 259 may be arranged in a rectangular shape, and the extension 2591 may be coupled to the apex of the blade 259.
[0080] Figure 4F shows a cross-sectional view of the semiconductor device 20 during a later manufacturing stage. In the example shown in Figure 4F, electronic component 12 may be coupled to the bottom side of substrate 25 and the bottom side of blade 259. Electronic component 12 may include component interconnects 121. Component interconnects 121 may be coupled to lead steps 151b and 152b of leads 251 and 252, or coupled to blade 259. In some examples, the bottom side of electronic component 12 may be coplanar with the bottom sides of lead terminals 151z and 152z. In some examples, coupling of electronic component 12 to substrate 25 may be achieved through a reflow process. In some examples, electronic component 12 may be similar to electronic component 11. In other examples, electronic components 11 and 12 may have different functionalities. In some instances, electronic component 11 may be coupled to electronic component 12 via corresponding component interconnects 111, 121, which are coupled to lead 251 at lead step 151b or to lead 252 at lead step 152b. The top side of lead step 151b may be a lead step side, such as in instances of a first lead step side or a second lead step side. The bottom side of lead step 151b may be a lead step side, such as in instances of a first lead step side or a second lead step side. The top side of lead step 152b may be a lead step side, such as in instances of a first lead step side or a second lead step side. The bottom side of lead step 152b may be a lead step side, such as in instances of a first lead step side or a second lead step side.
[0081] Figure 4G shows a cross-sectional view of the semiconductor device 20 during a later manufacturing stage. In the example shown in Figure 4G, after electronic components 11 and 12 are coupled to substrate 25, encapsulation 16 encapsulates electronic components 11 and 12 as well as substrate 25. Substrate 25 can then be separated into individual semiconductor devices 20 by sawing or individualization. The manufacturing stage of Figure 4G can be similar to the manufacturing stages described for Figures 2D and 2E. In the example shown in Figure 4G, encapsulation 16 exposes the top side of electronic component 11 and the bottom side of electronic component 12 (see Figures 4B and 4C). In some examples, the top side of encapsulation 16 may be substantially coplanar with the top side of electronic component 11 (see Figure 4B). In some examples, the bottom side of encapsulation 16 may be coplanar with the bottom side of electronic component 12 (see Figure 4C). The bottom sides of lead terminals 151z and 152z may be exposed at the bottom side of encapsulation 16 (see Figure 4C). After unification, the outer ends of the lead steps 151a and 152a can be exposed at the side of the encapsulation 16.
[0082] Figure 4H shows a cross-sectional view taken along line B of Figure 4D. As seen in Figure 4H, electronic component 11 can be coupled to lead 253 and blade 259, but not necessarily to lead 254. In some instances, electronic component 11 can be coupled to lead step 153b of lead 253 and blade 259 via component interconnect 111. Electronic component 12 can be coupled to lead 254 and blade 259, but not necessarily to lead 253. In some instances, electronic component 12 can be coupled to lead step 154b of lead 254 and blade 259 via component interconnect 121.
[0083] Figure 4I shows a cross-sectional view taken along line C of Figure 4D. As shown in Figure 4I, electronic components 11 and 12 can be coupled to blade 259. In some instances, electronic component 11 can be coupled to blade 259 via component interconnect 111, and electronic component 12 can be coupled to blade 259 via component interconnect 121.
[0084] The substrate 25 may include a blade 259 and extensions 2591 and 2592, each having extension terminals 2591z and 2592z, respectively. In some embodiments, extensions 2591 and 2592 may be referred to as connecting rods or fingers. Extensions 2591 and 2592 may resemble leads 251, 252, 253, and 254, but are coupled to the blade 259. The blade 259 and extensions 2591 and 2592 may be integrated with each other as identical or continuous portions. In some embodiments, the blade 259 may be disposed between electronic components 11 and 12, and may be parallel to electronic components 11 and 12. Extension 2591 may be coupled to one end of the blade 259, and extension 2592 may be coupled to the other end of the blade 259. The top sides of extensions 2591 and 2592 may be disposed below the blade 259. In some examples, extensions 2591 and 2592 may be symmetrical to each other. Extension terminal 2591z may be disposed under extension 2591, and extension terminal 2592z may be disposed under extension 2592. The bottom sides of extension terminals 2591z and 2592z may be exposed to the bottom side of the encapsulation 16. The outer ends of extension terminals 2591z and 2592z may be exposed to the sides of the encapsulation 16.
[0085] Figure 5A shows a cross-sectional view of the example semiconductor device 30. Figure 5B shows a perspective view of the example semiconductor device 30. Figure 5C shows a bottom view of the example semiconductor device 30. Figure 5D shows a transparent perspective view of the example semiconductor device 30. The features, components, or fabrication of the semiconductor device 30 may be similar to the corresponding features, components, or fabrication of other semiconductor devices or processes disclosed herein (such as semiconductor devices 10 or 20 of Figures 1 to 4).
[0086] In the examples shown in Figures 5A to 5D, semiconductor device 30 may include electronic components 11 and 12, substrate 35, and encapsulation 16. Electronic components 11 and 12 may include component interconnects 111 and 121, respectively. In some examples, substrate 35 may be similar to substrate 15 or 25. Electronic components 11 and 12 may be coupled to the top side of substrate 35.
[0087] The substrate 35 and the encapsulation 16 protect the electronic components 11 and 12 from external factors and / or environmental exposure. The substrate 35 and the component interconnects 111 and 121 provide electrical coupling between the external components and the electronic components 11 and 12.
[0088] Figures 5E, 5F, 5G, and 5H show cross-sectional views of an example method for manufacturing an example semiconductor device 30, with respect to line A of Figure 5D (for Figures 5E, 5F, and 5G) and line B of Figure 5D (for Figure 5H).
[0089] Figure 5E shows a cross-sectional view of the semiconductor device 30 during an early manufacturing stage. In the example shown in Figure 5E, an electronic component 12 with component interconnects 121 can be coupled to a substrate 35. In some examples, the coupling of the electronic component 12 to the substrate 35 can be achieved via a reflow process. In some examples, the substrate 35 may include, or be referred to as, a lead frame. In some examples, a portion of the top side of the lead 351 or lead 352 may be higher than the bottom side of the electronic component 12.
[0090] In the example shown in Figure 5E, substrate 25 may include leads 351 and 352 arranged opposite to each other. Leads 351 and 352 may have similar shapes to each other.
[0091] Lead 351 may include lead steps 151a, 151b, and 351c, lead offsets 151x and 351y, and lead terminals 151z. Lead steps 151a, 151b, and 351c, lead offsets 151x and 351y, and lead terminals 151z may be integrated with each other as identical or continuous parts. In some instances, lead steps 151a, 151b, and 351c, lead offsets 151x and 351y, or lead terminals 351z may be defined by stamping, bending, or etching.
[0092] The lead step 151a may extend generally horizontally or generally parallel to the first side of the electronic component 11. The inner end of the lead step 151a may face towards the electronic component 11, and the outer end may face away from the electronic component 11. The lead step 151a may be coupled to an adjacent lead step 151a via a connecting rod. The lead step 151a may be an example of a lead step residing on a first plane (such as a horizontal plane), as generally illustrated in FIG5E.
[0093] The lead offset member 151x can be coupled to the inner end of the lead step 151a. The outer end of the lead offset member 151x can be coupled to the inner end of the lead step 151a, and the lead offset member 151x can be angled upwards such that the inner end of the lead offset member 151x is higher than the outer end of the lead offset member 151x. The lead offset member 151x can be arranged at a predetermined angle relative to the lead step 151a. In some embodiments, the lead offset member 151x can be referred to as a lead riser.
[0094] Lead step 151b may be coupled to the inner end of lead offset member 151x. Lead step 151b may extend generally horizontally or generally parallel to lead step 151a. The inner end of lead step 151b may face towards electronic component 11, and the outer end may face away from electronic component 11. Lead step 151b may have a length less than that of lead step 151a. Lead step 151b may be an example of a lead step residing on a second plane, generally illustrated in FIG5E, which is different from (e.g., higher than) the first plane as previously described.
[0095] The lead offset 351y can be coupled to the inner end of the lead step 151b. The outer end of the lead offset 351y can be coupled to the inner end of the lead step 151b, and the lead offset 351y can be angled downwards such that the inner end of the lead offset 351y is lower than the outer end of the lead offset 351y. The lead offset 351y can be arranged at a predetermined angle relative to the lead step 151b. In some embodiments, the lead offset 351y can be referred to as a lead downset.
[0096] Lead step 351c may be coupled to the inner end of lead offset 351y. Lead step 351c may extend generally horizontally or generally parallel to lead step 151a. The inner end of lead step 351c may face towards electronic component 11, and the outer end may face away from electronic component 11. Lead step 351c may have a length equal to or less than the length of lead step 151b. Component interconnect 111 may be coupled to the top side of lead step 351c. Lead step 351c may be an example of a lead step residing on a third plane, generally illustrated in FIG5E, which is different from (e.g., higher than) the previously described second plane. In an example, the third plane may be the same as the first plane.
[0097] In some instances, the lead terminal 151z may extend downward from the bottom side of the lead step 151a, near the outer end of the lead step 151a. The lead terminal 151z may have a length less than that of the lead step 151a.
[0098] Lead 352 may include lead steps 152a, 152b, and 352c, lead offsets 152x and 352y, and lead terminals 152z. Lead steps 152a, 152b, and 352c, lead offsets 152x and 352y, and lead terminals 152z may be integrated with each other as identical or continuous parts. In some instances, lead steps 152a, 152b, and 352c, lead offsets 152x and 152y, or lead terminals 352z may be defined by stamping, bending, or etching.
[0099] The lead step 152a may extend generally horizontally or generally parallel to the first side of the electronic component 11. The inner end of the lead step 152a may face towards the electronic component 11, and the outer end may face away from the electronic component 11. The lead step 152a may be coupled to an adjacent lead step 152a via a connecting rod. Examples of lead steps 152a may be those residing on a fourth plane (such as a horizontal plane), as generally illustrated in FIG5E. In some instances, the fourth plane may be the same as the first plane.
[0100] The lead offset member 152x can be coupled to the inner end of the lead step 152a. The outer end of the lead offset member 152x can be coupled to the inner end of the lead step 152a, and the lead offset member 152x can be angled upwards such that the inner end of the lead offset member 152x is higher than the outer end of the lead offset member 152x. The lead offset member 152x can be arranged at a predetermined angle relative to the lead step 152a. In some embodiments, the lead offset member 152x can be referred to as a lead riser.
[0101] Lead step 152b may be coupled to the inner end of lead offset 152x. Lead step 152b may extend generally horizontally or generally parallel to lead step 152a. The inner end of lead step 152b may face towards electronic component 11, and the outer end may face away from electronic component 11. Lead step 152b may have a length less than that of lead step 152a. Lead step 152b may be an example of a lead step residing on a fifth plane, generally illustrated in FIG5E, which is different from (e.g., higher than) the fourth plane as previously described. In some instances, the fifth plane may be the same as the third plane.
[0102] The lead offset 352y can be coupled to the inner end of the lead step 152b. The outer end of the lead offset 352y can be coupled to the inner end of the lead step 152b, and the lead offset 352y can be angled downwards such that the inner end of the lead offset 352y is lower than the outer end of the lead offset 352y. The lead offset 352y can be arranged at a predetermined angle relative to the lead step 152b. In some embodiments, the lead offset 352y can be referred to as a lead recess.
[0103] Lead step 352c may be coupled to the inner end of lead offset 352y. Lead step 352c may extend generally horizontally or generally parallel to lead step 152a. The inner end of lead step 352c may face the electronic component 11, and the outer end may face away from the electronic component 11. Lead step 352c may have a length equal to or less than the length of lead step 152b. Component interconnect 111 may be coupled to the top side of lead step 352c. Lead step 352c may be an example of a lead step residing on a sixth plane, generally illustrated in FIG5E, which is different from (e.g., higher than) the fifth plane as previously described. In some instances, the sixth plane may be the same as the third plane.
[0104] In some instances, the lead terminal 152z may extend downward from the bottom side of the lead step 152a, near the outer end of the lead step 152a. The lead terminal 152z may have a length less than that of the lead step 152a.
[0105] Figure 5F shows a cross-sectional view of the semiconductor device 30 during a later manufacturing stage. In the example shown in Figure 5F, electronic component 11 may be positioned above electronic component 12 and coupled to substrate 35. In some examples, electronic component 11 may be coupled to the top side of lead steps 151b and 152b. In some cross-sections, electronic component 11 may have a wider width than electronic component 12. In some examples, electronic component 11 and electronic component 12 may be coupled. In some examples, electronic component 11 may be coupled to electronic component 12 via corresponding component interconnects 111 and 121 coupled to leads 351 or 352. The top side of lead step 151b may be a lead step side, such as an example of a first lead step side or a second lead step side. The top side of lead step 351c may be a lead step side, such as an example of a first lead step side or a second lead step side. The top side of lead step 152b can be a lead step side, such as an example of a first lead step side or a second lead step side. The top side of lead step 352c can be a lead step side, such as an example of a first lead step side or a second lead step side.
[0106] Figure 5G shows a cross-sectional view of the semiconductor device 30 during a later manufacturing stage. In the example shown in Figure 5G, after electronic components 11 and 12 are coupled to substrate 35, encapsulation 16 can encapsulate electronic components 11 and 12 and substrate 25. Substrate 35 and encapsulation 16 can be uniformly integrated to define an individual semiconductor device 30. The manufacturing stage of Figure 5G can be similar to the manufacturing stages of Figures 2D to 2E. In some examples, the top side of electronic component 11 can be exposed from encapsulation 16 (see Figure 5B). In some examples, the top side of electronic component 11 can be covered by encapsulation 16. In some examples, encapsulation 16 can fill the space between electronic component 11 and electronic component 12. The bottom sides of lead terminals 151z and 152z can be exposed from the bottom side of encapsulation 16 (see Figure 5C). The bottom sides of lead terminals 151z and 152z can be exposed at the bottom side of encapsulation 16 (see Figure 5C). After unification, the outer ends of the lead steps 151a and 152a can be exposed at the side of the encapsulation 16.
[0107] Figure 5H shows a cross-sectional view taken along line B of Figure 5D. As seen in Figure 5H, electronic component 11 can be coupled to lead 354, but not necessarily to lead 353. In some instances, electronic component 11 can be coupled to lead step 154b of lead 354 via component interconnect 111. Electronic component 12 can be coupled to lead 353, but not necessarily to lead 354. In some instances, electronic component 12 can be coupled to lead step 353c of lead 353 via interconnect 121.
[0108] This disclosure includes references to certain examples; however, those skilled in the art will understand that various changes and equivalents can be made without departing from the scope of this disclosure. For example, additional lead ladders and lead offsets may be used. Furthermore, modifications can be made to the disclosed examples without departing from the scope of this disclosure. Therefore, it is intended that this disclosure be limited to the disclosed examples, but rather to include all examples falling within the scope of the appended claims. [ ]
[0109] 10: Semiconductor devices 10': Semiconductor device 10'': Semiconductor device 11: Electronic components 12: Electronic components 13: Electronic components 15:Substrate 16: Encapsulation 20: Semiconductor devices 25:Substrate 30: Semiconductor devices 35:Substrate 111: Component interconnection 112: Component interconnection 121: Component interconnection 131: Component interconnection 151: Lead wire 151a: Lead ladder 151b: Lead ladder 151c: Lead ladder 151x: Lead offset component 151y: Lead offset component 151z: Lead terminal 152: Lead wire 152a: Lead ladder 152b: Lead ladder 152c: Lead ladder 152x: Lead offset component 152y: Lead offset component 152z: Lead terminal 153: Lead wire 153a: Lead ladder 153b: Lead ladder 153c: Lead ladder 153z: Lead terminal 154: Lead wire 154a: Lead ladder 154b: Lead ladder 154c: Lead ladder 154z: Lead terminal 251: Lead wire 252: Lead wire 253: Lead wire 254: Lead wire 259: Propeller 351: Lead wire 351c: Lead ladder 351y: Lead offset component 352: Lead wire 352c: Lead ladder 352y: Lead offset component 353: Lead wire 353c: Lead ladder 354: Lead wire 2591: Extension 2592: Extension 2591z: Extension Terminal 2592z: Extension Terminal
Claims
1. A semiconductor device comprising: a substrate including leads, the leads including: lead terminals; lead steps; and lead offsets extending between the lead steps such that at least some of the lead steps reside on different planes; a first electronic component coupled to a first lead step side, the first electronic component including: a first electronic component first side including a first active side; and a first electronic component second side opposite to the first electronic component first side; a second electronic component coupled to a second lead step side, the second electronic component including: a second electronic component first side including a second active side; and a second electronic component second side opposite to the second electronic component first side; conductive bumps including a first conductive bump and a second conductive bump; and an encapsulation encapsulating portions of the first electronic component, the second electronic component, and the substrate, wherein: The first active side faces and is connected to the first lead step side through the first conductive bump; The second active side faces and connects to the second lead step side through the second conductive bump; the lead terminal is exposed from the first side of the envelope; the second side of the first electronic component is exposed from the second side of the envelope; and the second side of the envelope is different from the first side of the envelope.
2. The semiconductor device according to claim 1, wherein: The first side of the first electronic component is exposed from the second side of the encapsulation.
3. The semiconductor device according to claim 1, wherein: The first lead step side is the top side of the first lead step; and the second lead step side is the bottom side of the second lead step, which is different from the first lead step.
4. The semiconductor device according to claim 1, further comprising: a third electronic component coupled to the third lead step side, wherein: The third electronic component is inserted between the first electronic component and the second electronic component; and the encapsulation material encapsulates the third electronic component.
5. The semiconductor device according to claim 1, wherein: Each lead comprises a continuous element; and the lead steps extend parallel to each other.
6. The semiconductor device according to claim 1, wherein: The lead offset is arranged at an angle relative to the lead steps; and some of the angles are downward angles, such that some of the lead steps that are positioned inward toward the first electronic component are lower than other lead steps that are positioned outward from the first electronic component.
7. The semiconductor device according to claim 1, wherein: The lead offset member is arranged at an angle relative to the lead step; and the angle is an upward angle, such that the lead step that is positioned inward toward the first electronic component is higher than the lead step that is positioned outward from the first electronic component.
8. The semiconductor device according to claim 1, wherein: The lead ladder includes different lengths.
9. The semiconductor device according to claim 1, wherein: The lead terminals extend downward from the bottom side of the outermost lead step; each lead terminal includes: an outer edge that is exposed from a third side of the encapsulation and is coplanar with the third side of the encapsulation; an inner edge that is opposite to the outer edge; and a lower side; the encapsulation encapsulates each inner edge of the inner edge; and the lower side of each lead terminal is exposed from a first side of the encapsulation and is coplanar with the first side of the encapsulation.
10. The semiconductor device according to claim 1, wherein: The lead includes a first lead; the first lead includes: a first lead terminal; A first lead step, coupled to the first lead terminal and residing on the first plane; a first lead offset, coupled to the first lead step; A second lead step is coupled to the first lead offset and resides on a second plane above the first plane; a second lead offset is coupled to the second lead step; The first active side is connected to the second lead offset and resides on the third plane below the second plane; and the first lead step side, which is connected through the first conductive bump, is the top side of the second lead step.
11. The semiconductor device according to claim 10, wherein: The lead includes a second lead; the second lead includes: a second lead terminal; A fourth lead step, which is coupled to the second lead terminal and resides on the first plane; a third lead offset member, which is coupled to the fourth lead step; A fifth lead step, which is coupled to the third lead offset and resides on the second plane; a fourth lead offset, which is coupled to the fifth lead step; The sixth lead step is coupled to the fourth lead offset and resides on the third plane; and the second active side is connected through the second conductive bump to the second lead step side, which is the top side of the sixth lead step.
12. The semiconductor device according to claim 1, wherein: The substrate includes a blade, the blade having a top side, a bottom side opposite to the top side, and a blade extension having an extension terminal; a first electronic component is coupled to the top side of the blade; a second electronic component is coupled to the bottom side of the blade. Furthermore, the extended terminal is exposed from the first side of the encapsulation.
13. A semiconductor device comprising: a substrate including a first lead and a second lead, wherein: The first lead includes: a first lead terminal having a first outer side, a first inner side opposite to the first outer side, and a first lower side connecting the first outer side to the first inner side; a first lead step coupled to the first lead terminal and residing on a first plane; and a first lead offset coupled to the first lead step. A second lead step is coupled to the first lead offset and resides on a second plane different from the first plane; a second lead offset is coupled to the second lead step; The second lead includes: a third lead step coupled to the second lead offset and residing on a third plane different from the second plane; and the second lead includes: a second lead terminal including a second outer side, a second inner side opposite to the second outer side, and a second lower side connecting the second outer side to the second inner side; a fourth lead step coupled to the second lead terminal and residing on a fourth plane; and a third lead offset coupled to the fourth lead step. A fifth lead step, which is coupled to the third lead offset and resides on a fifth plane different from the fourth plane; a fourth lead offset, which is coupled to the fifth lead step; A sixth lead step, which is coupled to the fourth lead offset and resides on a sixth plane different from the fifth plane; a first electronic component, which is coupled to the first lead; A second electronic component, which is coupled to the second lead; A capsule that encapsulates a portion of the first electronic component, the second electronic component, and the substrate, wherein: the capsule includes a first side of the capsule, a second side of the capsule opposite to the first side of the capsule, and a lateral side of the capsule connecting the first side of the capsule to the second side of the capsule; and the first lower side of the first lead terminal and the second lower side of the second lead terminal are exposed from the first side of the capsule and are coplanar with the first side of the capsule.
14. The semiconductor device according to claim 13, further comprising: a first conductive bump; and a second conductive bump; wherein: The third plane is below the second plane; the sixth plane is below the fifth plane; the first electronic component is connected to the top side of the second lead step through the first conductive bump; and the second electronic component is connected to the top side of the sixth lead step through the second conductive bump.
15. The semiconductor device according to claim 13, further comprising: a first conductive bump; and a second conductive bump; wherein: The third plane is above the second plane; the sixth plane is above the fifth plane; the first electronic component is connected to the top side of the third lead step through the first conductive bump; and the second electronic component is connected to the bottom side of one of the fifth lead step or the sixth lead step through the second conductive bump.
16. The semiconductor device according to claim 13, wherein: The first outer side of the first lead terminal and the second outer side of the second lead terminal are exposed from the lateral side of the encapsulation and are coplanar with the lateral side of the encapsulation; and the encapsulation encapsulates the first inner side of the first lead terminal and the second inner side of the second lead terminal.
17. A method of manufacturing a semiconductor device, comprising: providing a substrate including leads, the leads including: each lead terminal including an outer side, an inner side opposite to the outer side, and a lower side connecting the outer side to the inner side; lead steps; and lead offsets extending between the lead steps such that at least some of the lead steps reside on different planes; coupling a first electronic component to a first lead step side, the first electronic component including: a first electronic component first side; and a first electronic component second side opposite to the first electronic component first side; coupling a second electronic component to a second lead step side, the second electronic component including: a second electronic component first side; and a second electronic component second side opposite to the second electronic component first side; and providing an encapsulation encapsulating portions of the first electronic component, the second electronic component, and the substrate, wherein: The encapsulation includes a first side; the lower side of the lead terminal is exposed from the first side of the encapsulation and is coplanar with the first side of the encapsulation; and the encapsulation encapsulates the inner side of the lead terminal.
18. The method according to request item 17, wherein: Providing the substrate includes providing a blade having a blade top side, a blade bottom side opposite to the blade top side, and a blade extension having an extension terminal; coupling the first electronic component includes coupling the first electronic component to the blade top side; and coupling the second electronic component includes coupling the second electronic component to the blade bottom side.
19. The method according to request item 18, wherein: Providing the encapsulation includes: encapsulating the propeller blade and exposing the extended terminal from the first side of the encapsulation, and exposing one or more of the first side of the first electronic component or the second side of the second electronic component from the encapsulation.
20. The method according to claim 17, further comprising: coupling a third electronic component to the third lead step side, wherein: The encapsulation provided includes encapsulating the third electronic component.
21. A semiconductor device comprising: a substrate including a first lead and a second lead, wherein: The first lead includes: a first lead terminal, which includes a first outer side, a first inner side opposite to the first outer side, a first lower side connecting the first outer side and the first inner side, and a first upper side opposite to the first lower side; a first lead step coupled to the first lead terminal and residing on a first plane; and a first lead offset member coupled to the first lead step. And a second lead step, which is coupled to the first lead offset and resides on a second plane different from the first plane; The second lead includes: a second lead terminal, which includes a second outer side, a second inner side opposite to the second outer side, a second lower side connecting the second outer side and the second inner side, and a second upper side opposite to the second lower side; A third lead step, coupled to the second lead terminal and residing on a third plane; a second lead offset, coupled to the third lead step; a fourth lead step, coupled to the second lead offset and residing on a fourth plane different from the third plane; and a fourth lead offset, coupled to the fifth lead step. And a sixth lead step, which is coupled to the fourth lead offset and resides on a sixth plane that is different from the fifth plane; A first electronic component, which is coupled to the first lead; A second electronic component, which is coupled to the second lead; A capsule that encapsulates a portion of the first electronic component, the second electronic component, and the substrate, wherein: the capsule includes a first side of the capsule and a second side of the capsule opposite to the first side of the capsule; the first lower side of the first lead terminal and the second lower side of the second lead terminal are exposed from the first side of the capsule; The encapsulation material encapsulates the first upper side and the first inner side of the first lead terminal and the second upper side and the second inner side of the second lead terminal.
22. The semiconductor device according to claim 21, further comprising: a fourth lead offset coupled to the second lead step; and a fifth lead step coupled to the fourth lead offset and residing on a fifth plane different from the second plane; The fifth lead offset element is coupled to the fourth lead step; A sixth lead step, which is coupled to the fifth lead offset and resides on a sixth plane different from the fourth plane, and a first conductive bump; The first electronic component is connected to the top side of the second lead step via the first conductive bump, wherein: the fifth plane is located below the second plane; the sixth plane is located below the fourth plane; and the first electronic component is connected to the top side of the second lead step via the first conductive bump. The second electronic component is connected to the top side of the sixth lead step through the second conductive bump.
23. The semiconductor device according to claim 22, wherein: The encapsulation includes a lateral side; and the first outer side of the first lead terminal and the second outer side of the second lead terminal are exposed from the lateral side of the encapsulation and are coplanar with the lateral side of the encapsulation.
24. The semiconductor device according to claim 22, wherein: The first lead step is the outermost lead step and includes the top side of the first lead step; the first lead terminal is connected to the first lead step without any offset; and the encapsulation completely encapsulates the top side of the first lead step.
25. The semiconductor device according to claim 21, wherein: The fourth lead offset element is coupled to the second lead step; The fifth lead step is coupled to the fourth lead offset and resides on a fifth plane that is different from the second plane; The fifth lead offset element is coupled to the fourth lead step; A sixth lead step, which is coupled to the fifth lead offset and resides on a sixth plane different from the fourth plane, and a first conductive bump; The first electronic component is connected to the top side of the fifth lead step via the first conductive bump; and the second electronic component is connected to the bottom side of one of the fourth lead steps or the bottom side of the sixth lead step via the second conductive bump.
26. A semiconductor device comprising: a substrate including a plurality of leads, wherein the plurality of leads include: a plurality of lead terminals; a plurality of lead steps; and a plurality of lead offsets extending from the plurality of lead steps such that at least some of the plurality of lead steps reside on different planes; A first electronic component coupled to a first lead step in the plurality of lead steps, the first electronic component comprising: a first side of the first electronic component including a first active side; and a second side of the first electronic component opposite to the first side of the first electronic component; a first conductive bump coupling the first active side to the first lead step; and an encapsulation encapsulating portions of the first electronic component, the first conductive bump, and the substrate, wherein: the encapsulation includes a top side of the encapsulation, a bottom side of the encapsulation opposite to the top side of the encapsulation, and a lateral side of the encapsulation connecting the top side of the encapsulation to the bottom side of the encapsulation; each of the plurality of lead terminals comprising: an outer side exposed from the lateral side of the encapsulation and coplanar with the lateral side of the encapsulation; and a lower side extending inward from the outer side and exposed from the bottom side of the encapsulation and coplanar with the bottom side of the encapsulation; and the outer side of each lead terminal terminating at the lateral side of the encapsulation.
27. The semiconductor device according to claim 26, further comprising: Second conductive bump; The second electronic component, coupled to a second lead step in the plurality of lead steps, includes: a first side of the second electronic component, including a second active side; and a second side of the second electronic component, opposite to the first side of the second electronic component; wherein: the second active side is coupled to the second lead step through the second conductive bump; and the encapsulation encapsulates the second electronic component and the second conductive bump.
28. The semiconductor device according to claim 27, wherein: The first lead step includes a top side of the first lead step and a bottom side of the first lead step opposite to the top side of the first lead step; the second lead step includes a top side of the second lead step and a bottom side of the second lead step opposite to the top side of the second lead step; and the first electronic component is coupled to the top side of the first lead step.
29. The semiconductor device according to claim 28, wherein: The second electronic component is coupled to the bottom side of the second lead step.
30. The semiconductor device according to claim 27, further comprising: Third conductive bump; and a third electronic component, which is coupled to a third lead step in the plurality of lead steps by means of the third conductive bump; wherein: the encapsulation encapsulates the third electronic component and the third conductive component.
31. The semiconductor device according to claim 26, wherein: The lead offset members are arranged at an angle relative to the plurality of lead steps; and some of the angles are downward angles, such that some of the plurality of lead steps disposed inward toward the first electronic component are lower than other lead steps disposed outward from the first electronic component.