Connection detection circuit

TWI932180BActive Publication Date: 2026-07-11ITE TECH INC
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Patent Information

Application Number
TW114114689
Authority / Receiving Office
TW · TW
Patent Type
Patents
Current Assignee / Owner
Filing Date
2025-04-18
Publication Date
2026-07-11
Estimated Expiration
2045-04-17

Smart Images

  • Figure IMG-2_DRAW_114114689-A0305-14-0001-1
    Figure IMG-2_DRAW_114114689-A0305-14-0001-1
  • Figure IMG-2_DRAW_114114689-A0305-14-0002-2
    Figure IMG-2_DRAW_114114689-A0305-14-0002-2
  • Figure IMG-2_DRAW_114114689-A0305-14-0003-3
    Figure IMG-2_DRAW_114114689-A0305-14-0003-3
Patent Text Reader

Abstract

The connection detection circuit, comprising a pre-detection circuit and a connection circuit, is located within the first electronic device. When the first electronic device operates in power-saving mode, the connection detection circuit disables the power-consuming connection circuit and enables the power-efficient pre-detection circuit to determine whether a second electronic device is inserted into the first electronic device. When the first electronic device operates in normal mode, or when the pre-detection circuit determines that a second electronic device is inserted while operating in power-saving mode, the connection detection circuit disables the less accurate pre-detection circuit and enables the more accurate connection circuit to accurately determine the connection status between the first and second electronic devices.
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Description

Technical Field

[0001] This invention relates to a connection detection circuit, and more particularly to a connection detection circuit that can maintain connection detection functionality with low power consumption in a power-saving mode. Prior Technology

[0002] USB technology offers plug-and-play functionality and ease of use, boasting advantages such as low cost, wide functionality, and ease of development, making it the most popular data transfer interface today. While traditional USB specifications offer insufficient power to devices and lack support for image processing applications, the next-generation USB Type-C connector supports simultaneous data, audio, and video transmission, reversible insertion, and high-efficiency charging. Combined with high compatibility and high transfer rates, it is widely used in information and communication technology (ICT) devices such as monitors, desktops, tablets, and mobile phones.

[0003] The USB Type-C specification defines different voltage divider behaviors for different connection states. USB Type-C compatible electronic devices typically have a dedicated connection detection circuit to detect the connection status with external devices. Previous connection detection circuits typically included components such as pull-up circuits, pull-down circuits, comparators, and analog-to-digital converters (ADCs). In previous technologies, the connection detection circuit continued to operate and consume power even when the device entered power-saving mode. If the connection detection circuit was turned off when the device entered power-saving mode, the connection status with external devices could not be detected in power-saving mode.

[0004] Therefore, a connection detection circuit is needed that can reduce power consumption in power-saving mode and detect connection status. Summary of the Invention

[0005] This invention provides a connection detection circuit capable of maintaining connection detection functionality with low power consumption in a power-saving mode, configured within a first electronic device. The circuit includes a pre-detection circuit and a connection circuit. The pre-detection circuit is activated after the first electronic device switches from a normal mode to the power-saving mode to determine whether a second electronic device is inserted into the first electronic device. The connection circuit is activated when the first electronic device is operating in the normal mode to determine whether the second electronic device is inserted into the first electronic device; deactivated when the first electronic device switches from the normal mode to the power-saving mode; and activated when the first electronic device is operating in the power-saving mode and the pre-detection circuit determines that the second electronic device is inserted into the first electronic device to determine the connection status between the first and second electronic devices. Among them, the power consumption of the first electronic device when operating in the normal mode is higher than that when operating in the power-saving mode, the power consumption of the connection circuit when operating is higher than that of the pre-detection circuit when operating, and the accuracy of the connection circuit in detecting the connection status is higher than that of the pre-detection circuit in detecting the connection status. Simple Explanation of the Diagram

[0006] Figures 1A and 1B are functional block diagrams of a connection detection circuit in an embodiment of the present invention that can maintain connection detection function with low power consumption in power-saving mode. Figures 2A and 2B are schematic diagrams of the transmission interface of the existing USB Type-C specification. Figure 3 is a schematic diagram of the implementation of the wiring circuit in the wiring detection circuit of the present invention. Figure 4 is a schematic diagram of the implementation of the pre-detection circuit in the wiring detection circuit of the present invention. Figure 5 is a flowchart of the operation of the connection detection circuit in an embodiment of the present invention. Figures 6A-6D are schematic diagrams of different circuit states when the connection detection circuit of the embodiment of Figure 1A of the present invention is in operation. Figures 7A-7D are schematic diagrams of different circuit states when the connection detection circuit of the embodiment in Figure 1A of the present invention is in operation. Figures 8A-8C are schematic diagrams of different circuit states when the connection detection circuit of the embodiment in Figure 1B of the present invention is in operation. Figures 9A-9C are schematic diagrams of different circuit states when the connection detection circuit of the embodiment in Figure 1B of the present invention is in operation. Figure 10 is a signal diagram of the pre-detection circuit operating in DRP mode in an embodiment of the present invention. Implementation

[0007] Figures 1A and 1B are functional block diagrams of a connection detection circuit 100 in an embodiment of the present invention, capable of maintaining connection detection functionality with low power consumption in a power-saving mode. The connection detection circuit 100 includes a connection circuit 10A and a pre-detection circuit 20A, and can be housed within a first electronic device M1. The first electronic device M1 can be coupled to an external device (e.g., a second electronic device M2 or a third electronic device M3) via a connection interface 30, and the connection detection circuit 100 is used to detect whether the second electronic device M2 or the third electronic device M3 is inserted into the first electronic device M1. In the embodiment shown in Figure 1A, the second electronic device M2 includes a connection circuit 10B and a pre-detection circuit 20B. In the embodiment shown in Figure 1B, the third electronic device M3 includes a connection circuit 10C.

[0008] In this embodiment of the invention, the connection interface 30 may adopt the USB Type-C standard. Figure 2A shows the pinout diagram of the USB Type-C socket, and Figure 2B shows the pinout diagram of the USB Type-C plug. To support reversible insertion, both the USB Type-C socket and plug have two sets of symmetrical pins, denoted by numbers A1~A12 and B1~B12 respectively. The two differential signal transmission pairs TX1+ / TX1- / RX1+ / RX1- and TX2+ / TX2- / RX2+ / RX2- are pins used for data transmission. Vbus is the pin used for bus power supply, while Vconn is the pin used for powering the cable controller (located only on the USB Type-C plug). The configuration channel pins CC1 / CC2 are used to detect reversible insertion, connection status, determine the downstream facing port (DFP) and upstream facing port (UFP), configure the power supply pins Vbus and Vconn, configure other modes (alternate or accessory mode), and perform other related power delivery (PD) communication operations. The D+ / D- pins are used for backward support of the USB 2.0 standard, the SBU1 / SBU2 pins are used to transmit auxiliary signals, and GND is the ground pin. Power is supplied through the Vbus pin only when a connected device is detected by the configuration channel pins CC1 / CC2.

[0009] For example, the connection interface 30 can be a USB Type-C cable, with USB Type-C plugs at both ends as shown in Figure 2B. On the other hand, the first electronic device M1, the second electronic device M2, and the third electronic device M3 are all equipped with USB Type-C sockets as shown in Figure 2A. When the USB Type-C socket of the first electronic device M1 is connected to the USB Type-C plug at the first end of the USB Type-C cable, and the USB Type-C plug at the second end of the USB Type-C cable is connected to the USB Type-C socket of the second electronic device M2 or the third electronic device M3, data communication and power transmission can be performed between the two coupled electronic devices. For simplicity, Figures 1A and 1B only show the power supply pin Vbus, the configuration channel pins CC1 / CC2, and the ground pin GND in the first electronic device M1, the second electronic device M2, the third electronic device M3, and the connection interface 30. Furthermore, the implementation of the connection interface 30 does not limit the scope of this invention.

[0010] In this invention, the connection circuit 10A in the connection detection circuit 100 can detect the load impedance of the channel pins CC1 and CC2 configured in the first electronic device M1, and then determine the connection status with external devices (such as the second electronic device M2 or the third electronic device M3). Since different connection statuses have their own voltage division characteristics, a relatively complex circuit is required to detect these voltages. Therefore, the connection circuit 10A can provide highly accurate connection status detection, but it consumes a large amount of power during operation.

[0011] In this invention, the pre-detection circuit 20A in the connection detection circuit 100 can detect the voltage value of the configured channel pin CC1 or CC2 in the first electronic device M1, and then determine whether an external device (such as the second electronic device M2 or the third electronic device M3) is inserted. Since it only needs to detect the voltage change of a single pin, the pre-detection circuit 20A consumes less power when operating, but it cannot accurately determine the connection status with the external device.

[0012] Figure 3 is a schematic diagram of the implementation of the interconnection circuit 10A in the interconnection detection circuit 100 of the present invention. The interconnection circuit 10A includes switch circuits SW1 and SW2, pull-up resistors RP1 and RP2, pull-down resistors RD1 and RD2, an operation mode detection circuit 12, a switch control circuit 14, and transistors Tr1 and Tr2.

[0013] The first terminal of pull-up resistor RP1 can be selectively coupled to the configuration channel pin CC1 of the first electronic device M1 via switch circuit SW1, while the second terminal of pull-up resistor RP1 is coupled to a power supply potential (e.g., 5V). The first terminal of pull-down resistor RD1 can be selectively coupled to the configuration channel pin CC1 of the first electronic device M1 via switch circuit SW1, while the second terminal of pull-down resistor RD1 is coupled to the ground pin GND of the first electronic device M1. The first terminal of pull-up resistor RP2 can be selectively coupled to the configuration channel pin CC2 of the first electronic device M1 via switch circuit SW2, while the second terminal of pull-up resistor RP2 is coupled to a power supply potential (e.g., 5V). The first terminal of pull-down resistor RD2 can be selectively coupled to the configuration channel pin CC2 of the first electronic device M1 via switch circuit SW2, while the second terminal of pull-down resistor RD2 is coupled to the ground pin GND of the first electronic device M1. Meanwhile, the voltage VCC1 of the relevant configuration channel pin CC1 and the voltage VCC2 of the relevant configuration channel pin CC2 are supplied to the operation mode detection circuit 12 so that the connection circuit 10A can know the load impedance of the configuration channel pins CC1 / CC2 when it is in operation, and then determine the connection status with the external device (such as the second electronic device M2).

[0014] The operation mode detection circuit 12 includes a comparator 121 and a state machine 122. The comparator 121 determines the load impedance of the configuration channel pins CC1 / CC2 based on the voltage VCC1 of the relevant configuration channel pin CC1 and the voltage VCC2 of the relevant configuration channel pin CC2. The state machine 122 determines the connection status with external devices (e.g., a second electronic device M2 or a third electronic device M3) based on the result of the comparator 121. Furthermore, the operation mode detection circuit 12 generates control signals SC0-SC2 to control the operation of the switch control circuit 14, transistor Tr1, and transistor Tr2, respectively.

[0015] Based on the control signal SC0 generated by the operation mode detection circuit 12, the switch control circuit 14 can provide control signals S1 and S2 to control the operation of switch circuits SW1 and SW2 respectively. Specifically, if the first electronic device M1 operates as a power supply terminal, the control signals S1 and S2 output by the switch control circuit 14 will set the switch circuits SW1 and SW2 to the first state (as shown in Figure 3), that is, the configuration channel pins CC1 and CC2 are coupled to the first terminals of pull-up resistors RP1 and RP2 respectively; if the first electronic device M1 operates as a power receiving terminal, the control signals S1 and S2 output by the switch control circuit 14 will set the switch circuits SW1 and SW2 to the second state (not shown in Figure 3), that is, the configuration channel pins CC1 and CC2 are coupled to the first terminals of pull-down resistors RD1 and RD2 respectively. In one embodiment, the switching circuits SW1 and SW2 may each be a single-pole double-throw (SPDT) switch, but the types of switching circuits SW1 and SW2 are not limited to the scope of the present invention.

[0016] When an external device is detected plugged into the first electronic device M1 operating on the power supply side, the control signals SC1 and SC2 generated by the operation mode detection circuit 12 will turn on transistor Tr1 and turn off transistor Tr2 respectively, thereby supplying power to the external device (e.g., the second electronic device M2 or the third electronic device M3) by connecting the power supply pin Vbus to a VBUS power supply terminal. When an external device is detected plugged into the first electronic device M1 operating on the power receiving side, the control signals SC1 and SC2 generated by the operation mode detection circuit 12 will turn off transistor Tr1 and turn on transistor Tr2 respectively, thereby receiving power from the external device (e.g., the second electronic device M2 or the third electronic device M3) by connecting the power supply pin Vbus to a Vbus power receiving terminal.

[0017] In this embodiment of the invention, the wiring circuit 10B of the second electronic device M2 and the wiring circuit 10C of the third electronic device M3 may have the same structure as the wiring circuit 10A of the first electronic device M1, but are not limited thereto. The first electronic device M1, the second electronic device M2, and the third electronic device M3 may use wiring circuits with the same or different structures.

[0018] Figure 4 is a schematic diagram illustrating the implementation of the pre-detection circuit 20A in the interconnection detection circuit 100 of this embodiment of the invention. The pre-detection circuit 20A includes switching circuits SW3 and SW4, pull-up resistors RP3 and RP4, pull-down resistors RD3 and RD4, and a control circuit 24. The first terminal of the pull-up resistor RP3 is coupled to a bias voltage VDD, and the second terminal is selectively coupled to the configuration channel pin CC1 of the first electronic device M1 via the switching circuit SW3. The first terminal of the pull-down resistor RD3 is selectively coupled to the configuration channel pin CC1 of the first electronic device M1 via the switching circuit SW4, and the second terminal is coupled to a bias voltage VSS, wherein the potential of the bias voltage VDD is higher than the potential of the bias voltage VSS (for example, the bias voltage VDD is a positive potential, while the bias voltage VSS is a negative potential or ground potential). The first terminal of the pull-up resistor RP4 is coupled to the bias voltage VDD, and the second terminal is selectively coupled to the configuration channel pin CC2 of the first electronic device M1 via the switching circuit SW5. The first terminal of pull-down resistor RD4 is selectively coupled to the configuration channel pin CC2 of the first electronic device M1 via switching circuit SW6, while the second terminal is coupled to the bias voltage VSS. The input terminal of comparator CP1 is coupled to the configuration channel pin CC1 of the first electronic device M1, while the output terminal is coupled to control circuit 24. The input terminal of comparator CP2 is coupled to the configuration channel pin CC2 of the first electronic device M1, while the output terminal is coupled to control circuit 24. Control circuit 24 can provide control signals S3-S6 to control the operation of switching circuits SW3-SW6 respectively.

[0019] In one embodiment of the present invention, comparators CP1 and CP2 can each be a positive feedback comparator circuit, such as a Schmitt trigger. When the potential at the input terminal of comparator CP1 is higher than its input high level ViH1, comparator CP1 outputs a logic 1 voltage; when the potential at the input terminal of comparator CP1 is lower than its input low level ViL1, comparator CP1 outputs a logic 0 voltage. Similarly, when the potential at the input terminal of comparator CP2 is higher than its input high level ViH2, comparator CP2 outputs a logic 1 voltage; when the potential at the input terminal of comparator CP2 is lower than its input low level ViL2, comparator CP2 outputs a logic 0 voltage. However, the implementation of comparators CP1 and CP2 does not limit the scope of the present invention.

[0020] In one embodiment of the present invention, the switching circuits SW3-SW6 can each be a single-pole single-throw (SPST) switch, a metal-oxide-semiconductor field-effect transistor (MOSFET), a bipolar junction transistor (BJT), or other components with similar functions, which can be respectively set to an on state or an off state by control signals S3-S6. However, the implementation of the switching circuits SW3-SW6 does not limit the scope of the present invention.

[0021] In this embodiment of the invention, the pre-detection circuit 20B of the second electronic device M2 and the pre-detection circuit 20A of the first electronic device M1 have the same structure. More specifically, the pre-detection circuit 20B may include switching circuits SW3' and SW4', pull-up resistors RP3' and RP4', pull-down resistors RD3 and RD4, and a control circuit 26. Its coupling method and operation are the same as those of the pre-detection circuit 20A shown in Figure 4, and will not be described again here.

[0022] Figure 5 is a flowchart illustrating the operation of the connection detection circuit 100 in an embodiment of the present invention. The flowchart shown in Figure 5 includes the following steps:

[0023] Step 510: Determine the operating mode of the first electronic device M1? If it is determined that the first electronic device M1 is operating in normal mode, proceed to step 540; if it is determined that the first electronic device M1 is operating in power-saving mode, proceed to step 520.

[0024] Step 520: The wiring detection circuit 100 shuts down the wiring circuit 10A and turns on the pre-detection circuit 20A.

[0025] Step 530: Has the pre-detection circuit 20A detected the insertion of an external device? If yes, proceed to step 540; if no, proceed to step 510.

[0026] Step 540: The connection detection circuit 100 shuts down the pre-detection circuit 20A and turns on the connection circuit 10A; proceed to step 510.

[0027] In step 510, the present invention first determines the operating mode of the first electronic device M1. When the first electronic device M1 operates in normal mode, all components operate normally at preset performance, resulting in higher system power consumption. When the first electronic device M1 enters power-saving mode, it first stores all data in system memory or hard drive, and then shuts down some or all components to reduce system power consumption. In this embodiment of the invention, the power-saving mode can be a sleep mode or a hibernation mode, but is not limited to these.

[0028] When it is determined in step 510 that the first electronic device M1 is currently operating in power-saving mode, step 520 is then executed to shut down the high-power-consuming connection circuit 10A in the connection detection circuit 100 and to turn on the low-power-consuming pre-detection circuit 20A. When it is determined in step 510 that the first electronic device M1 is currently operating in normal mode, step 540 is then executed to shut down the low-accuracy pre-detection circuit 20A in the connection detection circuit 100 and to turn on the high-accuracy connection circuit 10A.

[0029] The operation of the pre-detection circuit 20 will be explained using the embodiment shown in Figure 4. In one embodiment, the control signals S3-S6 output by the control circuit 24 will set the switching circuits SW3 and SW5 to the on state and the switching circuits SW4 and SW6 to the off state. That is, the second terminals of the pull-up resistors RP3 and RP4 are coupled to the configuration channel pins CC1 and CC2, respectively, and the first terminals of the pull-down resistors RD3 and RD4 are disconnected from the configuration channel pins CC1 and CC2, respectively. In this case, the configuration channel pins CC1 and CC2 of the first electronic device M1 will be coupled to the bias voltage VDD via the pull-up resistors RP3 and RP4, respectively. At this time, the pre-detection circuit 20 can use the pull-up resistors RP3 and RP4 to detect whether an external device (such as the second electronic device M2 or the third electronic device M3) is inserted. As mentioned earlier, the voltages VCC1 and VCC2 of the relevant configuration channel pin CC1 and CC2 may change due to the insertion of an external device or other reasons. When the value of voltage VCC1 drops from VDD to make the potential at the input terminal of comparator CP1 lower than its input low level ViL1, comparator CP1 will output a voltage V1 with a logic 0 potential; when the value of voltage VCC2 drops from VDD to make the potential at the input terminal of comparator CP2 lower than its input low level ViL2, comparator CP2 will output a voltage V2 with a logic 0 potential. When the control circuit 24 receives a voltage V1 or voltage V2 with a logic 0 potential, it will determine in step 530 that an external device (such as the second electronic device M2 or the third electronic device M3) has been inserted, and then execute step 540 to wake up the connection circuit 10A, thereby providing highly accurate connection status detection.

[0030] In one embodiment, the control signals S3-S6 output by the control circuit 24 set the switching circuits SW3 and SW5 to the off state and set the switching circuits SW4 and SW6 to the on state. That is, the second terminals of the pull-up resistors RP3 and RP4 are disconnected from the configuration channel pins CC1 and CC2, respectively, and the first terminals of the pull-down resistors RD3 and RD4 are coupled to the configuration channel pins CC1 and CC2, respectively. In this case, the configuration channel pins CC1 and CC2 of the first electronic device M1 are coupled to the bias voltage VSS via the pull-down resistors RD3 and RD4, respectively. At this time, the pre-detection circuit 20 can use the pull-down resistors RD3 and RD4 to detect whether an external device (such as the second electronic device M2 or the third electronic device M3) is inserted. As mentioned earlier, the voltages VCC1 and VCC2 of the relevant configuration channel pin CC1 and CC2 may change due to the insertion of external devices or other reasons. When the value of voltage VCC1 rises from VSS to a level that makes the potential at the input of comparator CP1 higher than its input high level ViH1, comparator CP1 will output a voltage V1 with a logic 1 potential. When the value of voltage VCC2 rises from VSS to a level that makes the potential at the input of comparator CP2 higher than its input high level ViH2, comparator CP2 will output a voltage V2 with a logic 1 potential. When the control circuit 24 receives a voltage V1 or V2 with a logic 1 potential, it will determine in step 530 that an external device (e.g., the second electronic device M2 or the third electronic device M3) has been inserted, and then execute step 540 to wake up the connection circuit 10, thereby providing highly accurate connection status detection.

[0031] Figures 6A-6D are schematic diagrams illustrating different circuit configurations of the interconnect detection circuit 100 in the embodiment of Figure 1A of the present invention. For illustrative purposes, it is assumed that the control signals S3-S6 output by the control circuit 24 will set the switching circuits SW3 and SW5 to the on state and the switching circuits SW4 and SW6 to the off state, that is, the second terminals of the pull-up resistors RP3 and RP4 are respectively coupled to the configuration channel pins CC1 and CC2, and the first terminals of the pull-down resistors RD3 and RD4 are respectively disconnected from the configuration channel pins CC1 and CC2. In this case, the configuration channel pins CC1 and CC2 of the first electronic device M1 will be coupled to the bias voltage VDD via the pull-up resistors RP3 and RP4, respectively. At this time, the pre-detection circuit 20A of the first electronic device M1 can use the pull-up resistors RP3 and RP4 to detect whether an external device (e.g., the second electronic device M2) is inserted. Furthermore, it is assumed that the second electronic device M2 can also use the pull-down resistors RD3' and RD4' in a similar manner to detect whether an external device (e.g., the first electronic device M1) is inserted. For the sake of simplicity, Figures 6A-6D only show the connection detection operation of the relevant configuration channel pin CC1. The connection detection operation of the configuration channel pin CC2 is similar and will not be described in detail here.

[0032] In the embodiment shown in Figure 6A, the pull-up resistor RP3 of the pre-detection circuit 20A in the first electronic device M1 is smaller than the pull-up resistor RD3' of the pre-detection circuit 20B in the second electronic device M2. For example, the value of the pull-up resistor RP3 can be 75kΩ, while the value of the pull-down resistor RD3' can be 500kΩ.

[0033] As shown in Figure 6B, when the first electronic device M1 is not connected to the second electronic device M2, the first electronic device M1 and the second electronic device M2 use pre-detection circuits 20A and 20B respectively to determine whether an external device is inserted, while the connection circuits 10A and 10B are turned off to reduce power consumption. At this time, the voltage VCC1 of the relevant configuration channel pin CC1 in the first electronic device M1 is pulled up to the bias voltage VDD through the pull-up resistor RP3 (e.g., 75kΩ), while the voltage VCC1' of the relevant configuration channel pin CC1 in the second electronic device M2 is pulled down to the ground potential GND through the pull-down resistor RD3' (e.g., 500kΩ). That is, when the first electronic device M1 is not connected to the second electronic device M2, the configuration channel pin CC1 of the first electronic device M1 has a high logic potential, while the configuration channel pin CC1 of the second electronic device M1 has a low logic potential.

[0034] As shown in Figure 6C, when the first electronic device M1 is connected to the second electronic device M2, the configuration channel pin CC1 of the first electronic device M1 and the configuration channel pin CC1 of the second electronic device M2 have the same potential (VCC1=VCC1'). Since the pull-up capability of the pull-up resistor RP3 (e.g., 75kΩ) is greater than the pull-down capability of the pull-down resistor RD3' (e.g., 500kΩ), the voltage VCC1' of the relevant configuration channel pin CC1 in the second electronic device M2 will be pulled up from the ground potential GND. When the voltage VCC1' is greater than the high level ViH1 of the comparator CP1' input, the second electronic device M2 will determine that the voltage VCC1' has switched from a low logic potential to a high logic potential, and thus determine that an external device (e.g., the first electronic device M1) has been inserted. In this case, the second electronic device M2 will turn off the pre-detection circuit 20B (set the switch circuit SW3' to the off state) and turn on the connection circuit 10B (set the switch circuit SW1' to the on state) to provide highly accurate connection status detection. At this time, the equivalent resistance of the wiring circuit 10B in the second electronic device M2 is the pull-down resistor RD0 (e.g., 5.1kΩ) as defined by the standard.

[0035] As shown in Figure 6D, when the second electronic device M2 disables the pre-detection circuit 20B and enables the connection circuit 10B, the pull-down resistor RD0 (e.g., 5.1kΩ) is less than the pull-up resistor RP3 (e.g., 75kΩ) in the pre-detection circuit 20A of the first electronic device M1. Therefore, the pull-up capability of the pull-up resistor RP3 (e.g., 75kΩ) is less than the pull-down capability of the pull-down resistor RP0 (e.g., 5.1kΩ). At this time, the voltage VCC1 of the relevant configuration channel pin CC1 in the first electronic device M1 will be pulled down. When the voltage VCC1 is less than the low input level ViL1 of the comparator CP1, the first electronic device M1 will determine that the voltage VCC1 has switched from a high logic potential to a low logic potential, and thus determine that an external device (e.g., the second electronic device M2) has been inserted. In this situation, the first electronic device M1 will turn off the pre-detection circuit 20A (set the switch circuit SW3 to the off state) and turn on the connection circuit 10A (set the switch circuit SW1 to the on state) to provide highly accurate connection status detection. At this time, the equivalent resistance of the connection circuit 10A in the first electronic device M1 is the pull-up resistor RP0 defined by the specification (e.g., 36kΩ).

[0036] As shown in Figures 6A-6D, when the pre-detection circuit 20A of the first electronic device M1 and the pre-detection circuit 20A of the second electronic device M2 use pull-up resistors and pull-down resistors respectively to detect whether an external device is inserted, the present invention can set the pull-up resistor of the pre-detection circuit 20A to be less than the pull-down resistor of the pre-detection circuit 20B in the second electronic device M2 to provide the judgment condition VCC1'>ViH1' for the wake-up connection circuit 10B of the second electronic device M2, and set the pull-up resistor of the pre-detection circuit 20A in the first electronic device M1 to be greater than the specification-defined pull-down resistor of the second electronic device M2 to provide the judgment condition VCC1'>ViH1' for the wake-up connection circuit 10A of the first electronic device M1. <ViL1。

[0037] Similarly, when the pre-detection circuit 20A of the first electronic device M1 and the pre-detection circuit 20A of the second electronic device M2 use pull-down resistors and pull-up resistors respectively to detect whether an external device is inserted, the present invention can set the pull-down resistor of the pre-detection circuit 20A to be greater than the pull-up resistor of the pre-detection circuit 20B in the second electronic device M2 to provide the judgment condition VCC>ViH1 for the wake-up connection circuit 10A of the first electronic device M1, and set the specification-defined pull-down resistor of the first electronic device M1 to be less than the pull-up resistor of the pre-detection circuit 20B in the second electronic device M2 to provide the judgment condition VCC1' for the wake-up connection circuit 10B of the second electronic device M2. <ViL1’。

[0038] Figures 7A-7D are schematic diagrams illustrating different circuit configurations of the interconnect detection circuit 100 in the embodiment of Figure 1A of the present invention. For illustrative purposes, it is also assumed that the control signals S3-S6 output by the control circuit 24 will set the switching circuits SW3 and SW5 to the on state and the switching circuits SW4 and SW6 to the off state, that is, the second terminals of the pull-up resistors RP3 and RP4 are respectively coupled to the configuration channel pins CC1 and CC2, and the first terminals of the pull-down resistors RD3 and RD4 are respectively disconnected from the configuration channel pins CC1 and CC2. In this case, the configuration channel pins CC1 and CC2 of the first electronic device M1 will be coupled to the bias voltage VDD via the pull-up resistors RP3 and RP4, respectively. At this time, the pre-detection circuit 20A of the first electronic device M1 can use the pull-up resistors RP3 and RP4 to detect whether an external device (e.g., the second electronic device M2) is inserted. Furthermore, it is assumed that the second electronic device M2 can also detect whether an external device (e.g., the first electronic device M1) is inserted in a similar manner using the pull-down resistors RD3' and RD4'. For the sake of simplicity, Figures 7A-7D only show the connection detection operation of the relevant configuration channel pin CC1. The connection detection operation of the configuration channel pin CC2 is similar and will not be described in detail here.

[0039] In the embodiment shown in Figure 7A, the pull-up resistor RP3 of the pre-detection circuit 20A in the first electronic device M1 is greater than the pull-down resistor RD3' of the pre-detection circuit 20B in the second electronic device M2. For example, the value of the pull-up resistor RP3 can be 7500kΩ, while the value of the pull-down resistor RD3' can be 500kΩ.

[0040] As shown in Figure 7B, when the first electronic device M1 is not connected to the second electronic device M2, the first electronic device M1 and the second electronic device M2 use pre-detection circuits 20A and 20B respectively to determine whether an external device is inserted, while the connection circuits 10A and 10B are turned off to reduce power consumption. At this time, the voltage VCC1 of the relevant configuration channel pin CC1 in the first electronic device M1 is pulled up to the bias voltage VDD through the pull-up resistor RP3 (e.g., 7500kΩ), while the voltage VCC1' of the relevant configuration channel pin CC1 in the second electronic device M2 is pulled down to the ground potential GND through the pull-down resistor RD3' (e.g., 500kΩ). That is, when the first electronic device M1 is not connected to the second electronic device M2, the configuration channel pin CC1 of the first electronic device M1 has a high logic potential, while the configuration channel pin CC1 of the second electronic device M1 has a low logic potential.

[0041] As shown in Figure 7C, when the first electronic device M1 is connected to the second electronic device M2, the configuration channel pin CC1 of the first electronic device M1 and the configuration channel pin CC1 of the second electronic device M2 have the same potential (VCC1=VCC1'). Since the pull-up capability of the pull-up resistor RP3 (e.g., 7500kΩ) is less than the pull-down capability of the pull-down resistor RP3' (e.g., 500kΩ), the voltage VCC1 of the relevant configuration channel pin CC1 in the first electronic device M1 will be pulled down from the bias voltage VDD. When the voltage VCC1 is less than the low input level ViL1 of the comparator CP1, the first electronic device M1 will determine that the voltage VCC1 has switched from a high logic potential to a low logic potential, and thus determine that an external device (e.g., the second electronic device M2) has been inserted. In this situation, the first electronic device M1 will turn off the pre-detection circuit 20A (set the switch circuit SW3 to the off state) and turn on the connection circuit 10A (set the switch circuit SW1 to the on state) to provide highly accurate connection status detection. At this time, the equivalent resistance of the wiring circuit 10A in the first electronic device M1 is the pull-up resistor RP0 (e.g., 36kΩ) as defined by the standard.

[0042] As shown in FIG. 7D, when the first electronic device M1 turns off the pre-detection circuit 20A and turns on the connection circuit 10A, since the pull-up resistor RP0 (e.g., 36 kΩ) defined by the specification is smaller than the pull-down resistor RD3' (e.g., 500 kΩ) of the pre-detection circuit 20B in the second electronic device M2, the pull-up ability of the pull-up resistor RP0 (e.g., 36 kΩ) defined by the specification is greater than the pull-down ability of the pull-down resistor RD3' (e.g., 500 kΩ). At this time, the voltage VCC1' of the relevant configuration channel pin CC1 in the second electronic device M2 will be pulled up from the ground potential GND. When the voltage VCC1' is greater than the input high level ViH1' of the comparator CP1', the second electronic device M2 determines that the voltage VCC1' has switched from the low logic potential to the high logic potential, and further determines that an external device (e.g., the first electronic device M1) has been inserted. In this case, the second electronic device M2 will turn off the pre-detection circuit 20B (set the switch circuit SW3' to the cut-off state) and turn on the connection circuit 10B (set the switch circuit SW1' to the conducting state) to provide a highly accurate connection state detection. At this time, the equivalent resistance of the connection circuit 10B in the second electronic device M2 is the pull-down resistor RD0 (e.g., 5.1 kΩ) defined by the specification.

[0043] As shown in FIGS. 7A-7D, when the pre-detection circuit 20A of the first electronic device M1 and the pre-detection circuit 20A of the second electronic device M2 respectively use a pull-up resistor and a pull-down resistor to detect whether an external device is inserted, the present invention can set the pull-up resistor of the pre-detection circuit 20A to be greater than the pull-down resistor of the pre-detection circuit 20B in the second electronic device M2 to provide the judgment condition VCC1 < ViL1 for the first electronic device M1 to wake up the connection circuit 10A, and set the pull-up resistor defined by the specification of the first electronic device M1 to be smaller than the pull-down resistor of the pre-detection circuit 20B in the second electronic device M2 to provide the judgment condition VCC1' > ViH1' for the second electronic device M2 to wake up the connection circuit 10B.

[0044] Similarly, when the pre-detection circuit 20A of the first electronic device M1 and the pre-detection circuit 20A of the second electronic device M2 respectively use a pull-down resistor and a pull-up resistor to detect whether an external device is inserted, the present invention can set the pull-down resistor of the pre-detection circuit 20A to be smaller than the pull-up resistor of the pre-detection circuit 20B in the second electronic device M2 to provide the judgment condition VCC1' < ViL1' for the second electronic device M2 to wake up the connection circuit 10B, and set the pull-down resistor of the pre-detection circuit 20A in the first electronic device M1 to be greater than the pull-up resistor defined by the specification of the second electronic device M2 to provide the judgment condition VCC1 > ViH1 for the first electronic device M1 to wake up the connection circuit 10A.

[0045] Figures 8A-8C are schematic diagrams illustrating different circuit configurations of the interconnect detection circuit 100 in the embodiment of Figure 1B of the present invention. For illustrative purposes, it is also assumed that the control signals S3-S6 output by the control circuit 24 will set the switch circuits SW3 and SW5 to the on state and the switch circuits SW4 and SW6 to the off state, that is, the second terminals of the pull-up resistors RP3 and RP4 are respectively coupled to the configuration channel pins CC1 and CC2, and the first terminals of the pull-down resistors RD3 and RD4 are respectively disconnected from the configuration channel pins CC1 and CC2. In this case, the configuration channel pins CC1 and CC2 of the first electronic device M1 will be coupled to the bias voltage VDD via the pull-up resistors RP3 and RP4, respectively. At this time, the pre-detection circuit 20A of the first electronic device M1 can use the pull-up resistors RP3 and RP4 to detect whether an external device (e.g., the third electronic device M3) is inserted. In addition, the third electronic device M3 will use the interconnect circuit 10C to detect whether an external device (e.g., the first electronic device M1) is inserted. For the sake of simplicity, Figures 8A-8C only show the connection detection operation of the relevant configuration channel pin CC1. The connection detection operation of the configuration channel pin CC2 is similar and will not be described in detail here.

[0046] In the embodiment shown in Figure 8A, the pull-up resistor RP3 of the pre-detection circuit 20A in the first electronic device M1 is greater than the pull-down resistor RD0 of the interconnect circuit 10C in the third electronic device M3 as defined by the specification. For example, the value of the pull-up resistor RP3 can be 75kΩ, while the value of the pull-down resistor RD0 as defined by the specification can be 5.1kΩ.

[0047] As shown in Figure 8B, when the first electronic device M1 is not connected to the third electronic device M3, the first electronic device M1 uses the pre-detection circuit 20A to determine if an external device is inserted, while the connection circuit 10A is turned off to reduce power consumption. On the other hand, the third electronic device M3 uses the connection circuit 10C to detect if an external device is inserted. At this time, the voltage VCC1 of the relevant configuration channel pin CC1 in the first electronic device M1 is pulled up to the bias voltage VDD through the pull-up resistor RP3 (e.g., 75kΩ), while the voltage VCC1' of the relevant configuration channel pin CC1 in the third electronic device M3 is pulled down to the ground potential GND through the connection circuit 10C. That is, when the first electronic device M1 is not connected to the third electronic device M3, the configuration channel pin CC1 of the first electronic device M1 has a high logic potential, while the configuration channel pin CC1 of the third electronic device M3 has a low logic potential.

[0048] As shown in Figure 8C, when the first electronic device M1 is connected to the third electronic device M3, the configuration channel pin CC1 of the first electronic device M1 and the configuration channel pin CC1 of the second electronic device M2 have the same potential (VCC1=VCC1'). Since the pull-up capability of the pull-up resistor RP3 (e.g., 75kΩ) is less than the pull-down capability of the pull-down resistor RD0 (e.g., 5.1kΩ) as defined by the specification, the voltage VCC1 of the relevant configuration channel pin CC1 in the first electronic device M1 will be pulled down from the bias voltage VDD. When the voltage VCC1 is less than the low level ViL1 of the comparator CP1 input, the first electronic device M1 will determine that the voltage VCC1 has switched from a high logic potential to a low logic potential, and thus determine that an external device (e.g., the third electronic device M3) has been inserted. In this situation, the first electronic device M1 will turn off the pre-detection circuit 20A (set the switch circuit SW3 to the off state) and turn on the connection circuit 10A (set the switch circuit SW1 to the on state) to provide highly accurate connection status detection. At this time, the equivalent resistance of the wiring circuit 10A in the first electronic device M1 is the pull-up resistor RP0 (e.g., 36kΩ) as defined by the standard.

[0049] As shown in Figures 8A-8C, when the pre-detection circuit 20A of the first electronic device M1 uses a pull-up resistor to detect whether an external device is inserted, the present invention can set the pull-up resistor of the pre-detection circuit 20A to be greater than the pull-down resistor defined in the specification of the second electronic device M2, so as to provide the judgment condition VCC1 for the wake-up connection circuit 10A of the first electronic device M1. <ViL1。

[0050] Figures 9A-9C are schematic diagrams illustrating different circuit configurations of the interconnect detection circuit 100 in the embodiment of Figure 1B of the present invention. For illustrative purposes, it is assumed that the control signals S3-S6 output by the control circuit 24 will set the switch circuits SW3 and SW5 to the off state and the switch circuits SW4 and SW6 to the on state, that is, the first terminals of the pull-down resistors RD3 and RD4 are respectively coupled to the configuration channel pins CC1 and CC2, and the second terminals of the pull-up resistors RP3 and RP4 are respectively disconnected from the configuration channel pins CC1 and CC2. In this case, the configuration channel pins CC1 and CC2 of the first electronic device M1 will be coupled to the bias voltage VSS via the pull-down resistors RD3 and RD4, respectively. At this time, the pre-detection circuit 20A of the first electronic device M1 can use the pull-down resistors RD3 and RD4 to detect whether an external device (e.g., the third electronic device M3) is inserted. In addition, the third electronic device M3 will use the interconnect circuit 10B to detect whether an external device (e.g., the first electronic device M1) is inserted. For the sake of simplicity, Figures 9A-9C only show the connection detection operation of the relevant configuration channel pin CC1. The connection detection operation of the configuration channel pin CC2 is similar and will not be described in detail here.

[0051] In the embodiment shown in Figure 9A, the pull-down resistor RD3 of the pre-detection circuit 20A in the first electronic device M1 is greater than the pull-up resistor RP0 of the interconnect circuit 10C in the third electronic device M3 as defined by the specification. For example, the value of the pull-down resistor RD3 can be 500kΩ, while the value of the pull-up resistor RP0 as defined by the specification can be 36kΩ.

[0052] As shown in Figure 9B, when the first electronic device M1 is not connected to the third electronic device M3, the first electronic device M1 uses the pre-detection circuit 20A to determine if an external device is inserted, while the connection circuit 10A is turned off to reduce power consumption. On the other hand, the third electronic device M3 uses the connection circuit 10C to detect if an external device is inserted. At this time, the voltage VCC1 of the relevant configuration channel pin CC1 in the first electronic device M1 is pulled down to the negative bias voltage VSS through the pull-down resistor RD3 (e.g., 500kΩ), while the voltage VCC1' of the relevant configuration channel pin CC1 in the third electronic device M3 is pulled up to the positive bias voltage VDD through the connection circuit 10C. That is, when the first electronic device M1 is not connected to the third electronic device M3, the configuration channel pin CC1 of the first electronic device M1 has a low logic potential, while the configuration channel pin CC1 of the third electronic device M3 has a high logic potential.

[0053] As shown in Figure 9C, when the first electronic device M1 is connected to the third electronic device M3, the configuration channel pin CC1 of the first electronic device M1 and the configuration channel pin CC1 of the second electronic device M2 have the same potential (VCC1=VCC1'). Since the pull-down capability of the pull-down resistor RD3 (e.g., 500kΩ) is less than the pull-up capability of the pull-up resistor RP0 (e.g., 36kΩ) as defined by the specification, the voltage VCC1 of the relevant configuration channel pin CC1 in the first electronic device M1 will be pulled up from the negative bias voltage VSS. When the voltage VCC1 is greater than the high input level ViH1 of the comparator CP1, the first electronic device M1 will determine that the voltage VCC1 has switched from a low logic potential to a high logic potential, and thus determine that an external device (e.g., the third electronic device M3) has been inserted. In this case, the first electronic device M1 will turn off the pre-detection circuit 20A (set the switch circuit SW3 to the off state) and turn on the connection circuit 10A (set the switch circuit SW1 to the on state) to provide highly accurate connection status detection. At this time, the equivalent resistance of the wiring circuit 10A in the first electronic device M1 is the pull-up resistor RP0 (e.g., 36kΩ) as defined by the standard.

[0054] As shown in Figures 9A-9C, when the pre-detection circuit 20A of the first electronic device M1 uses a pull-down resistor to detect whether an external device is inserted, the present invention can set the pull-down resistor of the pre-detection circuit 20A to be greater than the pull-up resistor defined in the specification of the second electronic device M2, so as to provide the judgment condition voltage VCC1>ViH1 for the wake-up connection circuit 10A of the first electronic device M1.

[0055] In one embodiment, the control signals S3-S6 output by the control circuit 24 cause the switching circuits SW3-SW6 to operate similarly to the Dual Role of Power (DRP) mode in the USB PD protocol. Figure 10 shows the signal diagram of the pre-detection circuit 20A operating in DRP mode in this embodiment of the invention. In this embodiment, the pre-detection circuit 20A periodically switches between using pull-up resistors RP3 / RP4 and pull-down resistors RD3 / RD4 to detect the insertion of an external device (e.g., a second electronic device M2 or a third electronic device M3). For example, the pull-up resistors RP3 / RP4 detect possible device connections in the first half of each cycle tDRP, while the pull-down resistors RD3 / RD4 detect possible device connections in the second half of each cycle tDRP, as shown in Figure 10.

[0056] The operation of the interconnect circuit 10A will be explained using the embodiment shown in Figure 3. As previously described, in the embodiment where the first electronic device M1 is a power supply terminal, the interconnect circuit 10A uses pull-up resistors RP1 and RP2 to detect the interconnect status; in the embodiment where the first electronic device M1 is a power receiving terminal, the interconnect circuit 10A uses pull-down resistors RD1 and RD2 to detect the interconnect status; in another embodiment, the first electronic device M1 periodically switches between the roles of power supply terminal and power receiving terminal in DRP mode, at which time the interconnect circuit 10A periodically switches between using pull-up resistors RP1 / RP2 and pull-down resistors RD1 / RD2 to detect the interconnect status, as shown in Figure 10.

[0057] Table 1 below shows the CC1 / CC2 states defined for power supply devices in the USB specification. Those with general knowledge in the relevant fields should be familiar with the details of each connection state, so they will not be elaborated upon here. As mentioned earlier, comparator 121 can determine the load impedance of the configuration channel pins CC1 / CC2, and state machine 122 stores data similar to that shown in Table 1 below. Therefore, it can determine whether the second electronic device M2 or the third electronic device M3 is inserted into the first electronic device M1 based on the judgment result of comparator 121. CC1 CC2 Connection status State 1 open circuit open circuit No device inserted State 2 Rd open circuit Only the receiving device is inserted State 3 open circuit Rd State 4 open circuit Ra Cable insertion only State 5 Ra open circuit State 6 Rd Ra Power receiving device and cable insertion Status 7 Ra Rd State 8 Rd Rd Debugging accessory mode Status 9 Ra Ra Reduce liquid corrosion mode

[0058] In this embodiment of the invention, the pre-detection circuit 20A may be implemented in a general purpose input / output (GPIO) pad of one of the first electronic devices M1, but is not limited thereto.

[0059] In summary, the connection detection circuit 100 of the present invention can be equipped in the first electronic device M1. When the first electronic device M1 operates in power-saving mode, the connection detection circuit 100 will shut down the high-power connection circuit 10A and turn on the low-power pre-detection circuit 20A to determine whether the second electronic device or the third electronic device M3 is inserted into the first electronic device. When the first electronic device M1 operates in normal mode, or when the pre-detection circuit 20 determines that the second electronic device or the third electronic device M3 is inserted while operating in power-saving mode, the connection detection circuit 100 will shut down the low-accuracy pre-detection circuit 20A and turn on the high-accuracy connection circuit 10A. Therefore, the present invention provides a connection detection function that can maintain basic connection detection function with low power consumption in power-saving mode and wake up the complete connection status detection function when an external device is detected to be inserted. The above description is only a preferred embodiment of the present invention. All equivalent changes and modifications made in accordance with the scope of the patent application of the present invention shall be covered by the present invention.

[0060] 10A, 10B, 10C: Connecting circuits 12: Operation Mode Detection Circuit 14: Switch control circuit 20A, 20B: Pre-detection circuit 24: Control Circuit 30: Connection Interface 100: Wiring detection circuit 121, CP1, CP2: Comparators 122: State Machine 510-540: Steps M1: First Electronic Device M2: Second Electronic Device SW1-SW6, SW1', SW3': Switching circuit RP0, RP1-RP4: Pull-up resistors RD0-RD4, RD3': Pull-down resistors Tr1, Tr2: Transistors VCC1, VCC2: Voltage VDD, VSS: Bias voltage V1, V2: Output voltages of the comparator SC0-SC2, S1-S6: Control signals Vbus: Power supply pin CC1 / CC2: Configure channel pins GND: Ground pin

Claims

1. A connection detection circuit capable of maintaining connection detection function with low power consumption in a power-saving mode, provided in a first electronic device, comprising: a first pre-detection circuit configured to: be activated after the first electronic device switches from a normal mode to the power-saving mode, to determine whether a second electronic device is inserted into the first electronic device; And a first connection circuit, configured to: be turned on when the first electronic device is operating in the normal mode; be turned off when the first electronic device switches from the normal mode to the power-saving mode; and be turned on when the first electronic device is operating in the power-saving mode and the first pre-detection circuit determines that the second electronic device is inserted into the first electronic device, so as to determine the connection status of the first electronic device and the second electronic device, wherein: The first electronic device consumes more power in normal mode than in power-saving mode; the first wiring circuit consumes more power in operation than the first pre-detection circuit; the first wiring circuit detects wiring status with higher accuracy than the first pre-detection circuit; the second electronic device includes: a second pre-detection circuit configured to: be activated after the second electronic device switches from normal mode to power-saving mode to determine whether the first electronic device is inserted into the second electronic device; and be deactivated when it is determined in power-saving mode that the first electronic device was inserted into the second electronic device at a first time point; And a second connection circuit, used to: be turned off after the second electronic device switches from the normal mode to the power-saving mode; and be turned on at the first time point; when the first pre-detection circuit determines in the power-saving mode that the second electronic device is inserted into the first electronic device, the first electronic device turns off the first pre-detection circuit and turns on the first connection circuit at a second time point to determine the connection status of the first electronic device and the second electronic device; and the second time point is after the first time point.

2. The connection detection circuit as described in claim 1, wherein: The first pre-detection circuit includes: a first switching circuit; a second switching circuit; a first pull-up resistor, the first end of which is coupled to a first bias voltage, and the second end of which is selectively coupled to a first configuration channel pin of the first electronic device via the first switching circuit; a first pull-down resistor, the first end of which is selectively coupled to the first configuration channel pin of the first electronic device via the second switching circuit, and the second end of which is coupled to a second bias voltage; and a first comparator, including: an input terminal coupled to the first configuration channel pin of the first electronic device; The second pre-detection circuit includes: an output terminal for outputting a first voltage; and a first control circuit for: determining whether the second electronic device is inserted based on the first voltage; and providing a first control signal and a second control signal to control the states of the first switching circuit and the second switching circuit respectively, thereby coupling the first configuration channel pin to the first bias voltage or the second bias voltage; and the second pre-detection circuit includes: a third switching circuit; a fourth switching circuit; a second pull-up resistor, the first end of which is coupled to the first bias voltage, and the second end of which is selectively coupled to a second configuration channel pin of the second electronic device via the third switching circuit; a second pull-down resistor, the first end of which is selectively coupled to the second configuration channel pin of the second electronic device via the fourth switching circuit, and the second end of which is coupled to the second bias voltage; and a second comparator, including: an input terminal coupled to the second configuration channel pin of the second electronic device; And an output terminal for outputting a second voltage; and a second control circuit for: determining whether the first electronic device is inserted into the second electronic device based on the second voltage; and providing a third control signal and a fourth control signal to control the state of the third switch circuit and the fourth switch circuit respectively, thereby coupling the second configuration channel pin to the first bias voltage or the second bias voltage.

3. The connection detection circuit as described in claim 2, wherein: The first pull-up resistor of the first pre-detection circuit is smaller than the second pull-down resistor of the second pre-detection circuit; the first pull-up resistor of the first pre-detection circuit is larger than the pull-down resistor of the second connection circuit as defined by a specification; when the voltage of the second configuration channel pin is higher than the high level of one of the inputs of the second comparator at the first time point, the second electronic device shuts down the second pre-detection circuit and turns on the second connection circuit; and when the voltage of the first configuration channel pin is lower than the low level of one of the inputs of the first comparator at the second time point, the first electronic device shuts down the first pre-detection circuit and turns on the first connection circuit.

4. A connection detection circuit capable of maintaining connection detection function with low power consumption in a power-saving mode, comprising: a first pre-detection circuit, configured to: be activated after the first electronic device switches from a normal mode to the power-saving mode, to determine whether a second electronic device is inserted into the first electronic device; And a first connection circuit, configured to: be turned on when the first electronic device is operating in the normal mode; be turned off when the first electronic device switches from the normal mode to the power-saving mode; and be turned on when the first electronic device is operating in the power-saving mode and the first pre-detection circuit determines that the second electronic device is inserted into the first electronic device, so as to determine the connection status of the first electronic device and the second electronic device, wherein: The power consumption of the first electronic device in normal mode is higher than that in power-saving mode; the power consumption of the first connection circuit is higher than that of the first pre-detection circuit; the accuracy of the first connection circuit in detecting connection status is higher than that of the first pre-detection circuit; when the first pre-detection circuit determines that the second electronic device is inserted into the first electronic device in power-saving mode, the first electronic device turns off the first pre-detection circuit and turns on the first connection circuit at a first time point to determine the connection status of the first electronic device and the second electronic device; the second electronic device includes: a second pre-detection circuit, used to: be turned on after the second electronic device switches from normal mode to power-saving mode to determine whether the first electronic device is inserted into the second electronic device; and be turned off when it is determined that the first electronic device is inserted into the second electronic device at a second time point in power-saving mode; And a second wiring circuit for: being turned off after the second electronic device switches from the normal mode to the power-saving mode; and being turned on at the second time point; and the second time point is after the first time point.

5. The connection detection circuit as described in claim 4, wherein: The first pre-detection circuit includes: a first switching circuit; a second switching circuit; a first pull-up resistor, the first end of which is coupled to a first bias voltage, and the second end of which is selectively coupled to a first configuration channel pin of the first electronic device via the first switching circuit; a first pull-down resistor, the first end of which is selectively coupled to the first configuration channel pin of the first electronic device via the second switching circuit, and the second end of which is coupled to a second bias voltage; and a first comparator, including: an input terminal coupled to the first configuration channel pin of the first electronic device; The second pre-detection circuit includes: an output terminal for outputting a first voltage; and a first control circuit for: determining whether the second electronic device is inserted based on the first voltage; and providing a first control signal and a second control signal to control the states of the first switching circuit and the second switching circuit respectively, thereby coupling the first configuration channel pin to the first bias voltage or the second bias voltage; and the second pre-detection circuit includes: a third switching circuit; a fourth switching circuit; a second pull-up resistor, the first end of which is coupled to the first bias voltage, and the second end of which is selectively coupled to a second configuration channel pin of the second electronic device via the third switching circuit; a second pull-down resistor, the first end of which is selectively coupled to the second configuration channel pin of the second electronic device via the fourth switching circuit, and the second end of which is coupled to the second bias voltage; and a second comparator, including: an input terminal coupled to the second configuration channel pin of the second electronic device; And an output terminal for outputting a second voltage; and a second control circuit for: determining whether the first electronic device is inserted into the second electronic device based on the second voltage; and providing a third control signal and a fourth control signal to control the state of the third switch circuit and the fourth switch circuit respectively, thereby coupling the second configuration channel pin to the first bias voltage or the second bias voltage.

6. The connection detection circuit as described in claim 5, wherein: The first pull-up resistor of the first pre-detection circuit is greater than the second pull-down resistor of the second pre-detection circuit; the pull-up resistor of the second connection circuit is defined by a specification as being less than the second pull-down resistor of the second pre-detection circuit; when the voltage of the first configuration channel pin is lower than the low level of one of the inputs of the first comparator at the first time point, the first electronic device shuts down the first pre-detection circuit and turns on the first connection circuit; and when the voltage of the second configuration channel pin is higher than the high level of one of the inputs of the second comparator at the second time point, the second electronic device shuts down the second pre-detection circuit and turns on the second connection circuit.

7. A connection detection circuit capable of maintaining connection detection function with low power consumption in a power-saving mode, provided in a first electronic device, comprising: a first pre-detection circuit, configured to: be activated after the first electronic device switches from a normal mode to the power-saving mode, to determine whether a second electronic device is inserted into the first electronic device; And a first connection circuit, configured to: be turned on when the first electronic device is operating in the normal mode; be turned off when the first electronic device switches from the normal mode to the power-saving mode; and be turned on when the first electronic device is operating in the power-saving mode and the first pre-detection circuit determines that the second electronic device is inserted into the first electronic device, so as to determine the connection status of the first electronic device and the second electronic device, wherein: The power consumption of the first electronic device in normal mode is higher than that in power-saving mode; the power consumption of the first interconnect circuit in operation is higher than that of the first pre-detection circuit in operation; the accuracy of the first interconnect circuit in detecting interconnect status is higher than that of the first pre-detection circuit in detecting interconnect status; the first pre-detection circuit includes: a first switching circuit; a second switching circuit; a first pull-up resistor, the first end of which is coupled to a first bias voltage, and the second end of which is selectively coupled to a first configuration channel pin of the first electronic device via the first switching circuit; a first pull-down resistor, the first end of which is selectively coupled to the first configuration channel pin of the first electronic device via the second switching circuit, and the second end of which is coupled to a second bias voltage; a first comparator, including: an input terminal coupled to the first configuration channel pin of the first electronic device; The device includes an output terminal for outputting a first voltage; and a first control circuit for: determining whether the second electronic device is inserted based on the first voltage; and providing a first control signal and a second control signal to control the states of the first switching circuit and the second switching circuit respectively, thereby coupling the first configuration channel pin to the first bias voltage or the second bias voltage; and the second electronic device includes a second wiring circuit for determining whether an external electronic device is inserted into the second electronic device.

8. The connection detection circuit as described in claim 7, wherein: The first pull-up resistor of the first pre-detection circuit is greater than the pull-down resistor of the second connection circuit as defined by a specification; and when the potential of the first configuration channel pin is lower than the low level of one of the inputs of the first comparator, the first electronic device shuts down the first pre-detection circuit and turns on the first connection circuit.

9. The connection detection circuit as described in claim 7, wherein: The first pull-down resistor of the first pre-detection circuit is greater than the pull-up resistor of the second connection circuit as defined by a specification; and when the potential of the first configuration channel pin is higher than the high level of one of the inputs of the first comparator, the first electronic device shuts down the first pre-detection circuit and turns on the first connection circuit.