Package structure
The packaging structure integrates a waveguide and reconfiguration circuit layer to address high-density and cost challenges in HPC, achieving efficient optical signal transmission and reduced substrate size.
Patent Information
- Application Number
- TW114126146
- Authority / Receiving Office
- TW · TW
- Patent Type
- Patents
- Current Assignee / Owner
- Filing Date
- 2025-07-10
- Publication Date
- 2026-07-11
- Estimated Expiration
- 2045-07-09
AI Technical Summary
Current high-performance computing (HPC) packaging structures face challenges in achieving high-density and low-cost solutions due to the limitations of existing build-up package substrates and through-silicon via interposers, which are expensive and require large area for thin-film redistribution layers.
A packaging structure incorporating a circuit board with a waveguide structure, reconfiguration circuit layer, dedicated integrated circuit assembly, optoelectronic components, and optical fiber assembly, utilizing a reconfiguration circuit structure layer with vias and redistribution circuits to integrate components efficiently, and optical connections through a solid mirror and waveguide.
The proposed structure meets high-density requirements, reduces costs, and enhances optical performance by transmitting signals through a waveguide structure, while eliminating the need for expensive interposers and reducing the size of the packaging substrate.
Smart Images

Figure IMG-2_DRAW_114126146-A0305-14-0001-1 
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Figure IMG-2_DRAW_114126146-A0305-14-0003-3