Patterning process
The patterning process addresses the issue of uneven spacers by forming spacers with a flat top surface, enhancing pattern uniformity and reducing costs through controlled etching and material selection.
Patent Information
- Application Number
- TW114126501
- Authority / Receiving Office
- TW · TW
- Patent Type
- Patents
- Current Assignee / Owner
- Priority Date
- 2025-07-09
- Filing Date
- 2025-07-14
- Publication Date
- 2026-07-11
- Estimated Expiration
- 2045-07-13
AI Technical Summary
Current multi-patterning processes in semiconductor manufacturing result in spacers with curved or inclined tops, leading to uneven patterns due to anisotropic etching, which affects the precision and uniformity of circuit integration.
A patterning process that forms spacers with a flat top surface perpendicular to the sidewalls by using a sacrificial layer and controlled etching processes to ensure uniformity, involving materials like carbon, silicon oxynitride, silicon oxide, and organic materials, with etch-back and anisotropic etching techniques.
Enables the formation of uniform patterns by ensuring the spacers have a flat top surface, improving the precision and reducing manufacturing costs through controlled etching and material selection.
Smart Images

Figure IMG-2_DRAW_114126501-A0305-14-0001-1 
Figure IMG-2_DRAW_114126501-A0305-14-0002-2 
Figure IMG-2_DRAW_114126501-A0305-14-0003-3
Abstract
Description
Technical Field
[0001] This invention relates to a semiconductor manufacturing process, and more particularly to a patterning process. Prior Technology
[0002] With the rapid development of the integrated circuit industry, as the demand for circuit integration increases, the size of the entire circuit components needs to be reduced, and the resolution requirements of the lithography process also increase. Currently, in order to overcome the limitations of light source resolution in the lithography process, multiple patterning processes have been gradually developed, such as self-aligned double patterning (SADP), self-aligned triple patterning (SATP), and self-aligned quadruple patterning (SAQP) processes, to improve the integration of components.
[0003] In a multi-patterning process, spacers are formed on the sidewalls of a core pattern disposed on the layer to be patterned. The spacers act as a mask defining the pattern in the layer to be patterned. A method for forming the spacers may include the following steps: A spacer material layer is conformally formed on the layer to be patterned to cover the core pattern. An anisotropic etching process is performed on the spacer material layer to remove portions of the spacer material layer. In this way, spacers can be formed on the sidewalls of the core pattern. However, the top of the spacers formed in this manner has a curved or inclined surface. Therefore, when such spacers are used as a mask for subsequent anisotropic etching processes used to form the pattern in the layer to be patterned, an uneven pattern is formed. Summary of the Invention
[0004] The present invention provides a patterning process, wherein each gap wall used to define a pattern in a layer to be patterned may have a flat top surface, and the top surface may be perpendicular to the side wall of the gap wall.
[0005] The patterning process of the present invention includes the following steps: A layer to be patterned is formed on a substrate. A plurality of first patterns are formed on the layer to be patterned. A plurality of second patterns are formed on the plurality of first patterns. A spacer material layer is conformally formed on the layer to be patterned. A sacrificial layer is formed on the spacer material layer. A portion of the sacrificial layer is removed to expose the spacer material layer on the top surface of the plurality of second patterns. The spacer material layer on the top surface of the plurality of second patterns is removed. The sacrificial layer is removed. A first anisotropic etching process is performed to remove the plurality of second patterns and a portion of the spacer material layer, thereby forming spacers on the sidewalls of the plurality of first patterns. The plurality of first patterns are removed. Using the spacers as a mask, a portion of the layer to be patterned is removed.
[0006] In one embodiment of the patterning process of the present invention, the material of the first pattern includes carbon or a carbon-containing material.
[0007] In one embodiment of the patterning process of the present invention, the material of the second pattern includes silicon oxynitride.
[0008] In one embodiment of the patterning process of the present invention, the material of the spacer wall material layer includes silicon oxide.
[0009] In one embodiment of the patterning process of the present invention, the material of the sacrificial layer includes an organic material.
[0010] In one embodiment of the patterning process of the present invention, the method of removing a portion of the sacrificial layer includes performing an etch-back process.
[0011] In one embodiment of the patterning process of the present invention, the method of removing the spacer wall material layer on the top surface of the plurality of second patterns includes performing a second anisotropic etching process.
[0012] In one embodiment of the patterning process of the present invention, the method for forming the plurality of first patterns and the plurality of second patterns includes the following steps: forming a first material layer on the layer to be patterned; forming a second material layer on the first material layer; forming a patterned photoresist layer on the second material layer; using the patterned photoresist layer as a mask, removing a portion of the first material layer and a portion of the second material layer; and removing the patterned photoresist layer.
[0013] In one embodiment of the patterning process of the present invention, after the gap wall material layer on the top surface of the plurality of second patterns is removed, the top surface of the gap wall material layer and the top surface of the plurality of second patterns are coplanar and lower than the top surface of the sacrificial layer.
[0014] In one embodiment of the patterning process of the present invention, the top surface of the gap wall is perpendicular to the side wall of the gap wall.
[0015] In one embodiment of the patterning process of the present invention, the second pattern is oxygen-rich.
[0016] In one embodiment of the patterning process of the present invention, the oxygen content in the second pattern is 70% or more.
[0017] Based on the above, in the patterning process of the present invention, each gap wall used to define the pattern in the layer to be patterned can have a flat top surface, and the top surface can be perpendicular to the side wall of the gap wall. Therefore, when the gap wall is used as a mask to define the pattern in the layer to be patterned, a uniform pattern can be formed in the layer to be patterned. Simple Explanation of the Diagram
[0018] Figures 1A to 1H are schematic cross-sectional views of the patterning process according to an embodiment of the present invention. Implementation
[0019] The following description provides detailed examples and accompanying drawings, but these examples are not intended to limit the scope of the invention. Furthermore, the drawings are for illustrative purposes only and are not drawn to scale. For ease of understanding, the same elements will be designated with the same symbols in the following description.
[0020] The terms "contains," "includes," and "has" used in the text are all open-ended, meaning they "include but are not limited to."
[0021] When using terms such as "first" and "second" to describe elements, it is only for distinguishing these elements from one another and does not limit the order or importance of these elements. Therefore, in some cases, a first element may also be called a second element, and a second element may also be called a first element, without departing from the scope of this invention.
[0022] Furthermore, directional terms mentioned in the text, such as "up" and "down," are only used to refer to the direction of the diagram and are not intended to limit the invention.
[0023] Furthermore, in this document, the range expressed as "from one value to another" or "between one value and another" is a concise way of representing a range to avoid listing all the values in the range one by one in the specification. Therefore, the description of a particular range of values covers any value within the range of values, as well as the smaller range of values defined by any value within the range of values.
[0024] Figures 1A to 1H are schematic cross-sectional views of the patterning process according to an embodiment of the present invention.
[0025] Referring to FIG1A, a substrate 100 is provided. In this embodiment, the substrate 100 is not limited in any way. For example, the substrate 100 may be a silicon substrate, a dielectric substrate, or a conductive substrate, but the present invention is not limited thereto. Then, a patterned layer 102 is formed on the substrate 100. In this invention, the patterned layer 102 is not limited in any way. For example, the patterned layer 102 may be a dielectric layer or a conductive layer, but the present invention is not limited thereto.
[0026] After forming the patterned layer 102, a first material layer 104 and a second material layer 106 are sequentially formed on the patterned layer 102. In this embodiment, the first material layer 104 can be used to form the core pattern in a multi-patterning process. The material of the first material layer 104 can be carbon or a carbon-containing material. Additionally, in this embodiment, the second material layer 106 can be used to form an antireflective coating (ARC) layer. For example, the second material layer 106 can be an oxygen-rich antireflective coating layer, wherein the oxygen content in the second material layer 106 can be 70% or more, but the invention is not limited thereto. The material of the second material layer 106 can be silicon oxynitride. In one embodiment, the material of the second material layer 106 is silicon oxynitride, wherein the oxygen content in the second material layer 106 is approximately 70%, and the silicon content in the second material layer 106 is approximately 29%.
[0027] After forming the second material layer 106, a patterned photoresist layer PR is formed on the second material layer 106. The patterned photoresist layer PR is used to define the core pattern in the multi-patterning process.
[0028] Referring to Figure 1B, an anisotropic etching process is performed on the second material layer 106 and the first material layer 104 using a patterned photoresist layer PR as an etching mask to remove a portion of the first material layer 104 and a portion of the second material layer 106. Then, the patterned photoresist layer PR is removed. In this way, a plurality of first patterns P1 formed by the first material layer 104 are formed on the layer to be patterned 102, and a plurality of second patterns P2 formed by the second material layer 106 are formed on the first patterns P1. The first patterns P1 can serve as the core pattern in a multi-patterning process.
[0029] Referring to FIG1C, a spacer material layer 108 is conformally formed on the patterned layer 102. The spacer material layer 108 covers the top surface of the patterned layer 102, the sidewalls of the first pattern P1, and the top surface and sidewalls of the second pattern P2. In this embodiment, there are no restrictions on the material of the spacer material layer 108, as long as the spacer material layer 108 and the second pattern P2 can be removed together in the same etching process. That is, the etching selectivity ratio of the spacer material layer 108 to the second pattern P2 can be substantially 1. In other words, the etching selectivity ratio of the spacer material layer 108 to the second pattern P2 can be 1 or close to 1. For example, the material of the spacer material layer 108 can be silicon oxide, but the present invention is not limited thereto.
[0030] After forming the spacer wall material layer 108, a sacrificial layer SC is formed on the spacer wall material layer 108. The sacrificial layer SC covers the first pattern P1 and the second pattern P2, and completely fills the space between adjacent first patterns P1 and the space between adjacent second patterns P2. In this embodiment, the material of the sacrificial layer SC may be an organic material. In addition, in this embodiment, the sacrificial layer SC may be an anti-reflective coating layer that can be easily removed by an etching process, but the present invention is not limited thereto.
[0031] Referring to FIG1D, a portion of the sacrificial layer SC is removed to expose the spacer material layer 108 on the top surface of the second pattern P2. In this embodiment, the method for removing the portion of the sacrificial layer SC may be an etch-back process. At this time, the top surface of the spacer material layer 108 and the top surface of the sacrificial layer SC may be coplanar. Then, the spacer material layer 108 on the top surface of the second pattern P2 is removed. At this time, the top surface of the second pattern P2 is exposed, and the top surface of the second pattern P2 and the top surface of the spacer material layer 108 may be coplanar and lower than the top surface of the sacrificial layer SC. In this embodiment, the method for removing the spacer material layer 108 on the top surface of the second pattern P2 may be an isotropic etching process.
[0032] Referring to Figure 1E, the sacrificial layer SC is removed. In this way, the first pattern P1 and the second pattern P2 are located on the patterned layer 102, and the spacer wall material layer 108 is located in the space between the new adjacent first patterns P1 and the space between the adjacent second patterns P2, and covers the sidewalls of the first pattern P1, the sidewalls of the second pattern P2 and the exposed top surface of the patterned layer 102.
[0033] Referring to FIG1F, an anisotropic etching process is performed to remove the second pattern P2 and a portion of the spacer wall material layer 108, thereby forming a spacer wall SP on the sidewall of the first pattern P1. At this time, the top surface of the first pattern P1 and the top surface of the patterned layer 102 are exposed. In this embodiment, since the etching selectivity ratio of the spacer wall material layer 108 to the second pattern P2 can be 1 or close to 1, the spacer wall material layer 108 and the second pattern P2 can be removed together during the anisotropic etching process. Furthermore, since the etching selectivity ratio of the spacer wall material layer 108 to the second pattern P2 can be 1 or close to 1, after the anisotropic etching process, the top surface S of the spacer wall SP and the top surface of the first pattern P1 can be coplanar. Additionally, the spacer wall SP can have a flat top surface S, and the top surface S can be substantially perpendicular to the sidewall SW of the spacer wall SP.
[0034] Referring to Figure 1G, remove the first pattern P1. In this way, the gap wall SP is located on the patterned layer 102 and can be used as a mask to define the pattern in the patterned layer 102.
[0035] Referring to FIG1H, using the spacer wall SP as an etching mask, an anisotropic etching process is performed on the patterned layer 102 to remove a portion of the patterned layer 102. In this way, a pattern P3 is formed in the patterned layer 102. In other words, the patterned layer 102 is patterned as pattern P3. Afterwards, the spacer wall SP is removed to complete the patterning process of this embodiment.
[0036] In this embodiment, since the gap wall SP may have a flat top surface S, and the top surface S may be substantially perpendicular to the side wall SW of the gap wall SP, a uniform pattern P3 can be formed when the gap wall SP is used as a mask to define the pattern in the patterned layer 102.
[0037] Furthermore, in this embodiment, since the etching selectivity ratio of the spacer wall material layer 108 to the second pattern P2 can be 1 or close to 1, the spacer wall material layer 108 and the second pattern P2 can be removed together during the anisotropic etching process. Therefore, manufacturing costs can be reduced.
[0038] Although the present invention has been disclosed above by way of embodiments, it is not intended to limit the present invention. Anyone skilled in the art can make some modifications and refinements without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention shall be determined by the appended claims.
[0039] 100: Base 102: Layer to be patterned 104: First material layer 106: Second material layer 108: Spacer wall material layer P1: First Pattern P2: Second Pattern P3: Pattern PR: Patterned photoresist layer S: Top surface SC: Sacrifice Layer SP: Spacer wall SW: Sidewall
Claims
1. A patterning process, comprising: Form the patterned layer on the substrate; Multiple first patterns are formed on the layer to be patterned; A plurality of second patterns are formed on the plurality of first patterns; A spacer wall material layer is conformally formed on the layer to be patterned; A sacrificial layer is formed on the spacer wall material layer; Remove a portion of the sacrificial layer to expose the spacer wall material layer on the top surface of the plurality of second patterns; Remove the gap wall material layer on the top surface of the plurality of second patterns, such that the top surface of the second pattern is coplanar with the top surface of the gap wall material layer and is lower than the top surface of the sacrificial layer; Remove the sacrificial layer; perform a first anisotropic etching process to remove the plurality of second patterns and a portion of the spacer wall material layer, thereby forming spacer walls on the sidewalls of the plurality of first patterns; Remove the plurality of first patterns; And using the gap wall as a mask, a portion of the layer to be patterned is removed.
2. The patterning process as described in claim 1, wherein the material of the first pattern includes carbon or a carbon-containing material.
3. The patterning process as described in claim 1, wherein the material of the second pattern comprises silicon oxynitride.
4. The patterning process as described in claim 1, wherein the material of the spacer wall material layer comprises silicon oxide.
5. The patterning process as described in claim 1, wherein the material of the sacrificial layer includes an organic material.
6. The patterning process as described in claim 1, wherein the method of removing a portion of the sacrificial layer includes performing an etch-back process.
7. The patterning process as claimed in claim 1, wherein the method of removing the spacer wall material layer on the top surface of the plurality of second patterns includes performing a second anisotropic etching process.
8. The patterning process as described in claim 1, wherein the method of forming the plurality of first patterns and the plurality of second patterns comprises: A first material layer is formed on the layer to be patterned; A second material layer is formed on the first material layer; A patterned photoresist layer is formed on the second material layer; Using the patterned photoresist layer as a mask, a portion of the first material layer and a portion of the second material layer are removed; And remove the patterned photoresist layer.
9. The patterning process as described in claim 1, wherein the top surface of the gap wall is perpendicular to the side wall of the gap wall.
10. The patterning process as described in claim 1, wherein the second pattern is oxygen-rich.
11. The patterning process as described in claim 10, wherein the oxygen content in the second pattern is 70% or more.