Print chip identification module

Abstract

This invention relates to a printer chip identification module, comprising an identification circuit. The identification circuit includes a fuse identification code unit, an identification status recording unit, and an identification verification logic unit. The fuse identification code unit stores and records a unique, non-rewritable identification code (UID). The identification status recording unit stores and records updatable usage status information. The identification verification logic unit provides a secure identification process that cannot be simulated or rewritten via microprocessor (MCU) or flash memory software, effectively preventing counterfeit consumables and strengthening printer consumable authorization and data protection.

Description

Technical Field

[0001] This invention relates to an identification structure and anti-counterfeiting technology for consumable chips used in inkjet printers, particularly a printing chip identification module that combines an immutable identification code storage element and a non-programmable identification logic circuit, to prevent microprocessors (MCUs), flash memory, and one-time programmable read-only memory (OTP-ROM) from impersonating authorized chip identities. Prior Technology

[0002] In recent years, with the widespread adoption of personal computers and the rapid development of the Internet, inkjet printers have become an essential product in personal computer equipment. For the average user, a basic inkjet printer is sufficient to meet various document printing needs. As is well known, many factors affect the printing quality of inkjet printers, such as the composition of the ink, the choice of paper, and the ink supply method of the ink cartridge. To pursue more perfect printing quality, researchers have invested considerable time and effort in the design of ink cartridge storage and supply structures, aiming to meet requirements such as simple structure, low manufacturing cost, high ink storage capacity, and high printing quality. To date, inkjet printing technology has developed to the point where the methods for controlling the ink droplets released from the printhead onto the inkjet medium can be broadly divided into two main categories. One is the thermal bubble inkjet technology, which operates by using a thin film resistor to heat some of the ink to create bubbles, thereby expelling the ink and spraying it through multiple nozzles onto the inkjet medium. Another technology is piezoelectric actuation, which utilizes the piezoelectric properties of piezoelectric materials to propel ink out of the nozzle when energized. Since each type of inkjet printing technology requires a unique printhead, and each printhead has its own specific specifications, including its structure, the type of ink used, the number of nozzles, and the inkjet control circuitry, a compatible printing system is necessary for accurate printing. Generally, current inkjet printers are equipped with ink cartridges that can accommodate two or more ink cartridges simultaneously. Because the printhead specifications for color and black ink cartridges are different, when a user installs an ink cartridge into an inkjet printer, the printer's internal control circuitry must be able to identify the printhead specifications to use the corresponding driver. Therefore, the printhead needs an identification circuit to allow the inkjet printer to recognize its characteristics and information, and this identification circuit serves as the basis for determining whether the printhead can be used in the inkjet printer. The identification circuit is located in the inkjet head chip of the inkjet head to record relevant information about the inkjet head. It can also provide information to the inkjet printer through, for example, an electronic circuit, so that the inkjet printer and the inkjet head can be well matched, thereby achieving the purpose of identifying the inkjet head.

[0003] Current inkjet printer consumable identification mechanisms mostly combine hardware identification components with microcontroller (MCU) control logic. However, MCUs can simulate the identification process through software, allowing third-party manufacturers to bypass authorization and copy unauthorized chips. To improve the security of the identification system, a logic verification structure that cannot be simulated by software is required. Summary of the Invention

[0004] The purpose of this application is to provide a print chip identification module, particularly a print chip identification module that combines an immutable identification code storage element and a non-programmable identification logic circuit. This module features dynamic verification and polymorphic identification logic structure applied to the identification structure and anti-counterfeiting technology of inkjet printer consumable chips, in order to prevent the impersonation of authorized chips by microprocessors (MCUs), flash memory, and one-time programmable read-only memory (OTP-ROM).

[0005] To achieve the above objectives, one more general embodiment of this application provides a print chip identification module. The identification circuit includes: a fuse identification code unit that stores and records fixed identification data, which cannot be changed once burned, thus realizing a unique identifier (UID); an identification status recording unit that stores and records the print chip status, and can rewrite and update variable data multiple times; and an identification verification logic unit, which has a built-in hardware comparison logic unit implemented with masking logic or non-programmable logic gates, which performs authorization comparison based on the identifier (UID) and status data. The hardware comparison logic unit cannot be simulated or replaced by MCU software or recombined instructions, thus performing a fixed verification mechanism. Simple Explanation of the Diagram

[0006] Figure 1 is a diagram of the internal structure of the chip recognition module of the present invention. Figure 2 is a flowchart of the identification and verification process of the printed chip identification module of the present invention. Figure 3 shows the I²C communication verification logic flowchart between the chip and the printer host of this invention. Figure 4 shows a block diagram of the masking logic circuit of the present invention, which shows that after the identification code (UID) and status data are sent into the masking logic gate, a comparison result is formed, which cannot be simulated by a microprocessor (MCU). Implementation

[0007] This invention will be described in detail with reference to preferred embodiments and viewpoints so that the reader can fully understand how these embodiments are implemented. However, those skilled in the art will understand that this invention can also be implemented without these details. Furthermore, this invention can also be used and implemented through other specific embodiments, and the various details set forth in this specification can be applied based on different needs, and various modifications or changes can be made without departing from the spirit of this invention. Therefore, this invention will be described with reference to preferred embodiments and viewpoints. Such descriptions are for explaining the structure of the invention and are for illustrative purposes only, not for limiting the scope of the patent application.

[0008] Please refer to Figure 1 and Figure 2, wherein Figure 1 is a structural diagram of the identification chip module of the preferred embodiment of the present invention, and Figure 2 is a flowchart of the identification verification logic processing of the preferred embodiment of the present invention.

[0009] As shown in Figures 1 and 2, in this embodiment, a print chip identification module has a dynamic verification and polymorphic identification logic structure applied to the identification structure and anti-counterfeiting technology of inkjet printer consumable chips. This prevents third-party manufacturers from bypassing authorization and copying unauthorized chips, thus preventing the impersonation of authorized chips by microprocessors (MCUs), flash memory, and OTP-ROM emulation methods. The print chip identification module is disposed on the print chip of the inkjet head. The print chip identification module includes an identification circuit, which records relevant information of the inkjet head. For example, during the production of the inkjet head, an identification code corresponding to the model or serial number of the inkjet head is burned into the identification circuit. This allows the inkjet printer to identify the model and type of the inkjet head by reading the identification code stored in the identification circuit of the printer chip module.

[0010] The aforementioned identification circuit includes: a fuse identification code unit 10, which stores and records fixed identification data. Once the data is burned, it cannot be changed, realizing a unique identifier (UID). The fuse identification code unit 10 includes one of a metal fuse, a polysilicon fuse, an electronic fuse, or an over-the-air (OTP) read-only memory. Once burned, it cannot be changed, realizing a unique identifier (UID) and providing anti-counterfeiting and anti-counterfeiting functions. Therefore, the data recorded in the inkjet head is fixed once burned, such as the inkjet head manufacturing date, the inkjet head expiration date, and the inkjet printer to which the inkjet head is applicable; and an identification status recording unit 20, which stores and records the status of the printed chip. The identification status recording unit 20 includes one of an electronically erasable programmable read-only memory (EEPROM), a static random access memory (SRAM), or flash memory. First, it can repeatedly rewrite and update variable data, allowing specific specifications on the printhead chip, including ink usage, number of nozzles, inkjet control circuit, ink usage count, whether it is the first use, whether it is expired, and binding parameters with the corresponding printer model, to be repeatedly rewritten and updated in the printhead. Second, it has an identification and verification logic unit 30, which is a hardware comparison logic unit implemented with masking logic or non-programmable logic gates. It performs authorization comparison based on the identification code (UID) and status data. Moreover, this hardware comparison logic unit cannot be simulated or recombined by microprocessor (MCU) software to perform a fixed verification mechanism to prevent back-end instructions or microprocessor (MCU) simulation from replacing it, thereby improving system security.

[0011] Therefore, the identification circuit of this invention comprises three key units: a fuse identification code unit 10, an identification status recording unit 20, and an identification verification logic unit 30. The fuse identification code unit 10 stores fixed identification data, which cannot be changed once programmed, ensuring the uniqueness of the chip. The identification status recording unit 20 stores variable data that can be updated multiple times, such as usage count and activation status. The most critical identification verification logic unit 30 employs non-programmable hardware comparison logic to compare the identification code with the status data, ensuring that only authorized chips can pass verification and be activated. This design greatly enhances the system's anti-counterfeiting capabilities, preventing third-party counterfeiting and unauthorized use.

[0012] The following describes the implementation of the printhead chip identification module with dynamic verification and polymorphic recognition logic structure of the present invention. In an inkjet printer, the module can identify the model and type of the inkjet head by reading the identification code stored in the identification circuit of the printhead chip module, and perform a fixed verification mechanism to prevent back-end instructions or microprocessor (MCU) emulation and replacement, thereby improving system security. After the printer's main control board is powered on, the identification process is explained in the following steps:

[0013] Step S1: The printer main control board starts up and initiates the identification program for the inserted consumable chip module. The started main control board will initialize the communication protocol and open the consumable identification interface (such as I2C or SPI bus) to ensure that only authorized chips can communicate.

[0014] Step S2: Read the fuse identification code unit 10. The main control board reads the identification code (UID) content through the sequence bus to obtain the device's unique identification code. The identification code (UID) data is an immutable identification code written during chip programming. It cannot be simulated or reproduced by a microcontroller (MCU) to prevent counterfeit products from passing verification by simulating the microcontroller (MCU).

[0015] Step S3: Read the identification status recording unit 20. The identification status recording provides device operation logic parameters, such as usage limit, maintenance reset mark, consumable status flag, usage count, authorization code, and bound model information, which affect whether the printer enables the inkjet head consumable.

[0016] Step S4: Input the identification verification logic unit 30, and input the identification code (UID) and identification status record status data into the built-in hardware comparison logic unit in the logic verification area. The hardware comparison logic unit is a mask circuit design, which cannot be programmed, and only accepts specific combinations of identification code (UID) and identification status record status, providing circuit-level anti-counterfeiting verification.

[0017] Step S5: Hardware logic comparison result. If the hardware comparison logic unit is successful, the print chip identification module is authorized, unlocking its functions and data area; if the comparison fails, the system refuses to use the print chip identification module, and the printer's main control board can send back an error status or display a warning. The printer's main control board makes authorization or rejection decisions based on the comparison result, enhancing the non-counterfeitability of the identification mechanism and strengthening the authorization control of consumables.

[0018] Referring to Figure 3, the standard logic flow for UID authorization verification between the host and the chip via the I²C protocol is shown. When the host starts up (as in step S51) or detects a new consumable chip for the inkjet head, it acts as the I²C master during communication, sending a send query to the chip (as in step S52) to request data and verify the chip. The chip then receives a response with the fuse UID and status data (as in step S53), and the host checks the UID match for verification (as in step S54). Next, as in step S55, if the match is successful (as in step S55a), the verification is successful; otherwise (as in step S55b), the verification fails, and printing stops. This process effectively prevents unauthorized or counterfeit chips from passing verification.

[0019] Referring to Figure 4, which illustrates the mask logic circuit of the UID verification system, the fuse identification code unit 10 records the chip's unique identification code (UID). This information is burned during the chip manufacturing process and cannot be changed later. The UID data is directly sent to the logic verification circuit. The identification status recording unit 20 stores data such as ink usage, number of uses, binding host code, and authorization status. This data is stored in EEPROM / Flash memory and can be rewritten and updated. The data from both the fuse identification code unit 10 and the identification status recording unit 20 are sequentially input into the mask logic circuit. The authorization logic comparison is performed via non-programmable logic gates such as AND and OR gates. The AND gate performs a logical intersection comparison between the identification code (UID) data and the status data (verifying whether it is one of the legal authorization combinations) and outputs an "AND result" for backend decision-making reference. The OR gate handles the backup condition logic (such as allowing the identification code (UID) status to pass when a special maintenance mode is enabled). If the logical judgment condition is met, an "unlock allowed" signal is output, and the authorization system unlocks the output verification result. If the condition is not met, printing or communication is rejected. This masking logic circuit is a hardware masking circuit and cannot be simulated or rewritten by microcontroller (MCU) software, thus possessing high security.

[0020] Therefore, in practice, when the printer is started and the consumable chip module is inserted, the main control board immediately initiates the identification program, initializes the communication protocol, and opens the identification interface. Through the I2C or SPI bus, the main control board reads the unique identifier (UID) in the fuse identification code unit 10 for authentication. Subsequently, the identification status recording unit 20 provides the operating parameters of the printing chip, including the number of ink uses and expiration status, and sends them to the identification verification logic unit 30 for final comparison. If the comparison is successful, the chip is allowed to be used; otherwise, the system will refuse to use the chip and display an error message, effectively preventing unauthorized counterfeit products from entering the market.

[0021] In summary, this application provides a chip identification module, particularly a chip identification module that combines an immutable identification code storage element with a non-programmable identification logic circuit. Considering the scenario of reusable consumables, it provides a dual identification mechanism of the identification code (UID) of the fuse identification code unit and the recorded data of the identification status recording unit. Even if the recorded data of the identification status recording unit is rewritten, the identification code (UID) of the fuse identification code unit can still ensure uniqueness. The verification of the masking logic implementation of the identification verification logic unit cannot be simulated or updated by software. Its structure is defined and completed in the chip design and manufacturing process stage, effectively enhancing its non-counterfeitability. This is to prevent microprocessors (MCUs), flash memory, and one-time programmable read-only memory (OTP-ROM) from impersonating the authorized chip identity, which meets the needs of industrial use, and therefore this application is filed in accordance with the law.

[0022] 10: Fuse Identification Code Unit 20: Identification Status Recording Unit 30: Identification and verification logic unit S1~S5, S51~S55, S55a, S55b: Steps

Claims

1. A print chip identification module, disposed on a print chip of an inkjet head, comprising: an identification circuit, comprising: a fuse identification code unit, which stores and records fixed identification data, the data being immutable once burned, realizing a unique identifier (UID); an identification status recording unit, which stores and records the print chip status, and can rewrite and update variable data multiple times; and an identification verification logic unit, which has a built-in hardware comparison logic unit implemented with masking logic or non-programmable logic gates, performing authorization comparison based on the identifier (UID) and status data, and the hardware comparison logic unit cannot be simulated or replaced by microprocessor (MCU) software or reconfigured instructions, for performing a fixed verification mechanism.

2. The chip identification module as described in claim 1, wherein the fuse identification code unit is one of a metal fuse, a polysilicon fuse, an electronic fuse, or an over-the-air (OTP-ROM).

3. The chip identification module as described in claim 1, wherein the identification status recording unit is one of Electronically Erasable Programmable Read-Only Memory (EEPROM), Static Random Access Memory (SRAM), or Flash Memory.

4. The chip identification module as described in claim 1, wherein the identification status recording unit stores and records the chip status, including the number of ink uses, whether it is the first use, whether it is expired, and binding parameters with the corresponding printer model.

5. The chip identification module as described in claim 1, wherein the identification verification logic unit is made using masking logic or wiring block method.

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