Transmission cover plate for semiconductor processing cavity and its preparation method, semiconductor processing equipment
The transmission cover plate for semiconductor processing cavities addresses contamination and cracking issues by using a dual-layered outer edge with a barrier layer and integrated window, ensuring high transmittance and durability.
Patent Information
- Application Number
- TW114141509
- Authority / Receiving Office
- TW · TW
- Patent Type
- Patents
- Current Assignee / Owner
- Priority Date
- 2024-12-16
- Filing Date
- 2025-10-27
- Publication Date
- 2026-07-11
- Estimated Expiration
- 2045-10-26
AI Technical Summary
Existing semiconductor processing cavity transmission cover plates suffer from bubble expansion and rupture under high-temperature conditions, releasing liquids and impurities that contaminate the window, reduce infrared transmittance, and increase the risk of cracking, while incomplete soldering between the window and outer edge can cause components to break.
A transmission cover plate design with a window made of transparent quartz and an outer edge divided into two layers: a first outer edge with the same transmittance as the window and a second outer edge with lower transmittance, separated by a barrier layer to prevent direct contact and impurity penetration, and integrated formation to ensure secure bonding.
Reduces impurity contamination and cracking risk, enhances infrared transmittance and temperature resistance, and extends the service life of the cover plate, while preventing window detachment and improving environmental sustainability.
Smart Images

Figure IMG-2_DRAW_114141509-A0101-14-0001-1 
Figure IMG-2_DRAW_114141509-A0101-14-0002-2 
Figure IMG-2_DRAW_114141509-A0101-14-0003-3
Abstract
Description
Technical Field
[0001] This invention relates to the field of semiconductor equipment, and more specifically to a transmission cover plate for a semiconductor processing cavity, a method for preparing the same, and semiconductor processing equipment. Prior Technology
[0002] Semiconductor epitaxial growth (EPI) equipment widely employs high-power heating lamps that pass through a quartz transmission cover to heat the substrate located in the reaction chamber. Figure 1 shows a schematic cross-sectional structure of a commonly used transmission cover, which includes a window 10a and an outer edge 20a surrounding the window. The window 10a is generally made of high-purity quartz with very few bubbles to achieve high infrared transmittance, while the outer edge 20a is made of opaque quartz with a higher number of bubbles, mainly serving a heat insulation function. The lower the infrared transmittance of the outer edge, the better. The aforementioned window and outer edge are usually welded together to form a transmission cover, but this method has at least the following disadvantages:
[0003] (1) The high number of bubbles in the opaque quartz (i.e., the outer edge) makes it prone to expansion and rupture under long-term high-temperature processing conditions, releasing liquids (such as water) and metallic impurities (such as alkali metal ions Li, Na, K, alkaline earth metal ions Ca, Mg, heavy metals Fe, Al, etc.). On the one hand, these liquids and impurities react chemically with the high-purity quartz, causing a crystallization layer to form on the surface of the high-purity quartz (i.e., the window). As the quartz ages, the crystallization layer becomes thicker and thicker, eventually leading to a gradual decrease in the infrared transmittance of the transmission cover and a gradual decrease in its resistance to deformation, increasing the risk of cracking of the transmission cover during the process. On the other hand, under high-temperature conditions, the released liquid will produce hydroxyl groups, which will be adsorbed on the surface of the high-purity quartz, resulting in a significant decrease in the temperature resistance of the high-purity quartz, making it easy to soften and deform, further increasing the risk of cracking of the transmission cover during the process.
[0004] (2) Commonly used welding methods include flame welding and electron beam welding. There is a risk of incomplete soldering between the window and the outer edge, as well as high stress. Once a poor solder joint occurs, the window will separate from the outer edge and fall into the semiconductor processing cavity, which may cause the parts to break. Summary of the Invention
[0005] The purpose of this invention is to provide a transmission cover plate for a semiconductor processing cavity, its preparation method, and a semiconductor processing device, in order to solve the problems of existing transmission cover plates where numerous bubbles on the outer edge expand and rupture under high-temperature process conditions, releasing liquid and impurities, thereby contaminating the window and causing a gradual decrease in the infrared transmittance, temperature resistance, and deformation resistance of the transmission cover plate, as well as the risk of incomplete soldering between the window and the outer edge, which could lead to the components inside the semiconductor processing cavity being broken and damaged by falling windows.
[0006] To achieve the above objectives, the present invention provides a transmission cover plate for a semiconductor processing cavity, the transmission cover plate having opposing first and second surfaces, the first surface facing a radiation source, the transmission cover plate comprising: A window that allows heat radiation to pass through; An outer edge, which surrounds the periphery of the window, includes a first outer edge and a second outer edge stacked vertically, wherein the first outer edge is disposed away from the radiation source, and the second outer edge is disposed close to the radiation source; and A barrier layer is disposed between the first outer edge and the second outer edge to prevent direct contact between the first outer edge and the second outer edge; The window and the first outer edge have the same transmittance, while the second outer edge has a lower transmittance than the first outer edge.
[0007] Optionally, the second outer edge and the periphery of the window partially overlap in height, and the inner side of the barrier layer extends between the inner wall of the second outer edge and the periphery of the window.
[0008] Optionally, the window and the first outer edge are integrally formed.
[0009] Optionally, the barrier layer comprises silicon dioxide and a dopant, wherein the dopant includes a barium salt.
[0010] Optionally, the barium salt includes at least one of barium hydroxide, barium carbonate, and barium dioxide.
[0011] Optionally, the dopant accounts for less than 10% of the total composition.
[0012] Optionally, the thickness of the barrier layer is 1 μm-200 μm.
[0013] Optionally, the window structure includes any one of flat, dome, or arch shapes.
[0014] Optionally, the transmission cover plate is made of quartz.
[0015] Optionally, the window and the first outer edge are made of transparent quartz material, while the second outer edge is made of opaque quartz material.
[0016] Another aspect of the present invention provides a semiconductor processing apparatus, comprising: The chamber frame has air inlets and outlets arranged opposite each other on its transverse sides for introducing process gases; A first cover plate and a second cover plate are disposed opposite to each other on the upper and lower sides of the chamber frame, and the chamber frame, the first cover plate and the second cover plate enclose a processing space; A base, located within the processing space, is used to support a substrate, the surface of the substrate to be processed facing the first cover plate; The first heating lamp assembly, located outside the first cover plate, is used to emit infrared radiation and heat the substrate through the first cover plate, causing the substrate to undergo a chemical deposition reaction in the process gas environment; Wherein, at least one of the first cover plate and the second cover plate is any of the aforementioned transmission cover plates.
[0017] Optionally, it further includes: a second heating lamp assembly located outside the second cover plate, which emits infrared radiation that passes through the second cover plate to heat the base and assist the film-forming reaction on the surface of the substrate.
[0018] Another aspect of the present invention provides a method for preparing a transmission cover plate for a semiconductor processing cavity, comprising: A transmissive cover plate body is provided, the transmissive cover plate body comprising: a window and a first outer edge surrounding the periphery of the window; A barrier layer is formed at least on a first surface of the first outer edge, the first surface facing the radiation source; A second outer edge is formed on the surface of the barrier layer.
[0019] Optionally, the second outer edge and the periphery of the window partially overlap in height, and the method further includes extending the edge of the barrier layer between the inner wall of the second outer edge and the periphery of the window.
[0020] Optionally, forming the barrier layer includes: doping silicon dioxide with a dopant including a barium salt.
[0021] Optionally, the method for forming the barrier layer includes any one of plasma spraying, vacuum sputtering coating, or chemical vapor deposition.
[0022] Optionally, the main body of the transmissive cover plate is made of transparent quartz material, and the second outer edge is made of opaque quartz material.
[0023] Optionally, the method of forming a second outer edge on the surface of the barrier layer includes: directly providing the second outer edge and connecting the second outer edge to the barrier layer using welding technology.
[0024] Optionally, the method for forming a second outer edge on the surface of the barrier layer includes: providing a silicon source, a fuel gas, and oxygen, and depositing porous silicon dioxide above the barrier layer by a chemical vapor deposition process.
[0025] Optionally, the method for forming a second outer edge on the surface of the barrier layer includes: providing high-purity quartz sand, introducing an inert gas into the reaction chamber, generating silicon dioxide vapor using a high-temperature electric arc process, and having the silicon dioxide vapor condense and deposit on the surface of the barrier layer to form the second outer edge.
[0026] Compared with the prior art, the beneficial effects of the technical solution of the present invention include at least the following:
[0027] The transmissive cover plate provided by this invention includes: a window and an outer edge surrounding the window. The window is made of a transparent material with few or no air bubbles to ensure high infrared transmittance. The outer edge is composed of a first outer edge and a second outer edge with different transmittance stacked one on top of the other. The transmittance of the first outer edge is the same as that of the window, while the transmittance of the second outer edge is less than that of the first outer edge. This allows the outer edge to provide heat insulation through the second outer edge with lower transmittance, while reducing the volume ratio of the low-transmittance material in the outer edge (generally by introducing air bubbles to reduce material transmittance). This reduces the amount of liquid and impurities released by the outer edge due to the expansion and rupture of air bubbles under high-temperature processing conditions, thus mitigating the degree of penetration and contamination of the window by impurities.
[0028] Meanwhile, the first outer edge is positioned close to the semiconductor processing cavity, and the second outer edge is positioned close to the radiation source. This is to prevent the second outer edge from being close to the high-temperature environment of the semiconductor processing cavity, thereby reducing the amount of impurities released from the second outer edge during the process. At the same time, it allows the second outer edge, which has reduced transmittance, to face the radiation source directly, enabling it to achieve a better heat insulation effect.
[0029] Furthermore, by introducing a barrier layer, direct contact between the second outer edge and the first outer edge, as well as the window, is avoided. This solves the problem of impurities released from the second outer edge at high temperatures penetrating and contaminating the first outer edge and the window, leading to a decrease in the infrared transmittance, temperature resistance, and deformation resistance of the transmission cover plate. Simultaneously, this improves the service life of the quartz cover plate (transmission cover plate) and reduces the frequency of contaminated cover plates entering the environment after disposal, contributing to environmental protection and carbon emission reduction, and promoting sustainable development.
[0030] Furthermore, by setting the first outer edge and the window to be made of the same material and integrally molded, the problem in the existing transmission cover plate structure that the window may not be fully soldered to the outer edge, causing the window to separate and fall into the semiconductor processing cavity and break parts. Simple Explanation of the Diagram
[0031] Figure 1 is a schematic diagram of the cross-sectional structure of an existing transmission cover plate; Figure 2 is a schematic diagram of the structure of a semiconductor processing device provided in an embodiment of the present invention; Figures 3 to 6 are schematic cross-sectional views of the transmission cover plates provided in different embodiments of the present invention; Figure 7 is a flowchart of a method for preparing a transmission cover plate according to an embodiment of the present invention; Figure 8 is a schematic cross-sectional view of each step in the preparation method of the transmission cover plate according to an embodiment of the present invention. Implementation
[0032] The technical solution of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without making progressive efforts are within the scope of protection of the present invention.
[0033] It should be noted that all directional indicators (such as up, down, left, right, front, back, etc.) in the embodiments of the present invention are only used to explain the relative positional relationship and movement of each component in a certain specific posture (as shown in the figure). If the specific posture changes, the directional indicator will also change accordingly.
[0034] As described in the background section, existing transmission cover plates consist of a window and an outer edge surrounding the window, typically welded together. However, the outer edge is usually made of opaque quartz with a high number of bubbles. Under high-temperature processing conditions, these bubbles can burst, releasing liquid and metallic impurities, which can contaminate the window. This reduces the infrared transmittance and temperature resistance of the transmission cover plate, as well as its resistance to deformation, increasing the risk of cracking during the manufacturing process. Furthermore, the welded connection method introduces the risk of incomplete penetration and high stress between the window and the outer edge, potentially causing the window to detach from the edge and fall into the semiconductor processing cavity, shattering components.
[0035] To address the aforementioned technical problems, the present invention provides a transmissive cover plate for a semiconductor processing cavity. The transmissive cover plate includes a window and an outer edge surrounding the window. The window is made of a transparent material with no bubbles or very few microbubbles to ensure high infrared transmittance. The outer edge is composed of a first outer edge and a second outer edge with different transmittance stacked one on top of the other, wherein the first outer edge is located on the side closer to the semiconductor processing cavity. This invention sets the transmittance of the first outer edge to be the same as that of the window, while the transmittance of the second outer edge is lower than that of the first outer edge. This allows the outer edge to provide heat insulation through the lower transmittance of the second outer edge, while reducing the volume ratio of the low-transmittance material in the outer edge (generally reduced by introducing air bubbles). This reduces the amount of liquid and metal impurities released by the outer edge due to the expansion and rupture of air bubbles under high-temperature processing conditions, thus mitigating the degree of impurity penetration and contamination of the window. More importantly, by introducing a barrier layer, direct contact between the second outer edge and the first outer edge and the window is avoided, thereby solving the problem of the second outer edge releasing impurities at high temperatures and penetrating and contaminating the first outer edge and the window, which leads to a decrease in the infrared transmittance, temperature resistance, and deformation resistance of the transmission cover plate. In addition, the first outer edge and the window are made of the same material and integrally formed, solving the problem in existing transmission cover plate structures where the window and outer edge may not be fully soldered, causing the window to separate and fall into the semiconductor processing cavity, breaking parts.
[0036] The transmissive cover plate provided by this invention can be used in semiconductor processing equipment.
[0037] Figure 2 shows a semiconductor processing device 100 provided in an embodiment of the present invention, including:
[0038] The chamber frame 110 has an air inlet 111 and an air outlet 112 arranged opposite to each other on its transverse sides for introducing process gas;
[0039] A first cover plate 120 and a second cover plate 130 are disposed opposite each other on the upper and lower sides of the chamber frame 110, and the chamber frame 110, the first cover plate 120 and the second cover plate 130 enclose a processing space 140 (i.e., a semiconductor processing cavity);
[0040] A base 150 is located within the processing space 140, and the base 150 is used to support the substrate w, the surface of the substrate w to be processed facing the first cover plate 120;
[0041] The first heating lamp group 160 is located outside the first cover plate 120 (above the first cover plate 120 in Figure 2) and is used to emit infrared radiation and heat the substrate w through the first cover plate 120, so that the substrate w undergoes a chemical deposition reaction in the process gas environment;
[0042] Wherein, at least one of the first cover plate 120 and the second cover plate 130 is a transmission cover plate provided by the present invention.
[0043] In some embodiments, the semiconductor processing apparatus further includes a second heating lamp group 170 located outside the second cover plate 130 (below the second cover plate 130 in FIG. 2), which emits infrared radiation through the second cover plate 130 to heat the base 150, thereby assisting the film formation reaction on the surface of the substrate w.
[0044] It should be understood that the semiconductor processing apparatus provided by the present invention can be any type of semiconductor apparatus that heats the substrate in the processing chamber through a transmission cover plate using a high-power heating lamp, such as a chemical vapor deposition (CVD) apparatus, an atomic layer deposition apparatus, a plasma-enhanced vapor deposition apparatus, a physical vapor deposition apparatus, etc. Figure 2 is merely exemplary and includes fewer or more components, or the arrangement of these components may be the same as or different from that shown in the figure.
[0045] The following is a detailed description of the transmissive cover plate 10 for a semiconductor processing cavity provided by the present invention, with reference to the accompanying drawings. It should be noted that all directional indications (such as upper and lower) of the structures shown in Figures 3 to 6 are only used to explain the relative positional relationship of the components in the case of the first cover plate 120 described above. If the transmissive cover plate 10 is used in the case of the second cover plate 130 described above, the directional indications need to be changed accordingly.
[0046] As shown in Figure 3, an embodiment of the present invention provides a transmission cover plate 10, which has a first surface 101 and a second surface 102 facing each other. The first surface 101 faces the radiation source (i.e., the first heating lamp group 160 mentioned above). The transmission cover plate 10 includes: a window 1, an outer edge 2 and a blocking layer 3.
[0047] The window 1 is capable of transmitting thermal radiation to heat the substrate in the semiconductor processing chamber, ensuring the smooth progress of the process. The window 1 can be made of a transparent material with no bubbles or very few bubbles to ensure that it has high transmittance to the transmittable thermal radiation band emitted by the radiation source, for example, a transmittance of at least 90%.
[0048] In some embodiments, the structure of the window 1 is flat (see Figures 3 and 4), dome-shaped, arched, or U-shaped (see Figure 5), etc. Different shapes and structures affect the distribution stability of airflow in the semiconductor processing cavity and the pressure difference between the upper and lower surfaces that the transmission cover plate can withstand. Different shapes and structures can be selected according to actual process requirements, and the present invention does not make specific limitations in this regard.
[0049] The outer edge 2 is arranged around the periphery 11 of the window 1, including a first outer edge 21 and a second outer edge 22 arranged in a stacked manner. The second outer edge 22 is located above the first outer edge 21, that is, the first outer edge 21 is arranged close to the semiconductor processing cavity, and the second outer edge 22 is arranged close to the radiation source.
[0050] The upper surface of the outer edge 2 may be flush with the top of the outer periphery 11 of the window 1 (see Figure 4) or located between the top and bottom of the outer periphery 11 of the window (see Figure 3). The lower surface of the outer edge 2 may be flush with the bottom of the outer periphery 11 of the window (see Figure 3) or higher than the bottom of the outer periphery 11 of the window (see Figure 5). The outer edge 2 mainly overlaps with other components of the semiconductor processing cavity to support the window 1. In actual application, it depends on the application requirements. This invention is only described as an example and is not specifically limited.
[0051] The first outer edge 21 and the second outer edge 22 have different transmittances. Transmittance refers to the light transmittance relative to the transmittable thermal radiation band emitted by the radiation source. Specifically, the first outer edge 21 has the same transmittance as window 1 and can be made of a transparent material with no bubbles or very few microbubbles. The second outer edge 22 has a lower transmittance than the first outer edge 21; for example, the transmittance of the second outer edge 22 is less than 20%, meaning that the second outer edge 22 can block at least 80% of thermal radiation transmission, thereby achieving a heat insulation effect. This protects components below the second outer edge (e.g., sealing rings) from heat-induced service life reduction. The second outer edge 22 can be made of an opaque material. In some embodiments, the transparency of the material can be reduced by doping with microbubbles. These doped microbubbles form many small cavities inside the material. These cavities cause multiple reflections and scattering when thermal radiation penetrates the material, thereby reducing the transmittance of thermal radiation and achieving a heat insulation effect. In other embodiments, other opaque doping methods can also be used to reduce the transparency of the material and thus reduce the transmittance of the second outer edge 22.
[0052] As an example, the transmission cover plate 10 is made of quartz material, where quartz material means that the main component is quartz (content > 95%), and the remainder is other dopants. Among them, window 1 and the first outer edge 21 are made of transparent quartz material, such as high-purity quartz (SiO2 content >99.9%), which has the characteristics of extremely few microbubbles (number of microbubbles per cubic foot <10), few hydroxyl groups (<5ppm), and low alkali metal impurity content (<1ppm). It has a high transmittance of infrared light in the wavelength range of 250 nm to 2500 nm, allowing more than 98% of infrared light to pass through, meeting the high infrared transmittance requirements of the transmission cover plate. The second outer edge 22 is made of opaque quartz material. The SiO2 content in opaque quartz is usually 96.8% to 99.7%, and it contains a lot of microbubbles, with more than 1010 bubbles per cubic foot and a bubble diameter of 4 μm to 100 μm, which results in excellent infrared blocking performance. When the thickness of the opaque quartz is greater than 1 mm, the transmittance of infrared light is less than 1%, achieving excellent heat insulation.
[0053] It is understandable that reducing material permeability through doping can lead to instability of these dopants under subsequent high-temperature processing conditions, resulting in the release of impurities (including liquid and metallic impurities) and contamination of the window. Compared to existing transmissive cover plates where the outer edge is made entirely of opaque material with low transmittance, and the volume ratio of opaque material is 100%, this invention, for the first time, divides the outer edge 2 into a first outer edge 21 and a second outer edge 22 stacked vertically with different transmittances. The first outer edge 21 has the same transmittance as the window 1, while the second outer edge 22 has a lower transmittance than the first outer edge 21. This allows the outer edge 2 of this invention to still provide thermal insulation through the second outer edge 22, while reducing the volume ratio of opaque material in the outer edge 2 (i.e., the outer edge is not 100% opaque). This significantly reduces the amount of impurities that may be released during subsequent processes, lessening the degree of window contamination by impurities, ultimately reducing the risk of cracking in the transmissive cover plate and increasing its service life.
[0054] In addition, the present invention sets the first outer edge 21 close to the semiconductor processing cavity and the second outer edge 22 close to the radiation source. On the one hand, this is to prevent the second outer edge 22 from being close to the high-temperature environment of the semiconductor processing cavity, so that the material of the transmission cover plate on the side close to the semiconductor processing cavity is a transparent material with no microbubbles or very few microbubbles. The opaque material is relatively far away from the high-temperature environment, thereby reducing the amount of impurities released by the second outer edge 22 in the process and reducing the degree of contamination of the first outer edge 21 and the window 1. On the other hand, the second outer edge 22 with low transmittance faces the radiation source directly, which can play a better role in heat insulation.
[0055] Although the volume ratio of low-transmittance material used in the outer edge is reduced, and the low-transmittance material is prevented from directly facing the high-temperature semiconductor processing cavity, it is still difficult to completely avoid the risk of the second outer edge 22 contaminating the first outer edge 21 and window 1 in the future. To solve this problem, the present invention provides a barrier layer 3 to prevent the second outer edge 22 from directly contacting the first outer edge 21 and window 1, and to block moisture and metal impurities released by the second outer edge 22 during the process from penetrating into the first outer edge 21 and window 1.
[0056] The blocking layer 3 is located at least between the first outer edge 21 and the second outer edge 22. In some embodiments, as shown in FIG3, when the lower surface of the second outer edge 22 is not lower than the top of the periphery 11 of the window, that is, when the second outer edge 22 and the periphery 11 of the window have no contact portion, it is only necessary to set the blocking layer 3 between the first outer edge 21 and the second outer edge 22; in other embodiments, as shown in FIG4, when the lower surface of the second outer edge 22 is located between the top and bottom of the periphery 11 of the window, that is, when the second outer edge 22 and the periphery 11 of the window partially overlap in height, the blocking layer 3 is not only located between the first outer edge 21 and the second outer edge 22, but the inner side of the blocking layer 3 also needs to extend into the space between the inner sidewall of the second outer edge 22 and the periphery 11 of the window, thereby completely blocking the possibility of impurities released by the second outer edge 22 penetrating into the window 1 and the first outer edge 21.
[0057] The barrier layer 3 comprises silicon dioxide and a dopant. The dopant enhances the density of the interface material, thereby preventing the diffusion and penetration of impurities. In some embodiments, the dopant includes a barium salt, such as at least one of barium hydroxide, barium carbonate, and barium dioxide. The barium salt reacts with silicon dioxide at high temperatures to form barium silicate, thereby forming a dense layer of cristobalite crystals and enhancing the barrier properties. In other embodiments, the dopant may also be a magnesium salt, calcium salt, strontium salt, etc.
[0058] In some embodiments, the mass percentage of the dopant is less than 10%. Although the dopant reacts with the interface material at high temperatures, increasing the crystallinity and density of the material, the dopant content should not be too high. If the dopant content is too high, at high temperatures, a significant amount of dopant can easily penetrate into window 1 and react, increasing the crystallinity of a portion of window 1 (i.e., the area near the barrier layer 3). However, higher crystallinity leads to lower transmittance, which does not meet the high transmittance performance requirement of window 1.
[0059] In some embodiments, the thickness of the barrier layer 3 is 1 μm to 200 μm. If the thickness is less than 1 μm, it is difficult to achieve a good impurity blocking effect; if the thickness is greater than 200 μm, it is difficult to achieve a better impurity blocking effect, while also resulting in cost waste.
[0060] As is known in the art, the semiconductor processing cavity is a vacuum environment. Therefore, the side of the transmission cover plate facing the semiconductor processing cavity (i.e., the second surface 102 of the transmission cover plate of the present invention) is the main load-bearing area. In existing transmission cover plates, this side is a welded structure, which is therefore subject to the risk of cracking under vacuum load, or even the window separating from the outer edge and falling into the cavity and breaking parts. However, the present invention benefits from the innovative setting that the first outer edge 21 and the window 1 have the same transmittance, and that the first outer edge 21 is close to the semiconductor processing cavity. In some embodiments, as shown in FIG6, the first outer edge 21 and the window 1 are further made of the same material and integrally formed, so that the second surface 102 of the transmission cover plate facing the semiconductor processing cavity is an integrally formed complete structure, which improves the strength of the second surface 102 of the transmission cover plate, thereby significantly reducing the risk of cracking of the transmission cover plate 10 and increasing its service life.
[0061] As shown in Figures 7 and 8, an embodiment of the present invention also provides a method for preparing the transmission cover plate 10, comprising:
[0062] Step S101, a transmission cover plate body is provided, the transmission cover plate body includes: window 1 and a first outer edge 21 surrounding the periphery 11 of the window, see the structure shown in Figure 8(a).
[0063] In this embodiment, the transmissive cover plate is made of transparent quartz material, such as high-purity quartz (SiO2 content > 99.9%), with extremely few microbubbles (< 10 microbubbles per cubic foot). It can be integrally molded from commercially available high-purity quartz.
[0064] Step S102, at least a barrier layer 3 is formed on the first surface 101 of the first outer edge 21, the first surface 101 facing the radiation source, see the structure shown in Figure 8(b).
[0065] The barrier layer 3 comprises silicon dioxide and a dopant. The dopant can improve the crystallinity and density of the interface material, thereby enhancing its barrier properties. This step forms a barrier layer 3 at least on the first surface 101 of the first outer edge 21 to prevent impurities released from the subsequent second outer edge 22 from penetrating into the first outer edge 21 and the window 1. The thickness of the barrier layer 3 is 1 μm to 200 μm.
[0066] In some embodiments, a suitable precursor can be used to deposit the barrier layer 3 through processes such as plasma spraying, vacuum sputtering, or chemical vapor deposition. In other embodiments, silicon dioxide and dopant powder can be dispersed in a solvent containing a thickener to prepare a coating liquid with a certain viscosity (above 100 mPa·s), and the barrier layer 3 can be formed by coating and drying. However, it is understood that the latter introduces new impurity contamination risks due to the introduction of thickeners and solvents. Therefore, the preferred method for forming the barrier layer 3 of the present invention is the former.
[0067] As an example, in this embodiment, the upper surface of the first outer edge 21 is lower than the top of the periphery 11 of the window. The barrier layer 3 is formed by doping an appropriate amount (component ratio less than 10%) of barium carbonate powder into silicon dioxide powder, and then spraying the doped mixed powder onto the first surface 101 of the first outer edge 21 and the surface of the periphery 11 of the window (i.e., the area of the periphery 11 that is not connected to the first outer edge 21 and is thus exposed) through a plasma spraying process to form the barrier layer 3.
[0068] Step S103: A second outer edge 22 is formed on the surface of the barrier layer 3, as shown in the structure in Figure 8(c).
[0069] In some embodiments, this step is formed by: directly purchasing a commercially available opaque quartz plate, forming a second outer edge 22 with matching size and shape by cutting or other means, connecting the second outer edge 22 to the barrier layer 3 by welding technology, and then relieving stress by annealing treatment (1000℃ ~1200℃).
[0070] In other embodiments, this step is formed by using a vaporized silicon source (e.g., SiCl4), as well as fuel gas (e.g., CH4, H2) and O2, to generate porous silicon dioxide in a vacuum CVD reaction chamber and deposit it on the surface of the barrier layer 3. The temperature is then rapidly increased to the quartz glass transition temperature (above 1800°C) and then rapidly decreased to the quartz annealing point (around 1120°C) to form the second outer edge 22 that meets the process design requirements.
[0071] In other embodiments, the formation method of this step may also be as follows: providing high-purity quartz sand with a particle size of 0.1 mm to 0.2 mm, introducing an inert gas (e.g., nitrogen, helium, or argon) into the melting furnace, with a vacuum degree of less than 0.05 MPa and a power of 2000 KW, using a graphite electrode in the melting furnace to form a high-temperature arc of over 2000°C to melt and vaporize the high-purity quartz sand, generating silicon dioxide vapor. When the vapor encounters the transmission cover plate 10 with a lower temperature (700°C-1200°C) in the furnace, it will quickly condense into silicon dioxide solid and deposit on the surface of the barrier layer 3 of the transmission cover plate. At the same time, inert gas molecules will diffuse into the deposit, causing the bubbles in it to expand and grow to the required size and density, forming a second outer edge 22 that meets the process design requirements.
[0072] In summary, the transmission cover plate provided by this invention features a window made of a transparent material with few or no microbubbles, ensuring high infrared transmittance. The outer edge is composed of a first outer edge and a second outer edge with different transmittances stacked one on top of the other. The transmittance of the first outer edge is the same as that of the window, while the transmittance of the second outer edge is less than that of the first outer edge. This allows the outer edge to perform a heat insulation function while reducing the volume ratio of low-transmittance materials used in the outer edge, thereby reducing the amount of impurities released by the outer edge at high temperatures and mitigating the degree of impurity penetration and contamination of the window. Furthermore, by setting a barrier layer, impurities released by the second outer edge at high temperatures are prevented from penetrating and contaminating the first outer edge and the window, ensuring the stability of the infrared transmittance, deformation resistance, and other properties of the transmission cover plate, and extending its service life.
[0073] Although the present invention has been described in detail through the preferred embodiments described above, it should be understood that the above description should not be considered as a limitation of the present invention. Various modifications and substitutions to the present invention will be apparent to those skilled in the art after reading the above description. Therefore, the scope of protection of the present invention should be defined by the appended claims.
[0074] 100: Semiconductor processing equipment 110: Chamber frame 111: Air Inlet 112: Air vent 120: First cover plate 130: Second cover plate 140: Processing Space 150: Base w: substrate 160: First heating lamp group 170: Second heating lamp group 10: Transmission cover plate 1. 10a: Window 2. 20a: Outer edge 101: First Surface 102: Second Surface 11: Outer perimeter 21: First outer edge 22: Second outer edge 3: Barrier layer Steps S101, S102, and S103
Claims
1. A transmissive cover plate for a semiconductor processing cavity, wherein, The transmissive cover has a first surface and a second surface facing each other, the first surface facing the radiation source. The transmissive cover includes: a window that transmits thermal radiation; an outer edge surrounding the periphery of the window, including a first outer edge and a second outer edge stacked vertically, the first outer edge being disposed away from the radiation source and the second outer edge being disposed close to the radiation source; and a blocking layer disposed between the first outer edge and the second outer edge to prevent direct contact between the first outer edge and the second outer edge; wherein the window and the first outer edge have the same transmittance, and the second outer edge has a lower transmittance than the first outer edge.
2. The transmission cover plate for a semiconductor processing cavity as described in claim 1, wherein, The second outer edge and the periphery of the window partially overlap in height, and the inner side of the barrier layer extends into the space between the inner wall of the second outer edge and the periphery of the window.
3. The transmission cover plate for a semiconductor processing cavity as described in claim 1, wherein, The window and the first outer edge are integrally formed.
4. The transmissive cover plate for a semiconductor processing cavity as described in claim 1, wherein, The barrier layer comprises silicon dioxide and a dopant, wherein the dopant includes a barium salt.
5. The transmission cover plate for a semiconductor processing cavity as described in claim 4, wherein, The barium salt includes at least one of barium hydroxide, barium carbonate, and barium dioxide.
6. The transmission cover plate for a semiconductor processing cavity as described in claim 4, wherein, The dopant accounts for less than 10% of the total composition.
7. The transmissive cover plate for a semiconductor processing cavity as described in claim 1, wherein, The thickness of the barrier layer is 1 μm to 200 μm.
8. The transmission cover plate for a semiconductor processing cavity as described in claim 1, wherein, The window structure can be any one of flat, dome-shaped, or arched.
9. The transmission cover plate for a semiconductor processing cavity as described in claim 1, wherein, The transmission cover plate is made of quartz.
10. The transmission cover plate for a semiconductor processing cavity as described in claim 9, wherein, The window and the first outer edge are made of transparent quartz material, while the second outer edge is made of opaque quartz material.
11. A semiconductor processing apparatus, comprising: The chamber frame has an air inlet and an air outlet arranged opposite each other on its lateral sides for introducing process gas. The first cover plate and the second cover plate are disposed opposite to each other on the upper and lower sides of the chamber frame, and the chamber frame, the first cover plate and the second cover plate enclose a processing space. A base located within the processing space, the base being used to support a substrate, the surface of the substrate to be processed facing the first cover plate; a first heating lamp assembly located outside the first cover plate, used to emit infrared radiation and heat the substrate through the first cover plate, causing the substrate to undergo a chemical deposition reaction in a process gas environment; wherein at least one of the first cover plate and the second cover plate is a transmission cover plate as described in any one of claims 1 to 10.
12. The semiconductor processing apparatus as claimed in claim 11, further comprising: The second heating lamp assembly is located outside the second cover plate and emits infrared radiation that passes through the second cover plate to heat the base, thereby assisting the film-forming reaction on the surface of the substrate.
13. A method for fabricating a transmission cover plate for a semiconductor processing cavity, comprising: A transmissive cover body is provided, the transmissive cover body comprising: a window and a first outer edge surrounding the periphery of the window; a blocking layer is formed at least on a first surface of the first outer edge, the first surface facing a radiation source; and a second outer edge is formed on the surface of the blocking layer.
14. The preparation method as described in claim 13, wherein, The second outer edge and the periphery of the window partially overlap in height, and the method further includes extending the edge of the barrier layer between the inner wall of the second outer edge and the periphery of the window.
15. The preparation method as described in claim 13, wherein, The formation of the barrier layer includes: doping silicon dioxide with a dopant including a barium salt.
16. The preparation method as described in claim 13, wherein, The method for forming the barrier layer includes any one of plasma spraying, vacuum sputtering coating, or chemical vapor deposition.
17. The preparation method as described in claim 13, wherein, The main body of the transmission cover plate is made of transparent quartz material, while the second outer edge is made of opaque quartz material.
18. The preparation method as described in claim 17, wherein, The method of forming a second outer edge on the surface of the barrier layer includes: directly providing the second outer edge and connecting the second outer edge to the barrier layer using welding technology.
19. The preparation method as described in claim 17, wherein, The method for forming a second outer edge on the surface of the barrier layer includes: providing a silicon source, a fuel gas and oxygen, and depositing porous silicon dioxide above the barrier layer by a chemical vapor deposition process.
20. The preparation method as described in claim 17, wherein, The method for forming a second outer edge on the surface of the barrier layer includes: providing high-purity quartz sand, introducing an inert gas into a reaction chamber, generating silicon dioxide vapor using a high-temperature electric arc process, and having the silicon dioxide vapor condense and deposit on the surface of the barrier layer to form the second outer edge.