Methods and systems for mask simulations, and related non-transitory computer readable media

Abstract

The system receives feature images representing the layout geometry of a lithography mask. The masking function (MF) contribution from these feature images is calculated by convolving each feature image with a corresponding 3D mask (M3D) filter. These M3D filters represent the electromagnetic scattering effect of the feature images. At least one M3D filter also considers effects arising from the fabrication process of the lithography mask.

Description

Technical Field

[0001] This invention relates to lithography masking simulation, including full-chip or large-scale computational lithography applications. Prior Technology

[0002] One step in the fabrication of semiconductor wafers involves lithography. In a typical lithography process, a source generates light, which is collected and guided by light-collecting / illuminating optics to illuminate a lithography mask. Projection optics relay the pattern generated by the illuminated mask onto a wafer, exposing a photoresist on the wafer according to the illumination pattern. Next, a patterned photoresist is used in a subsequent process to fabricate a structure on the wafer.

[0003] Various techniques are related to improving lithography processes, including the design of lithography masks. In computational lithography, the lithography mask design is used as input to a three-dimensional mask model, which is used to calculate a mask function describing the electromagnetic field scattering characteristics of the mask illuminated by a light source. The mask function can then be used as input to an optical imaging model (e.g., an Abbe imaging model or a Hopkins imaging model) to predict the printed pattern in the photoresist. The three-dimensional mask model is expected to be accurate and fast. Summary of the Invention

[0004] In a specific state, feature images representing the layout geometry of a lithography mask are received. The masking function (MF) contribution from these feature images is calculated by convolving each feature image with a corresponding 3D mask (M3D) filter. These M3D filters represent the electromagnetic scattering effect of the feature images. At least one M3D filter also considers the effects produced by the fabrication process of the lithography mask.

[0005] Other forms include components, devices, systems, improvements, methods, programs, applications, computer-readable media, and other technologies relating to any of the foregoing. Simple Explanation of the Diagram

[0006] The invention will be more fully understood from the accompanying drawings and descriptions of the embodiments given below. The drawings are intended to provide knowledge and understanding of embodiments of the invention and are not intended to limit the scope of the invention to these specific embodiments. Furthermore, the drawings are not necessarily drawn to scale.

[0007] Figure 1A depicts an extreme ultraviolet (EUV) lithography procedure suitable for use with embodiments of the present invention.

[0008] Figure 1B is a flowchart of an embodiment of the present invention for calculating scattering from a mask.

[0009] Figure 1C is a flowchart of an embodiment of the present invention for adjusting an M3D filter to take into account masking manufacturing effects.

[0010] Figure 1D is another flowchart according to an embodiment of the present invention for adjusting the M3D filter to take into account the masking manufacturing effect.

[0011] Figure 2 depicts a mask layout geometry being segmented into feature images according to an embodiment of the present invention.

[0012] Figure 3 depicts a feature image in a library according to one embodiment of the present invention.

[0013] Figure 4A is a flowchart of an M3D filter for calculating a feature image according to an embodiment of the present invention.

[0014] Figure 4B depicts an exemplary M3D filter calculation according to one embodiment of the present invention.

[0015] Figure 5 depicts one example of adjusting an M3D filter according to an embodiment of the present invention.

[0016] Figures 6A to 6C depict the adjustment of the M3D filter for variations in sidewall angles according to an embodiment of the present invention.

[0017] Figures 7A to 7C depict the adjustment of the M3D filter for variations in mask thickness according to an embodiment of the present invention.

[0018] Figures 8A to 8C depict the adjustment of the M3D filter according to an embodiment of the present invention for variations in the properties of the masking material.

[0019] Figure 9 depicts a flowchart of one of the various procedures used during the design and manufacture of an integrated circuit according to an embodiment of the present invention.

[0020] Figure 10 depicts an exemplary computer system in which an embodiment of the present invention may be operated. Implementation

[0021] Related applications

[0022] This application claims priority to U.S. Provisional Patent Application Serial No. 63 / 251,477, filed October 1, 2021, entitled "Mask Fabrication Effects in Lithography Simulations," and U.S. Patent Application Serial No. 17 / 956,550, filed September 29, 2022, entitled "Mask Fabrication Effects in Three-Dimensional Mask Simulations Using Feature Images," pursuant to 35 USC § 119(e). The subject matter of all the aforementioned applications is incorporated herein by reference in its entirety.

[0023] This invention relates to three-dimensional mask simulation based on feature images. The illumination pattern for exposing photoresist on a wafer depends on the geometry of the lithography mask, the source illumination, and other factors. The simulation of the lithography process depends on an accurate prediction of the electromagnetic field generated by the source illumination incident on the lithography mask. Considering diffraction and scattering effects, this field can be predicted using rigorous three-dimensional simulations based on Maxwell's equations. However, such simulations are computationally intensive and have long runtimes. Therefore, in many cases, it is impractical to run rigorous three-dimensional simulations over a mask area covering an entire wafer.

[0024] This invention relates to calculating electromagnetic field diffraction and scattering characteristics, as represented by a masking function (MF), using a set of feature images (also called feature vectors) and corresponding filters (called masking 3D (3D) or M3D filters), and modifying some of these filters to account for effects from the masking process. The feature images represent the basic geometry that can exist in the mask, and the corresponding M3D filters represent the scattering effects caused by the feature images. The M3D filters can be determined based on rigorous electromagnetic simulations of the scattering effects of the feature images under a given source illumination.

[0025] In one method, a feature image is selected from a library of predefined feature images and their corresponding pre-computed mask 3D (M3D) filters. The feature images in the library include, but are not limited to, the following: • 0 Edge feature image: bulk region (no edge) 1. Edge feature image: edges with different orientations 2. Edge feature image: A combination of two edges with different orientations and spatial relationships relative to each other. • 3+ Edge Feature Image: A combination of three or more edges (e.g., a polygon shape)

[0026] In many cases, the actual layout geometry of a lithography mask will include effects caused by the mask manufacturing process. For example, some mask features may be reflective stacks constructed from layers of material. The stack may not have perfectly vertical sidewalls. The layer thickness may not perfectly match the nominal design value. The material properties may also not perfectly match the nominal design value.

[0027] However, in some lithography simulations, the shape of the lithography mask can be represented by an idealized model that does not take into account the limitations and effects of the mask manufacturing process. Therefore, lithography simulations with idealized shapes may not be as accurate as expected.

[0028] In other simulation methods, accurate estimation of these effects requires complex models, such as detailed 3D models of the masking features and fully rigorous 3D solutions to the Maxwell equations for scattering from the features. However, this can be computationally complex, requiring significant computational resources and long runtimes.

[0029] In the method described herein, the M3D filter is modified to account for effects produced by the mask fabrication process. The M3D filter can be parameterized to provide additional degrees of freedom to account for these effects. Examples of parameters include a spatial offset or deviation of the M3D filter, as well as additive and multiplicative constants for terms in the filter. In some cases, the values ​​of these parameters are determined based on measurements of a wafer fabricated using a lithography mask fabrication process.

[0030] In an additional form of the invention, a modified M3D filter (which will be referred to as a mask-corrected M3D filter) is computed and stored as a lookup table (LUT) or other data structure. These LUTs are reused in 3D masking simulations, thus taking into account masking effects. Electromagnetic field diffraction and scattering characteristics, as represented by a masking function (MF), are calculated by using a set of feature images convolved with the corresponding mask-corrected M3D filter.

[0031] Additional technical advantages of this invention include, but are not limited to, the following: This method does not generate additional layouts for subsequent simulation stream processing, and therefore improves simulation runtime compared to alternative methods. It is more suitable for use with both machine learning (ML) and non-ML architectures, as well as for graphics processing units (GPUs). Compared to fully rigorous simulation, this method is computationally more efficient for model creation, training, and calibration, and also reduces runtime, while still producing accurate results for the masking function. The resulting masking function can also be used efficiently in both Hopkins and Abbe imaging models (which can be subsequent steps in lithography simulations).

[0032] More specifically, Figure 1A depicts one EUV lithography process suitable for use with embodiments of the present invention. In this system, a source 102 generates EUV light, which is collected and guided by a light-collecting / illuminating optics 104 to illuminate a mask 110. A projection optics 116 relays the pattern generated by the illuminating mask 110 onto a wafer 118, exposing a photoresist on the wafer according to the illumination pattern. The exposed photoresist is then developed to produce a patterned photoresist on the wafer. This is used to fabricate structures on the wafer, for example, through deposition, doping, etching, or other processes.

[0033] In Figure 1A, the light system is in the EUV wavelength range, approximately 13.5 nm or within the range of 13.3 nm to 13.7 nm. At these wavelengths, the components can be reflective rather than transmissive. Mask 110 is a reflective mask, which can be implemented as a stack of different materials, and the optics 104 and 116 are also reflective and off-axis. This is only one example. Other types of lithography systems can also be used, including the use of transmissive masks and / or optics at other wavelengths (including deep ultraviolet (DUV)) and the use of positive or negative photoresists.

[0034] Figure 1B is a flowchart for calculating scattering from a mask 110, taking into account effects from the mask manufacturing process. Diffraction and scattering from mask 110 are represented by a masking function (MF) 150. The procedure in Figure 1B uses a mask description 115 and a library 120 to determine the masking function 150. The library contains feature images 122 (e.g., predefined feature images) and corresponding filters 129, which will be referred to as mask 3D (M3D) filters because they represent the contribution of that type of feature image to the overall masking function for a given source illumination. The M3D filter 129 incorporates the effects of the source illumination and has been adjusted to account for mask manufacturing effects, as described in more detail herein.

[0035] As shown in Figure 1B, at 130, the layout geometry of the mask is received, and at 140, the layout geometry is segmented into feature images 142 based on feature images 122 from library 120. The masking function (MF) contribution from each feature image 142 is calculated by convolving the feature images 142 with corresponding M3D filters 129 at 144. The aggregated masking function for the mask and given source illumination is determined by combining (e.g., summing) the MF contributions from the individual feature images at 146.

[0036] Next, masking functions can be used in various design flows. Masking functions can be used to estimate the results of a lithography process, such as an aerial image or a printed mask pattern generated by a lithography mask. Then, mask corrections can be applied to the design of the lithography mask based on the estimated results. Examples of mask corrections include optical proximity correction, sub-resolution auxiliary features, phase-shift masking, inverse lithography techniques, and source mask optimization.

[0037] Figure 1C is a flowchart for developing a mask-corrected M3D filter 129. An uncorrected M3D filter can be developed as described below in Figures 2 through 4. These filters can be parameterized to add more degrees of freedom to account for mask manufacturing effects. At 127 in Figure 1C, the parameter value is determined by comparing the simulation prediction at 125 with the actual wafer measurement at 128. For example, a lithography mask can be used to manufacture the wafer, where the mask is manufactured using a mask manufacturing process. Various measurements can be performed, such as the width or spacing of features printed on the wafer. The M3D filter can be used in the simulation to predict the same measurement 126. The parameter can be determined at 127 based on reducing the difference between the predicted measurement 126 and the actual measurement 128, resulting in the mask-corrected M3D filter at 129. In this example, the wafer measurement 128 is used as a real-world example to directly calibrate the parameterized M3D filter 124.

[0038] In an alternative approach, wafer measurements 128 can be used to generate a real-world profile, which is then used to calibrate the parameterized M3D filter 124. For example, a three-dimensional profile of a feature on the wafer can be measured, rather than directly measuring linewidth or other solid measurements. This can then be used as input to an accurate simulation of the predicted linewidth. Alternatively, the measured three-dimensional profile on the wafer can be used to directly calibrate the parameterized M3D filter 124 using a model relating to both. Measurements of the lithography mask itself can also be used to supplement or replace wafer measurements.

[0039] Figure 1D is another flowchart according to an embodiment of the present invention for adjusting the M3D filter to take into account mask manufacturing effects. The right side shows the fabrication of a physical wafer 164 based on a test mask design 115. The left side shows a simulation of the same procedure. In the physical fabrication process, a printed mask (physical mask) 162 is first generated using the test mask design 115 in the mask fabrication process 161. Then, the printed wafer (physical wafer) 164 is fabricated using the physical lithography mask in a lithography process 163. Various metrics 166 of the wafer, such as the dimensions of various features, can then be measured at 165.

[0040] In the simulation process, a test mask design 115 is used as input to a simulation that predicts wafer characteristics measured during the physical fabrication process. A tunable M3D model 171 uses feature images and parameterized M3D filters to predict the diffraction mask field or mask function 172. This step takes into account source illumination and mask fabrication effects. This result is propagated through a lens imaging model 173 to predict the aerial image 174 in the photoresist on the wafer. A photoresist and etching model 175 is used to predict the fabricated wafer 176, from which the same wafer metric 177 can be estimated.

[0041] At 180, the parameters of the 182 M3D filter are tuned by comparing the simulated predictions of the measured wafer metric 166 with those of the same metric 177. This feedback can also be used to adjust other models in the simulation process.

[0042] Figures 2 through 4 first illustrate the use of feature images for uncorrected masking effects. Figure 2 depicts the segmentation of a masking layout geometry into feature images. Figure 2 shows two shapes 210 and 220 and the segmentation of shape 210 into feature images. Shape 210 is segmented into the following feature images: a region image, six edge images, six corner images, and two edge-to-edge (E2E) images. Shape 210 can be segmented into feature images based on rules to identify different features present in the masking layout. In this example, the internal regions of polygonal shape 210 and their contribution to the masking function are represented by the region 1 feature image. This defines which regions of the mask are opaque, in contrast to which regions are transmissive or reflective. The edge feature images (edges 1 to 6) consider the diffraction and scattering of electromagnetic waves at the edges.

[0043] The remaining feature images are based on combinations of two edges, where there will be an interaction between the two edges. Corner feature images (corner 1 to corner 6) consider the interaction at the corners, which is not merely an individual contribution of the two edges. It should be noted that in Figure 2, corners include both inner and outer corners. Edge-to-edge (E2E) feature images consider the interaction between parallel edges. E2E 1 considers the interaction between edges 1 and 3. E2E 2 considers the interaction between edge 2 and the left edge of shape 220.

[0044] Each feature image is an image. For example, a region image can be a polygon of shape 210. Each edge image can be a filtered version of a related edge. In some cases, rasterization filters are applied to generate feature images.

[0045] The segmentation of the layout geometry uses feature images 122 from library 120. Feature images from the library can be selected based on an understanding of scattering and what type of geometric features contribute to the scattering.

[0046] Figure 3 depicts some examples of feature images in a database. The feature images in Figure 3 are classified according to the number of edges in the feature images. The feature images in the top column have 0 edges, the feature images in the next column have 1 edge, then 2 edges, and then 3+ edges. These are merely examples and are not exhaustive.

[0047] In the top column, the region feature image determines which regions of the mask are opaque and which are transmissive or reflective. Depending on the geometric layout of the shape on the mask, the actual instances of the region feature image can have different shapes, sizes, and positions. The M3D filter corresponding to the region feature image represents the scattering produced by points in a region assuming an infinitely large region, i.e., the contribution of points within a body region of a geometric layout to the mask function ignores any edge effects. Therefore, the convolution of the M3D filter with an instance of the region feature image (e.g., region 1 in Figure 2) produces the MF contribution from a body region of that shape in the mask.

[0048] In the second column, edge feature images are another category of feature images, because diffraction or scattering of electromagnetic waves occurs at the edges. Figure 3 shows an edge feature image, but the library can contain many types of edge images. For a mask with only one Manhattan geometry, the library contains four edge feature images, each corresponding to one of the four possible orientations of an edge in the Manhattan geometry. Some masks may also allow edges at multiples of 45 degrees or even arbitrary angles. The M3D filter corresponding to the edge feature image represents the scattering generated by points along an edge assumed to be infinitely long.

[0049] The third column shows another important category of feature images, which are combinations of two edges. When two edges become close enough, there will be an interaction between them. Several examples are shown in Figure 3. In the first two examples, the two edges are parallel. This is generally referred to as edge-to-edge (labeled E2E in Figure 2). Figure 3 shows two different polarities, depending on whether the area between the two edges is filled with a masking material. In addition to the two different polarities, the library can also contain edge-to-edge feature images with different separations between the edges and edges oriented at different angles (horizontal, vertical, multiples of 45 degrees, etc.).

[0050] In the two examples following the third column, the two edges are perpendicular to each other. These are corner feature images: an inner corner angle and an outer corner angle, depending on the polarity. The library may contain corner angles oriented at different angles. Other edge feature images are also possible. For example, the two edges may be at different angles to each other. The two edges may be separated but not parallel. Therefore, the two edges will slowly converge or diverge. Corner angles other than 90 degrees are also possible.

[0051] The bottom column displays feature images with three or more edges. The first two examples have ends with two polarities. The library may contain versions with different widths and different angular orientations. The next two examples are holes or through holes with two polarities. Different versions may have different widths, heights, and angular orientations.

[0052] Each feature image has a corresponding M3D filter used to generate one of the MF contributions from the feature image. That is, the scattering effect of the feature image is captured by the M3D filter. In one method, a rigorous simulation is performed on the feature image, and the rigorous results are used to determine the M3D filter.

[0053] The M3D filter can be calculated starting from lower-order effects. The effect of a region image (0th-order feature image) depends only on the transmission or reflection of the region in question. In a rigorous simulation, the masking structure of this feature image is a constant plane. The M3D filter is equal to a constant of transmission or reflection calculated from the rigorous simulation.

[0054] The next consideration is an edge feature image. One edge in the layout geometry is segmented into a region feature image and an edge feature image. Then, a rigorous simulation of edge scattering is modeled using the MF contribution from the region feature image plus the MF contribution from the edge feature image. Since the MF contribution from the region feature image has been determined, the masking function contribution from the edge feature image and the corresponding M3D filter can then be determined.

[0055] After considering all single-edge feature images, the feature images containing two edges are then considered. Figure 4A is a flowchart of one of the M3D filters used to calculate the feature images, progressing from lower-order feature images to higher-order feature images. Figure 4B depicts an exemplary M3D filter calculation for one of the two-edge gap feature images shown in Figure 3.

[0056] In the example of Figure 4B, the M3D filters for the 0-edge and 1-edge feature images have been calculated, and the program moves to 405 to a more complex feature image: a two-edge feature image. At 410, a gap feature image with a specific distance ∆ is considered. At 420, the masking structure of the gap feature image is determined to be two edges separated by a distance ∆. A 3D simulation can be performed for this masking structure at 430 to generate the masking function for this structure.

[0057] Also at 440, the geometric layout of this masking structure is divided into lower-order feature images: one region feature image + two edge feature images + the feature image of the gap of interest. This is illustrated in the top column of Figure 4B. The aggregated masking function calculated by rigorous electromagnetic simulation is equal to the sum of the MF contributions from each feature image: (1) Where Ii is the feature image and Ki is the corresponding M3D filter. The convolution operator is N, and N is the number of feature images. MF is the masking function, which in this case is known from rigorous simulation. The MF contribution of these images can be calculated using a previously calculated M3D filter of lower-order feature images. This leaves an unknown term in Equation 1, illustrated at the bottom of Figure 4B. It is then the M3D filter of the gap feature images 460 can be calculated. In some cases, this can be used as the M3D filter 122 in library 120, or as the basis for the parameterized M3D filter 124 in Figure 1C.

[0058] The feature image can be represented as a grayscale representation of the feature, which allows for sparse sampling of the image. For example, an edge with infinite frequency components would require infinite bandwidth to represent at 100% fidelity. However, alternatively, it can be represented by a low-pass filtered version of the edge, which is like a grayscale blurred edge. A low-pass rasterization function can be used to rasterize the polygonal shape in the mask. This removes the high-frequency components of the feature and retains only the low-frequency components. This is acceptable because the projection optics are essentially a low-pass system, and therefore it will naturally filter out high (spatial) frequency components. To make it more compact and therefore faster in rasterization operations, the low-pass rasterization filter is designed to have a non-uniform response in the frequency passband compared to the uniform response of a sinc or sinc-like function. In view of the non-uniform response of the low-pass rasterization function in its frequency passband, an equalization filter 470 can be added to compensate for the non-uniform response. Thus, the M3D filter 490 is a combination of electromagnetic scattering and equalization.

[0059] The method described above can be repeated for gap feature images with different spacing ∆ (e.g., in 1 nm increments). It can also be repeated for different orientations and polarities. It can also be repeated for other edge and more complex feature images.

[0060] Equation 1 can be computed and solved in the spatial domain using direct convolution. However, it can also be processed in the spatial frequency domain. The quantity is transformed to the spatial frequency domain, and the convolution becomes a product. Thus, the equivalent equation is... (2) The FT{} system is a Fourier transform.

[0061] Now consider the effects of the masking process, using the examples shown in Figures 5 through 9. These examples are based on the following expression of Equation 1: (3) in It is a regional feature image, and and This represents the foreground and background light reflectance / transmittance in the body region; it is one of the expressions for the corresponding region's M3D filter. The first summation system is used for edge images, where... It is an edge feature image, and The first system corresponds to the M3D filter. The second summing system is used for edge-to-edge (E2E) images, where... It is an E2E feature image (with parallel edges) and This corresponds to the M3D filter. The parameterized version of Equation 3 is expressed as follows: (4) The apostrophe ' indicates that the filter is the parameterized version of the original filter in Equation 3.

[0062] The following are some possible parameterizations. The region filter can be determined by the multiplication constant. and To parameterize: (5A) Alternatively, an additive constant can be used: (5B) Edge and E2E filters can be parameterized by a multiplication constant C and a spatial offset or bias b: (6) (7) In this example, the offset is at coordinate x, but the direction of the offset will depend on the orientation of the feature image and the M3D filter.

[0063] Changes in higher-order features can also affect lower-order filters. Figure 5 shows an example using a ridge feature with a width w. In this example, the masking effect causes it to behave more like a ridge feature with a width (w+∆). Assume this feature is segmented into four feature images: a region image, a left edge image, a right edge image, and an E2E image, as shown in the top column of Figure 5. These images remain unchanged. However, the corresponding M3D filters 550A to 550D are adjusted to account for the differences. For example, the region M3D filter 550A will be scaled so that when applied to a region image with a width w, it produces a scattering prediction of a region image with a width (w+∆). Similar adjustments are made to the two edge filters 550B, 550C and the E2E filter 550D. Note that the offset b applied to these filters can be different. The masked correction contributions from all feature images are summed to produce the masking function for the ridge feature, as shown in the bottom column of Figure 5.

[0064] Figures 6 through 9 illustrate examples of fabrication effects using four different masking methods. Figures 6A through 6C consider variations in the mask sidewall angles. In an ideal simulation, the sidewall angles of the masking feature can be assumed to be perfectly vertical (90 degrees), as shown in the top masking profile of Figure 6A. When fabricated, the sidewalls can be angled, as shown in the bottom masking profile of Figure 6A. Note that the masking profile in Figure 6A is shown at the wafer level, and its size is 1 / 4 of the actual masking size. This sidewall variation causes changes in diffraction from the mask. One possible effect concerns shadowing. This type of masking feature causes shadowing, but non-vertical sidewalls will reduce the amount of shadowing, especially for off-axis illumination. This will make the feature appear smaller than the same feature with vertical sidewalls. The masking feature shown can be segmented into a region image, two edge images, and an E2E image. In one approach, the effect of non-vertical sidewalls can be considered by applying a spatial offset to the corresponding edges and E2E filters. The area filter may or may not be affected, depending on whether the angled sidewalls affect the total light reflection / transmission of the feature.

[0065] Figures 6B and 6C illustrate the effectiveness of this method. In this example, the nominal masking feature has vertical sidewalls, and the actual masking feature has sidewalls that deviate from the vertical by 2 degrees (88 degrees). Figure 6B plots the difference between the simulated aerial imagery (AI) predicted by one of the 88-degree sidewalls and the aerial imagery (AI) predicted by the method described herein. The x-axis represents the spatial offset or deviation b in nm, and the y-axis represents the normalized RMS value of the difference between the aerial images. A deviation of b = -0.3 nm produces a good match with the result predicted by the more rigorous simulation. A negative deviation means that the absorber appears smaller than nominal, which is consistent with expectations. Figure 6C is a similar plot, but it focuses on the RMS value of the difference between the critical dimensions (CD). Again, a deviation b = -0.3 nm produces a good match with the more rigorous simulation. A deviation of b = 0 corresponds to the prediction using an uncorrected M3D filter.

[0066] Figures 7A to 7C consider variations in mask stack thickness. Mask features can be implemented as a stack of one or more materials with a nominal thickness. The actual thickness can be greater than or less than the nominal value. If the stack is absorbent, a thinner stack can have a reduced shading effect and therefore appear smaller than the nominal version. Thickness variations can also affect the amplitude and phase of overall transmission or reflection. These effects can be considered by shifting the edge-based filter and also adjusting the area filter.

[0067] Figures 7B and 7C are similar to Figures 6B and 6C, but they address thickness variations. In this example, the nominal thickness is 76.5 nm and the actual thickness is 69 nm. Note that the z-axis in Figure 7A is 1 / 4 the size of the wafer level, so according to the z-scale in Figure 7A, a 76.5 nm mask will appear as 19.1 nm. Figures 7B and 7C plot the RMS values ​​of the differences between aerial images and critical dimensions as a function of bias b. The corresponding M3D filter is adjusted in two ways. First, curves 720B and 720C show the measure of difference as a function of bias b. Second, a phase shift of -8.09 degrees is also applied to the area filter. Curves 730B and 730C plot the measure of difference as a function of bias b, including a phase shift of -8.09 degrees.

[0068] Figures 8A to 8C consider variations in the material properties of the mask, such as refractive index (n) and dielectric constant (k). These material properties are assumed to have specific nominal values, but the actual values ​​can vary during the fabrication of the mask. If the stack is absorptive, then materials with lower contrast (i.e., the difference in n or k between different materials is less than the nominal value) will result in weaker diffraction and may appear smaller than the nominal version. These variations can also affect the amplitude and phase of overall transmission or reflection. These effects can be considered by shifting the edge-based filter and also adjusting the area filter.

[0069] Figures 8B and 8C are similar to Figures 7B and 7C, but they address variations in refractive index. In this example, the nominal refractive index n = 2.43, and the actual refractive index n = 2.3688. The corresponding M3D filter is adjusted as shown in Figure 7. Curves 820B and 820C show the measure of difference based on deviation b. Furthermore, a phase shift of -8 degrees and an amplitude scaling of 1.0063 are also applied to the zone filter. Curves 830B and 830C plot the measure of difference based on deviation b when these additional adjustments are applied.

[0070] As a final example, consider the masking linearity effect or masking proximity effect. These deviations from the nominal value are caused by short-range proximity effects and depend on the masking features. The fabrication of one masking feature can affect other nearby masking features. In one approach, these effects are considered by a parameterized 3DM filter, but the parameters can be feature-dependent. For example, the deviation b can be expressed as... (8) B, C, and D are constant parameters, and w is the width of the feature. The deviation b is dependent on the feature. It is larger for narrower features and smaller for wider features.

[0071] Figure 9 illustrates a set of exemplary procedures 900 used during the design, verification, and manufacturing of an article of work (such as an integrated circuit) to transform and verify design data and instructions representing the integrated circuit. These procedures can be structured and enabled as multiple modules or operations. The term "EDA" stands for "Electronic Design Automation." These procedures begin by generating a product concept 910 using information provided by a designer, which is then transformed to produce an article of work using a set of EDA procedures 912. When the design is complete, a taped-out 934 is performed, which involves sending the original schematic (e.g., geometric pattern) of the integrated circuit to a manufacturing plant to create a mask assembly, which is then used to manufacture the integrated circuit. After taped-out, a semiconductor die is manufactured 936, and a packaging and assembly process 938 is performed to produce the finished integrated circuit 940.

[0072] Specifications of a circuit or electronic structure can range from low-order transistor material layout to high-order description languages. A high-order representation can be used to design circuits and systems using a hardware description language ("HDL") such as VHDL, Verilog, SystemVerilog, SystemC, MyHDL, or OpenVera. An HDL description can be transformed into a logic-level register transfer level ("RTL") description, a gate-level description, a layout-level description, or a masking-level description. Each lower representation level (which is a more detailed description) adds more useful details to the design description, such as more details about the modules being described. Lower representation levels (which are equivalent to more detailed descriptions) can be generated by a computer, exported from a design library, or generated by another design automation program. One example of a specification language used to specify more detailed descriptions in a lower-order representation language is SPICE, which is used for detailed descriptions of circuits with many analog components. Descriptions at each representation level can be used by the corresponding system at that layer (e.g., a formal verification system). A design program can use one of the sequences depicted in Figure 9. The described procedure can be enabled by an EDA product (or EDA system).

[0073] During the system design phase 914, the functionality of an integrated circuit to be manufactured is specified. The design can be optimized for desired characteristics such as power consumption, performance, area (physical and / or lines of code), and cost reduction. The design can be divided into different types of modules or components at this stage.

[0074] During logic design and functional verification 916, modules or components in a circuit are specified in one or more description languages, and the functional accuracy of the specifications is checked. For example, components of a circuit can be verified to produce outputs that meet the specifications of the designed circuit or system. Functional verification can use simulators and other programs, such as test bench generators, static HDL checkers, and formal verifiers. In some embodiments, a special system of components referred to as a "simulator" or "prototyping system" is used to accelerate functional verification.

[0075] During the synthesis and design phase 918 of the test, the HDL code is transformed into a wiring lookup table. In some embodiments, a wiring lookup table may be a graphical structure, wherein the edges of the graphical structure represent components of a circuit and the nodes of the graphical structure represent how the components are interconnected. Both the HDL code and the wiring lookup table are hierarchical artifacts, which can be used by an EDA product to verify that the integrated circuit performs according to a specified design after manufacturing. The wiring lookup table can be optimized for a target semiconductor manufacturing technology. In addition, the finished integrated circuit can be tested to verify that the integrated circuit meets the specifications.

[0076] During Wiring Lookup Table Verification 920, the wiring lookup table is checked for compliance with timing constraints and correspondence with HDL codes. During Design Planning 922, the overall plan of one of the integrated circuits is constructed and analyzed for timing and top-level routing.

[0077] During layout or physical implementation 924, physical placement (positioning of circuit components such as transistors or capacitors) and wiring (connection of circuit components by multiple conductors) occur, and cells can be selected from a library to enable specific logic functions. As used herein, the term "cell" can specify a set of transistors, other components, and interconnections that provide a Boolean logic function (e.g., AND, OR, NOT, XOR) or a storage function (such as a flip-flop or latch). As used herein, a circuit "block" can refer to two or more cells. Both a cell and a circuit block can be referred to as a module or component and are enabled as physical structures and in simulation. Parameters are specified for selecting cells (based on "standard cells") (such as size) and are accessible in a library for use in EDA products.

[0078] During the analysis and extraction phase 926, circuit functionality is verified at the layout level, allowing for refinement of the layout design. During physical verification 928, the layout design is checked to ensure that manufacturing constraints are correct (such as DRC constraints, electrical constraints, lithography constraints) and that circuit functionality matches the HDL design specifications. During resolution enhancement 930, the geometry of the layout is transformed to improve how the circuit design is manufactured.

[0079] During finished product factory verification, data for producing lithography masks is generated (where appropriate, after applying lithography enhancement). During mask data preparation 932, the "finished product factory verification" data is used to generate lithography masks for producing finished integrated circuits.

[0080] A storage subsystem of a computer system (such as computer system 1000 in Figure 10) may be used to store programs and data structures, which are used for some or all of the EDA products described herein, and for the development of library cells and the physical and logical design of the library.

[0081] Figure 10 illustrates an exemplary machine of a computer system 1000, within which a set of instructions can be executed to cause the machine to perform any or more of the methodologies discussed herein. In alternative embodiments, the machine may be connected (e.g., network-connected) to other machines in a LAN, an intranet, an extranet, and / or the Internet. The machine may operate as a server or a client machine in a client-server network environment, as a peer machine in a peer-to-peer (or distributed) network environment, or as a server or a client machine in a cloud computing infrastructure or environment.

[0082] A machine can be a personal computer (PC), a tablet PC, a set-top box (STB), a personal digital assistant (PDA), a cellular telephone, a network appliance, a server, a network router, a switch or bridge, or any machine capable of executing a set of instructions (sequentially or otherwise) specifying actions to be taken by that machine. Furthermore, although a single machine is illustrated, the term "machine" should also be considered as encompassing any collection of machines that individually or jointly execute one or more sets of instructions to perform any or more of the methodologies discussed herein.

[0083] An exemplary computer system 1000 includes a processing device 1002, a main memory 1004 (e.g., read-only memory (ROM), flash memory, dynamic random access memory (DRAM), such as synchronous DRAM (SDRAM)), a static memory 1006 (e.g., flash memory, static random access memory (SRAM)), and a data storage device 1018, which communicate with each other via a bus 1030.

[0084] Processing device 1002 represents one or more processors, such as a microprocessor, a central processing unit, or the like. More specifically, the processing device may be a Complex Instruction Set Computing (CISC) microprocessor, a Reduced Instruction Set Computing (RISC) microprocessor, a Very Long Instruction Word (VLIW) microprocessor, or a processor implementing one of other instruction sets or multiple processors implementing a combination of instruction sets. Processing device 1002 may also be one or more special-purpose processing devices, such as an Application Specific Integrated Circuit (ASIC), a Field Programmable Gate Array (FPGA), a Digital Signal Processor (DSP), a network processor, or the like. Processing device 1002 may be configured to execute instructions 1026 for performing the operations and steps described herein.

[0085] The computer system 1000 may further include a network interface device 1008 for communication via a network 1020. The computer system 1000 may also include a video display unit 1010 (e.g., a liquid crystal display (LCD) or a cathode ray tube (CRT)), an alphanumeric input device 1012 (e.g., a keyboard), a cursor control device 1014 (e.g., a mouse), a graphics processing unit 1022, a signal generating device 1016 (e.g., a speaker), a graphics processing unit 1022, a video processing unit 1028, and an audio processing unit 1032.

[0086] Data storage device 1018 may include a machine-readable storage medium 1024 (also referred to as a non-transitory computer-readable medium) thereon, on which one or more sets of instructions 1026 embodying any one or more of the methodologies or functions described herein are stored. The instructions 1026 may also reside wholly or at least partially in main memory 1004 and / or processing device 1002 during execution by computer system 1000, which also constitute machine-readable storage media.

[0087] In some embodiments, instruction 1026 includes instructions for implementing functionality corresponding to the present invention. While machine-readable storage medium 1024 is shown as a single medium in one exemplary embodiment, the term "machine-readable storage medium" should be considered to include a single medium or multiple media storing one or more sets of instructions (e.g., a centralized or distributed database and / or associated cache and server). The term "machine-readable storage medium" should also be considered to include any medium capable of storing or encoding a set of instructions for execution by a machine and causing the machine and processing device 1002 to perform any one or more of the methodology of the present invention. Therefore, the term "machine-readable storage medium" should be considered to include, but is not limited to, solid-state memory, optical media, and magnetic media.

[0088] Some aspects of the aforementioned [Implementation Methods] have been presented regarding algorithms and symbolic representations for operations performed on data bits within a computer memory. These algorithmic descriptions and representations are methods used by those skilled in data processing techniques to most effectively communicate their work to others skilled in the same techniques. An algorithm may be a sequence of operations that leads to a desired result. An operation is an operation that requires the manipulation of physical quantities. These quantities may take the form of electrical or magnetic signals that can be stored, combined, compared, and otherwise manipulated. These signals may be referred to as bits, values, elements, symbols, characters, items, numbers, or the like.

[0089] However, it should be remembered that all such and similar terms should be associated with the appropriate physical quantity and are merely convenient labels for application to such quantity. Unless otherwise expressly stated, it should be understood from the present invention that throughout the description, specific terms refer to the operation and procedures of a computer system or similar electronic computing device that manipulates and transforms data of physical (electronic) quantities represented as physical quantities in the registers and memory of the computer system into other data of physical quantities similarly represented as physical quantities in the memory or registers or other such information storage devices of the computer system.

[0090] This invention also relates to an apparatus for performing the operations described herein. This apparatus may be specifically constructed for its intended purpose, or may comprise a computer selectively started or reconfigured by a computer program stored in the computer. This computer program may be stored in a computer-readable storage medium, such as, but not limited to, any type of magnetic disk (including floppy disks, optical disks, CD-ROMs, and magneto-optical disks), read-only memory (ROM), random access memory (RAM), EPROM, EEPROM, magnetic cards, or optical cards, or any type of media suitable for storing electronic instructions, each coupled to a computer system bus.

[0091] The algorithms and displays presented herein are not inherently related to any particular computer or other device. Various other systems may be used in conjunction with the programs taught herein, or it may be found convenient to construct more specialized devices to implement the methods. Furthermore, this invention is described without reference to any particular programming language. It will be understood that various programming languages ​​can be used to implement the teachings of the invention as described herein.

[0092] The present invention can be provided as a computer program product or software that can include instructions stored thereon on a machine-readable medium, such instructions being used to program a computer system (or other electronic device) to execute a program according to the present invention. A machine-readable medium includes any means for storing information in a form readable by a machine (e.g., a computer). For example, a machine-readable (e.g., computer-readable) medium includes a machine-readable storage medium, such as a read-only memory ("ROM"), random access memory ("RAM"), magnetic disk storage media, optical storage media, flash memory devices, etc.

[0093] In the foregoing disclosure, embodiments of the invention have been described with reference to specific exemplary embodiments. It will be apparent that various modifications can be made without departing from the broader spirit and scope of the embodiments of the invention as set forth in the appended claims. Where elements are referred to in the singular tense, more than one element may be depicted in the figures, with identical elements labeled with the same numerals. Therefore, the invention and the figures should be considered illustrative rather than restrictive.

[0094] 102: Source 104: Light-collecting / illumination optics 110: Mask 115: Description / Test Mask Design 116: Projection Optical Devices 118: Wafer 120: Warehouse 122: Feature image (Fig. 1B) / 3D mask (M3D) filter (Fig. 4A) 124: Parameterized 3D Masking (M3D) Filter 125: Simulation 126: Based on predicted measurements 127: Value of the decision parameter 128: Wafer Measurement 129: 3D Masking (M3D) Filter 130: Layout geometry of the receiver mask 140: Segment the layout geometry into feature images based on feature images from the library. 142: Feature Image 144: Convolve the feature image with the corresponding M3D filter. 146: MF contribution from individual feature images 150: Masking Function (MF) 161: Mask Manufacturing Process 162: Printing Mask 163: Microfilm Program 164: Physical wafers / Printed wafers 165: Various Measurements of Wafers 166: Wafer Measurement 171: Tunable 3D Mask (M3D) Model 172: Masking field or masking function 173: Lens Imaging Model 174: Aerial Images 175: Photoresist and Etching Model 176: Wafer fabrication 177: Wafer Measurement 180: The parameters of the M3D filter are tuned by comparing measured wafer metrics with analog predictions of the same metrics. 182: Tuning 210: Shape 220: Shape 405: Mobile 410: The next consideration is the gap feature image with a specific spacing ∆. 420: The masking structure of the gap feature image is determined as two edges separated by a gap ∆. 430: Execution 440: Segment the geometric layout of the mask structure into lower-order feature images. 450: Calculation 460: Calculation 470: Equalization Filter 490: 3D Masking (M3D) Filter 550A to 550D: 3D Masking (M3D) Filters 900: Program 910: Product Philosophy 912: Electronic Design Automation (EDA) Program 914: System Design 916: Logic Design and Functional Verification 918: Test Synthesis and Design 920: Wiring Comparison Table Verification 922: Design and Planning 924: Physical Implementation 926: Analysis and Extraction 928: Entity Verification 930: Resolution Enhancement 932: Masking Data Preparation 934: Finished Product Factory Verification 936: Manufacturing 938: Packaging and Assembly Procedure 940: Finished Integrated Circuits 1000: Computer System 1002: Processing device 1004: Main Memory 1006: Static Memory 1008: Network Interface Device 1010: Video display unit 1012: Alphanumeric Input Device 1014: Vernier control device 1016: Signal generating device 1018: Data storage device 1020: Internet 1022: Graphics Processing Unit 1024: Machine-readable storage media 1026: Instruction 1028: Video Processing Unit 1030: Busbar 1032: Audio Processing Unit

Claims

1. A method for masking simulation, comprising: The method involves receiving feature images, which represent images of geometric features existing in a layout geometry of a lithography mask; and having a processor calculate a mask function (MF) contribution from the feature images by convolving each feature image with a corresponding three-dimensional mask (M3D) filter; wherein the M3D filter represents an electromagnetic scattering effect of the feature image, and at least one M3D filter is a mask-corrected M3D filter that also takes into account the effects produced by a mask manufacturing process of the lithography mask by applying a spatial offset, an additive constant, or a multiplicative constant to an uncorrected version of the M3D filter.

2. The method of claim 1, wherein the mask-corrected M3D filter includes one of the parameters for the spatial offset, the additive constant, or the multiplicative constant, and the parameter of the mask-corrected M3D filter is tuned based on a measurement using a wafer fabricated using a lithography process.

3. The method of claim 2, wherein the mask-corrected M3D filter is a region filter, and the parameter of the region filter is the additive constant or the multiplicative constant.

4. The method of claim 2, wherein the mask-corrected M3D filter is a single-edge filter and the parameter of the single-edge filter is the spatial offset.

5. The method of claim 2, wherein the mask-corrected M3D filter is an edge-to-edge filter, and the parameter of the edge-to-edge filter is the spatial offset.

6. The method of claim 1, further comprising: The masking function of the lithography mask is determined based on a combination of the calculated masking function contributions; the masking function is used to estimate a result including an aerial image or a printed masking pattern generated by the lithography mask; and a masking correction is applied to a design of the lithography mask based on the estimated result; wherein the masking correction includes at least one of optical proximity correction, sub-resolution auxiliary features, phase shift masking, and reverse lithography.

7. A non-transitory computer-readable medium comprising stored instructions that, when executed by a processor device, cause the processor device to: access an uncorrected version of a mask 3D (M3D) filter corresponding to feature images; wherein the feature images are images representing geometric features in the layout geometry of a lithography mask, and the uncorrected versions of the M3D filters represent an electromagnetic scattering effect of the feature images; and modify the uncorrected versions of the M3D filters by the processor device to produce mask-corrected M3D filters, the mask-corrected M3D filters taking into account effects produced by a mask manufacturing process for the lithography mask by applying spatial offset, additive constants, and / or multiplicative constants to the uncorrected versions of the M3D filters.

8. For non-transitory computer-readable media as described in claim 7, wherein modifications to uncorrected versions of the M3D filters include: Access and use measurements of wafers manufactured using lithography masks produced by the mask manufacturing process; and modify uncorrected versions of the M3D filters based on the measurements of the wafers.

9. For non-transitory computer-readable media as described in claim 8, the uncorrected versions of those modifications to the M3D filters include: Based on (a) the results of a simulation prediction of a wafer using candidate masked M3D filters; and (b) the measurement of the wafer, the uncorrected versions of the M3D filters are modified.

10. For non-transitory computer-readable media as described in claim 7, wherein modifications to uncorrected versions of the M3D filters include: The uncorrected versions of the M3D filters are modified based on matching (a) the results of a simulation prediction of a wafer using candidate mask-corrected M3D filters with (b) the results of a simulation prediction of a wafer in which the model of the wafer structure includes the manufacturing effects produced by the mask manufacturing process.

11. The non-transitory computer-readable medium of claim 7, wherein the lithography mask includes a feature having one sidewall, the feature image representing the mask feature includes a single-edge image and / or a multi-edge image, and the modification of the original M3D filters includes: The original M3D filter of the feature image is offset to take into account the change in one angle of the sidewall.

12. The non-transitory computer-readable medium of claim 7, wherein the lithography mask comprises a film stack, indicating that the feature images of the film stack comprise a single-edge image and / or a multi-edge image, and the uncorrected versions of the M3D filters are modified as follows: The uncorrected version of the M3D filter of the feature image is offset to take into account the variation in the thickness of the film stack.

13. The non-transitory computer-readable medium of claim 7, wherein the lithography mask comprises an absorber characterized by a refractive index and a dielectric constant, indicating that the characteristic image of the absorber comprises a single-edge image and / or a multi-edge image, and the uncorrected versions of the M3D filters are modified to include: The uncorrected version of the M3D filter of the feature image is offset to take into account the variation of the refractive index or dielectric constant.

14. The non-transitory computer-readable medium as claimed in claim 7, wherein the feature image comprises a single-edge image and / or a multi-edge image, and the uncorrected versions of the M3D filters include: A feature-dependent offset is applied to the uncorrected versions of the M3D filters of the feature image to take into account the short-range proximity effect in the manufacturing process of the lithography mask.

15. A system for masking simulation, comprising: A computer-readable storage medium storing instructions and a library containing predefined feature images and corresponding pre-computed mask 3D (M3D) filters; wherein the feature images represent images of geometric features existing in the layout geometry of a lithography mask, the M3D filters represent an electromagnetic scattering effect of the feature images, and at least one M3D filter is a mask-corrected M3D filter that also takes into account the effects produced by a masking process of the lithography mask by applying a spatial offset, an additive constant, or a multiplicative constant to an uncorrected version of the M3D filter; and a processor device coupled to the computer-readable storage medium and executing the instructions, which, when executed, cause the processor device to: segment a layout geometry of a lithography mask into a plurality of feature images based on the predefined feature images contained in the library; The masking function (MF) contribution of each of the plurality of feature images is calculated by convolving each of the plurality of feature images with the corresponding M3D filter from the library; and the calculated masking function contributions are combined to determine one of the masking functions of the lithography mask.

16. The system of claim 15, further comprising: The masking function is then applied as input to either an Abbe imaging model or a Hopkins imaging model.

17. The system of claim 15, wherein the layout geometry includes a layout geometry for an entire integrated circuit die.

18. The system of claim 15, wherein one source of illumination for the lithography mask is extreme ultraviolet (EUV) or deep ultraviolet (DUV) illumination.

19. The system of claim 15, wherein the layout geometry comprises a plurality of shapes, and the feature images representing each shape at most include region images, single-edge images and double-edge images.

Images