Memory device and data storage method

TWI935443BActive Publication Date: 2026-08-11MACRONIX INTERNATIONAL CO LTD
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Patent Information

Application Number
TW113128738
Authority / Receiving Office
TW · TW
Patent Type
Patents
Current Assignee / Owner
Filing Date
2024-08-01
Publication Date
2026-08-11
Estimated Expiration
2044-07-31

AI Technical Summary

Technical Problem

Current data deduplication methods face inefficiencies due to increased hash table sizes and data swapping, leading to suboptimal storage space utilization and reduced efficiency.

Method used

A memory device and data storage method that utilizes an in-memory search (IMS) memory device to compare user data features with stored hash values, determining whether to write data based on these comparisons, thereby reducing hash table size and data exchanges.

Benefits of technology

Improves storage space utilization and reduces data exchanges during deduplication, enhancing the overall efficiency of the deduplication function.

✦ Generated by Eureka AI based on patent content.

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Patent Text Reader

Abstract

The data storage method includes: a data controller generating a first user data feature of user data stored in a random access memory; the data controller sending the first user data feature of the user data to an IMS memory device; comparing the first user data feature with a plurality of second user data features among a plurality of feature values ​​stored in the IMS memory device to generate a comparison result, the feature values ​​including the second user data features and a plurality of physical block addresses corresponding to the data stored in the storage device; the IMS memory device sending the comparison result to the data controller; and based on the comparison result, the data controller deciding whether to write the user data into the storage device.
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Description

[Technical Field]

[0001] This invention relates to a memory device and a method for storing data thereon. [Previous Technology]

[0002] In computer systems, data deduplication is an important function that helps reduce duplicate data and thus lower storage costs. When the data deduplication function is activated, it checks whether existing data is duplicated in the data to be written. If duplicates are found, the duplicate data is not written, thereby optimizing storage space.

[0003] Figure 1 shows the conventional deduplication process. As shown in Figure 1, there were originally 12 records, but after the deduplication technique, the duplicate records are removed, leaving only 4 records.

[0004] Currently, when performing deduplication, a hash value needs to be generated for each piece of written data and stored in a hash table. However, as the amount of non-deduplication data increases, the size of the hash table increases, resulting in inefficient use of storage space.

[0005] Furthermore, current deduplication functions also face the problem of data swapping. Data swapping refers to exchanging hash values ​​between storage space and memory. The more times data is swapped, the less efficient the deduplication function will be.

[0006] Therefore, there is a need for a memory device and a data storage method thereof that can improve storage space utilization and reduce the number of data exchanges when performing deduplication, thereby improving the efficiency of the deduplication function. [Summary of the Invention]

[0007] According to one aspect of this application, a memory device coupled to a data controller is provided. The memory device includes: a memory controller; a drive circuit coupled to the memory controller; and a memory controller coupled to the memory controller. The memory array includes a plurality of memory cells. In response to a first user data feature of user data generated by the data controller, the memory controller compares the first user data feature with a plurality of second user data features among a plurality of feature values ​​stored in the memory cells to generate a comparison result. The feature values ​​include the second user data features and a plurality of physical block addresses associated with stored data in a storage device. The memory controller sends the comparison result to the data controller. Based on the comparison result, the data controller determines whether to write the user data to the storage device.

[0008] According to one aspect of this case, a data storage method for a storage system is proposed, the data storage method comprising: generating a first user data feature of user data stored in a random access memory by a data controller; sending the first user data feature of the user data to an IMS memory device by the data controller; comparing the first user data feature with a plurality of second user data features among a plurality of feature values ​​stored in the IMS memory device to generate a comparison result, the feature values ​​including the second user data features and a plurality of physical block addresses corresponding to the data stored in the storage device; sending the comparison result to the data controller by the IMS memory device; and determining, based on the comparison result, whether to write the user data into the storage device.

[0009] In order to better understand the above and other aspects of the present invention, specific embodiments are described below in conjunction with the accompanying drawings:

Implementation Method

[0011] The technical terms used in this specification are based on common terminology in the field. Where this specification provides explanations or definitions for certain terms, the interpretation of those terms shall be based on the explanations or definitions provided in this specification. Each embodiment disclosed herein has one or more technical features. Where feasible, those skilled in the art may selectively implement some or all of the technical features in any embodiment, or selectively combine some or all of the technical features in these embodiments.

[0012] Figure 2 shows a functional block diagram of a storage system according to an embodiment of the present invention. The storage system 200 according to an embodiment of the present invention includes: a central processing unit (CPU) 210, an in-memory search (IMS) memory device 220, random access memory (RAM) 230, and a storage device 240. The CPU 210 is also referred to as a data controller. The RAM 230 may be dynamic random access memory (DRAM) or static random access memory (SRAM). The RAM 230 is volatile memory, while the storage device 240 is a non-volatile storage device. The IMS memory device 220 is also referred to as an IMS chip. The IMS memory device 220 is, for example, but not limited to, a charge-capture based memory device (e.g., but not limited to silicon-oxide-nitride-oxide-silicon (SONOS)) or a floating gate based memory device.

[0013] Storage system 200 includes, but is not limited to, storage application devices (solid-state drives (SSDs), etc.), embedded storage systems (e.g., smartphones, edge computing devices, etc.) or distributed storage systems.

[0014] The Central Processing Unit (CPU) 210 is coupled to the In-Memory Search (IMS) memory device 220, the Random Access Memory (RAM) 230, and the storage device 240. The detailed operation of the CPU 210, IMS memory device 220, RAM 230, and storage device 240 is described below. In Figure 2, the IMS memory device 220 and the storage device 240 are separate, but in other possible embodiments of this invention, the IMS memory device 220 and the storage device 240 are integrated in the same device, which is still within the spirit and scope of this invention. The IMS memory device 220 includes a plurality of IMS storage units, wherein the IMS storage units are, for example, but not limited to, content addressable memory (CAM) units. The IMS memory device 220 stores a plurality of hash tables P1~Pm (m is a positive integer). The storage system architecture shown in Figure 2 is also applicable to computer systems. In some embodiments of this invention, storage device 240 may be a NAND storage device. Generally, when data is programmed or written to storage device 240, a mapping table is generated, containing mapping information that maps logical addresses of data to physical block addresses of data, where the physical block addresses indicate the actual location of the data stored in storage device 240. In NAND flash memory, this mapping table may be stored in storage device 240, and the Flash Memory Translation Layer (FTL) may use this mapping information to access target data stored in flash memory by translating logical addresses in the file system to physical addresses in the flash memory.

[0015] Figures 3A and 3B illustrate a data storage method according to an embodiment of the present invention. In step 305, the storage system receives user data to be written, and the CPU 210 stores the user data in random access memory 230. In step 310, the CPU 210 divides the user data into a plurality of segmented user data, for example, but not limited to, segmented user data of 4K or 8K (bits).

[0016] In step 315, CPU 210 reads the data of the i-th segmented user (i is a positive integer).

[0017] In step 320, CPU 210 generates a hash value (also called a segmented user data feature) for the i-th segmented user data, and CPU 210 sends the hash value of the i-th segmented user data to IMS memory device 220. In this embodiment, the hash value is also called a fingerprint value. In one possible example, the hash value of 4K-bit segmented user data is 128 bits or 256 bits. This embodiment does not limit the method of generating the hash value.

[0018] In step 325, the IMS memory device 220 compares the hash value of the i-th segmented user data with the hash values ​​of a plurality of stored data stored in the IMS memory device 220; and the IMS memory device 220 sends the comparison result to the CPU 210. The plurality of hash values ​​stored in the IMS memory device 220 are, for example, but not limited to, stored in a plurality of hash tables (hash tables P1~Pm in Figure 2). The plurality of hash values ​​stored in the IMS memory device 220 correspond to a plurality of stored data stored in the storage device 240. That is, the plurality of hash values ​​stored in the IMS memory device 220 are the hash values ​​of the plurality of stored data stored in the storage device 240.

[0019] In step 330, CPU 210 checks the comparison result from IMS memory device 220 to determine whether the hash value of the i-th segment user data is the same as the hash value stored in IMS memory device 220. When the result of step 330 is negative (the hash value of the i-th segment user data is not the same as the hash value stored in IMS memory device 220), in step 340, CPU 210 writes the i-th segment user data to storage device 240, updates the hash value of the i-th segment user data to the hash table of IMS memory device 220, and generates a mapping table for the i-th segment user data. This mapping table maps the relationship between the logical address of the i-th segment user data and the write address (also called the physical block address (PBA)) of the i-th segment data stored in storage device 240.

[0020] When the result of step 330 is (the hash value of the i-th segment user data is the same as the hash value stored in the IMS memory device 220), the process proceeds to step 345. In step 345, the CPU 210 checks whether the i-th segment user data stored in the random access memory 230 is the same as the matching stored data stored in the storage device 240, where matching stored data means that the hash value of the stored data is the same as the hash value of the i-th segment user data. The purpose of step 345 is to check again whether the i-th segment user data in the random access memory 230 is the same as the matching stored data in the storage device 240 before discarding the i-th segment user data, so as to prevent data from being discarded incorrectly due to hash collision.

[0021] When the result of step 345 is negative (the i-th segmented user data in random access memory 230 is not the same as the matching stored data in storage device 240), the process proceeds to step 340. After completing step 340, the process proceeds to step 355. In one embodiment of this case, the stored data in storage device 240 and the hash value in IMS memory device 220 have a one-to-one relationship. In other words, when stored data is written to storage device 240, the hash value of the stored data is stored in IMS memory device 220.

[0022] When the result of step 345 is (the i-th segment user data in random access memory 230 is the same as the matching stored data in storage device 240), the process proceeds to step 350. In step 350, CPU 210 generates a mapping table and discards the i-th segment user data stored in random access memory 230. That is, the i-th segment user data will not be written to storage device 240. By doing so, data deduplication is achieved. In step 350, CPU 210 also generates a mapping table for the i-th segment user data, which maps the relationship between the logical address of the i-th segment user data and the write address of the matching stored data in storage device 240. After completing step 350, the process proceeds to step 355.

[0023] In step 355, CPU 210 checks whether the last segment of user data has been processed. If the result of step 355 is negative, "i" is updated (step 360), and the process proceeds to step 315 to process the next segment of user data. If the result of step 355 is positive, the process ends.

[0024] Figures 4A to 4C show several examples of storing feature values ​​in the IMS memory device 220. The IMS memory device 220 includes multiple matching lines ML0-MLn, multiple string selection lines SSL0-SSLM (M is a positive integer), multiple character lines WL0-WLN (N is a positive integer), a global source line GSL, and a common source line CSL. In Figures 4A to 4C, the IMS memory device 220 includes a plurality of blocks BK0-BKM. Character lines WL0-WLN and IMS storage cells form blocks BK0~BKM. Although Figures 4A to 4C show a three-dimensional storage device, this invention is not limited thereto. This invention also applies to two-dimensional storage devices, which are still within the spirit and scope of this invention.

[0025] In Figure 4A, feature values ​​CV0, CV1, CV2, CV3, etc. are stored in the IMS storage unit of the IMS memory device 220, wherein the same feature values ​​are stored in the same character line, different select word string lines (SSL), and different blocks BK0~BKM. The feature values ​​include the physical block address and the hash value (or fingerprint or user data feature).

[0026] In Figure 4B, feature values ​​CV0, CV1, CV2, CV3, etc. are stored in the IMS storage unit of the IMS memory device 220, wherein the same feature values ​​are stored in different character lines, the same select word string lines, and the same blocks.

[0027] In Figure 4C, feature values ​​CV0, CV1, CV2, CV3, etc. are stored in the IMS storage unit of the IMS memory device 220, wherein the same feature values ​​are stored in the same character line, the same select word string line and the same block.

[0028] Based on Figures 4A and 4C and the data storage method in one embodiment of the present invention, the storage system in one embodiment of the present invention may have high bandwidth when comparing hash values, thereby improving data storage efficiency.

[0029] In one embodiment of this case, depending on different expansion methods, the bits of each feature value stored in the IMS storage unit can be paired (or expanded) by a repeating bit or an inverse bit. Therefore, if the feature value has 128 bits, after expansion, the expanded feature value has 128*2=256 bits. These expansion methods are applicable to Figures 4A to 4C of this case.

[0030] Figures 5A to 5C illustrate a method for storing feature values ​​(e.g., feature values ​​CV0, CV1, CV2, and CV3 in Figures 4A to 4C) according to one embodiment of the present invention. In Figure 5A, the IMS memory device 220 includes a plurality of planes 510A-510D, each plane 510A-510D including a plurality of storage units. For example, but not limited to, the storage units in the first plane 510A and the third plane 510C are used to store hash values, while the storage units in the second plane 510B and the fourth plane 510D are used as IMS storage units to store physical block addresses. That is, in Figure 5A, the feature values ​​(e.g., feature values ​​CV0, CV1, CV2, and CV3 in Figures 4A to 4C) are stored in different planes.

[0031] In Figure 5B, the IMS memory device 220 includes a plurality of planes, wherein at least one plane 520A includes a plurality of blocks BK0 to BKM. For example, but not limited to, some blocks in plane 520A (e.g., BK1, BK3, etc.) are used to store hash values, and other blocks (e.g., BK0, BK2, etc.) are used as IMS storage units to store physical block addresses. That is, in Figure 5B, feature values ​​(e.g., feature values ​​CV0, CV1, CV2, CV3 in Figures 4A to 4C) are stored in different blocks of the same plane.

[0032] In Figure 5C, the same block (e.g., BK0) can be used to store multiple hash values ​​(FP0, FP1, FP2, etc.) and multiple entity block addresses (PBA0, PBA1, PBA2, etc.). That is, in Figure 5C, feature values ​​(e.g., feature value CV0 in Figure 4C) are stored on the same character line in the same block within the same plane.

[0033] Figure 6 shows a flowchart of updating the mapping table in one embodiment of this case. As shown in Figure 6, when the result of step 330 in Figure 3B is yes, in step 610, the relevant PBA (related to the matching hash value) is obtained from the mapping table. In step 620, the relevant stored data is read from the storage device 240 according to the PBA. In step 630, the central processing unit 210 compares the i-th segment user data stored in the random access memory 230 with the matching stored data (the matching stored data read according to the PBA) in the storage device 240. In step 640, the central processing unit 210 determines whether the two data are the same, that is, whether the i-th segment user data stored in the random access memory 230 is the same as the matching stored data (the matching stored data read according to the PBA) in the storage device 240. When the result of step 640 is yes, the process continues to step 350. When the result of step 640 is no, the process returns to step 340. Here, "the result of step 640 is no" means that the i-th segmented user data stored in random access memory 230 is different from the matching stored data (the matching stored data read according to the PBA) in storage device 240, but the two data have the same hash value, which is a hash collision. A hash collision refers to multiple stored data in different entity block addresses (PBAs) having the same hash value.

[0034] Steps 610-640 can be regarded as a detailed explanation of step 345.

[0035] Figure 7 shows a functional block diagram of an IMS memory device according to one embodiment of the present invention. The IMS memory device 700 is coupled to a data controller (e.g., but not limited to, the CPU in Figure 2). The IMS memory device 700 is, for example, the IMS memory device in Figure 2. The IMS memory device 700 includes: a memory controller 710; a drive circuit 720 coupled to the memory controller; and an IMS memory array 730 coupled to the memory controller, the IMS memory array 730 including a plurality of IMS storage cells. The drive circuit 720 may include word line drivers and / or bit line drivers. In response to user data features generated by the data controller, the memory controller 710 compares the user data features of the user data with a plurality of hash values ​​stored in the IMS storage cells of the IMS memory array 730 to generate a comparison result. The memory controller 710 sends the comparison result to the data controller. Based on the comparison result, the data controller decides whether to write the user data to the storage device or discard the user data.

[0036] In one embodiment of this case, the data controller divides user data into a plurality of segmented user data, and the data controller generates a plurality of segmented user data features for the plurality of segmented user data.

[0037] In one embodiment of this case, the memory controller 710 compares a plurality of segmented user data features with a plurality of hash values ​​to produce a comparison result.

[0038] In one embodiment of this case, when the comparison results do not match, the data controller writes the segmented user data to the storage device, the memory controller 710 updates the segmented user data characteristics (i.e., hash values) of the segmented user data to the hash table of the IMS memory array 730, and the memory controller 710 generates a mapping table according to the instructions of the data controller (i.e., the CPU 210 in Figure 2).

[0039] In one embodiment of this case, when the comparison results match, the data controller compares the segmented user data with the stored data in the storage device.

[0040] In one embodiment of this case, when the data controller determines that the segmented user data is the same as the stored data of the storage device, the data controller discards the segmented user data, and the memory controller 710 generates a mapping table according to the instructions of the data controller (i.e., the CPU 210 in the second figure).

[0041] In one embodiment of this case, when the data controller determines that the segmented user data is different from the stored data in the storage device, the data controller writes the segmented user data into the storage device, the memory controller 710 updates the segmented user data characteristics of the segmented user data to the hash table of the IMS memory array 730, and the memory controller 710 updates the mapping table according to the instructions of the data controller (i.e., the CPU 210 in the second figure).

[0042] In one embodiment of this case, the memory device 700 can execute the storage method of the embodiment of this case shown in Figures 4A to 4C and Figures 5A to 5C.

[0043] As shown in Figures 5C and 4C, the first part of the same character line stores hash values ​​(fingerprints) (FP0, FP1, etc.), and the second part of the same character line stores entity block addresses (PBA0, PBA1, etc.). That is, in Figures 5C and 4C, the same feature values ​​are stored in the same character line of the same block in the same plane.

[0044] As shown in Figures 5C and 4C, during the comparison and search, once a user data feature matches a hash value stored in the IMS memory device, the corresponding PBA is read immediately without further comparison of the PBA. For example, if the hash value FP0 stored in the IMS memory device 700 matches the user data feature, the corresponding entity block address PBA0 is output. Furthermore, the comparison process appends a "Don't care" pattern to the PBA (i.e., no PBA comparison is required).

[0045] In one example of this case, as shown in Figures 4A to 4C, once the hash value stored in the IMS memory device matches the user data characteristics, the corresponding memory string will output a high memory string current. The matching result can be confirmed by sensing the memory string current.

[0046] In one embodiment of this case, the PBA reading method for related matching hash values ​​in Figure 5C is as follows: The entity block address region uses a "don't care" pattern, and the hash region uses a fingerprint pattern. Entity block address information is skipped, but character lines are still selected. When the hash value stored in the IMS memory device matches the user data characteristics (user data hash value), the PBA information is sent to the page buffer. This avoids unnecessary page reads.

[0047] Further, in one embodiment of this case, the timing of implementing the data storage method in Figures 3A and 3B includes online deduplication and post-deduplication. Online deduplication refers to performing data deduplication synchronously when data is written to the storage system. Post-deduplication refers to performing data deduplication after data has been written to the storage system.

[0048] In one embodiment of this invention, the IMS memory device is used to compare whether the hash value of the user data to be written matches the hash value stored in the IMS memory device. Therefore, one embodiment of this invention can reduce hash table data movement and reduce the power consumption of the storage system.

[0049] In one embodiment of this case, the IMS memory device 220 may be implemented by a NOR flash memory device, but this does not limit this case.

[0050] In summary, although the present invention has been disclosed above by way of embodiments, it is not intended to limit the present invention. Those skilled in the art to which this invention pertains can make various modifications and refinements without departing from the spirit and scope of the present invention. Therefore, the scope of protection of this invention shall be determined by the appended claims. [Simplified Explanation of the Diagram]

[0010] Figure 1 shows a conventional deduplication method. Figure 2 shows a functional block diagram of a storage system according to an embodiment of the present invention. Figures 3A and 3B show flowcharts of a data storage method according to an embodiment of the present invention. Figures 4A to 4C show several examples of writing hash values ​​to an IMS memory device according to an embodiment of the present invention. Figures 5A to 5C show a method for storing a mapping table according to an embodiment of the present invention. Figure 6 shows a flowchart of updating the mapping table according to an embodiment of the present invention. Figure 7 shows a functional block diagram of a memory device according to an embodiment of the present invention.

Claims

1. A memory device coupled to a data controller, the memory device comprising: A memory controller; A driving circuit is coupled to the memory controller; and a memory array coupled to the memory controller, the memory array including a plurality of memory cells, wherein in response to a first user data feature of user data generated by the data controller, the memory controller compares the first user data feature with a plurality of second user data features among a plurality of feature values ​​stored in the memory cells to generate a comparison result, the feature values ​​including the second user data features and a plurality of physical block addresses associated with stored data in a storage device; the memory controller sends the comparison result to the data controller; and based on the comparison result, the data controller determines whether to write the user data to the storage device.

2. The memory device according to claim 1, wherein the data controller divides the user data into a plurality of segmented user data, and the data controller generates a plurality of first user data features of the segmented user data.

3. The memory device according to claim 2, wherein the memory controller compares the first user data features with the second user data features to produce the comparison result.

4. The memory device according to claim 3, wherein when the comparison result does not match, the data controller writes the segmented user data to the storage device, and the data controller updates the feature values ​​by writing a new feature value corresponding to the segmented user data into the memory cells.

5. The memory device according to claim 3, wherein when the comparison result matches, the data controller reads matching data from the storage device based on the physical block address and compares the segmented user data with the matching data.

6. The memory device according to claim 5, wherein when the data controller determines that the segmented user data is different from the matching data in the storage device, the data controller writes the segmented user data to the storage device, and the data controller updates the feature values ​​by writing a new feature value corresponding to the segmented user data into the memory cells.

7. The memory device according to claim 1, wherein, The second user data feature and the address of the plurality of entity blocks belonging to the same feature value are stored in the same character line, different selection lines and different blocks in the memory array.

8. The memory device according to claim 1, wherein, The second user data feature and the address of the plurality of entity blocks belonging to the same feature value are stored in different word lines, the same selection line and the same block in the memory array.

9. The memory device according to claim 1, wherein, The second user data feature and the address of the plurality of entity blocks belonging to the same feature value are stored in the same character line across the select string line within the same block in the memory array.

10. The memory device according to claim 1, wherein, The second user data feature and the address system of the plurality of entity blocks belonging to the same feature value are stored in different planes of the memory array.

11. The memory device according to claim 1, wherein, The second user data feature and the address of the plurality of entity blocks belonging to the same feature value are stored in different blocks in the same plane of the memory array.

12. The memory device according to claim 1, wherein, The second user data feature and the address of the plurality of entity blocks belonging to the same feature value are stored in the same block in the same plane of the memory array.

13. The memory device according to claim 12, wherein during comparison and search, once the user data feature matches one of a plurality of hash values ​​stored in the memory device, the entity block address is immediately read directly without further comparison of the entity block address.

14. The memory device according to claim 13, wherein, In the comparison, the physical block address area uses the "don't care" pattern; and the hash area uses the fingerprint pattern.

15. A data storage method for a storage system, the data storage method comprising: A first user data feature is generated by a data controller from user data stored in a random access memory; The data controller sends the first user data feature of the user data to an IMS memory device; the first user data feature is compared with a plurality of second user data features among a plurality of feature values ​​stored in the IMS memory device to generate a comparison result, the feature values ​​including the second user data features and a plurality of physical block addresses corresponding to the data stored in the storage device; the IMS memory device sends the comparison result to the data controller; and based on the comparison result, the data controller decides whether to write the user data into the storage device.

16. The data storage method according to claim 15, wherein an I1 data controller divides the user data stored in the random access memory into a plurality of segmented user data, and the data controller generates a plurality of first user data features of the segmented user data.

17. The data storage method according to claim 16, wherein the IMS memory device compares the first user data features with the second user data features to produce the comparison result.

18. The data storage method according to claim 17, wherein when the comparison result does not match, the data controller writes the segmented user data to the storage device, and the data controller updates the feature values ​​by writing a new feature value corresponding to the segmented user data into the IMS memory device.

19. The data storage method according to claim 17, wherein when the comparison result matches, the data controller reads matching data from the storage device according to an entity block address and compares the segmented user data with the matching data.

20. The data storage method according to claim 17, wherein when the data controller determines that the segmented user data is different from the matching data in the storage device, the data controller writes the segmented user data to the storage device, and the data controller updates the feature values ​​by writing a new feature value corresponding to the segmented user data into the IMS memory device.

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