Bonded die structure and method of fabricating thereof

Abstract

Methods for bonding and manufacturing bonded die structures are provided, including improved positioning of the die used to form the structure. Improved positioning can be achieved by providing nonlinear alignment features around the die periphery, which facilitate precise positioning of the die relative to one or more alignment marks on a target structure on which the die is placed. The nonlinear alignment features may include features formed in the peripheral edge of the die, such as recesses extending inward from the peripheral edge and / or outward protrusions extending outward from the peripheral edge. Alternatively or additionally, the nonlinear alignment features may be features formed in a sealing ring structure of the die. The nonlinear alignment features can be used with an optical inspection system to improve the positioning accuracy of the wafer relative to alignment marks on the target structure.

Description

Technical Field

[0001] This disclosure relates to bonded bare crystal structures and methods for their fabrication, particularly to bonded bare crystal structures with improved positioning and methods for their fabrication. Prior Technology

[0002] The semiconductor industry has developed due to the continuous increase in the integration density of various electronic components (such as transistors, diodes, resistors, capacitors, etc.).

[0003] In addition to smaller electronic components, improvements to component packaging are being developed in an effort to provide smaller packages that occupy less area than previous packages. Exemplary approaches include quad flat packs (QFP), pin grid arrays (PGA), ball grid arrays (BGA), flip chips (FC), three-dimensional integrated circuits (3DIC), wafer-level packages (WLP), package-on-package (PoP), system-on-chip (SoC), or system-on-integrated circuit (SoIC) devices. Some of these 3D devices are fabricated by placing chips on top of each other. These 3D devices offer improved integration density and other advantages due to the reduced interconnect length between stacked chips. However, many challenges exist associated with 3D devices. Summary of the Invention

[0004] A bonded die structure includes a first die and a second die. The first die includes a peripheral edge, the peripheral edge including a side portion and a nonlinear alignment feature positioned along the side portion of the peripheral edge of the first die. The second die is bonded to the first die.

[0005] A bonded die structure includes a first die, a second die, and a gap-filling dielectric material. The second die includes a peripheral edge, the peripheral edge comprising a side portion and a nonlinear alignment feature positioned along the side portion of the peripheral edge of the second die. The gap-filling dielectric material laterally surrounds the peripheral edge of the second die.

[0006] A method of manufacturing a bonded die structure includes: positioning a first die over a first carrier structure including a first alignment mark, wherein the first die includes a peripheral edge, the peripheral edge including a side portion and a first nonlinear alignment feature positioned along the side portion of the peripheral edge of the first die; measuring the position of the first nonlinear alignment feature on an opposite side of the first nonlinear alignment feature using an optical detection system to determine a position of a centerline of the first nonlinear alignment feature; determining an offset distance between the centerline of the first nonlinear alignment feature and a centerline of the first alignment mark; and adjusting the position of the first die relative to the first carrier structure until the offset distance is below a threshold. Simple Explanation of the Diagram

[0007] The various aspects of this disclosure can be best understood from the following detailed description when read in conjunction with the accompanying drawings. It should be noted that, in accordance with industry standard practice, the features are not drawn to scale. In fact, for clarity of discussion, the dimensions of the features may be arbitrarily increased or decreased. Figure 1 is a vertical cross-sectional view of a first carrier structure according to various embodiments of the present disclosure. Figure 2 is a vertical cross-sectional view of a first bare crystal disposed on the front side of a first carrier structure according to various embodiments of the present disclosure. Figure 3 is a vertical cross-sectional view of a first dielectric material laterally surrounding a first bare die and a plurality of second alignment marks formed above the first dielectric material, according to an embodiment of the present disclosure. Figure 4 is a vertical cross-sectional view of a stacking device structure including a second bare die disposed on a first bare die and surrounded by a second dielectric material, according to various embodiments of the present disclosure. Figure 5 is a vertical cross-sectional view of a stacking device structure disposed on a second carrier structure according to various embodiments of the present disclosure. Figure 6 is a vertical cross-sectional view of a bonded bare die structure according to various embodiments of the present disclosure. Figure 7 is a vertical cross-sectional view showing a bonded bare die structure mounted on a support structure via a plurality of solder balls according to various embodiments of the present disclosure. Figure 8A is a top view of a first bare die disposed on a first carrier structure according to various embodiments of the present disclosure. Figure 8B is an enlarged view of region B in Figure 8A. Figure 8C is a vertical cross-sectional view of a portion of the first carrier structure and the first bare crystal, taken along line C-C' in Figure 8A. Figure 8D is a vertical cross-sectional view of a portion of the first carrier structure and the first alignment mark, taken along line D-D' in Figure 8A. Figure 9 is a top view of a portion of a first bare die disposed on a first carrier structure according to another embodiment of the present disclosure. Figure 10 is a top view of a portion of a first bare die disposed on a first carrier structure according to another embodiment of the present disclosure. Figure 11 is a top view of a portion of a first bare die disposed on a first carrier structure according to another embodiment of the present disclosure. Figure 12 is a top view of a portion of a first bare die disposed on a first carrier structure according to another embodiment of the present disclosure. Figure 13 is a top view of a portion of a first bare die disposed on a first carrier structure according to another embodiment of the present disclosure. Figure 14A is a top view of a portion of a first die disposed on a first carrier structure according to another embodiment of the present disclosure, the first die including an outwardly projecting portion extending outward from a corresponding side of the peripheral edge of the first die. Figure 14B is a top view of a portion of a first bare die disposed on a first carrier structure 100 according to another embodiment of the present disclosure. Figure 14C is a top view of a portion of a first bare die disposed on a first carrier structure according to an embodiment of the present disclosure, the first bare die including an outwardly protruding portion overlapping a corresponding first alignment mark portion. Figure 14D is a top view of a portion of a first bare die disposed on a first carrier structure according to another embodiment of the present disclosure, the first bare die including an outwardly protruding portion having a triangular shape overlapping a corresponding first alignment mark portion. Figures 15A through 15C are top views of a portion of a first bare die disposed on a first carrier structure according to various additional embodiments of the present disclosure. Figures 16A through 16E are top views of a portion of a first bare die arranged on a first carrier structure according to various embodiments of the present disclosure, showing various configurations of nonlinear alignment features and first alignment marks in the peripheral edge of the first bare die. Figures 17A and 17B are top views of a portion of a first bare crystal disposed on a first carrier structure according to various embodiments of the present disclosure, showing a discontinuous second sealing ring segment with nonlinear alignment features. Figure 18 is a flowchart illustrating a method for manufacturing a bonded bare die structure according to various embodiments of the present disclosure. Implementation

[0008] The following disclosure provides numerous different embodiments or examples for implementing various features of the provided subject matter. Specific examples of components and arrangements are described below to simplify this disclosure. Of course, these are merely examples and are not intended to be limiting. For example, the following description of forming a first feature on or above a second feature may include embodiments in which the first and second features are formed in direct contact, and may also include embodiments in which an additional feature may be formed between the first and second features such that the first and second features are not in direct contact. Additionally, reference numerals and / or letters may be repeated in the various examples of this disclosure. Such repetition is for simplicity and clarity and does not in itself define the relationship between the various embodiments and / or configurations discussed.

[0009] Furthermore, for ease of description, this document uses spatially relative terms such as "below," "below," "lower part," "above," and "upper part" to describe the relationship between one element or feature and another element or feature as shown in the figure. In addition to the orientations depicted in the figure, spatially related terms are intended to cover different orientations of the device during use or operation. The device may be oriented in other ways (rotated 90 degrees or otherwise) and the spatially relative descriptors used herein can be interpreted accordingly. Unless otherwise explicitly stated, each element with the same reference numerals is assumed to have the same material composition and thickness within the same thickness range.

[0010] The various embodiments disclosed herein relate to semiconductor devices and methods of manufacturing the same. Specifically, the various embodiments include semiconductor device structures comprising semiconductor integrated circuit (IC) dies having nonlinear alignment features on or near the edge of a semiconductor IC die, thereby enabling improved alignment and stacking accuracy of multiple device structures.

[0011] Semiconductor integrated circuits may include a semiconductor material substrate, such as a silicon substrate, having multiple circuit components and elements formed on and / or within the semiconductor material. Semiconductor integrated circuits are typically manufactured by sequentially depositing insulating or dielectric layers, conductive layers, and semiconductor layers of material over a semiconductor substrate (e.g., a wafer), and patterning the various material layers using photolithography to form the integrated circuit. A portion of the semiconductor substrate containing the individual integrated circuits can then be separated from the remaining portion of the semiconductor substrate (i.e., diced) through a dicing process to provide individual bare dies.

[0012] A second die can be placed on top of a first die, and a bonding process can be performed to bond bonding features on the first die to corresponding bonding features on the second die, forming a bonded die structure. Precise alignment and positioning of the individual dies are required, as misalignment can lead to poor bonding formation and other defects. In many cases, alignment marks are used to facilitate alignment of individual dies when they are placed on another structure (e.g., a carrier wafer or another die). Alignment marks can include identifiable features, such as geometry or patterns, which can serve as a reference or guide for precise die placement. Optical inspection systems are typically used to measure the wafer's position relative to alignment marks and to correct die positioning when the wafer is not positioned correctly relative to the alignment marks.

[0013] However, the associated optical inspection systems often produce inaccurate measurements of the wafer's position relative to the alignment marks. This can lead to incorrect wafer placement, resulting in poor performance and reduced yield of the resulting bonded bare die structure.

[0014] Various embodiments may include bonding die structures and methods of manufacturing bonding die structures, including improved positioning of the die for forming the bonding die structure. Improved positioning may be achieved by providing one or more nonlinear alignment features around the periphery of the die, which may facilitate more accurate positioning of the die relative to one or more alignment marks on a target structure on which the die is placed. In some embodiments, the nonlinear alignment features may include features formed in the peripheral edge of the wafer, such as a recessed portion extending inward from the peripheral edge of the die and / or an outwardly projecting portion extending outward from the peripheral edge of the die. Alternatively or additionally, the nonlinear alignment features may be features formed in a sealing ring structure of the die, such as a recessed portion of a sealing ring structure extending inward from the peripheral edge of the die and / or an outwardly projecting portion of the die. The nonlinear alignment features may be used with an optical inspection system to improve the positioning accuracy of the wafer relative to alignment marks on the target structure.

[0015] Figures 1 through 7 are sequential vertical cross-sectional views illustrating intermediate structures during the fabrication process of semiconductor device structures according to various embodiments of the present disclosure. Figure 1 is a vertical cross-sectional view illustrating a first carrier structure 100 according to various embodiments of the present disclosure. The first carrier structure 100 may include a suitable substrate (e.g., semiconductor substrate, organic substrate, glass substrate, ceramic substrate, etc.) that can be configured to support one or more semiconductor IC dies. In a non-limiting embodiment, the first carrier structure 100 may include a semiconductor (e.g., silicon) wafer. The first carrier structure 100 may include a first (i.e., front) side 102 and a second (i.e., rear) side 103. In various embodiments, the first carrier structure 100 may include a plurality of first alignment marks 105 disposed on and / or within the first carrier structure 100. The first alignment marks 105 may be used to facilitate precise alignment of structures such as semiconductor IC dies subsequently placed on the front side 102 of the first carrier structure 100.

[0016] In some embodiments, the first alignment mark 105 may include a suitable metallic material, such as Cu, Ni, W, Al, Co, Mo, Ru, Ti, TiN, TaN, or WN, including alloys thereof and combinations thereof. Other suitable materials and configurations for the first alignment mark 105, such as polymers, inks, void regions (e.g., trenches), etc., are within the scope of this disclosure. In some embodiments, the first alignment mark 105 may be formed using a lithography process. For example, a suitable deposition method may be used to deposit the metallic material over the front side 102 of the first carrier structure 100. A photoresist layer may be applied to the metallic material and patterned using lithography to provide a photomask in the pattern of the first alignment mark 105. An etching process may be used to remove portions of the metallic material exposed through the photomask, thereby transferring the photomask pattern to the metallic material to form discrete first alignment marks 105. In other embodiments, a photoresist photomask may be provided over the front side 102 of the first carrier structure 100, and an etching process may be used to form openings (e.g., trenches) in the pattern of the first alignment mark 105 in the first carrier structure. Excess metal material can be removed from the front side 102 of the first carrier structure 100 using a planarization process to provide discrete first alignment marks 105 composed of metal material deposited within the first carrier structure 100. Other methods for forming the first alignment marks 105 may utilize, for example, lift-off techniques, printing methods, etc. In some cases, the first alignment marks 105 may be completely embedded within the first carrier structure 100, such that the first alignment marks 105 are covered by an optically transparent material.

[0017] Figure 2 is a vertical cross-sectional view showing a first bare die 110 disposed on the front side 102 of the first carrier structure 100 according to various embodiments of the present disclosure. Referring to Figure 2, the first bare die 110 may include a first semiconductor substrate 111, which may include elemental semiconductors such as silicon or germanium and / or compound semiconductors such as silicon-germanium, silicon carbide, gallium arsenide, indium arsenide, gallium nitride, or indium phosphide. Other semiconductor substrate materials are also within the scope of this disclosure. In some embodiments, the first semiconductor substrate 111 may be a semiconductor-on-insulator (SOI) substrate. In some embodiments, a plurality of devices (not shown in Figure 2) may be disposed on, above, and / or in, the first semiconductor substrate 111. The devices may include, for example, active devices, passive devices, or combinations thereof. In some embodiments, the devices disposed on, above, and / or in, the first semiconductor substrate 111 may include integrated circuit elements. Integrated circuit elements may include, for example, transistors (e.g., field-effect transistors, FETs), capacitors, resistors, diodes, photodiodes, fuse devices, or other similar devices. In some embodiments, integrated circuit elements may include gate electrodes, source / drain regions, sidewalls, isolation trenches, etc.

[0018] The first die may further include a first interconnect structure 113 above the first semiconductor substrate 111. The first interconnect structure 113 may include metal interconnect features (e.g., metal lines, vias, and / or bonding pads) formed within a dielectric material (e.g., one or more inter-layer dielectric (ILD) layers and / or inter-metal dielectric (IMD)), which can provide connections to and / or between various devices located on, above, and / or within the first semiconductor substrate 111. The first interconnect structure 113 may optionally include one or more first sealing rings 117 extending around the periphery of the first die 110. The one or more first sealing rings 117 can provide protection for the device structure of the first die 110 against electrical interference, mechanical damage, and / or contamination. In some embodiments, the one or more first sealing rings 117 may include a metallic material (e.g., copper, nickel, aluminum, etc.). In some embodiments, the first die 110 may further include one or more first through-substrate vias (TSVs) 118 extending through the first semiconductor substrate 111. The first through-substrate via 118 can provide electrical connection between the semiconductor substrate 111 and the metallic features of the first interconnect structure 113 of the device structure and / or the first bare die 110.

[0019] Referring again to Figure 2, a suitable placement device (e.g., pick-and-place tool 107) can be used to place the first die 110 onto the front side 102 of the first carrier structure 100. One or more first alignment marks 105 can be used as guides to help ensure that the first die 110 is placed in the correct position on the first carrier structure 100. In various embodiments, one or more optical detection systems can be used to compare the position of the first alignment marks 105 with that of the first die 110 to determine whether the first die 110 is correctly positioned on the first carrier structure 100. In some embodiments, an optical metrology (OM) system 106 can be used to perform an overlap measurement between the first alignment marks 105 and one or more peripheral edges 115 of the first die 110, and can be configured to cause the pick-and-place tool 107 to perform one or more process corrections based on the overlap measurement values ​​until it is determined that the first die 110 is correctly positioned on the first carrier structure 100. Alternatively or additionally, the infrared (IR) inspection system 108 can be used to detect the offset between the first alignment mark 105 and features of the first die 110 (e.g., the metal (e.g., copper) sealing ring 117 of the first die 110). The position of the first die 110 on the first carrier structure 100 can be adjusted based on the IR inspection.

[0020] In some embodiments, alignment marks 105 can be used to place a plurality of first bare crystals 110 at predetermined positions above the front side 102 of the first carrier structure 100 to ensure proper alignment and registration of the corresponding first bare crystals 110. In some embodiments, a suitable adhesive (not shown in FIG. 2) can be used to adhere the first bare crystals 110 to the front side 102 of the first carrier structure 100. In some embodiments, the adhesive may include a material that can subsequently be treated to cause the adhesive to lose its adhesive properties, such that the first carrier structure 100 can be separated from the first bare crystals 110. In some embodiments, the adhesive may lose its adhesive properties when subjected to treatment using energy such as heat, light (e.g., UV, IR, laser, etc.) and / or sound (e.g., ultrasound) energy. Alternatively, the adhesive may include a material that decomposes when subjected to elevated temperatures, such as an acrylic pressure-sensitive adhesive material. Other suitable adhesive materials are also within the scope of this disclosure.

[0021] In the embodiment shown in Figure 2, the first die 110 is shown in a "face-down" configuration placed on the front side 102 of the first carrier structure 100, such that the front side 112 of the first die 110 (i.e., the side adjacent to the first interconnect structure 113) faces the first carrier structure 100, and the back side 114 of the first die 110 (i.e., the side adjacent to the first semiconductor substrate 111) faces away from the first carrier structure 100. However, it should be understood that in other embodiments, the first die 110 may be placed in an "face-up" configuration, wherein the back side 114 of the first die 110 may face the first carrier structure 100 and the front side 112 of the first die 110 may face away from the first carrier structure 100.

[0022] Figure 3 is a vertical cross-sectional view showing a first dielectric material 130 laterally surrounding a first bare die 110 and a plurality of second alignment marks 205 formed above the first dielectric material 130, according to an embodiment of the present disclosure. Referring to Figure 3, the first dielectric material 130 may be deposited on the front side 102 of the first carrier structure 100 and above the first bare die 110. Silicon nitride, silicon carbide, silicon oxynitride, silicon carbonitride, low dielectric materials, extremely low-K (ELK) dielectric materials, undoped silicon glass (USG), fluorosilicate glass (FSG), phosphor-silicate glass (PSG), etc., including combinations thereof. Other suitable dielectric materials for the first dielectric material 130 are within the scope of this disclosure. The first dielectric material 130 can be deposited using appropriate deposition processes, such as chemical vapor deposition (CVD), physical vapor deposition (PVD), atomic layer deposition (ALD), high-density plasma CVD (HDPCVD), low-pressure CVD, metal-organic CVD (MOCVD), plasma-enhanced CVD (PECVD), sputtering, laser ablation, etc. In some embodiments, a first dielectric material 130 may be deposited over the front side 102 of the first carrier structure 100 and over the first die 110, and a planarization process such as chemical mechanical planarization (CMP) may be used to remove excess dielectric material from the first die 110 to provide a first dielectric material 130 laterally surrounding the first die 110. The upper surface of the first dielectric material 130 and the back side 114 of the first die 110 may form a continuous planar surface 128. In embodiments where a plurality of first dies 110 are disposed over the front side 102 of the first carrier structure 100, the first dielectric material 130 may extend between each first die 110 and may also be referred to as a first gap-filling dielectric material 130.

[0023] Referring again to Figure 3, one or more second alignment marks 205 may be formed over a continuous flat surface 128 formed by the first dielectric material 130 and the first die 110. One or more second alignment marks 205 may be formed using processes and materials similar to those described above with reference to Figure 1 for forming the first alignment mark 105. Therefore, for the sake of brevity, repeated discussion of similar features is omitted. The second alignment marks 205 may be located at known positions relative to one or more underlying features, such as the first alignment mark 105 and / or the first die 110. The second alignment marks 205 may be used to facilitate the alignment of a second die that can subsequently be placed over the first die 110. Although Figure 3 shows a second alignment mark 205 formed over the first dielectric material 130, it should be understood that one or more second alignment marks 205 may be formed over and / or partially over the first dielectric material 130 and partially over the first die 110. Although the embodiment of Figure 3 shows a second alignment mark 205 disposed above a continuous flat surface 128, in other embodiments, the second alignment mark may be located at least partially below the continuous flat surface (e.g., partially or completely embedded in the first dielectric material 130 and / or the first bare die 110).

[0024] Figure 4 is a vertical cross-sectional view illustrating a stacked device structure 150 according to various embodiments of the present disclosure, the stacked device structure 150 including a second bare die 210 disposed on a first bare die 110 and surrounded by a second dielectric material 230. Referring to Figure 4, the second bare die 210 may be similar to the first bare die 110 and may include a second semiconductor substrate 211 and a second interconnect structure 213 on the second semiconductor substrate 211, as described above with reference to Figure 2. Therefore, for the sake of brevity, repeated discussion of equivalent features is omitted. In some embodiments, the second interconnect structure 213 may include at least one second sealing ring 217.

[0025] The second die 210 is placed onto the first die 110 using a suitable placement device (e.g., the pick-and-place tool 107 described above). One or more second alignment marks 205 can help ensure that the second die 210 is placed in the correct position. One or more optical inspection systems, such as the OM system 106 and / or the IR inspection system 108 described above (see Figure 2), can be used to compare the position of the second die 210 relative to the second alignment marks 205 to determine that the second die 210 is correctly positioned, and the position of the second die 210 can be adjusted as needed until it is in the correct position.

[0026] Referring again to Figure 4, in some embodiments, the first die 110 may be bonded to the second die 210 via corresponding first bonding layer 131 and second bonding layer 231. Before placing the second die 210 onto the first die 110, the first bonding layer 131 may be formed over the back surface 114 of the first die 110. In various embodiments, the first bonding layer 131 may include a first dielectric layer 132 in which first bonding pads 133 are formed. The first dielectric layer 132 may include silicon oxide, silicon nitride, silicon carbide, silicon carbonitride, silicon oxynitride, dielectric polymer materials, etc. Other suitable dielectric materials are also within the scope of this disclosure. The first bonding pads 133 may include suitable conductive materials, such as copper (Cu), tungsten (W), aluminum (Al), etc. For example, the first bonding pads 133 may be formed in the first dielectric layer 132 through a damascene or dual-damascene process. At least some of the first bonding pads 133 of the first bonding layer 131 can be electrically coupled to the TSV 118 of the underlying first semiconductor substrate 111 of the first bare die 110.

[0027] The second bonding layer 231 can be formed in a similar manner above one side of the second interconnect structure 213 of the second bare die 210. Specifically, the second bonding layer 231 may include a second dielectric layer 232 in which second bonding pads 233 are formed. At least some of the second bonding pads 233 of the second bonding layer 231 can be electrically coupled to the metal interconnect features of the second interconnect structure 213 of the second bare die 210. The layout of the first bonding pads 133 of the first bonding layer 131 may correspond to the layout of the second bonding pads 233 of the second bonding layer 231.

[0028] Referring again to Figure 4, the second die 210 can be placed on the first die 110 such that the second bonding layer 231 can contact the first bonding layer 131. The second die 210 can be aligned above the first die 110 such that the first bonding pad 133 of the first bonding layer 131 of the first die 110 can be aligned and contacted with the corresponding second bonding pad 233 of the second bonding layer 231 of the second die 210. Therefore, it may be necessary to properly position the first die 110 and the second die 210 on the first carrier structure 100 to ensure an appropriate amount of contact between the corresponding sets of first bonding pads 133 and second bonding pads 233 of the corresponding first bonding layers 131 and 231. Excessive misalignment or "overlap offset" between sets of first bonding pads 133 and second bonding pads 233 can result in high resistance at the bonding interface between the first die 110 and the second die 210, which may lead to poor device performance and reduced yield. In some cases, the maximum permissible overlap offset between multiple sets of first bonding pads 133 and second bonding pads 233 may be 1 µm or less.

[0029] A bonding process can be used to bond the second bonding layer 231 and the first bonding layer 131, thereby bonding the second die 210 to the first die 110. In some embodiments, the second bonding layer 231 can be bonded to the first bonding layer 131 via metal-to-metal (MM) and dielectric-to-dielectric (DD) direct bonding techniques to mechanically and electrically couple the second die 210 to the first bonding layer 131. In some embodiments, prior to bonding the second die 210 to the first die 110, the surfaces of the first bonding layer 131 on the first die 110 and / or the surfaces of the second bonding layer 231 on the second die 210 can optionally undergo a pretreatment process (e.g., a plasma treatment process) to promote surface activation of the first bonding layer 131 and / or the second bonding layer 231 before bonding the second die 210 to the first die 110. In direct bonding processes, such as metal-to-metal (MM) and dielectric-to-dielectric (DD) bonding processes, contacting the first bonding layer 131 and the second bonding layer 231 with each other can result in a pre-bonding process, wherein chemical bonds (e.g., hydrogen bridges) can be formed at the planar interface between the dielectric materials of the first bonding layer 131 and the second bonding layer 231. In some embodiments, the pre-bonding process can be performed at ambient temperature (e.g., ~20°C). In other embodiments, the pre-bonding process can be performed at elevated temperatures. In some embodiments, compressive forces can be applied to the second bare die 210 and the first bare die 110 during the pre-bonding process. In other embodiments, no compressive force may be applied during the pre-bonding process.

[0030] Referring again to Figure 4, in some embodiments, an annealing process may be performed to bond the bonding pads 133 of the first bonding layer 131 to the bonding pads 233 of the second bonding layer 231 according to various embodiments of this disclosure. The annealing process may be performed at elevated temperatures, such as 100°C or higher, for example between approximately 150°C and approximately 350°C, but lower and higher temperatures may also be used. In some embodiments, compressive forces may be applied to the second die 210 and the first die 110 during the annealing process. In other embodiments, no compressive force may be applied during the annealing process.

[0031] Following the bonding process, the second die 210 can be mechanically and electrically coupled to the first die 110 to provide a stacked device structure 150 located on the first carrier structure 100. In some embodiments, multiple stacked device structures 150, as shown in Figure 4, can be located above the front side 102 of the first carrier structure 100. As shown in Figure 4, the stacked device structure 150 includes a configuration in which the front side of the second die 210 (i.e., the side adjacent to the second interconnect structure 213) is bonded to the rear side 114 of the first die 110 (i.e., a "front-to-back" configuration). However, it should be understood that other embodiments of the stacked device structure 150 may have different configurations, such as a "back-to-front" configuration, a "front-to-front" configuration, or a "back-to-back" configuration. Furthermore, although metal-to-metal (MM) and dielectric-to-dielectric (DD) direct bonding processes have been described herein, it should be understood that other bonding processes, such as fusion processes, microbump bonding processes, etc., can be used to bond the first die 110 and the second die 210.

[0032] Referring again to Figure 4, the second dielectric material 230 may be deposited over the continuous planar surface 128 and the second bare die 210. The second dielectric material 230 may be similar to or identical to the first dielectric material 130 described above with reference to Figure 3. Therefore, for the sake of brevity, repeated discussion of similar features is omitted. In some embodiments, the second dielectric material 230 may be deposited over the continuous planar surface 128 formed by the first dielectric material 130 and the first bare die 110, and over the side and top surfaces of the second bare die 210. Excess dielectric material may be removed from the top surface of the second bare die 210 using, for example, a chemical mechanical planarization (CMP) process, to provide the second dielectric material 230 laterally surrounding the second bare die 210. The top surface of the second bare die 210 and the second dielectric material 230 may form a continuous planar surface 228. In embodiments where multiple second bare crystals 210 are disposed above a continuous flat surface 128, a second dielectric material 230 may extend between each second bare crystal 210 and may also be referred to as a second gap-filling dielectric material 230.

[0033] Figure 5 is a vertical cross-sectional view of a stacked device structure 150 disposed on a second carrier structure 200 according to various embodiments of the present disclosure. Referring to Figure 5, the second carrier structure 200 may be bonded to a continuous flat surface 228 formed by a second bare die 210 and a second dielectric material 128. The second carrier structure 200 may include a suitable substrate (e.g., a semiconductor substrate, an organic substrate, a glass substrate, a ceramic substrate, etc.) that may be configured to support the stacked device structure 150. In a non-limiting embodiment, the second carrier structure 200 may include a semiconductor (e.g., silicon) wafer. In various embodiments, the second carrier structure 200 may be bonded to the stacked device structure 150 using a suitable adhesive (e.g., glue).

[0034] Referring again to Figure 5, the first carrier structure 100 can be removed from the stacking device structure 150 using appropriate techniques. In some embodiments, this may include treating the adhesive material binding the first carrier structure 100 to the stacking device structure 150, such as heat treatment, radiation treatment, etc., causing the adhesive material to lose its adhesive properties. The carrier structure 100 is then separated from the stacking device structure 150. Other suitable techniques for removing the first carrier structure 100 are within the scope of this disclosure. The first carrier structure 100 can be removed from the stacking device structure 150 before or after the second carrier structure 200 is attached to the stacking device structure 150. Thus, the stacking device structure 150 can be effectively transferred from the first carrier structure 100 to the second carrier structure 200. The orientation of the stacking device structure 150 can be reversed (i.e., flipped) relative to the orientation shown in Figure 4, such that the stacking device structure 150 can be supported on the second carrier structure 200, wherein the first bare die 110 is located above the second bare die 110.

[0035] Figure 6 is a vertical cross-sectional view of a bonded die structure 160 according to various embodiments of the present disclosure. In various embodiments, the structure shown in Figure 5 may undergo a cutting process. The cutting process may include a mechanical cutting process that uses a blade such as a diamond or carbide blade to cut (e.g., saw) through the gap-filling dielectric material 130, 230 and the second carrier structure 200 to provide one or more individual bonded die structures 160 as shown in Figure 6. Other cutting techniques may also be used, such as plasma cutting, laser grooving, etc. In some embodiments, a second alignment mark 205 may be used as a guide during the cutting process. The bonded die structure 160 may include a second die 210 located above the second carrier structure 200 and a first die 110 located above and bonded to the second die 210. The dielectric material 130, 230 may laterally surround the first die 110 and the second die 210.

[0036] In some embodiments, the bonded die structure 160 may include at least one alignment mark structure 216. As used herein, an "alignment mark structure" may include all or any portion of a first alignment mark 105 and / or a second alignment mark 205 formed during the manufacturing process of the bonded die structure 160, which remains in the completed bonded die structure 160. For example, the alignment mark structure 216 may be the complete first alignment mark 105 and / or the second alignment mark 205, or it may be a portion of the first alignment mark 105 and / or the second alignment mark 205 that remains in the bonded die structure 160 after the aforementioned dicing process. For example, the dicing process may cut through one or more of the first alignment mark 105 and / or the second alignment mark 205, such that a portion of the first alignment mark 105 and / or the second alignment mark 205 may remain in the bonded die structure 160 after the dicing process, as shown in Figure 6. In other embodiments, the alignment mark structure 216 may include a complete first alignment mark 105 or a second alignment mark 205, which is completely retained in the bonded bare die structure 160 after the dicing process.

[0037] Alternatively, in some embodiments, the cutting may occur between the peripheral edges 115, 215 of the first die 110 and the second die 210 and the peripheral edges of the first alignment mark 105 and / or the second alignment mark 205, in which case no portion of the first alignment mark 105 or a portion of the second alignment mark 205 may remain in the bonded die structure 160.

[0038] Figure 7 is a vertical cross-sectional view illustrating a bonding die structure 160 mounted on a support structure 157 via a plurality of solder balls 225 according to various embodiments of the present disclosure. Referring to Figure 7, the bonding die structure 160 may be reversed (i.e., flipped) relative to its orientation as shown in Figure 6, such that the front side 112 of the first die 110 faces downward and the back side of the second carrier structure faces upward. A plurality of solder balls 225 may be disposed on the front side 112 of the first die 110. The bonding die structure 160 may be aligned above the support structure 157. The support structure 157 may include, for example, a semiconductor wafer, an interposer, and / or a substrate (e.g., a semiconductor, glass, or organic substrate) that may be configured to support the bonding die structure 160. The bonding die structure 160 may be contacted with the support structure 157 such that the solder balls 225 may contact corresponding bonding structures (e.g., bonding pads) on the surface of the support structure 157. The bonding die structure 160 may be bonded to the support structure 157 using a reflow process.

[0039] Precise alignment and positioning of the first die 110 and the second die 210 remains a difficult challenge when manufacturing the bonded die structure 160 as shown in Figure 7. This is likely at least in part due to the inaccuracy of overlap measurements between the positions of the first die 110 and the second die 210, and between the positions of the first alignment mark 105 and the second alignment mark 205. Referring again to Figure 2, current systems used to obtain overlap measurements, such as the aforementioned OM system 106 and / or the aforementioned IR inspection system 108, often produce inaccurate overlap measurements. This is likely at least in part due to the so-called "black edge" effect. The black edge effect has two main causes. First, the peripheral edges 115, 215 of the first die 110 and the second die 210 may not be perfectly perpendicular, but may have slanted, angled, or curved profiles. This is illustrated in Figure 2, which shows the edge 115 of the first die 110, which has an outwardly sloping profile between the back (i.e., top) side 114 and the front (i.e., bottom) side 112 of the first die 110. Because the OM system 106 typically measures the distance between the alignment mark 105 and the peripheral edge 115 of the die 110, the sloping profile shown in Figure 2 can introduce ambiguity regarding the precise location of the edge 115, thus leading to inaccuracies in the measurement. As shown in Figure 2, there is an offset between the horizontal position of the peripheral edge 115 of the die 110 at the top of the wafer 110 (indicated by dashed line 301) and the position of the edge 115 at the bottom of the die (indicated by dashed line 303). Therefore, the position of the die edge 115 measured by the OM system 106 can have an area of ​​uncertainty, as indicated by the offset distance doff between lines 301 and 303 in Figure 2. This can lead to inaccurate and / or inconsistent overlap measurements, which may result in excessive overlap offset in the placement of wafer 110 on the underlying structure.

[0040] Another cause of the black border effect is optical defocusing aberration in the OM device, which can lead to a certain range of errors in the measurement position of the edge 115 of the die 110. Optical defocusing problems can result in inaccurate overlapping measurements of dies 110 with non-perpendicular edges 115 as shown in Figure 2, as well as dies 110 with perpendicular edges 115. Optical defocusing problems can also lead to significant measurement errors and height inconsistencies 108 when using infrared detection systems.

[0041] Inaccurate overlap measurements can lead to excessive "overlap offset" in the placement of the first die 110 and the second die 210 on the underlying structure. As described above, this results in high resistance at the bonding interface between the first die 110 and the second die 210 in the die bonding structure 160, leading to poor device performance and reduced yield. Furthermore, errors in die placement can also cause errors in the aforementioned dicing process, such as incorrectly performing dicing through portions of the first die 110 and the second die 210 instead of through the gap-filling dielectric material 130. This can damage the first die 110 and the second die 210, rendering them inoperable.

[0042] Various embodiments include a bonded die structure 160 and a method of manufacturing the bonded die structure 160, which includes improved positioning of a first die 110 and a second die 210 forming the bonded die structure 160. Improved positioning can be achieved by providing one or more nonlinear alignment features around the peripheries of the first die 110 and the second die 210, which can facilitate more precise positioning of the first die 110 and the second die 210 relative to alignment marks, such as the first alignment mark 105 and the second alignment mark 205 described above, disposed on a target structure on which the first die 110 and the second die 210 are placed. In some embodiments, the nonlinear alignment features may include recessed portions and / or outwardly projecting portions in the peripheral edges 115 of the first die 110 and the second die 210, which may correspond to the position of the first die 110. Alternatively or additionally, the nonlinear alignment features may include recessed portions and / or outwardly projecting portions in the sealing ring structure of the first die 110 and the second die 210. Nonlinear alignment features can improve the accuracy of optical detection of the positions of the first die 110 and the second die 210 relative to the corresponding first alignment mark 105 and second alignment mark 205.

[0043] Figure 8A is a top view of a first die 110 disposed on a first carrier structure 100 according to various embodiments of the present disclosure. The first die 110 and carrier structure 100 shown in Figure 8A are equivalent to the first die 110 and carrier structure 100 described above with reference to Figure 2. Therefore, for the sake of brevity, repeated discussion of similar features is omitted. Figure 8A shows the shape of the peripheral edge 115 of the first die 110 according to various embodiments of the present disclosure. In the embodiment of Figure 8A, the peripheral edge 115 of the first die 110 has a truncated quadrilateral shape, including four sides 115A and corners 115B extending between each pair of adjacent sides 115A. Two sides 115A extend parallel to each other along a first horizontal direction hd1, and two sides 115A extend parallel to each other along a second horizontal direction hd2 perpendicular to the first horizontal direction hd1. Each corner 115B extends diagonally between adjacent pairs of sides 115A. Although Figure 8A shows a first bare crystal 110 with a periphery shape in the form of a truncated quadrilateral, it should be understood that the first bare crystal 110 may have other shapes, such as other polygonal shapes (e.g., quadrilateral shapes, triangular shapes, etc.), circular shapes, irregular shapes, etc.

[0044] Referring again to Figure 8A, in various embodiments, the peripheral edge 115 of the first die 110 may further include a plurality of nonlinear alignment features, which may be located at positions corresponding to the positions of the corresponding alignment marks 105 of the first carrier structure 100. In the embodiment of Figure 8A, the nonlinear alignment features include recesses 115C extending inward from the corresponding side 115A of the peripheral edge 115 of the first die 110.

[0045] Figure 8B is an enlarged view of region "B" in Figure 8A. As shown in Figure 8B, when viewed in a horizontal cross-section, the recessed portion 115C of the edge 115 of the first bare crystal 110 may include a rectangular shape. That is, each recessed portion 115C may include a pair of segments 311 extending inward from the side portion 115A in a direction perpendicular to the side portion 115A, and a connecting segment 313 extending between the pair of segments 311 in a direction perpendicular to the side portion 115A. The shape of the recessed portion 115C may be symmetrical about the centerline 124 in the direction perpendicular to the side portion 115A.

[0046] In various embodiments, the depth D1 of the recessed portion 115C from the side portion 115A (i.e., the length of segment 311) can be at least about 0.1 μm, for example, between about 0.1 μm and about 5 μm, including between about 1 μm and about 3 μm (e.g., ~2 μm). The width D2 of the recessed portion 115C (i.e., the length of connecting segment 313) can be at least about 0.1 μm, for example, between about 1 μm and about 60 μm, including between about 5 μm and about 40 μm (e.g., ~30 μm). In some embodiments, the depth D1 of the recessed portion 115C can be less than the width D2 of the recessed portion 115C to minimize the possibility of crack formation in the first bare crystal 110.

[0047] In various embodiments, the shape of the peripheral edge 115 of the first bare die 110 can be formed during a dicing process used to separate the first bare die 110 from a larger support structure (e.g., a semiconductor wafer). As described above, semiconductor integrated circuits are typically fabricated by sequentially depositing insulating or dielectric layers, conductive layers, and / or semiconductor material layers on a semiconductor substrate (e.g., a wafer), and patterning the various material layers using photolithography to form an integrated circuit. A dicing process can then be used to separate (i.e., divide) portions of the semiconductor substrate containing the individual integrated circuits from the remaining portions of the semiconductor substrate to provide individual bare dies. The shape of the resulting wafer can be determined based on the specific dicing process used.

[0048] In some embodiments, the dicing process for forming the shape of the peripheral edge 115 of the first bare die may include a plasma etching process through a photomask patterned by lithography. The photomask may be patterned to include openings that may define the size, shape, and location of the recessed portion 115C to be subsequently formed. In a non-limiting embodiment, the plasma etching process may include an isotropic etching process (e.g., using sulfur hexafluoride (SF6) plasma) and a thin passivation layer (e.g., using octafluorocyclobutane (C4F8) plasma on the etched surface). During the subsequent etching process, directional ions attack and remove the passivation layer and the underlying material from the surface perpendicular to the incident ions, while the passivation layer protects the sidewall surfaces from etching. Repeating these etching and deposition steps in multiple iterations can provide highly directional etching that can produce relatively steep sidewalls. After the plasma etching process, the photomask may be removed using a suitable process, such as through ashing or solvent dissolution.

[0049] Referring again to Figures 8A and 8B, a plurality of first alignment marks 105 are shown on the front side 102 of the first carrier structure 100. In this embodiment, each first alignment mark 105 comprises a square shape, but other shapes and designs of the first alignment marks 105 are also within the scope of this disclosure. In various embodiments, each first alignment mark 105 may be symmetrical about a centerline 124 extending toward a target location for placing the first bare die 110.

[0050] In various embodiments, first alignment marks 105 may be distributed around the outer periphery of the target location for placing the first die 110. The arrangement of the first alignment marks 105 may generally correspond to the shape of the outer periphery of the first die 110, such that the line segments connecting each adjacent first alignment mark 105 form a truncated quadrilateral shape similar to the shape of the first die 110. The position of each first alignment mark 105 may correspond to the position of a corresponding recess 115C of the first die 110. The target offset distance D3 between each first alignment mark 105 and an adjacent side 115A of the first die 110 may be at least about 0.1 μm, for example, between about 0.1 μm and about 30 μm, including between about 5 μm and about 25 μm (e.g., ~15 micrometers). In some embodiments, the target offset distance D3 may be about 0.5 times the width dimension D2 of the recess 115C of the first die 110.

[0051] Each first alignment mark 105 may have a first outer width dimension D4 along a first horizontal direction hd1 and a second outer width dimension D5 along a second horizontal direction hd2. In some embodiments, D4 may be equal to D5. In some embodiments, D4 and D5 may each be at least about 0.1 μm, for example, between about 1 μm and about 60 μm, including between about 5 μm and about 40 μm (e.g., ~30 μm). In some embodiments, D4 and D5 may be approximately equal to the width dimension D2 of the recessed portion 115C of the first bare die 110. In some embodiments, 0.5*D4≤D3≤5*D4 and / or 0.5*D5≤D3≤5*D5.

[0052] Each first alignment mark 105 may also have a first inner width dimension D6 along a first horizontal direction hd1 and a second inner width dimension D7 along a second horizontal direction hd2. In some embodiments, D6 may be equal to D7. In some embodiments, D6 and D7 may each be at least about 0.1 μm, for example, between about 1 μm and about 50 μm, including between about 3 μm and about 30 μm (e.g., ~20 μm).

[0053] Figure 8C is a vertical cross-sectional view of a portion of the first carrier structure 100 and the first die 110 taken along line C-C' in Figure 8A. Figure 8D is a vertical cross-sectional view of a portion of the first carrier structure 100 and the first alignment mark 105 taken along line D-D' in Figure 8A. Referring to Figures 8C and 8D, in order to place the first die 110 on the first carrier structure 100, the aforementioned pick-and-place tool 107 can position the first die 110 above a target area of ​​the first carrier structure 100, such that the alignment mark 105 of the first die 110 in each recess 115C is located adjacent to the corresponding alignment mark 105 of the first carrier structure 100. In some embodiments, the first die 110 can be placed downwards onto the front side 102 of the first carrier structure 100. Alternatively, the first die 110 can be held slightly above the front side 102 of the first carrier structure 100. An optical detection system such as the OM system 106 described above can be used to measure the position of the recess 115C, i.e., the position of the corresponding alignment mark 105 of the first carrier structure 100. Referring to Figure 8C, in some embodiments, measuring the position of the recess 115C may include measuring the position of the die edge 115 on each of the segments 311L, 311R of the recess 115C located on opposite (i.e., left and right) sides of the recess 115C. Because the two segments 311L and 311R of the recess 115C are formed simultaneously under the same process conditions, the inclined profiles along each segment 311L and 311R (i.e., the difference in the corresponding positions of the segments 311L, 311R between the tops) and the bottom of the die indicated by the dashed lines 301L, 303L, 301R, and 303R should be approximately equal, resulting in substantially equal offset distances doff, as shown in Figure 8C. Therefore, measurement errors caused by the tilted profiles of segments 311L and 311R should generally cancel each other out. The horizontal position of the recessed portion 115C can be determined by calculating the position of the centerline 124 of the recessed portion 115C (i.e., the midpoint between the left means 311L and the right means 311R) based on the position of the detected segments. This can be done for each recessed portion 115C along the periphery of the first bare die 110.

[0054] An optical detection system can similarly measure the position of each first alignment mark 105. For example, the optical detection system can measure the positions at two locations on opposite sides of the first alignment mark 105 and calculate the position of the centerline 125 of the first alignment mark 105 based on these measurements, as shown in FIG8D. The lateral offset between the positions of the centerline 124 of each recess 115C and the centerline 125 of the corresponding first alignment mark 105 can define the offset measurement value of each set of recesses 115C and the corresponding first alignment mark 105. If one or more offset measurement values ​​are greater than a predetermined threshold (e.g., 1 μm, 0.5 μm, 0.1 μm, etc.), the position of the first die 110 can be adjusted and the above measurement process can be repeated until all offset measurement values ​​are equal to or lower than the threshold. In this case, the first die 110 can be considered to be correctly located on the first carrier structure 100.

[0055] In some embodiments, determining the offset measurements of two recessed portions 115C located on different side portions 115A extending perpendicularly to each other on the first die 110 may be sufficient to definitively determine whether the first die 110 is correctly positioned. This is because determining that a recessed portion 115C is correctly aligned with its corresponding first alignment mark 105 along a first horizontal direction (e.g., hd1) can indicate that the offset distance D3 along a second horizontal direction (e.g., hd2) is within the target range, while determining that another recessed portion 115C is correctly aligned with its corresponding first alignment mark 105 along a second horizontal direction (e.g., hd2) can indicate that the offset distance D3 along the first horizontal direction (e.g., hd1) is within the target range. However, for improved accuracy, determining the offset measurements of more than two recessed portions 115C (including all recessed portions 115C surrounding the periphery of the first die 110) may be advantageous.

[0056] When the second die 210 is placed on the flat surface 128 formed by the first dielectric material 130 and the first die 110, the process described above with reference to Figures 8A to 8D, as described above with reference to Figure 4, can be repeated. That is, the second die 210 may include one or more non-linear alignment features, such as one or more recesses 115C along the peripheral edge 215 of the second die 210. Second alignment marks 205 may be distributed around the periphery of the target location for placing the second die 210, wherein the position of each second alignment mark 205 may correspond to the position of a corresponding recess 115C of the second die 210. An optical detection system such as the OM system 106 described above can be used to measure the position of the recess 115C, i.e., the corresponding second alignment mark 205, to determine the offset measurement value as described above. The position can be adjusted as needed based on the offset measurement value of the second die 210 until all offset measurement values ​​are within a threshold indicating correct positioning of the second die 210.

[0057] The additional process steps described above with reference to Figures 4 through 7 can then be performed to provide the bonding die structure 160 described above. In various embodiments, the recessed portion 115C of the first die 110 and / or the second die 210 may be filled by a first gap-filling dielectric material 130 and a second gap-filling dielectric material 230. In some embodiments, the bonding die structure 160 may include one or more alignment mark structures 216 that may be embedded in the first gap-filling dielectric material 130 and the second gap-filling dielectric material 230. The position of each alignment mark structure 216 may correspond to the position of a non-linear alignment feature (e.g., the recessed portion 115C) along the adjacent side portion 115A of the peripheral edge 215 of the second die 210. The centerline 125 of the alignment mark structure 216 may intersect the non-linear alignment feature (e.g., the recessed portion 115C) along the adjacent side portion 115A of the peripheral edge 215 of the second die 210. The alignment mark structure 216 can be offset by a distance D3 from the adjacent side 115A of the peripheral edge 215 of the second bare die 210.

[0058] Figure 9 is a top view of a portion of a first die 110 disposed on a first carrier structure 100 according to another embodiment of this disclosure. Referring to Figure 9, the first die 110 in this embodiment includes a recessed portion 115C having a triangular shape. The recessed portion 115C may include a pair of segments 311 that extend inwardly from a side portion 115A at an angle and intersect at a vertex. The recessed portion 115C shown in Figure 9 can be formed using the same method as described above with reference to Figures 8A to 8D. The dimensions of the recessed portion 115C and the first alignment mark 105, including the depth D1 and width D2 of the recessed portion 115C and the target offset distance D3 between the side portion 115A and the first alignment mark 105, can be the same as described in Figure 8B. The placement of the first die 110 and the determination of the offset measurements can be the same as described above with reference to Figures 8C and 8D. Specifically, the optical inspection system can measure the positions of a pair of segments 311 on opposite sides of the recessed portion 115C to determine the position of the centerline 124 of the recessed portion 115C and compare it with the position of the centerline 125 of the recessed portion 115C. The position of the first die 110 can be adjusted as needed until the offset measurement value is below a predetermined threshold. Although Figure 9 shows the first die 110, it should be understood that the second die 210 as described above may also include the triangular recessed portion 115C as shown in Figure 9.

[0059] Figure 10 is a top view of a portion of a first die 110 disposed on a first carrier structure 100 according to another embodiment of this disclosure. Referring to Figure 10, the first die 110 in this embodiment includes a recessed portion 115C having a semi-circular shape. The recessed portion 115C may include a single segment extending inward along an arc from a side portion 115A. The recessed portion 115C shown in Figure 10 may be formed using the same method as described above with reference to Figures 8A to 8D. The dimensions of the recessed portion 115C and the first alignment mark 105, including the depth D1 and width D2 of the recessed portion 115C and the target offset distance D3 between the side portion 115A and the first alignment mark 105, may be the same as described in Figure 8B. The placement of the first die 110 and the determination of the offset measurements may be the same as described above with reference to Figures 1 to 8C and 8D. Specifically, the optical inspection system can measure the position of the curved segment 314 on the opposite side of the recessed portion 115C to determine the position of the centerline 124 of the recessed portion 115C, and compare it with the position of the centerline 125 of the first recessed portion 115C. The position of the first die 110 can be adjusted as needed until the offset measurement value is below a predetermined threshold. Although Figure 10 shows the first die 110, it should be understood that the second die 210 as described above may also include the semi-circular recessed portion 115C as shown in Figure 10.

[0060] In a further embodiment, the alignment features of the nonlinear first die 110 and second die 210 may include features of a sealing ring. Figure 11 is a top view of a portion of the first die 110 disposed on the first carrier structure 100 according to another embodiment of this disclosure. The first die 110 in the embodiment of Figure 1 includes a first die 110. The first die 110 in the embodiment of Figure 11 differs from the embodiments shown in Figures 8A to 10 in that the peripheral edge 115 of the first die 110 does not include a recessed portion 115C located in the side portion 115A of the first die 110. Figure 11 also shows the position of the aforementioned sealing ring 117 in the first die 110. As described above, the sealing ring 117 extends around the first die 110 near the peripheral edge 115 of the die and may have a shape corresponding to the shape of the first die 110. For example, in the embodiment shown in Figure 11, the sealing ring 117 may have a truncated quadrilateral shape including a side portion 117A connected by a corner portion 117B. The first die 110 shown in Figure 11 also includes a second sealing ring 119 located between the sealing ring 117 and the peripheral edge 115 of the first die 110. In other embodiments, the sealing ring 117 may be located between the second sealing ring 119 and the peripheral edge 115 of the first die 110. The second sealing ring 119 may have a similar shape to the sealing ring 117 and may include a side portion 119A connected by a corner portion 119B. The second sealing ring 119 may differ from the sealing ring 117 in that the second sealing ring 119 may include a recessed portion 119C extending inwardly from the side portion 119A of the second sealing ring 119. The position of each recessed portion 119C may correspond to the position of the first alignment mark 105 of the first carrier structure 100. The dimensions (including the depth and width of the recessed portion 119C) of the second sealing ring 119 can be equivalent to the dimensions of the recessed portion 115C along the peripheral edge 115 of the first die 110 as described above with reference to Figures 8A through 10. Furthermore, although the recessed portion 119C has a rectangular shape in the embodiment shown in Figure 11, it should be understood that the recessed portion 119C can have other shapes, such as triangular or semi-circular. Additionally, although Figure 11 shows an embodiment including multiple sealing rings 117 and 119, where one of the sealing rings includes the recessed portion 119C, it should be understood that in some embodiments, the first die 110 may include a single sealing ring that includes the recessed portion.

[0061] The placement and determination of the offset measurement value of the first die 110 can be similar to those described above with reference to Figures 8C and 8D. Specifically, an optical inspection system such as the IR inspection system 108 described above can be used to measure the position of the second sealing ring 119 on the opposite side of the recess 119C to determine the position of the centerline of the recess 119C. By measuring the position of the second sealing ring 119 at two positions on the opposite side of the recess 119C, measurement errors caused by optical defocusing problems in the IR inspection system 108 can be minimized. As described above, the position of the centerline of the recess 119C can be compared with the measured position of the centerline of the corresponding first alignment mark 105. The position of the first die 110 can be adjusted as needed until the offset measurement value is below a predetermined threshold. Although Figure 11 shows the first die 110, it should be understood that the second die 210 described above may also include a second sealing ring 119, which includes the recess 119C as shown in Figure 11.

[0062] Figure 12 is a top view of a portion of a first die 110 disposed on a first carrier structure 100 according to another embodiment of this disclosure. The first die 110 shown in Figure 12 is similar to the first die 110 of Figure 11, except that the sealing ring 117 in the embodiment of Figure 12 additionally includes a recess 117C extending inwardly from a side portion 117A of the second sealing ring 117. The position of the recess 117C of the sealing ring 117 may correspond to the position of the recess 119C of the second sealing ring 119 and to a corresponding first alignment mark 105 of the first carrier structure 100. The size and / or shape of the recess 117C of the sealing ring 117 may be the same as or different from the size and / or shape of the recess 119C of the second sealing ring 119. In some embodiments, the centerline of the recess 117C of the sealing ring 117 may be the same as the centerline of the corresponding recess 119C of the second sealing ring 119.

[0063] The placement and determination of the offset measurement value of the first die 110 can be similar to that described above with reference to Figure 11. In some embodiments, measurement errors caused by optical defocusing problems in the IR inspection system 108 can be further minimized by measuring the positions of the plurality of recesses 117C and 119C. In some embodiments, when the centerline positions of the recesses 117C and 119C are different, an average centerline position can be determined and compared with the measured position of the centerline of the corresponding first alignment mark 105, as described above. The position of the first die 110 can be adjusted as needed until the offset measurement value is below a predetermined threshold. Although Figure 12 shows the first die 110, it should be understood that the second die 210 as described above may also include a plurality of sealing rings 117 and 119, which include the recesses 117C and 119C as shown in Figure 12.

[0064] Figure 13 is a top view of a portion of a first die 110 disposed on a first carrier structure 100 according to another embodiment of this disclosure. In the embodiment of Figure 13, the first die 110 may include a plurality of nonlinear alignment features as described above, including a recess 115C along the peripheral edge 115 of the first die 110 and a recess 119C in the second sealing ring 119. One or both of the recesses 115C and 119C may be used to position the first die 110 on the first carrier structure 100, as described above. The configuration of Figure 13 may also be used for the second die 210 described above.

[0065] In another embodiment, the nonlinear alignment features of the first die 110 and the second die 210 may include outwardly protruding portions of the first peripheral edge of the first die 110 and the second peripheral edge 215 of the second die 210. Figure 14A is a top view of a portion of the first die 110 disposed on the first carrier structure 100 according to another embodiment of the present disclosure, which includes outwardly protruding portions 115D extending outward from a corresponding side 115A of the peripheral edge 115 of the first die 110. The outwardly protruding portion 115D in this embodiment includes a rectangular shape, the rectangular shape including a pair of segments 317 extending outward from the side 115A in a direction perpendicular to the direction of the side 115A and a connecting segment 318 extending between the pair of segments 317 in a direction perpendicular to the side 115A. The outwardly protruding portion 115D shown in Figure 14A can be formed using the same method as described above with reference to Figures 8A to 8D. The dimensions of the outwardly protruding portion 115D, including its depth (i.e., outward distance from the side portion 115A) and width, as well as the target offset distance between the side portion 115A and the first alignment mark 105, can be consistent with those described above with reference to Figure 8B. The position of the outwardly protruding portion 115D can correspond to the position of the first alignment mark 105 on the first carrier structure 100.

[0066] The placement and determination of the offset measurement value of the first die 110 can be the same as described above with reference to Figures 8C to 8D. Specifically, the optical detection system can measure the positions of a pair of segments 317 on opposite sides of the outwardly protruding portion 115D to determine the position of the centerline of the outwardly protruding portion 115D and compare it with the position of the centerline of the outwardly protruding portion 115D. The position of the first die 110 can be adjusted as needed until the offset measurement value is below a predetermined threshold. Although Figure 14A shows the first die 110, it should be understood that the second die 210 as described above may also include the outwardly protruding portion 115D as shown in Figure 14B.

[0067] Figure 14B is a top view of a portion of a first die 110 disposed on a first carrier structure 100 according to another embodiment of this disclosure. Referring to Figure 14B, the first die 110 in this embodiment includes an outwardly projecting portion 115D having a triangular shape. The outwardly projecting portion 115D may include a pair of segments 317 extending outwardly from a side portion 115A at an angle and intersecting at a apex. The dimensions of the outwardly projecting portion 115D and the first alignment mark 105, including the depth and width of the outwardly projecting portion 115D and the target offset distance D3 between the side portion 115A and the first alignment mark 105, may be the same as described above with reference to Figure 8B.

[0068] The placement and offset measurements of the first die 110 can be determined in the same manner as described above with reference to Figures 8C and 8D. Specifically, the optical detection system can measure the positions of a pair of segments 317 on opposite sides of the outwardly protruding portion 115D to determine the position of the centerline of the outwardly protruding portion 115D and compare it with the position of the centerline of the outwardly protruding portion 115D. Although Figure 14B shows the first die 110, it should be understood that the second die 210 as described above may also include a triangular outwardly protruding portion 115D as shown in Figure 14B. It should be understood that other shapes of the outwardly protruding portion 115D, such as a semi-circular shape, may also be used.

[0069] In some embodiments, the depth of the outwardly protruding portion 115B starting from the side 115A of the first die 110 may be greater than the offset distance D3 between the first alignment mark 105 and the side 115A of the first die 110. Figure 14C is a top view of a portion of the first die 110 disposed on the first carrier structure 100 according to an embodiment of the present disclosure, the first die 110 including an outwardly protruding portion 115D overlapping the corresponding first alignment mark 105 portion. Figure 14C is a top view of a portion of the first die 110 disposed on the first carrier structure 100 according to an embodiment of the present disclosure, the first die 110 including an outwardly protruding portion 115D overlapping the corresponding first alignment mark 105 portion. The outwardly protruding portion 115D in Figure 14C has a rectangular shape as described above with reference to Figure 14A. The placement of the first die 110 and the determination of the offset measurement can be the same as described above with reference to Figure 14A. Figure 14D is a top view of a portion of a first die 110 disposed on a first carrier structure 100 according to another embodiment of the present disclosure. The first die 110 includes an outwardly projecting portion 115D having a triangular shape that partially overlaps with a corresponding first alignment mark 105.

[0070] Figures 15A through 15C are top views of a portion of a first die 110 disposed on a first carrier structure 100 according to various additional embodiments of the present disclosure. The embodiment in Figure 15A is similar to that in Figure 14A, including an outwardly projecting portion 115D of the peripheral edge 115 of the first die 110 as described above, and also showing the position of a sealing ring 117 surrounding the periphery of the first die 110. In this embodiment, the sealing ring 117 includes a side portion 117A connected by a corner portion 117B, but the sealing ring 117 does not include nonlinear alignment features. Figure 15B shows an embodiment where both the peripheral edge 115 of the first die 110 and the sealing ring 117 include nonlinear alignment components 115D and 117D. The peripheral edge 115 of the first die 110 includes an outwardly projecting portion 115D corresponding to the position of the first alignment mark 105 as described above. The sealing ring 117 further includes an outwardly projecting portion 117D corresponding to the position of the first alignment mark 105. One or both of the outwardly protruding portions 115D and 117D can be used to position the first die 110 on the first carrier structure 100, as described above. Figure 15C illustrates an embodiment in which the sealing ring 117 includes the outwardly protruding portion 117D and the peripheral edge 115 of the first die 110 does not include nonlinear alignment features. The configuration of Figures 15A through 15C can also be used for the second die 210 described above.

[0071] Figures 16A through 16E are top views of a portion of a first die 110 disposed on a first carrier structure 100 according to various embodiments, showing various configurations of nonlinear alignment features in the peripheral edge 115 and the first alignment mark 105 of the first die 110. Figure 16A shows a first die 110 having a rectangular recessed portion 115C as described above. In this embodiment, the first alignment mark 105 includes two lines extending parallel to each other and perpendicular to adjacent sides 115A of the edge 115 of the first die 110. Figure 16B similarly shows a first alignment mark 105 including two parallel lines, wherein the peripheral edge 115 of the first die 110 in this embodiment includes a triangular recessed portion 115C.

[0072] Figure 16C illustrates a first die 110 having a rectangular recess 115C as described above. In this embodiment, the first alignment mark 105 comprises a circular shape. In the embodiment of Figure 1, referring to Figure 16D, the first die 110 includes a triangular recess 115C and the first alignment mark 105 comprises a circular shape. In the embodiment of Figure 16E, the first die 110 includes a rectangular recess 115C, and the first alignment mark 105 includes four points corresponding to the vertices of a square. In each embodiment shown in Figures 16A through 16E, the nonlinear alignment feature of the first die 110 (i.e., the recess 115C) and the first alignment mark 105 are symmetrical about their respective centerlines 124 and 125. The first die 110 can be positioned on the first carrier structure 100 by aligning the centerline 124 of the nonlinear alignment feature with the centerline 125 of the corresponding first alignment mark 105. The dimensions of the nonlinear alignment feature 115C and the first alignment mark 105 can be the same as those described in each embodiment shown in Figures 16A to 16E with reference to Figure 8B above. Any configuration of Figures 16A to 16E can also be used for the second wafer 210 and / or the second alignment mark 205 described above.

[0073] Figures 17A and 17B are top views of a portion of a first die 110 disposed on a first carrier structure 100 according to various embodiments of the present disclosure, showing discontinuous second sealing ring segments 119E having nonlinear alignment features 119C. Referring to Figure 17A, the first die 110 includes a peripheral edge 115 and a first sealing ring 117 excluding the nonlinear alignment features. The first die 110 further includes a plurality of discontinuous second sealing ring segments 119E, wherein each discontinuous second sealing ring segment 119E includes a nonlinear alignment feature. The discontinuous second sealing ring segments 119E may be discontinuous because they do not extend around the entire periphery of the first die 110. As shown in Figure 17A, the nonlinear alignment features include recesses 119C as described above with reference to Figures 11 through 13. Figure 17A shows a sealing ring 117 located between the peripheral edge 115 of the first die 110 and the discontinuous sealing ring segment 119E; however, it should be understood that the discontinuous sealing ring segment 119E may be located between the peripheral edges 115 of the first die 115. In other embodiments, the discontinuous sealing ring segment 119E may include an outwardly projecting portion 115D as described above with reference to Figures 15B and 15C. The recessed portion 119C and / or the outwardly projecting portion 117D may have any suitable shape, such as the rectangular shape, triangular shape, semi-circular shape, etc., shown in Figure 17A.

[0074] While Figure 17A shows each discontinuous sealing ring segment 119E comprising a single nonlinear alignment feature, in other embodiments, the first die 110 may include at least one discontinuous sealing ring segment 119E comprising multiple nonlinear alignment features. Figure 17B illustrates an alternative embodiment in which the discontinuous sealing ring segment 119E includes two nonlinear alignment features (i.e., recessed portions 119C), each corresponding to the position of a different alignment mark 105 of the first carrier structure 100. In this embodiment, the discontinuous sealing ring segment 119E is located near a corner portion 115B of the first die 110. In various embodiments, the configuration shown in either Figure 16A or Figure 17B may also be used for the second die 210 described above.

[0075] Figure 18 is a flowchart illustrating a method 400 for manufacturing a bonded die structure 160 according to various embodiments of the present disclosure. Referring to Figures 2 and 8A through 18, in step 401 of method 400, a first die 110 may be positioned over a first carrier structure 100 including a first alignment mark 105, wherein the first die 110 includes a peripheral edge 115, the peripheral edge 115 including a side portion 115A and nonlinear alignment features 115C, 115D, 117C, 117D, 118C, 119C positioned along the side portion 115A of the peripheral edge 115 of the first die 110. Referring to Figures 2 and 8A through 18, in step 403 of method 400, optical detection systems 106 and 108 can be used to measure the positions of nonlinear alignment features 115C, 115D, 117C, 117D, 118C, and 119C on opposite sides of the nonlinear alignment features 115C, 115D, 117C, 117D, 118C, and 119C to determine the position of the centerline 124 of the nonlinear alignment features 115C, 115D, 117C, 117D, 118C, and 119C. Referring to Figures 2 and 8A through 18, in step 405 of method 400, the offset distance between the position of the centerline 124 of the nonlinear alignment features 115C, 115D, 117C, 117D, 118C, and 119C and the position of the centerline 125 of the first alignment mark 105 can be determined. Referring to Figures 2 and 8A through 18, in step 407 of method 400, the position of the first bare die 110 relative to the first carrier structure 100 can be adjusted until the offset distance is below a threshold.

[0076] Referring to all the accompanying drawings and according to various embodiments of the present disclosure, the bonded die structure 160 includes a first die 110 having a peripheral edge 115, the peripheral edge 115 including a side portion 115A and nonlinear alignment features 115C, 115D, 117C, 117D, 118C, 119C positioned along the side portion 115A of the peripheral edge 115 of the first die 110, and a second die 210 bonded to the first die 110.

[0077] In one embodiment, the peripheral edge 115 of the first bare die 110 includes a first side portion 115A extending along a first direction hd1 and a second side portion 115A extending along a second direction hd2 perpendicular to the first direction hd1, wherein first nonlinear alignment features 115C, 115D, 117C, 117D, 118C, and 119C are positioned along the first side portion 115A, and second nonlinear alignment features 115C, 115D, 117C, 117D, 118C, and 119C are positioned along the second side portion 115A.

[0078] In another embodiment, the peripheral edge 115 of the first bare die 110 includes a truncated quadrilateral shape comprising four sides 115A and corners 115B extending between adjacent sides 115A, wherein at least two nonlinear alignment features 115C, 115D, 117C, 117D, 118C, 119C are positioned along each side.

[0079] In another embodiment, the nonlinear alignment feature includes a recessed portion 115C extending inward from a side portion 115A of the peripheral edge 115 of the first die 110. In another embodiment, the width D2 of the recessed portion 115A along a direction parallel to the side portion 115A of the peripheral edge 115 of the first die 110 is greater than the depth D1 of the recessed portion 115A along a direction perpendicular to the side portion. In another embodiment, the horizontal cross-sectional shape of the recessed portion 115A is rectangular, triangular, or semi-circular. In another embodiment, the nonlinear alignment feature includes an outwardly projecting portion 115D extending outward from the side portion 115A of the peripheral edge 115 of the first die 110. 115D is rectangular, triangular, or semi-circular. In another embodiment, the nonlinear alignment feature includes an outwardly projecting portion 115D extending outward from the side portion 115A of the peripheral edge 115 of the first die 110. In another embodiment, the horizontal cross-sectional shape of the outwardly projecting portion 115D is rectangular, triangular, or semi-circular. In another embodiment, the nonlinear alignment feature includes recessed portions 117C and 119C of the sealing ring structures 117, 119, and 119E of the first die 110. In another embodiment, the nonlinear alignment feature includes outwardly protruding portions 117D of the sealing ring structures 117, 119, and 119E of the first die 110. In another embodiment, the peripheral edge 115 of the first die 110 has a non-perpendicular profile. In another embodiment, the bonding die structure 160 further includes a carrier structure 200, a second die 210 located between the carrier structure 200 and the first die 110, and gap-filling dielectric materials 130 and 230 laterally surrounding the first and second dies 110. In another embodiment, the second die 210 includes a peripheral edge 215, the peripheral edge 215 including at least one side 115A and nonlinear alignment features 115C, 115D, 117C, 117D, 118C, 119C positioned along at least one side 115A of the peripheral edge 215 of the second die 210.

[0080] Another embodiment depicts a bonding element structure 160, which includes a first die 110, a second die 210 including a peripheral edge 215, the peripheral edge 215 including a side portion 215 and nonlinear alignment features 115C, 115D, 117C, 117D, 118C, 119C positioned along the side portion 115A of the peripheral edge 215 of the second die 210, and gap-filling dielectric materials 130, 230 laterally surrounding the peripheral edge 215 of the second die 210.

[0081] In one embodiment, the joining device structure 160 further includes an alignment mark structure 216 formed within the gap-filling dielectric materials 130, 230, wherein the centerline of the alignment mark structure 216 intersects with nonlinear alignment features 115C, 115D, 117C, 117D, 118C, 119C positioned along the side 115A of the peripheral edge 215 of the second die 210. In another embodiment, the nonlinear alignment features include an outwardly projecting portion 115D extending outward from the side 115A of the peripheral edge 215 of the second die 210, and the outwardly projecting portion 115D at least partially overlaps with the alignment mark structure 216.

[0082] Another embodiment relates to a method of manufacturing a bonded die structure 160, the method comprising positioning a first die 110 over a first carrier structure 100 including a first alignment mark 105, wherein the first die 110 includes a peripheral edge 115 having a side 115A and first nonlinear alignment features 115C, 115D, 117C, 117D, 118C, 119C positioned along the side 115A of the peripheral edge 115 of the first die 110, and measuring the first nonlinear alignment features 115C, 115D, 117C, 117D, 118C, 119C using optical inspection systems 106, 108. The position of 9C on the opposite side of the first nonlinear alignment features 115C, 115D, 117C, 117D, 118C, and 119C is used to determine the position of the center line 124 of the first nonlinear alignment features 115C, 115D, 117C, 117D, 118C, and 119C, the offset distance between the center line 124 of the first nonlinear alignment features 115C, 115D, 117C, 117D, 118C, and 119C and the center line 125 of the first alignment mark 105, and the position structure 100 of the first bare die 110 relative to the first carrier is adjusted until the offset distance is lower than a threshold.

[0083] In one embodiment, the method further includes forming a first dielectric material layer 130 over the first carrier structure 100 and laterally surrounding the first bare die 110 disposed on the first carrier structure 100 to form a second alignment mark 205, positioning the second bare die 210 above the first bare die 110. The second bare die 210 includes a peripheral edge 215, the peripheral edge 215 including a side portion 115A and second nonlinear alignment features 115C, 115D, 117C, 117D, 118C, 119C positioned along the side portion 115A of the first bare die. The second nonlinear alignment features 115C, 115D, 117C, 118C, 119C are measured using optical detection systems 106, 108. The positions of 5C, 115D, 117C, 117D, 118C, and 119C on opposite sides of the second nonlinear alignment features 115C, 115D, 117C, 117D, 118C, and 119C are determined to locate the center line 124 of the second nonlinear alignment features 115C, 115D, 117C, 117D, 118C, and 119C, determine the offset distance between the center line 124 of the second nonlinear alignment features 115C, 115D, 117C, 117D, 118C, and 119C and the center line 125 of the second alignment mark 205, and adjust the position of the second wafer relative to the first wafer until the offset distance is below a threshold. In another embodiment, the method further includes bonding a second bare die 210 to a first bare die 110, forming a second dielectric material layer 230 over a first dielectric material layer 130 and laterally surrounding the second bare die 210, transferring the first bare die 110, the first dielectric material layer 130, the second bare die 210, and the second dielectric layer 230 from a first carrier structure 100 to a second carrier structure 200 such that the second bare die 210 is located between the first bare die 110 and the second carrier structure 200, and performing a dicing process through the first dielectric material layer 130, the second dielectric layer 230, and the second carrier structure 200 to form a bonding device structure 160. In another embodiment, the second bare die 210 is bonded to the first bare die 110 using dielectric-to-dielectric (DD) and metal-to-metal (MM) direct bonding techniques.

[0084] The foregoing has outlined features of several embodiments to enable those skilled in the art to better understand various aspects of this disclosure. Those skilled in the art should understand that they can readily use this disclosure as a basis for designing or modifying other processes and structures to achieve the same purposes and / or advantages as the embodiments described herein. Those skilled in the art should also recognize that such equivalent constructions do not depart from the spirit and scope of this disclosure, and that they can make various changes, substitutions, and alterations without departing from the spirit and scope of this disclosure.

[0085] 100: First carrier structure 102: Side 103: Side 105: Alignment Mark 106: Optical Measurement System 107: Pick up and place tools 108: Infrared Inspection System 110: Bare Crystal 111:Substrate 112: Side 113: Interconnection Structure 114: Side 115: Outer edge 115A: Side 115B: Corner 115C: Recessed portion, nonlinear alignment feature 115D: Outwardly protruding portion, nonlinear alignment feature 117: Sealing ring 117A: Side 117B: Corner 117C: Recessed portion, nonlinear alignment feature 117D: Outwardly protruding portion, nonlinear alignment feature 118: Interconnection Structure 118C: Nonlinear Alignment Features 119: Sealing ring 119A: Side 119B: Corner 119C: Recessed portion, nonlinear alignment feature 119E: Sealing ring section 124: Centerline 125: Centerline 128: Surface 130: Dielectric materials 131: Bonding layer 132: Dielectric layer 133: Joint Pad 150: Stacking device structure 157: Supporting Structure 160: Bonded bare crystal structure 200: Carrier Structure 205: Alignment Mark 210: Bare Crystal 211:Substrate 213: Interconnection Structure 215: Outer edge 216: Alignment Mark Structure 217: Sealing ring 225: Welding ball 228: Surface 230: Dielectric materials 231: Bonding layer 232: Dielectric layer 233: Joint Pad 301: Dashed line 301L: Dashed line 301R: Dashed line 303: Dashed line 303L: Dashed line 303R: Dashed line 311: Section 311L: Section 311R: Section 313: Section 314: Section 317: Section 318: Section 400: Steps 401: Steps 403: Steps 405: Steps 407: Steps B: Area D1: Depth D2: Width D3: Offset Distance D4: External width dimension D5: External width dimension D6: Internal width dimension D7: Internal width dimension doff: offset distance hd1: First horizontal direction hd2: First horizontal direction

Claims

1. A bonded bare-crystal structure, comprising: A first die, including a peripheral edge, the peripheral edge including a side portion and a nonlinear alignment feature positioned along the side portion of the peripheral edge of the first die; a second die, bonded to the first die; and an alignment mark structure adjacent to the nonlinear alignment feature, wherein a center line of the alignment mark structure intersects the nonlinear alignment feature positioned along the side portion of the peripheral edge of the first die.

2. The bonding die structure as described in claim 1, wherein the peripheral edge of the first die includes a first side extending along a first direction and a second side extending along a second direction perpendicular to the first direction, wherein a first nonlinear alignment feature is positioned along the first side and a second nonlinear alignment feature is positioned along the second side.

3. The bonding bare die structure as claimed in claim 1, wherein the peripheral edge of the first bare die includes a truncated quadrilateral shape, the truncated quadrilateral shape including four sides and corners extending between adjacent sides, wherein at least two nonlinear alignment features are positioned along each side.

4. The bonded bare die structure as claimed in claim 1, wherein the nonlinear alignment feature includes a recessed portion extending inward from the side of the peripheral edge of the first bare die.

5. A bonded bare-crystal structure, comprising: The first bare crystal; A second bare die includes a peripheral edge, the peripheral edge including a side portion and a nonlinear alignment feature positioned along the side portion of the peripheral edge of the second bare die; a gap-filling dielectric material laterally surrounding the peripheral edge of the second bare die; and an alignment mark structure formed within the gap-filling dielectric material, wherein a center line of the alignment mark structure intersects the nonlinear alignment feature positioned along the side portion of the peripheral edge of the second bare die.

6. The bonding bare die structure as claimed in claim 5, wherein the nonlinear alignment feature includes an outwardly projecting portion extending outward from the side of the peripheral edge of the second bare die, and the outwardly projecting portion at least partially overlaps the alignment mark structure.

7. A method for manufacturing a bonded bare-crystal structure, comprising: A first die is positioned above a first carrier structure including a first alignment mark, wherein the first die includes a peripheral edge, the peripheral edge including a side portion and a first nonlinear alignment feature positioned along the side portion of the peripheral edge of the first die, wherein a center line of the first alignment mark intersects the first nonlinear alignment feature positioned along the side portion of the peripheral edge of the first die; the position of the first nonlinear alignment feature on the opposite side of the first nonlinear alignment feature is measured using an optical detection system to determine a position of a center line of the first nonlinear alignment feature; an offset distance between the center line of the first nonlinear alignment feature and the center line of the first alignment mark is determined; and the position of the first die relative to the first carrier structure is adjusted until the offset distance is below a threshold.

8. The method as described in claim 7, further comprising: A first dielectric material layer is formed above the first carrier structure and laterally surrounds the first bare crystal disposed on the first carrier structure; A second alignment mark is formed; a second die is positioned above the first die, the second die including a peripheral edge, the peripheral edge including a side portion and a second nonlinear alignment feature positioned along the side portion of the peripheral edge of the second die; the position of the second nonlinear alignment feature on the opposite side of the first die is measured using an optical detection system to determine a position of a center line of the second nonlinear alignment feature; an offset distance between the center line of the second nonlinear alignment feature and a center line of the second alignment mark is determined; and the position of the second die relative to the first die is adjusted until the offset distance is below a threshold.

9. The method as described in claim 8, further comprising: The second bare die is bonded to the first bare die; A second dielectric material layer is formed above the first dielectric material layer and laterally surrounds the second bare die; the first bare die, the first dielectric material layer, the second bare die, and the second dielectric layer are transferred from the first carrier structure to the second carrier structure, such that the second bare die is located between the first bare die and the second carrier structure; and a cutting process is performed through the first dielectric material layer, the second dielectric layer, and the second carrier structure to form the bonded bare die structure.

Images