Semiconductor device manufacturing method, semiconductor device, substrate processing equipment and process

Abstract

[The technical problem to be solved] This provides a technology that can suppress voids when embedding underfill material between a substrate and a semiconductor wafer. Technical means to solve the problem The method includes: a process of forming microbumps on a first surface of the substrate on which the semiconductor wafer is bonded when bonding a semiconductor wafer onto a substrate; a process of forming microbumps on a second surface of the semiconductor wafer on which the substrate is bonded; a process of forming an insulating film on the first surface, the second surface, and the microbumps; a process of removing the insulating film formed on the connection surface of the microbumps; and a process of bonding the connection surfaces of the microbumps on the first surface and the second surface to each other.

Description

[Technical Field]

[0001] This disclosure relates to a method for manufacturing a semiconductor device, a semiconductor device, a substrate processing apparatus and a program. [Previous Technology]

[0002] As part of the manufacturing process of semiconductor devices (equipment), there is a technique for forming a film on a substrate by supplying a processing gas to a substrate inside a processing container (e.g., Patent Document 1). [Prior Art Documents] [Patent Documents]

[0003] [Patent Document 1] International Publication No. 2022 / 064586 [Summary of the Invention]

[0004] [Problem to be solved by the invention] In one of the manufacturing processes of a semiconductor device in which a bottom filler is embedded between a substrate and a semiconductor wafer, a void may occur.

[0005] This disclosure provides a technique for suppressing voids generated when embedding underfill material between a substrate and a semiconductor wafer. [Means for solving the problem]

[0006] According to one aspect of the present disclosure, a technique is provided comprising: a process of forming microbumps on a first surface of the substrate on which the semiconductor wafer is bonded during bonding to a substrate; a process of forming microbumps on a second surface of the semiconductor wafer on which the substrate is bonded to the substrate; a process of forming an insulating film on the first surface, the second surface, and the microbumps; a process of removing the insulating film formed on the connection surfaces of the microbumps; and a process of bonding the connection surfaces of the microbumps on the first surface and the second surface to each other. [Effects of the Invention]

[0007] By means of this disclosure, it is possible to suppress the generation of voids when embedding the underfill material between the substrate and the semiconductor wafer.

Implementation Method

[0009] Hereinafter, one aspect of this disclosure will be explained with reference to Figures 1 to 7. Furthermore, the figures used in the following explanation are illustrative, and the dimensional relationships and ratios of the elements shown may not necessarily correspond to reality. Moreover, the dimensional relationships and ratios of elements may not necessarily be consistent across multiple figures. Furthermore, in multiple figures, substantially the same elements are labeled with the same symbol, and the element is explained in the figure where it first appears; in subsequent figures, the explanation will be omitted unless otherwise necessary. Furthermore, this disclosure is not limited to any of the following aspects, and appropriate modifications may be made within the scope of this disclosure.

[0010] (1) Semiconductor device manufacturing engineering

[0011] First, referring to Figures 1(A) to 1(E), a detailed description of one aspect of the manufacturing process of the semiconductor device 101 involved in this disclosure will be provided.

[0012] (Microbump Formation Process, Step S1) As shown in FIG1(A), microbumps 14 are respectively provided (also referred to as formed) on the surface of the substrate 10 on the bonding surface side where it is bonded to the semiconductor wafer 12 (hereinafter referred to as the surface of the substrate 10 or the first surface) and on the surface of the semiconductor wafer 12 on the bonding surface side where it is bonded to the substrate 10 (hereinafter referred to as the surface of the semiconductor wafer 12 or the second surface). Although the illustration is omitted here, since multiple types of films such as insulating films and metal films are formed on the surface of the substrate 10 and the surface of the semiconductor wafer 12, and components are set thereon, the surface materials of the first surface and the second surface are different. On the surface of the substrate 10, microbumps 14 are provided at positions corresponding to the microbumps 14 on the surface of the semiconductor wafer 12 at the same intervals as the microbumps 14 on the surface of the bonded semiconductor wafer 12. The microbumps 14 are, for example, tin (Sn) alloys, silver (Ag) alloys, AgSn alloys, etc. Here, the surface of the substrate 10 bonded to the semiconductor wafer 12 is also referred to as the first surface. While the first surface includes at least the surface of the substrate, it is not limited thereto; it may also include at least any one of a plurality of films or elements, such as insulating films or metal films, present on the surface of the substrate. Furthermore, the surface of the semiconductor wafer 12 bonded to the substrate 10 is also referred to as the second surface. While the second surface includes at least the surface of the semiconductor wafer 12, it is not limited thereto; it may also include at least any one of a plurality of films or elements, such as insulating films or metal films, present on the surface of the semiconductor wafer 12.

[0013] (Insulating film formation process, step S2). Next, as shown in FIG1(B), using, for example, the substrate processing apparatus 100 described later, an insulating film 16 is formed on the surface of the substrate 10 on which microbumps 14 are respectively provided and on the surface of the semiconductor wafer 12, and on the first surface, the second surface, and the microbumps 14, by a film formation method such as ALD (Atomic Layer Deposition) or CVD (Chemical Vapor Deposition). The thickness of the insulating film 16 formed in this process is 50 nm or less. Furthermore, the insulating film 16 formed in this process is a film that can be formed on the insulating film, metal film, and microbumps 14 on the surface of the substrate 10 and the surface of the semiconductor wafer 12.

[0014] (Insulating film removal process, step S3). Next, as shown in FIG1(C), the insulating film 16 formed on the top of the microbump 14 is removed, exposing the top of the microbump 14, which is the connection surface of the microbump 14 on the surface of the substrate 10 and the semiconductor wafer 12. The insulating film 16 formed on the top of the microbump 14 is removed by CMP (Chemical Mechanical Polishing). In addition, this process is not limited to CMP, and the insulating film 16 formed on the top of the microbump 14 can also be removed by dry etching. Dry etching is performed by forming photoresist on the part where, for example, the top of the microbump 14 is removed, and removing the insulating film 16 formed on the top where no photoresist is formed.

[0015] (Bonding process, step S4) Next, as shown in FIG1(D), the top of the microbump 14 of the substrate 10 and the top of the microbump 14 of the semiconductor wafer 12, that is, the connecting surfaces of the microbump 14 on the first and second surfaces, are joined together. At this time, an insulating film 16 is formed on the surface of the substrate 10 that is joined to the semiconductor wafer 12, the surface of the semiconductor wafer 12 that is joined to the substrate 10, and the surface of the microbump 14, that is, the exposed surface where the underfill material is embedded.

[0016] (Underfill film formation process, step S5) Next, as shown in FIG1(E), an insulating film 16 is formed on the exposed surface where the underfill material is embedded. An underfill film 18 is formed by embedding the underfill material between the substrate 10 and the semiconductor wafer 12, which are bonded by the microbumps 14. The underfill material is, for example, a resin. As the resin, epoxy resin is used, for example.

[0017] As described above, the semiconductor device 101 is formed by covering the surfaces of the substrate 10 and the semiconductor wafer 12 and the surface of the microbump 14 between the substrate 10 and the semiconductor wafer 12 after the microbump 14 is bonded with the substrate 10 and the semiconductor wafer 12 with the insulating film 16, and filling the bottom filler film 18 on the surface of the insulating film 16.

[0018] Here, after the substrate 10 and the semiconductor wafer 12 are bonded by the microbumps 14, if an underfill material is buried between the substrate 10 and the semiconductor wafer 12, gaps due to poor burial may occur. This is believed to be because multiple components are provided on the surfaces of the substrate 10, the semiconductor wafer 12, and the microbumps 14, which are the exposed surfaces where the underfill material is buried. When attempting to bury the underfill material, the multiple components become obstacles, making it difficult to bury it uniformly. Therefore, it is believed that the wettability of the underfill material will vary. It is believed that these phenomena become more pronounced as the gap between the substrate 10 and the semiconductor wafer 12 where the underfill material is buried is miniaturized. In this disclosure, before burying the underfill material, an insulating film 16 is formed on the exposed surfaces of the substrate 10, the semiconductor wafer 12, and the microbumps 14 where the underfill material is buried. As a result, since at least the surface where the underfill material is buried is covered by the insulating film, the underfill material can be supplied uniformly. Therefore, the wettability of the surfaces of the substrate 10, semiconductor wafer 12, and microbumps 14 is kept consistent, and voids can be suppressed when the bottom filler is embedded. As a result, the strength and heat dissipation of the semiconductor device 101 can be improved, the high resistance can be suppressed, and the durability and electrical characteristics of the semiconductor device 101 can be enhanced.

[0019] (2) Configuration of the substrate processing apparatus FIG2 is a configuration diagram showing an example of the substrate processing apparatus 100 used in the insulating film formation process of step S2 described above. In addition, in the substrate processing apparatus 100, in the process of forming insulating films on the surface of the substrate 10 and the surface of the semiconductor wafer 12 respectively, the substrate 10 and the semiconductor wafer 12 can be processed separately or simultaneously. In the following, the case of using the substrate 10 will be described.

[0020] The substrate processing apparatus 100 includes a container 202. Within the container 202, a processing space 205 for processing the substrate 10 and a transport space 206 through which the substrate 10 passes when being transported to the processing space 205 are formed. The container 202 is composed of an upper container 202a and a lower container 202b. A partition plate 208 is provided between the upper container 202a and the lower container 202b.

[0021] A substrate loading / unloading outlet 148 adjacent to the gate valve 149 is provided on the side of the lower container 202b. The substrate 10 moves between the substrate loading / unloading outlet 148 and the transport chamber (not shown). A lifting pin 207 is provided at the bottom of the lower container 202b. Furthermore, the lower container 202b is grounded.

[0022] In the processing space 205, a substrate support 210 for supporting the substrate 10 is disposed. The substrate support 210 mainly has a substrate mounting surface 211 for mounting the substrate 10, a substrate mounting stage 212 that holds the substrate mounting surface 211 on its surface, and a heater 213 that serves as a heating part disposed in the substrate mounting stage 212. Even in the substrate mounting stage 212, through holes 214 through which lifting pins 207 pass are respectively disposed at positions corresponding to the lifting pins 207.

[0023] The substrate mounting stage 212 is supported by a shaft 217. The shaft 217 passes through the bottom of the container 202 and is connected to the lifting mechanism 218 outside the container 202.

[0024] The transmission shaft 217 and the substrate mounting stage 212 are raised and lowered by actuating the lifting unit 218. The substrate mounting stage 212 is configured to raise and lower the substrate 10 placed on the substrate mounting surface 211. In addition, the lower end of the shaft 217 is covered by a bellows 219, thereby keeping the processing space 205 airtight.

[0025] When the substrate 10 is transported, the substrate placement surface 211 of the substrate placement stage 212 is lowered to a position facing the substrate loading and unloading outlet 148. When the substrate 10 is processed, as shown in FIG1, the substrate 10 is raised to a processing position within the processing space 205.

[0026] A spray head 230, serving as a gas dispersion mechanism, is provided on the upper part (upstream side) of the processing space 205. A through hole 231a is provided in the cover 231 of the spray head 230. The through hole 231a communicates with the common gas supply pipe 242 described later. A buffer chamber 232a, having a buffer space 232, is provided inside the spray head 230. The buffer space 232 is configured to supply gas to the processing space 205.

[0027] A rectifier plate 270 is provided in the buffer space 232. The rectifier plate 270 is a conical shape with a diameter that widens radially toward the substrate 10, centered on the gas inlet hole 241. The lower edge of the rectifier plate 270 is configured to be located further outward than the end of the substrate 10. The rectifier plate 270 is configured to allow the supplied gas to move more efficiently toward the direction of the dispersion plate 234, which will be described later.

[0028] The upper container 202a has a flange, on which a support block 233 is mounted and fixed. On the support block 233, a dispersion plate 234 having a plurality of gas supply holes is mounted and fixed. Furthermore, the cover 231 is fixed to the support block 233.

[0029] Next, the gas supply system 240, which is the gas supply unit, will be described. The first gas supply pipe 243a, the second gas supply pipe 244a, the third gas supply pipe 245a, and the fourth gas supply pipe 248a are connected to the common gas supply pipe 242.

[0030] In the first gas supply pipe 243a, a first gas source 243b, a mass flow controller (MFC) 243c which serves as a flow controller (flow control unit) and a valve body 243d which serves as a switching valve are arranged sequentially from the upstream direction.

[0031] The first gas source 243b is the supply source of the raw material gas. The raw material gas is one of the processing gases.

[0032] The first gas supply system 243 (also known as the raw material gas supply system or silicon-containing gas supply system) is mainly composed of the first gas supply pipe 243a, MFC 243c, and valve body 243d. The first gas supply system 243 may also include the first gas source 243b.

[0033] In the second gas supply pipe 244a, a second gas source 244b, an MFC 244c and a valve body 244d are sequentially arranged from upstream.

[0034] The second gas source 244b is a supply source of the reaction gas that reacts with the raw material gas. The reaction gas is one of the processing gases.

[0035] The second gas supply system 244 (also known as a reaction gas supply system, oxidation gas supply system, or oxygen-containing gas supply system) is mainly composed of the second gas supply pipe 244a, MFC 244c, and valve body 244d. Furthermore, the second gas supply system 244 may also include a second gas source 244b.

[0036] In the third gas supply pipe 245a, a third gas source 245b, an MFC 245c and a valve body 245d are sequentially arranged from upstream.

[0037] The third gas source 245b is the supply source of reducing gas. The reducing gas is one of the processing gases.

[0038] The third gas supply system 245 (also known as the reducing gas supply system) is mainly composed of the third gas supply pipe 245a, MFC 245c, and valve body 245d. The third gas supply system 245 may also include a third gas source 245b.

[0039] In the fourth gas supply pipe 248a, the fourth gas source 248b, MFC 248c and valve body 248d are arranged sequentially from upstream.

[0040] The fourth gas source 248b is a source of inert gas supply.

[0041] The fourth gas supply system 248 (also known as the inert gas supply system) is mainly composed of the fourth gas supply pipe 248a, MFC 248c, and valve body 248d. The fourth gas supply system 248 may also include the fourth gas source 248b.

[0042] The inert gas supplied from the fourth gas source 248b serves as a purge gas in the substrate processing process to purge the gas accumulated in the container 202 or the spray head 230.

[0043] In this sample, any one or a combination of the first gas supply system 243, the second gas supply system 244, the third gas supply system 245, and the fourth supply system 248 is referred to as a gas supply system.

[0044] The processing space 205 is connected to the exhaust pipe 262 via the exhaust buffer structure 261. The exhaust buffer structure 261 is circumferentially arranged to surround the outer edge of the substrate 10. In this example, it is disposed between the partition plate 208 and the upper container 202a.

[0045] The exhaust pipe 262 is connected to the upper container 202a on the upper side of the exhaust buffer structure 261, in a manner that communicates with the processing space 205 via the exhaust buffer structure 261. The exhaust pipe 262 is equipped with an APC (Auto Pressure Controller) 266, which acts as a pressure controller to maintain a specific pressure within the processing space 205. The APC 266 has a valve body (not shown) with adjustable opening, which adjusts the conductivity of the exhaust pipe 262 in response to instructions from the controller 400 described later.

[0046] Furthermore, a valve body 267 is provided upstream of the APC 266 in the exhaust pipe 262. A vacuum pump 269 is also provided downstream of the exhaust pipe 262. The vacuum pump 269 exhausts the atmosphere of the exhaust treatment space 205 via the exhaust pipe 262. The exhaust pipe 262, valve body 267, and APC 266 are collectively referred to as the exhaust system. The exhaust system may also include the vacuum pump 269.

[0047] (3) Control configuration Next, the control unit (control means) that controls the operation of each part of the control board device 100 will be described with respect to the controller 400.

[0048] Figure 3 shows a schematic of the controller 400. The controller 400 is configured as a computer having a CPU (Central Processing Unit) 401, RAM (Random Access Memory) 402, a memory device 403 as a memory unit, and an I / O port 404. The RAM 402, memory device 403, and I / O port 404 are configured to exchange data with the CPU 401 via an internal bus 405.

[0049] The controller 400 is configured to connect to an input / output device 281, which is configured as, for example, a touch panel, or an external memory device 282.

[0050] The display device 284 displays the data detected by each monitoring unit. Furthermore, although this embodiment is described using the input / output device 281 and other components, it is not limited to this. For example, if the input / output device also functions as a touch panel or other display screen, the input / output device 281 and the display device 284 can be considered as a single component.

[0051] The memory device 403 is composed of, for example, flash memory, HDD (Hard Disk Drive), etc. Within the memory device 403, process recipes that control the programs or conditions described later for the substrate processing are stored in a readable manner, or formulas and data that serve as control programs to achieve the operation of the control substrate processing device. Furthermore, the formulas are used to cause the controller 400 to execute various programs in the substrate processing process described later, combining them to achieve specific results, and function as programs. Hereinafter, these formulas or control programs are collectively referred to as programs. Additionally, in this specification, the use of the term "program" may include only a process recipe unit, only a control program unit, or both. Furthermore, the RAM 402 is configured as a memory area (working area) that temporarily holds programs or data read by the CPU 401.

[0052] I / O port 404 is connected to various components of the board processing device 100, including gate valve 149, lifting mechanism 218, APC 266, vacuum pump 269, MFC 243c, 244c, 245c, 248c, valve body 243d, 244d, 245d, 248d, 267, heater 213, etc.

[0053] The CPU 401 is configured to read the control program from the memory device 403 and simultaneously read the formula from the memory device 403 in response to the input of operation instructions from the input / output device 281. Furthermore, the CPU 401 is configured to control the opening and closing of the gate valve 149, the lifting and lowering of the lifting mechanism 218, the opening and closing of the APC 266, the opening and closing of the vacuum pump 269, the flow adjustment of MFCs 243c, 244c, 245c, and 248c, the opening and closing of valve bodies 243d, 244d, 245d, 248d, and 267, and the temperature control of the heater 213, etc., according to the contents of the read formula.

[0054] Furthermore, the controller 400 can be configured as described in this embodiment by using an external memory device (e.g., a magnetic disk such as a hard drive, an optical disk such as a DVD, a magneto-optical disk such as an MO, a semiconductor memory such as a USB memory) 282 storing the aforementioned program to install programs on a computer. Furthermore, the means of supplying programs to the computer are not limited to supplying them via the external memory device 282. For example, even using communication means such as a network or dedicated line, programs can be supplied without using the external memory device 282. Additionally, the memory device 403 or the external memory device 282 is constructed as a computer-readable memory medium containing a program. Hereinafter, these will also be collectively referred to as recording media. Furthermore, in this specification, the term "recording media" may refer only to the memory device 403, only to the external memory device 282, or both.

[0055] (4) Substrate Processing Next, as part of the semiconductor manufacturing process, the process of forming the insulating film 16 in step S2 using the substrate processing apparatus 100 will be described in detail. Furthermore, in the following description, the operation of each component constituting the substrate processing apparatus 100 is controlled by the controller 400. Moreover, the process of forming the insulating film 16 on the surface of the substrate 10 is the same as the process of forming the insulating film 16 on the surface of the semiconductor wafer 12. In the following description, the phrase "substrate 10" can be replaced with the phrase "semiconductor wafer 12". The process of forming the insulating film 16 on the surface of the substrate 10 will be described below.

[0056] Furthermore, in this specification, the term "substrate" may mean "the substrate itself" or "a laminate (assembly) of the substrate and specific layers or films formed on its surface" (i.e., a substrate including specific layers or films formed on its surface). Moreover, in this specification, the term "surface of the substrate" may mean "the surface (exposed surface) of the substrate itself" or "the surface of the specific layers or films formed on the substrate, which is the outermost surface of the substrate as a laminate."

[0057] Therefore, in this specification, the phrase "supplying a specific gas to the substrate" may mean "directly supplying a specific gas to the surface (exposed surface) of the substrate itself," or "supplying a specific gas to the layer or film formed on the substrate, that is, to the outermost surface of the substrate as a laminate." Furthermore, in this specification, the phrase "forming a specific layer (or film) on the substrate" may mean "forming a specific layer (or film) directly on the surface (exposed surface) of the substrate itself," or "forming a specific (or film) on top of the layer or film formed on the substrate, that is, on the outermost surface of the substrate as a laminate."

[0058] In addition, the use of the term "wafer" in this specification is the same as the use of the term "substrate". In this case, "substrate" can be replaced with "wafer" in the above description.

[0059] (Substrate loading and placement process) By lowering the substrate loading stage 212 to the transport position, the lifting pin 207 passes through the through hole 214 of the substrate loading stage 212. As a result, the lifting pin 207 protrudes from the surface of the substrate loading stage 212 by only a specific height. Next, the gate valve 149 is opened, and the substrate 10 is loaded into the processing space 205 using a substrate transfer machine, and the substrate 10 is transferred onto the lifting pin 207. Thus, the substrate 10 is supported in a horizontal position on the lifting pin 207 protruding from the surface of the substrate loading stage 212.

[0060] If the substrate 10 is moved into the container 202, the substrate transfer machine is moved away from the outside of the container 202, and the gate valve 149 is closed to seal the container 202. Then, by raising the substrate mounting stage 212, the substrate 10 is mounted on the substrate mounting surface 211 of the substrate mounting stage 212.

[0061] Furthermore, when the substrate 10 is moved into the container 202, it is preferable to supply inert gas into the container 202 simultaneously with the exhaust system to vent the contents of the container 202 and the fourth gas supply system 248. That is, it is preferable to supply inert gas into the container 202 by at least opening the valve 248d of the fourth gas supply system 248 while the vacuum pump 269 is activated and the APC 266 is opened to vent the contents of the container 202. Moreover, the vacuum pump 269 is kept in a state of continuous operation at least from the time the substrate is moved in and placed until the substrate is removed as described later.

[0062] (Film forming process, S10) [Raw material gas supply, S101] If the substrate stage 212 moves to the substrate processing position, the exhaust atmosphere is exhausted from the processing space 205 through the exhaust pipe 262 to adjust the pressure of the processing space 205.

[0063] When the pressure is adjusted to a specific level and the temperature of the substrate 10 reaches a specific temperature, for example, below 200°C, the valve 243d is opened, and raw material gas is supplied to the processing space 205 via the common gas supply pipe 242 and the spray head 230. At this time, the MFC 243c is adjusted to a specific flow rate of the raw material gas. At this time, the exhaust atmosphere is exhausted via the exhaust pipe 262. The supplied raw material gas forms the first layer on the substrate 10. After a specific time has elapsed since the start of the raw material gas supply, the valve 243d is closed, and the supply of raw material gas is stopped.

[0064] Next, the valve body 248d is opened, and inert gas is supplied to the processing space 205 through the common gas supply pipe 242 and the spray head 230 to purge the processing space 205.

[0065] Here, the feed gas system contains, for example, a Si-containing gas such as silicon (Si). Specifically, as the Si-containing gas, examples include tetraethoxysilane (Si(OC2H5)4:TEOS) gas, methane (SiH4) gas, dichlorosilane (SiH2Cl2:DCS) gas, and hexachloroethanesilane (Si2Cl6:HCDS) gas. One or more of these can be used as the Si-containing gas.

[0066] By supplying, for example, a Si-containing gas to the substrate 10, a Si-containing layer is formed on the surface of the substrate 10 as the first layer.

[0067] Furthermore, rare gases such as nitrogen (N2), argon (Ar), helium (He), neon (Ne), and xenon (Xe) can be used as inert gases. One or more of these can be used as inert gases. This point also applies to the steps described later.

[0068] [Reaction Gas Supply, S102] Next, valve 244d is opened, and reaction gas is supplied to the processing space 205 via common gas supply pipe 242 and spray head 230. At this time, MFC 244c is adjusted to a specific flow rate of reaction gas. The supplied reaction gas reacts with the first layer on substrate 10 to form a second layer on substrate 10.

[0069] After the second layer is formed on the substrate 10, the valve body 244d is closed to stop the supply of reaction gas to the processing container.

[0070] Next, the valve body 248d is opened, and inert gas is supplied to the processing space 205 through the common gas supply pipe 242 and the spray head 230 to purge the processing space 205.

[0071] Here, the reactant gas is an O-containing gas (also called an oxidizing gas) containing, for example, oxygen (O). Examples of O-containing gases that can be used include oxygen (O2), ozone (O3), O2 + hydrogen (H2), water vapor (H2O), hydrogen peroxide (H2O2), nitrous oxide (N2O), nitric oxide (NO), nitrogen dioxide (NO2), carbon monoxide (CO), and carbon dioxide (CO2). One or more of these can be used as the O-containing gas.

[0072] By supplying, for example, an O-containing gas to the substrate 10, the Si-containing layer on the substrate 10 is oxidized, and silicon oxide (SiO layer) is formed on the substrate 10.

[0073] [Performance a specific number of times] By performing the above steps S101 and S102 a specific number of times (n times, where n is an integer of 1 or 2 or more), an insulating film 16 of a desired thickness is formed on the substrate 10. For example, a silicon oxide film (SiO film) is formed as the insulating film 16. In this process, the thickness of the insulating film 16 formed is, for example, 50 nm or less.

[0074] In addition, although the case of forming a SiO film as an insulating film 16 is described as an example in the film formation process of step S10 above, it is not limited to this. Even if a nitrogen-containing gas (also called nitriding gas) supply system containing nitrogen (N) is further provided, an insulating film 16 such as a silicon oxynitride film (SiON film) can be formed.

[0075] Furthermore, in the film formation process S10 of the above step S10, although the case of supplying raw material gas and reaction gas in a cycle is used as an example, it is also possible to supply raw material gas and reaction gas at the same time, or to form insulating film 16 by supplying raw material gas without using reaction gas.

[0076] (Reduction Process, S11) Next, valve 245d is opened, and reducing gas is supplied to the processing space 205 via common gas supply pipe 242 and spray head 230. At this time, MFC 245c is adjusted to a specific flow rate of reducing gas. At this time, exhaust atmosphere is exhausted via exhaust pipe 262. The supplied reducing gas system exposes the substrate 10 with insulating film 16 to the reducing atmosphere. After a specific time has elapsed since the start of reducing gas supply, valve 245d is closed, and the supply of reducing gas is stopped. In this process, the substrate metal film oxidized by performing film formation process S10 is reduced.

[0077] Next, the valve body 248d is opened, and inert gas is supplied to the processing space 205 through the common gas supply pipe 242 and the spray head 230 to purge the processing space 205.

[0078] Here, the reducing gas system contains, for example, a hydrogen (H)-containing gas. Hydrogen (H2) gas is used as the hydrogen-containing gas.

[0079] (Execute a specific number of times, S12) The steps S10 and S11 will be executed cyclically a specific number of times (m times, where m is an integer of 1 or 2 or more) at least once.

[0080] As described above, an insulating film 16 is formed on the surfaces of the substrate 10, on which the microbumps 14 are respectively bonded to the semiconductor wafer 12, and on the surfaces of the semiconductor wafer 12 and the substrate 10, using either ALD or CVD methods. In the insulating film formation process, by performing the film formation process in step S10 and the reduction process in step S11 a specific number of times, the oxidation of the microbumps 14 can be suppressed while the insulating film 16 is formed on the surfaces of the microbumps 14, the substrate 10, and the semiconductor wafer 12.

[0081] (Substrate removal process) The substrate stage 212 is lowered so that the substrate 10 is supported on the lifting pin 207 protruding from the surface of the substrate stage 212. Then, the gate valve 149 is opened and the substrate transfer machine is used to move the substrate 10 out of the container 202.

[0082] (5) Other configurations Next, other configurations of the manufacturing process of the semiconductor device 101 will be described in detail. In the following configurations, only the points that differ from the above configurations will be described in detail.

[0083] [Second State Sample] Figures 5(A) to 5(D) are diagrams illustrating the manufacturing process of the semiconductor device 102 in the second state sample. In the second state sample, after the microbump formation process in step S1 and the insulating film formation process in step S2 described above, the following process is performed. Hereinafter, the differences will be explained, and the configurations that are the same as those in the above state sample will be omitted.

[0084] (Conductive film formation process, S21) As shown in FIG5(A), microbumps 14 are respectively provided, and conductive films 21 are formed on the surface of the substrate 10 and the semiconductor wafer 12 after an insulating film 16 is formed on the surface. That is, conductive films 21 are formed on the insulating films 16 formed on the substrate 10, the semiconductor wafer 12, and the microbumps 14. The conductive films 21 are formed by supplying metal-containing gas by providing a metal-containing gas supply system containing metal elements in, for example, the substrate processing apparatus 100 described above.

[0085] (Conductive and insulating film removal process, S22) Next, as shown in FIG5(B), the conductive film 21 and insulating film 16 formed on the top of the microbump 14 are removed respectively, exposing the top of the microbump 14, which is the connection surface of the microbump 14 on the surface of the substrate 10 and the semiconductor wafer 12. The conductive film 21 and insulating film 16 formed on the top of the microbump 14 are removed by CMP. In addition, as mentioned above, this process is not limited to CMP, and can also be removed by dry etching. That is, this state can also be referred to as performing the conductive film formation process of step S21 between the insulating film formation process of step S2 and the insulating film removal process of step S3, in which the conductive film 21 and insulating film 16 formed on the connection surface of the microbump 14 are removed in the insulating film removal process of step S3.

[0086] [Bonding Process, S23] Next, as shown in FIG5(C), the top of the microbump 14 of the substrate 10 and the top of the microbump 14 of the semiconductor wafer 12, that is, the connection surface of the microbump 14, are bonded to each other. At this time, a conductive film 21 is formed on the surface of the substrate 10 bonded to the semiconductor wafer 12, the surface of the semiconductor wafer 12 bonded to the substrate 10, and the surface of the microbump 14, that is, the exposed surface where the underfill material is embedded.

[0087] (Underfill film formation process, step S24) Next, as shown in FIG5(D), a conductive film 21 is formed on the exposed surface where the underfill material is embedded, and an underfill material is embedded between the substrate 10 and the semiconductor wafer 12 after being bonded by the microbumps 14 to form an underfill film 18.

[0088] As described above, the surfaces of the substrate 10 and the semiconductor wafer 12 after the microbumps 14 are bonded are covered by an insulating film 16, and a conductive film 21 is formed on the insulating film 16, and a semiconductor device 102 is formed on the surface of the conductive film 21 after the bottom filler film 18 is filled.

[0089] Even in this sample, the same effect as the above sample can be achieved. That is, since the exposed surface of the buried bottom filler is a type of conductive film 21, the surface when the bottom filler is buried is formed by supplying an organic-based gas by providing an organic-based gas supply system containing organic-based raw materials in, for example, the above-described substrate processing apparatus 100.

[0090] [Third State Sample] Figures 6(A) to 6(D) are diagrams illustrating the manufacturing process of the semiconductor device 103 in the third state sample. In the third state sample, after the microbump formation process in step S1, the insulating film formation process in step S2, and the conductive film formation process in step S21, the following process is performed.

[0091] (Forming process of organic-based insulating film, S211) As shown in FIG6(A), microbumps 14 are respectively provided, and an organic-based insulating film 26 is formed on the surface of the substrate 10 and the semiconductor wafer 12 after a conductive film 21 is formed on the surface. That is, an organic-based insulating film 26 is formed on the conductive film 21 formed on the substrate 10, the semiconductor wafer 12, and the microbumps 14. The organic-based insulating film 26 is formed by supplying an organic-based gas by providing an organic-based gas supply system containing an organic-based material in, for example, the substrate processing apparatus 100 described above.

[0092] (Including the removal process of the organic-based insulating film, conductive film, and insulating film, S212) Next, as shown in FIG6(B), the organic-based insulating film 26, conductive film 21, and insulating film 16 formed on the top of the microbump 14 are removed respectively, exposing the top of the microbump 14, which serves as the connection surface between the microbump 14 on the surface of the substrate 10 and the surface of the semiconductor wafer 12. The organic-based insulating film 26, conductive film 21, and insulating film 16 formed on the top of the microbump 14 are removed by CMP. In addition, as described above, this process is not limited to CMP, and can also be removed by dry etching. That is, this state can also be referred to as performing the organic-based insulating film formation process in step S211 between the conductive film formation process in step S21 and the conductive film and insulating film removal process in step S22. In the conductive film and insulating film removal process in step S22, the organic-based insulating film 26, the conductive film 21 and the insulating film 16 formed on the connecting surface of the microbump 14 are removed.

[0093] (Bonding process, S213) Next, as shown in FIG6(C), the top of the microbump 14 of the substrate 10 and the top of the microbump 14 of the semiconductor wafer 12, that is, the connection surface of the microbump 14, are bonded to each other. At this time, an organic-based insulating film 26 is formed on the surface of the substrate 10 bonded to the semiconductor wafer 12, the surface of the semiconductor wafer 12 bonded to the substrate 10, and the surface of the microbump 14, that is, the exposed surface where the underfill material is embedded.

[0094] (Underfill film formation process, step S214) Next, as shown in FIG6(D), an organic-based insulating film 26 is formed on the exposed surface where the underfill material is embedded. Underfill material is embedded between the substrate 10 and the semiconductor wafer 12 after being bonded by the microbumps 14 to form an underfill film 18.

[0095] As described above, the substrate 10 and the semiconductor wafer 12 after the microbumps 14 are bonded are covered by an insulating film 16, and a conductive film 21 and an organic-based insulating film 26 are formed on the insulating film 16, forming a semiconductor device 103 after the surface of the organic-based insulating film 26 is filled with a bottom filler film 18.

[0096] Even in this prototype, the same effect as the above-described prototype can be achieved. That is, since there are no multiple components on the exposed surface of the embedded underfill material, and it becomes a type containing an organic-based insulating film 26, the wettability of the surface when the underfill material is embedded will not differ, and the formation of voids can be suppressed. Furthermore, in this prototype, by further forming an organic-based insulating film 26 with high water repellency and high wettability on the exposed surface of the embedded underfill material, the formation of voids when the underfill material is embedded can be further suppressed. Furthermore, in this prototype, by forming a highly thermally conductive film 21 between the insulating film 16 on the surface of the substrate 10 and the semiconductor wafer 12 and the organic-based insulating film 26, heat accumulation during the operation of the semiconductor device 103 can be suppressed, enabling high-voltage operation and improving the operating speed.

[0097] [Fourth State Sample] Figures 7(A) to 7(D) are diagrams illustrating the manufacturing process of the semiconductor device 104 in the fourth state sample. In the fourth state sample, after the microbump formation process in step S1 and the insulating film formation process in step S2, the following process is performed.

[0098] (Forming process of organic-based insulating film, S25) As shown in FIG7(A), microbumps 14 are respectively provided, and organic-based insulating films 26 are formed on the surface of the substrate 10 and the semiconductor wafer 12 after an insulating film 16 is formed on the surface. That is, an organic-based insulating film 26 is formed on the insulating film 16 formed on the substrate 10, the semiconductor wafer 12, and the microbumps 14. The organic-based insulating film 26 is formed by supplying an organic-based raw material gas by providing an organic-based raw material gas supply system, such as the substrate processing apparatus 100 described above. The combined thickness of the insulating film 16 and the organic-based insulating film 26 formed in this process is, for example, 50 nm or less.

[0099] (Inorganic-based insulating film and insulating film removal process, S26) Next, as shown in FIG7(B), the organic-based insulating film 26 and the insulating film 16 formed on the top of the microbump 14 are removed, exposing the top of the microbump 14, which is the connection surface of the microbump 14 on the surface of the substrate 10 and the semiconductor wafer 12. The organic-based insulating film 26 and the insulating film 16 formed on the top of the microbump 14 are removed by CMP. In addition, as mentioned above, this process is not limited to CMP, and removal can also be performed by dry etching. That is, it can be said that this state is performed between the insulating film formation process in step S2 and the insulating film removal process in step S3, and in the insulating film removal process in step S3, the organic-based insulating film 26 and the insulating film 16 formed on the connection surface of the microbump 14 are removed.

[0100] (Bonding process, S27) Next, as shown in FIG7(C), the top of the microbump 14 of the substrate 10 and the top of the microbump 14 of the semiconductor wafer 12, that is, the connection surface of the microbump 14, are bonded to each other. At this time, an organic-based insulating film 26 is formed on the surface of the substrate 10 bonded to the semiconductor wafer 12, the surface of the semiconductor wafer 12 bonded to the substrate 10, and the surface of the microbump 14, that is, the exposed surface where the underfill material is embedded.

[0101] (Underfill film formation process, S28) Next, as shown in FIG7(D), an organic-based insulating film 26 is formed on the exposed surface where the underfill material is embedded, and an underfill film 18 is formed by embedding the underfill material between the substrate 10 and the semiconductor wafer 12 after being bonded by the microbumps 14.

[0102] As described above, the substrate 10 and the semiconductor wafer 12 after the microbumps 14 are bonded are covered by an insulating film 16, and an organic-based insulating film 26 is formed on the insulating film 16, and a semiconductor device 104 is formed on the surface of the organic-based insulating film 26 after the bottom filler film 18 is filled.

[0103] Even in this sample, the same effect as the above sample can be achieved. That is, since the exposed surface of the embedded bottom filler is of one type containing an organic-based insulating film 26, the wettability of the surface during the embedding of the bottom filler is not different, and the formation of voids can be suppressed. Furthermore, in this sample, by further forming an organic-based insulating film 26 with high water repellency and high wettability on the exposed surface of the embedded bottom filler, the formation of voids during the embedding of the bottom filler can be further suppressed.

[0104] [Other Forms] Although the forms have been described in detail above, this technology is not limited to the forms described above, and various changes can be made without departing from the scope of this theme.

[0105] In the above examples, an example of processing film using a substrate processing apparatus that processes one or more substrates at a time is described. This disclosure is not limited to the above examples; for example, it can also be used in the case of processing film using a batch substrate processing apparatus that processes multiple substrates at a time. Furthermore, in the above examples, an example of processing film using a substrate processing apparatus with a cold-wall type furnace is described. This disclosure is not limited to the above examples; it can also be appropriately applied in the case of processing film using a substrate processing apparatus with a hot-wall type furnace.

[0106] Even when using these substrate processing apparatuses, each processing can be performed with the same processing procedures and processing conditions as the above-described state or modified example, and the same effect as the above-described state or modified example can be obtained.

[0107] Furthermore, the formulas used in each process are prepared individually according to the processing content, and are preferably stored in the memory device 403 via an electrical line or an external memory device 282. Moreover, when each process begins, the CPU 401 selects the appropriate formula from the multiple formulas stored in the memory device 403 according to the processing content. In this way, films of various types, compositions, qualities, and thicknesses can be formed with good reproducibility using a single substrate processing device. Furthermore, the operator's workload can be reduced, operational errors can be avoided, and each process can be started quickly.

[0108] Furthermore, the above-mentioned formula is not limited to newly created cases; it can also be prepared, for example, by changing an existing formula already installed in the substrate processing device. In the case of changing the formula, the changed formula can be installed in the substrate processing device even via a communication line or a recording medium that records the formula. Furthermore, it is also possible to directly change an existing formula already installed in the substrate processing device by operating the input / output device 281 of the existing substrate processing device.

[0109] Furthermore, the above-mentioned states can be used in appropriate combinations. In this case, the processing procedures and processing conditions can be set to be the same as those of the above-mentioned states. [Simplified Explanation of the Diagram]

[0008] [Figure 1(A)]~[Figure 1(E)] are schematic diagrams illustrating one aspect of the manufacturing process of the semiconductor device involved in one aspect of this disclosure. [Figure 2] is a schematic diagram of the substrate processing apparatus used in the insulating film formation process involved in one aspect of this disclosure. [Figure 3] is a block diagram illustrating the control configuration of the substrate processing apparatus used in the insulating film formation process involved in one aspect of this disclosure. [Figure 4] is a flowchart showing an example of the insulating film formation process involved in one aspect of this disclosure. [Figure 5(A)]~[Figure 5(D)] are schematic diagrams illustrating one aspect of the manufacturing process of the semiconductor device involved in the second aspect of this disclosure. [Figure 6(A)]~[Figure 6(D)] are schematic diagrams illustrating one aspect of the manufacturing process of the semiconductor device involved in the third aspect of this disclosure. [Figure 7(A)]~[Figure 7(D)] are schematic diagrams illustrating one aspect of the manufacturing process of the semiconductor device involved in the fourth aspect of this disclosure.

Claims

1. A substrate processing method comprising: forming microbumps on a first surface of the substrate on the side of the bonding surface where the semiconductor wafer is bonded, when bonding a semiconductor wafer onto the substrate; forming microbumps on a second surface of the semiconductor wafer on the side of the bonding surface where the substrate is bonded; forming an insulating film on the first surface, the second surface, and the microbumps; removing the insulating film formed on the connecting surfaces of the microbumps; and bonding the connecting surfaces of the microbumps on the first surface and the second surface to each other.

2. The substrate processing method as described in claim 1, wherein the thickness of the insulating film is 50 nm or less.

3. The substrate processing method as claimed in claim 1, wherein between the process of forming the insulating film and the process of removing the insulating film, there is a process of forming a conductive film on the insulating film.

4. The substrate processing method as described in claim 3, wherein in the process of removing the insulating film, the conductive film and the insulating film formed on the connection surface of the microbumps are removed.

5. The substrate processing method as described in claim 1, wherein in the process of removing the insulating film, the insulating film formed on the bonding surface of the microbumps is removed by CMP or etching.

6. The substrate processing method as claimed in claim 1, wherein after the process of bonding the connecting surfaces to each other, a process of forming an underfill film between the substrate and the semiconductor wafer is further performed.

7. The substrate processing method as described in claim 1, wherein the insulating film is a film that can be formed on the insulating film, metal film and microbumps of the first surface and the second surface.

8. The substrate processing method as claimed in claim 1, wherein the process of forming the insulating film comprises: a first insulating film forming process, which forms an insulating film as a first insulating film on the first surface and the microbumps, or forms an insulating film as the first insulating film on the second surface and the microbumps; and a second insulating film forming process, which forms an organic-based insulating film as a second insulating film on the first insulating film.

9. The substrate processing method as described in claim 8, wherein a process for forming a conductive film is provided between the process of forming the insulating film and the process of forming the insulating film containing the organic base.

10. The substrate processing method as claimed in claim 9, wherein in the process of removing the insulating film, the conductive film formed on the connection surface of the microbumps, as well as the first insulating film and the second insulating film, are removed.

11. The substrate processing method as described in claim 1, wherein in the process of forming the insulating film, the process of forming the insulating film on the first surface, the second surface, and the microbumps by supplying raw material gas to the first surface, the second surface, and the microbumps, and the process of exposing the insulating film to a reducing atmosphere are performed at least once, so that the insulating film is formed on the first surface, the second surface, and the microbumps.

12. The substrate processing method as claimed in claim 1, wherein the insulating film is formed in such a manner that there is no difference in wettability between the surface of the semiconductor wafer and the surface of the microbumps, or between the surface of the substrate and the surface of the microbumps.

13. The substrate processing method as described in claim 6, wherein the process of forming the bottom filler film is performed when the substrate is exposed as the insulating film serving as the first insulating film, or exposed as the conductive film formed on the first insulating film, or exposed as the organic insulating film containing organic matter forming on the conductive film serving as the second insulating film, or exposed as the second insulating film formed on the first insulating film.

14. The substrate processing method as described in claim 6, wherein the process of forming the bottom filling film is performed while the substrate is in a state where the insulating film serving as a first insulating film is formed, or a conductive film is formed on the first insulating film, or an organic insulating film containing organic matter serving as a second insulating film is formed on the conductive film, or a second insulating film is formed on the insulating film.

15. The substrate processing method as described in claim 1, wherein the insulating film is an inorganic insulating film.

16. A substrate processing method comprising forming an insulating film on a first surface of the substrate on which a semiconductor wafer is bonded and on microbumps disposed on the first surface, or forming an insulating film on a second surface of the semiconductor wafer on which the substrate is bonded and on microbumps disposed on the second surface.

17. The substrate processing method as described in claim 16, wherein in the process of forming the insulating film, the process of forming the insulating film by supplying a raw material gas to the first surface and the microbumps to form the insulating film on the first surface and the microbumps, or by supplying a raw material gas to the second surface and the microbumps to form the insulating film on the second surface and the microbumps, and the process of exposing the insulating film to a reducing atmosphere are performed at least once, so that the insulating film is formed on the first surface and the microbumps, or on the first surface and the microbumps.

18. A method for manufacturing a semiconductor device, comprising forming an insulating film on a first surface of a substrate on which a semiconductor wafer is bonded and on microbumps disposed on the first surface, or forming an insulating film on a second surface of a semiconductor wafer on which the substrate is bonded and on microbumps disposed on the second surface.

19. A processing apparatus comprising: a substrate support for supporting a substrate having a first surface as a bonding side of a semiconductor wafer and microbumps disposed on the first surface, or a semiconductor wafer having a second surface of the substrate as a bonding side and microbumps disposed on the second surface; a gas supply for supplying a raw material gas to the substrate support; and a control unit configured to control the gas supply for forming an insulating film on the first surface and the microbumps disposed on the first surface, or forming an insulating film on the second surface and the microbumps disposed on the second surface.

20. A program, by means of a computer, causes a processing device to perform the following procedure: forming an insulating film on a first surface of a substrate that is bonded to a semiconductor wafer as a bonding surface and on microbumps disposed on the first surface, or forming an insulating film on a second surface of a semiconductor wafer that is bonded to the substrate and on microbumps disposed on the second surface.

21. A substrate processing method comprising: a process for preparing a substrate or a semiconductor wafer, wherein an insulating film is formed on a first surface of the substrate serving as a bonding side of the semiconductor wafer and on microbumps disposed on the first surface; an insulating film is formed on a second surface of the semiconductor wafer serving as a bonding side of the substrate and on microbumps disposed on the second surface; and a process for forming a metal-containing film on the insulating film.

22. A method for manufacturing a semiconductor device, comprising: a process of preparing a substrate or a semiconductor wafer, wherein an insulating film is formed on a first surface of the substrate serving as a bonding side of the semiconductor wafer and on microbumps disposed on the first surface; an insulating film is formed on a second surface of the semiconductor wafer serving as a bonding side of the substrate and on microbumps disposed on the second surface; and a process of forming a metal-containing film on the insulating film.

23. A substrate processing apparatus comprising: a substrate support portion for supporting a substrate or a semiconductor wafer, wherein an insulating film is formed on a first surface of the substrate serving as a bonding side of the semiconductor wafer and on microbumps disposed on the first surface; an insulating film is formed on a second surface of the semiconductor wafer serving as a bonding side of the substrate and on microbumps disposed on the second surface; a gas supply portion for supplying a raw material gas to the substrate support portion; and a control portion configured to control the gas supply portion in such a way that a metal-containing film is formed on the insulating film.

24. A program that enables a processing device to perform the following procedures by means of a computer: a procedure for preparing a substrate or semiconductor wafer, wherein an insulating film is formed on a first surface of the substrate serving as a bonding side of the semiconductor wafer and on microbumps disposed on the first surface; an insulating film is formed on a second surface of the semiconductor wafer serving as a bonding side of the substrate and on microbumps disposed on the second surface; and a procedure for forming a metal-containing film on the insulating film.

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