Pixel driving circuit and display device

Abstract

This invention discloses a pixel driving circuit and a display device. The pixel driving circuit includes a pixel circuit, which comprises: at least one light-emitting element; at least one driving current generating circuit, which includes a switching element electrically connected to the light-emitting element and configured to provide driving current to the corresponding light-emitting element when the switching element is turned on; and a control unit electrically connected to the switching element. The control unit can perform logical operations on input multi-bit pixel data within the pixel circuit to control the on / off state of the corresponding switching element and the on-time of the turned-on switching element, thereby modulating the brightness of the light-emitting element. This pixel driving circuit enables the light-emitting element to be used in more application scenarios.

Description

Technical Field

[0001] This invention relates to the field of pixel driving technology, and in particular to a pixel driving circuit and a display device. Prior Technology

[0002] In related technologies, display devices can utilize micro-light-emitting diodes (Micro-LEDs) as light-emitting elements. These devices incorporate Micro-LED pixel driving circuits. These circuits control the brightness of the light-emitting elements based on control signals. However, current pixel driving circuits suffer from various drawbacks, limiting the application scenarios of Micro-LEDs. Summary of the Invention

[0003] The present invention provides a pixel driving circuit and a display device to solve at least one of the above-mentioned technical problems.

[0004] In a first aspect, the present invention provides a pixel driving circuit comprising a pixel circuit, the pixel circuit comprising:

[0005] At least one light-emitting element;

[0006] At least one drive current generating circuit includes a switching element electrically connected to the light-emitting element, and the drive current generating circuit is configured to provide a drive current to a corresponding light-emitting element when the corresponding switching element is turned on.

[0007] The control unit is electrically connected to the switching element. The control unit can perform logical operations on the input multi-bit pixel data within the pixel circuit, control the on / off state of the corresponding switching element and the conduction duration of the already conducted switching element, so as to modulate the brightness of the light-emitting element.

[0008] In the pixel driving circuit described above, the control unit can perform logical operations on the input multi-bit pixel data, control the on / off state of the corresponding switching elements and the conduction duration of the already conducted switching elements, so as to modulate the brightness of the light-emitting element, making the light-emitting element suitable for more application scenarios.

[0009] In some optional technical solutions of the present invention, the multi-bit pixel data can form one or more bit analog signals and one or more bit signals;

[0010] The control unit performs logical operations on the analog signal and the digital signal to jointly modulate the on / off state of the corresponding switching element and / or the conduction duration of the switched element that has been turned on.

[0011] In some optional technical solutions of the present invention, the multi-bit pixel data is a mixed signal formed by analog signal and digital signal through one input, and the mixed signal is parsed to obtain the analog signal and the digital signal;

[0012] Alternatively, the multi-pixel data may include one input analog signal and another input digital signal.

[0013] In some optional technical solutions of the present invention, the analog signal is used to control the on / off state of the corresponding switching element to control the magnitude of the driving current, and the digital signal is used to control the conduction duration of the switched element to control the light emission duration of the light-emitting element.

[0014] In some optional technical solutions of the present invention, the control unit includes a logic gate, the output terminal of the logic gate is connected to the switching element, and the input terminal of the logic gate is used to receive the analog signal and the pulse width modulation signal, wherein the pulse width modulation signal is modulated according to the digital signal.

[0015] In some optional technical solutions of the present invention, the pulse width of the pulse width modulation signal is positively or negatively correlated with the magnitude of a set value, and the set value is determined by the digital signal.

[0016] In some optional technical solutions of the present invention, the pixel driving circuit includes a clock circuit, a counter, and a comparator;

[0017] The clock circuit is configured to output a clock signal;

[0018] The counter is configured to receive the clock signal and count the number of pulses in the clock signal;

[0019] The comparator is configured to output the pulse width modulation signal based on the relationship between the counter's count value and a set value;

[0020] The logic gate is configured to output a control signal that controls the on / off state of the switching element based on the pulse width modulation signal and the analog signal.

[0021] In some optional technical solutions of the present invention, when the count value of the counter is less than or equal to a set value, the level of the pulse width modulation signal is a first level, and the level of the analog signal is a first level, the control signal output by the logic gate is a signal that controls the switching element to be turned on;

[0022] When the counter value is less than or equal to a set value, the pulse width modulation signal level is the first level, and the analog signal level is the second level, the control signal output by the logic gate is a signal that controls the switching element to turn off.

[0023] When the counter value is greater than the set value, the pulse width modulation signal level is the second level, and when the analog signal level is the second level, the control signal output by the logic gate is the signal that controls the switching element to turn off;

[0024] When the counter value is greater than the set value, the pulse width modulation signal level is the second level, and the analog signal level is the first level. When the control signal output by the logic gate is the signal that controls the switching element to turn off.

[0025] In some optional technical solutions of the present invention, when the count value of the counter is less than or equal to a set value, the level of the pulse width modulation signal is a first level, and the level of the analog signal is a second level, the control signal output by the logic gate is a signal for controlling the switching element to be turned on;

[0026] When the counter value is less than or equal to the set value, the pulse width modulation signal level is the first level, and the analog signal level is the first level, the control signal output by the logic gate is a signal that controls the switching element to turn off.

[0027] When the counter value is greater than the set value, the pulse width modulation signal level is the second level, and the analog signal level is the first level. When the control signal output by the logic gate is the signal that controls the switching element to turn on.

[0028] When the counter value is greater than the set value, the pulse width modulation signal level is the second level. When the analog signal level is the second level, the control signal output by the logic gate is the signal that controls the switching element to turn on.

[0029] In some optional technical solutions of the present invention, the pixel driving circuit has a global mode, in which the pixel driving circuit is configured to directly input the analog signal to the logic gate.

[0030] In some optional technical solutions of the present invention, the pixel driving circuit has a local mode, the pixel driving circuit includes a memory, and in the local mode, the pixel driving circuit is configured to input the analog signal and the digital signal to the memory, and to input the analog signal from the memory to the logic gate.

[0031] In some optional technical solutions of the present invention, the pixel driving circuit includes a reference current generating circuit, the reference current generating circuit is electrically connected to at least one driving current generating circuit, and the reference current generating circuit and a corresponding driving current generating circuit constitute a current mirror structure.

[0032] In some alternative technical solutions of the present invention, the reference current generating circuit is configured to provide a reference current to each of the drive current generating circuits;

[0033] The drive current generating circuit is configured to generate the drive current related to the reference current.

[0034] In some optional technical solutions of the present invention, the driving current and the reference current satisfy the following conditions: IM=KM×I ref, I ref represents the reference current, IM represents the driving current generated by the Mth driving current generating circuit, KM is the coefficient of the Mth driving current generating circuit, M<=J, J is the number of driving current generating circuits, M and J are natural numbers and J>=1.

[0035] In some optional technical solutions of the present invention, the reference current generating circuit includes a first transistor, the driving current generating circuit includes a second transistor, and the coefficient of the driving current generating circuit is negatively correlated with the width-to-length ratio of the first transistor and positively correlated with the width-to-length ratio of the second transistor.

[0036] In some optional technical solutions of the present invention, the control unit is configured to control the on / off state of the switching element according to the analog signal to obtain 2J-1 different driving current magnitudes, where J is the number of driving current generating circuits, J is a natural number and J>=1.

[0037] In some optional technical solutions of the present invention, the control unit is configured to: after receiving the multi-pixel data, parse the multi-pixel data using a first preset information table to obtain the analog signal and the digital signal.

[0038] In some optional technical solutions of the present invention, the pixel driving circuit includes a level converter electrically connected between the control unit and the switching element, and the level converter is configured to realize mutual conversion between analog voltage domain and digital voltage domain.

[0039] In some alternative technical solutions of the present invention, the pixel driving circuit includes an inverter connected between the level converter and the switching element.

[0040] In some optional technical solutions of the present invention, the pixel driving circuit includes a memory, the memory being electrically connected to the control unit, and the memory being configured to store the digital signal and the analog signal.

[0041] In some optional technical solutions of the present invention, the pixel driving circuit includes a memory, the memory being electrically connected to the control unit, the memory being configured to, after receiving pixel data, parse the multi-bit pixel data using a second preset information table to obtain and store the digital signal and the analog signal, and transmit the digital signal and the analog signal to the control unit.

[0042] In some optional technical solutions of the present invention, the pixel driving circuit includes a digital processing unit, the digital processing unit being electrically connected to the control unit, and the digital processing unit being configured as follows:

[0043] If the actual driving current does not meet the expected value during the process of the control unit controlling the magnitude of the driving current according to the analog signal, the digital signal is adjusted to compensate for the light emission duration based on the difference between the actual driving current and the expected value, thereby eliminating the problem of discontinuous light emission brightness of the light-emitting element caused by the actual driving current not meeting the expected value.

[0044] Secondly, the present invention provides a display device comprising a pixel driving circuit according to any of the above-described schemes.

[0045] In the aforementioned display device, the control unit can control the on / off state of the switching element based on the analog signal, thereby controlling the magnitude of the drive current, and / or control the conduction duration of the switching element based on the digital signal, thereby controlling the emission duration of the light-emitting element, which makes the light-emitting element suitable for more application scenarios.

[0046] Additional aspects and advantages of the invention will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. Simple Explanation of the Diagram

[0047] The above and / or additional aspects and advantages of the present invention will become apparent and readily understood from the description of the embodiments taken in conjunction with the following drawings, wherein: Figure 1 is a schematic diagram of one embodiment of the pixel driving circuit of the present invention; Figure 2 is a schematic diagram of one of the control unit modules according to an embodiment of the present invention; Figure 3 is a second schematic diagram of the control unit module according to an embodiment of the present invention; Figure 4 is a schematic diagram of the pixel driving circuit with two current branches according to an embodiment of the present invention; Figure 5 is one of the timing diagrams of the pixel driving circuit of the present invention having two current branches; Figure 6 is a second timing diagram of the pixel driving circuit of the present invention having two current branches; Figure 7 is a schematic diagram of the pixel driving circuit with four current branches according to an embodiment of the present invention; Figure 8 is one of the timing diagrams of the pixel driving circuit of the present invention having four current branches; Figure 9 is a second timing diagram of the pixel driving circuit of the present invention having four current branches; Figure 10 is a second schematic diagram of the pixel driving circuit according to an embodiment of the present invention; Figure 11 is a third schematic diagram of the pixel driving circuit according to an embodiment of the present invention. Implementation

[0048] Embodiments of the present invention are described in detail below. Examples of these embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present invention, and should not be construed as limiting the present invention.

[0049] The following disclosure provides many different embodiments or examples for implementing various structures of the invention. To simplify the disclosure, specific examples of components and arrangements are described below. These are merely examples and are not intended to limit the invention. Furthermore, reference numerals and / or letters may be repeated in different examples; such repetition is for simplification and clarity and does not in itself indicate a relationship between the various embodiments and / or arrangements discussed. In addition, examples of various specific processes and materials are provided in this invention, but those skilled in the art will recognize the application of other processes and / or the use of other materials.

[0050] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, features defined as "first" or "second" may explicitly or implicitly include one or more features. In the description of this invention, "a plurality of" means two or more, unless otherwise explicitly specified.

[0051] In the description of this invention, it should be understood that the terms "center," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," and "counterclockwise," etc., indicate the orientation or positional relationship according to the accompanying drawings, and are only for the convenience of describing this invention and simplifying the description, and are not intended to indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this invention.

[0052] In this invention, unless otherwise explicitly specified and limited, "above" or "below" the second feature can include direct contact between the first and second features, or contact between the first and second features through another feature between them. Furthermore, "above," "over," and "on top" of the second feature includes the first feature directly above or diagonally above the second feature, or simply indicates that the first feature is at a higher horizontal level than the second feature. "Below," "below," and "under" the second feature includes the first feature directly below or diagonally below the second feature, or simply indicates that the first feature is at a lower horizontal level than the second feature.

[0053] In the description of this invention, it should be noted that, unless otherwise explicitly specified and limited, the terms "installation," "connection," and "joining" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection. They can be mechanical connections or electrical connections. They can be direct connections or indirect connections through an intermediate medium, and can refer to the internal communication of two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in this invention according to the specific circumstances.

[0054] Please refer to Figure 1. A pixel driving circuit 100 according to an embodiment of the present invention includes a pixel circuit 12, which includes at least one light-emitting element 14, at least one driving current generating circuit 16, and a control unit 18.

[0055] The drive current generating circuit 16 includes a switching element 20 electrically connected to the light-emitting element 14. The drive current generating circuit 16 is configured to provide drive current to the corresponding light-emitting element 14 when the corresponding switching element 20 is turned on.

[0056] The control unit 18 is electrically connected to the switching element 20. Within the pixel circuit 12, the control unit 18 can perform logical operations on the input multi-bit pixel data, control the on / off state of the corresponding switching element 20 and the conduction duration of the already conducted switching element 20, so as to modulate the brightness of the light-emitting element 14.

[0057] In the pixel driving circuit 100 described above, the control unit 18 can perform logical operations on the input multi-bit pixel data, control the on / off state of the corresponding switching element 20 and the conduction duration of the already conducted switching element 20, so as to modulate the brightness of the light-emitting element 14, making the light-emitting element 14 suitable for more application scenarios.

[0058] Specifically, the pixel driving circuit 100 can be applied to a self-emissive display device, and the light-emitting element 14 can serve as a pixel of the self-emissive display device. In one embodiment, the luminance of the light-emitting element 14 can be the integral of the driving current over time. When the driving current is constant, the luminance duration can be changed successively to adjust the luminance of the light-emitting element 14. Similarly, when the luminance duration is constant, changing the driving current flowing through the light-emitting element 14 successively will also adjust the luminance of the light-emitting element 14. In addition, the luminance of the light-emitting element 14 can also be adjusted by simultaneously adjusting the driving current flowing through the light-emitting element 14 and the luminance duration of the light-emitting element 14. The mixed-signal modulation circuit of this architecture effectively realizes the function of modulating the luminance of the light-emitting element 14, making it applicable to various application scenarios. Optionally, in the embodiment shown in the figure, the light-emitting element 14 is a micro-LED. It is understood that in other embodiments, the light-emitting element 14 can also be a light-emitting diode (LED) or an organic light-emitting diode (OLED), and the present invention does not specifically limit it in this regard.

[0059] In one embodiment, the control unit 18 can control the on / off state of the switching element 20 based on multi-pixel data, thereby controlling the magnitude of the driving current. When the light emission duration of the light-emitting element 14 is constant, the light emission brightness of the light-emitting element 14 can be adjusted.

[0060] In one embodiment, the control unit 18 can control the conduction duration of the switched element 20 based on multi-pixel data, thereby controlling the light emission duration of the light-emitting element 14. When the driving current is constant, the light emission brightness of the light-emitting element 14 can be adjusted.

[0061] In one embodiment, the control unit 18 can control the on / off state of the switching element 20 based on multi-pixel data, thereby controlling the magnitude of the driving current, and control the conduction duration of the switched element 20, thereby controlling the magnitude of the light emission duration of the light-emitting element 14, thereby synchronously adjusting the magnitude of the driving current and the magnitude of the light emission duration of the light-emitting element 14, and thus adjusting the brightness of the light-emitting element 14.

[0062] Optionally, in one embodiment, multi-bit pixel data can form one or more bit analog signals and one or more bit signals. The control unit 18 performs logical operations on the analog signals and bit signals to jointly modulate the on / off state of the corresponding switching element 20 and / or the conduction duration of the already conducted switching element 20.

[0063] Therefore, the control method is simple and efficient.

[0064] Specifically, by performing logical operations on analog and digital signals, the corresponding operation results can be quickly obtained. The operation results can control the on / off state of the switching element 20 and / or control the conduction duration of the already conducted switching element 20. Logical operations include, but are not limited to, logical AND gate operation, logical NOT gate operation, and combinations of logical AND gate operation and logical NOT gate operation, etc. This embodiment does not specifically limit these operations.

[0065] In one implementation, multi-bit pixel data can be used to form a one-bit analog signal and a one-bit digital signal.

[0066] In one implementation, multi-bit pixel data can form a one-bit analog signal and a multi-bit signal.

[0067] In one implementation, multi-bit pixel data can form a multi-bit analog signal and a single-bit digital signal.

[0068] In one implementation, multi-bit pixel data can form multi-bit analog signals and multi-bit signals.

[0069] Specifically, in one embodiment, the control unit 18 can perform logical operations based on analog signals and digital signals to control the on / off state of the switching element 20 and thus control the magnitude of the driving current. When the light emission duration of the light-emitting element 14 is constant, the light emission brightness of the light-emitting element 14 can be adjusted.

[0070] In one embodiment, the control unit 18 can perform logical operations based on analog signals and digital signals to control the conduction duration of the switched element 20 that has been turned on, thereby controlling the light emission duration of the light-emitting element 14. When the driving current is constant, the light emission brightness of the light-emitting element 14 can be adjusted.

[0071] In one embodiment, the control unit 18 can perform logical operations based on analog signals and digital signals to control the on / off state of the switching element 20 and thus control the magnitude of the driving current, and control the conduction duration of the switched element 20 based on the digital signals and thus control the magnitude of the light emission duration of the light-emitting element 14, thereby synchronously adjusting the magnitude of the driving current and the magnitude of the light emission duration of the light-emitting element 14, and thus adjusting the brightness of the light-emitting element 14.

[0072] Optionally, when the pixel circuit 12 includes multiple light-emitting elements 14, the multiple light-emitting elements 14 can be arranged in an array of multiple rows and columns. In the embodiment shown in the figure, only one light-emitting element 14 and the connected driving current generating circuit 16 are shown. Optionally, one light-emitting element 14 can be equivalent to one pixel of the display device.

[0073] In Figure 1, each light-emitting element 14 is connected to multiple drive current generating circuits 16. When the switching element 20 is turned on, the drive current generated by the corresponding drive current generating circuit 16 can flow to the connected light-emitting element 14 to provide drive current to the light-emitting element 14. Therefore, the magnitude of the drive current flowing through the light-emitting element 14 is the sum of the magnitudes of the currents generated by all drive current generating circuits 16 corresponding to the turned-on switching element 20.

[0074] For example, the pixel driving circuit 100 includes J driving current generating circuits 16, respectively T <0> ~ T <m-1>It includes J switching elements 20, which are N <0> ~ N <m-1>M and J are natural numbers, where M <= J and J >= 1. In Figure 1, J is greater than 1. When N <0> When the circuit is turned on, and other switching elements 20 are turned off, T <0> Provide driving current I to light-emitting element 14 <0> At this time, the driving current of the light-emitting element 14 is I. <0> When N <0> and N <1> When the circuit is turned on, and other switching elements 20 are turned off, T <0> Provide driving current I to light-emitting element 14 <0> ,T <1> Provide driving current I to light-emitting element 14 <1> At this time, the driving current of the light-emitting element 14 is I. <0> +I <1> Similarly, by controlling the on / off state of the switching element 20, the driving current generating circuit 16 can provide different driving current magnitudes to the light-emitting element 14, thereby adjusting the light-emitting brightness of the light-emitting element 14.

[0075] Optionally, in one embodiment, the multi-bit pixel data can be a mixed signal formed by analog signals and digital signals through a single mixed input, which together determine the modulation information. In this case, the control unit 18 can parse the input multi-bit pixel data to obtain the corresponding analog signal and digital signal. Optionally, the analog signal can occupy one or more bits, and the digital signal can occupy one or more bits.

[0076] Specifically, multi-pixel data includes a modulated signal determined by a mixture of analog and digital signals. The analog signal can be represented as Analog Bits, the digital signal as Digital Bits, and the mixed signal as Analog&Digital. The mixed signal can be matched to the corresponding modulated signal using a lookup table in a first preset information table. For example, for a mixed signal in Analog&Digital mode, in the first preset information table, 0001 corresponds to analog 1 digital 0 (indicating an analog signal of 1 and a digital signal of 0, the same applies below), 0010 corresponds to analog 1 digital 1, 0011 corresponds to analog 1 digital 2, and so on. This setting can be relatively random, but the corresponding methods can be flexibly defined in advance, making the data input method more flexible and adjustable.

[0077] Optionally, in one embodiment, the multi-bit pixel data includes one input analog signal and another input digital signal, that is, the analog signal and the digital signal can each occupy a certain number of bits, and the control unit 18 can perform logical operations on the input analog signal and the digital signal.

[0078] Specifically, both analog and digital signals can be matched to the corresponding modulation signal through a lookup table using a first preset information table.

[0079] In some implementations, analog signals are used to control the on / off state of the corresponding switching element 20 to control the magnitude of the drive current, and digital signals are used to control the on-time of the switched element 20 to control the light-emitting time of the light-emitting element 14.

[0080] Specifically, in one embodiment, when the digital signal is fixed, the analog signal can be 01, which can control the switching element 20 to be turned on, and the analog signal can be 00, which can control the switching element 20 to be turned off. It is understood that the present invention does not impose specific limitations on this.

[0081] Optionally, the digital signal may occupy a certain number of bits. The control unit 18 can parse the input multi-bit pixel data to obtain the digital signal, and the light emission duration can be determined through the digital signal. In one embodiment, when the digital signal is 01 and the switching element 20 is turned on by analog signal control at the corresponding time, the light emission element 14 connected to the turned-on switching element 20 can emit light. For a frame sequence, the on-time of the switching element 20 can be the cumulative duration when the digital signal is 01 in that frame sequence, thereby controlling the light emission duration of the light emission element 14 connected to the turned-on switching element 20. When the digital signal is 00 and the switching element 20 is turned off by analog signal control at the corresponding time, the light emission element 14 connected to the turned-off switching element 20 does not emit light. Optionally, the duration corresponding to a frame sequence can be determined by the refresh rate of the display device.

[0082] In some embodiments, the control unit 18 includes a logic gate 34, the output of which is connected to the switching element 20, and the input of which is used to receive an analog signal and a pulse width modulation signal, wherein the pulse width modulation signal is modulated based on a digital signal.

[0083] Therefore, the on / off state of the switching element 20 can be controlled by pulse width modulation signal and analog signal.

[0084] Specifically, the pulse width of the pulse width modulation (PWM) signal can be modulated by a digital signal, and then combined with an analog signal, the on / off state of the switching element 20 can be controlled, and / or the on-time of the already turned-on switching element 20 can be controlled.

[0085] Specifically, when the analog signal remains constant, adjusting the digital signal changes the pulse width of the pulse width modulation signal, thereby adjusting the conduction duration of the already activated switching element 20. When the digital signal remains constant, adjusting the analog signal changes the operation result of the logic gate 34, thereby controlling the on / off state of the switching element 20. When both the analog and digital signals are adjusted, the pulse width of the pulse width modulation signal changes, thereby adjusting the conduction duration of the already activated switching element 20, and the operation result of the logic gate 34 changes, thereby controlling the on / off state of the switching element 20.

[0086] In some implementations, the pulse width of the pulse width modulation signal is positively or negatively correlated with the magnitude of a set value, which is determined by a digital signal.

[0087] Therefore, the pulse width of the pulse width modulation signal can be adjusted to change the set value.

[0088] Specifically, in one embodiment, the pulse width of the pulse width modulation signal is positively correlated with the set value; that is, when the set value increases, the pulse width of the pulse width modulation signal increases. When the set value decreases, the pulse width of the pulse width modulation signal can decrease.

[0089] In one implementation, the pulse width of the pulse width modulation signal is negatively correlated with the set value; that is, when the set value increases, the pulse width of the pulse width modulation signal decreases. Conversely, when the set value decreases, the pulse width of the pulse width modulation signal can increase.

[0090] The set value is determined by a digital signal. The control unit 18 acquires the digital signal, analyzes the digital signal, and then obtains the set value. For example, there is a correspondence between the digital signal and the set value. After acquiring the digital signal, the control unit 18 analyzes the digital signal to obtain the set value, and then obtains the set value according to the above correspondence.

[0091] In some embodiments, the pixel driving circuit 100 includes a clock circuit 28, a counter 30, and a comparator 32;

[0092] Clock circuit 28 is configured to output a clock signal;

[0093] Counter 30 is configured to receive a clock signal and count the number of pulses in the clock signal;

[0094] Comparator 32 is configured to output a pulse width modulation signal based on the relationship between the count value of counter 30 and the set value;

[0095] The logic gate 34 is configured to output a control signal that controls the on / off state of the switching element 20 based on the pulse width modulation signal and the analog signal.

[0096] Therefore, the control signal for the on / off state of the switching element 20 can be adjusted.

[0097] Specifically, the control unit 18 can function as a controller and an analog modulation module (PWM control & analog tuner). The clock circuit generates the required clock signal and enables PWM (Pulse Width Modulation) modulation of the pixel circuit 12. It can be a single clock signal input to the pixel circuit 12, or multiple clock signals input to the pixel circuit 12; this invention does not specifically limit this.

[0098] In one embodiment, the clock signal provided by the clock circuit 28 may have a period with a uniform width, that is, the width of each pulse is equal. In another embodiment, the clock signal provided by the clock circuit 28 may have a period with unequal width, that is, the width of each pulse is unequal, or some pulses have equal widths and some pulses have unequal widths; the present invention does not specifically limit this.

[0099] Counter 30 can count the number of pulses of the clock signal. Optionally, in a frame of timing, the count value of counter 30 is used to control the light emission duration of the light-emitting element 14 in that frame of timing.

[0100] The clock signal can be used by counter 30 to perform related calculations to generate the corresponding pulse width modulation signal (grayscale signal). The number of bits in counter 30 is determined by the period of the clock signal and the pulse width length of the pulse width modulation signal to be modulated.

[0101] A set value can be used as the comparison value of comparator 32, and the set value can be set to m. The comparison value of comparator 32 can be set according to the required light emission duration, and combined with the reset signal in the circuit, the light emission duration corresponding to each gray level is determined. More specifically, the control unit 18 can set the set value m according to the digital signal, and then adjust the pulse width of the pulse width modulation signal to achieve pulse width modulation of the pulse width modulation signal. Specifically, for each frame of timing, if the required light emission time is short, the value of m can be reduced, and if the required light emission time is long, the value of m can be increased. By adjusting the value of m through the digital signal, the pulse width of the pulse width modulation signal can be adjusted by adjusting the comparison value of comparator 32, thereby achieving the purpose of adjusting the light emission duration of the light-emitting element 14. It is understood that in other embodiments, for each frame of timing, if the required light emission time is short, the value of m can also be increased, and if the required light emission time is long, the value of m can also be reduced, and corresponding adjustments can be made in the circuit. The present invention does not specifically limit this.

[0102] The logic gate 34 can output a corresponding control signal based on the level of the input signal. Specifically, the logic gate 34 can output a control signal to control the on / off state of the switching element 20 based on the level of the pulse width modulation signal and the level of the analog signal. Optionally, the number of gates in the logic gate 34 is the same as the number of switching elements 20.

[0103] Optionally, in the embodiment shown in the figure, the control unit 18 includes a counter 30 and a comparator 32, which may be located in the pixel circuit 12. Optionally, the counter 30 and the comparator 32 may also be located in the peripheral circuit of the pixel circuit 12. The present invention does not specifically limit this.

[0104] In some implementations, when the count value of counter 30 is less than or equal to a set value, the pulse width modulation signal level is the first level, and the analog signal level is the first level, the control signal output by logic gate 34 is a signal that controls the switching element 20 to turn on;

[0105] When the count value of counter 30 is less than or equal to the set value, the pulse width modulation signal level is the first level, and the analog signal level is the second level, the control signal output by logic gate 34 is the signal that controls the switching element 20 to turn off;

[0106] When the count value of counter 30 is greater than the set value, the level of the pulse width modulation signal is the second level. When the level of the analog signal is the second level, the control signal output by the logic operation gate 34 is the signal that controls the switching element 20 to turn off.

[0107] When the count value of counter 30 is greater than the set value, the pulse width modulation signal level is the second level and the analog signal level is the first level. When the control signal output by logic gate 34 is the signal that controls the switching element 20 to turn off.

[0108] Therefore, the control signal for the on / off state of the switching element 20 can be determined through logic and gate operations.

[0109] Specifically, the switching element may include an NMOS, and the logic operation gate 34 includes an AND gate, each of which has two input terminals. The logic operation can be an AND gate operation. In one embodiment, the first level can be a high level, and the second level can be a low level. If the pulse width modulation signal output by comparator 32 is at a high level and the analog signal is at a high level, then the control signal output by logic operation gate 34 is at a high level, causing the corresponding switching element 20 to conduct.

[0110] If the pulse width modulation signal output by comparator 32 is at a high level and the analog signal is at a low level, then the control signal output by logic gate 34 is at a low level, causing the corresponding switching element 20 to turn off.

[0111] If the pulse width modulation signal output by comparator 32 is at a low level and the analog signal is at a low level, then the control signal output by logic gate 34 will be at a low level, causing the corresponding switching element 20 to turn off.

[0112] If the pulse width modulation signal output by comparator 32 is at a low level and the analog signal is at a high level, then the control signal output by logic gate 34 will be at a low level, causing the corresponding switching element 20 to turn off.

[0113] In some implementations, when the count value of counter 30 is less than or equal to a set value, the level of the pulse width modulation signal is the first level, and the level of the analog signal is the second level, the control signal output by logic gate 34 is a signal that controls the switching element 20 to turn on;

[0114] When the count value of counter 30 is less than or equal to the set value, the pulse width modulation signal level is the first level, and the analog signal level is the first level, the control signal output by logic gate 34 is the signal that controls the switching element 20 to turn off;

[0115] When the count value of counter 30 is greater than the set value, the pulse width modulation signal level is the second level, and the analog signal level is the first level. When the control signal output by logic gate 34 is the signal that controls the switching element 20 to turn on;

[0116] When the count value of counter 30 is greater than the set value, the level of the pulse width modulation signal is the second level. When the level of the analog signal is the second level, the control signal output by logic gate 34 is the signal that controls the switching element 20 to turn on.

[0117] Therefore, the control signal for the on / off state of the switching element 20 can be determined through logical inverse and gate operations.

[0118] Specifically, the switching element may include a PMOS. The logic gate 34 includes an inverting logic gate, each with two inputs, and the logic operation can be an inverting gate operation. In one embodiment, the first level may be a high level, and the second level may be a low level. If the pulse width modulation signal output by comparator 32 is at a high level and the analog signal is at a low level, then the control signal output by logic gate 34 is at a high level, causing the corresponding switching element 20 to conduct.

[0119] If the pulse width modulation signal output by comparator 32 is at a high level and the analog signal is at a high level, then the control signal output by logic gate 34 is at a low level, causing the corresponding switching element 20 to turn off.

[0120] If the pulse width modulation signal output by comparator 32 is at a low level and the analog signal is at a high level, then the control signal output by logic gate 34 is at a high level, causing the corresponding switching element 20 to turn on.

[0121] If the pulse width modulation signal output by comparator 32 is at a low level and the analog signal is at a low level, then the control signal output by logic gate 34 is at a high level, causing the corresponding switching element 20 to turn on.

[0122] In some embodiments, referring to FIG2, the pixel driving circuit 100 has a global mode, in which the pixel driving circuit 100 is configured to allow the analog signal to be directly input to the logic gate 34.

[0123] Therefore, in global mode, the control unit 18 can control the on / off state of all switching elements 20 connected to the logic gate 34 through the logic gate 34.

[0124] Specifically, the externally input analog signal can be directly input to the logic gate 34, thereby controlling the on / off state of the switching elements 20 of all current branches connected to the logic gate 34.

[0125] It is understood that in the global mode, the switching state of the switching element 20 of all current branches in the pixel circuit 12 can be controlled by analog signal, or the switching state of the switching element 20 of all current branches corresponding to a row of light-emitting elements 14 can be controlled, or the switching state of the switching element 20 of all current branches of a column of light-emitting elements 14 can be controlled. The present invention does not make specific limitations on this.

[0126] Referring to Figure 2, the pixel driving circuit 100 includes a memory 36, optionally located within the pixel circuit 12. The memory 36 has N bits. Input digital signals can be stored in the memory 36, while analog signals can be directly input to the logic gate 34. Optionally, the memory 36 is located in the peripheral circuitry of the pixel circuit 12.

[0127] For example, if a light-emitting element 14 is connected to J current branches (driving current generating circuit 16), then the analog signal controlling the light-emitting element 14 will also have J bits. Each bit of the analog signal controls the on / off state of the switching element 20 of the corresponding current branch. For example, for J=4 and analog signal=0001, the most significant bit (MSB) of the analog signal is 0, the next bit after the most significant bit is 0, the two bits after the most significant bit are 0, and the least significant bit (LSB) is 1. This analog signal, combined with the level of the pulse width modulation signal output by comparator 32, allows logic gate 34 to output four control signals that control the on / off state of the four switching elements 20.

[0128] In some embodiments, referring to FIG3, the pixel driving circuit 100 has a local mode. The pixel driving circuit 100 includes a memory 36. In the local mode, the pixel driving circuit 100 is configured to input analog signals and digital signals to the memory 36 and to input analog signals from the memory 36 to the logic gate 34.

[0129] Therefore, in local mode, the control unit 18 can control the on / off state of one or more switching elements 20 connected to the logic gate 34 through the logic gate 34.

[0130] Specifically, in local mode, multi-bit pixel data can be input to memory 36. Memory 36 can be a memory 36 with multi-bit functionality. For example, memory 36 has J+N bits. Some bits of the multi-bit pixel data are assigned to analog signals, and some bits are assigned to digital signals. That is, some analog signals of the multi-bit pixel data are input to logic gate 34, rather than all of the multi-bit pixel data. Thus, one or more analog signals input to logic gate 34 can correspondingly control the on / off state of one or more switching elements 20.

[0131] It is understood that, in local mode, the analog signal can control the on / off state of one or more switching elements 20 in all current branches of the pixel circuit 12, or it can control the on / off state of one or more switching elements 20 corresponding to a row of light-emitting elements 14, or it can control the on / off state of one or more switching elements 20 corresponding to a column of light-emitting elements 14. The present invention does not make specific limitations in this regard.

[0132] In some embodiments, the pixel driving circuit 100 includes a reference current generating circuit 22, which is electrically connected to at least one driving current generating circuit 16. The reference current generating circuit 22 and the corresponding driving current generating circuit 16 form a current mirror structure.

[0133] Therefore, a current mirror structure can be used to generate drive current, reducing circuit complexity.

[0134] Specifically, in Figure 1, the number of drive current generating circuits 16 is J, namely T <0> ~ T <m-1>The reference current generating circuit 22 is T0, and T0 and T <0> This forms a current mirror structure, with T0 and T <1> This forms a current mirror structure, and so on, T0 and T <m-1>A current mirror structure is formed, with the reference current generating circuit 22 and the J drive current generating circuits 16 each constituting a current mirror structure. Correspondingly, each drive current generating circuit 16 can serve as a current mirror branch and a current branch.

[0135] The reference current generation circuit 22 can convert voltage to current and provide a reference current source for the current mirror branch. This current mirror structure facilitates the sharing of circuit modules, reduces circuit complexity, makes full use of the original bandgap reference circuit module, and provides a reference current for the current mirror branch.

[0136] The present invention does not specifically limit the placement of the reference current generating circuit 22. Optionally, the reference current generating circuit 22 can be located on the periphery of the pixel circuit 12.

[0137] In some implementations, the reference current generation circuit 22 is configured to provide a reference current to each drive current generation circuit 16;

[0138] The drive current generation circuit 16 is configured to generate a drive current related to the reference current.

[0139] Therefore, after determining the reference current, the drive current generated by each drive current generation circuit 16 can be determined, and the method of generating the drive current is simple.

[0140] Specifically, a voltage can be provided to the reference current generating circuit 22, which can convert the voltage into a reference current. The voltage and the reference current have a certain relationship, the specific relationship of which is determined according to the circuit design.

[0141] Through the current mirror structure, each drive current generating circuit 16 can generate a drive current related to the reference current. More specifically, after a voltage is input to the reference current generating circuit 22, the reference current generating circuit 22 can generate a reference current, and correspondingly, the drive current generating circuit 16 can replicate the reference current by a certain proportion to generate a corresponding drive current. When the switching element 20 is turned on, the drive current generated by the corresponding drive current generating circuit 16 can flow to the light-emitting element 14, causing the light-emitting element 14 to emit light.

[0142] In one implementation, the drive current and the reference current satisfy the following condition: IM = KM × I ref, where I ref represents the reference current, IM represents the drive current generated by the Mth drive current generating circuit 16, KM is the coefficient of the Mth drive current generating circuit 16, M <= J, J is the number of drive current generating circuits 16, and M and J are natural numbers and J >= 1.

[0143] Therefore, the calculation method for the drive current of each drive current generating circuit 16 is simple and efficient.

[0144] Specifically, referring to Figure 1, from left to right, for the first driving current generating circuit 16, its driving current I 1 = K 1 × I ref; for the second driving current generating circuit 16, its driving current I 2 = K 2 × I ref; and so on, for the Mth driving current generating circuit 16, its driving current IM = KM × I ref.

[0145] Optionally, the coefficient K of all drive current generating circuits 16 is the same; alternatively, the coefficient K of all drive current generating circuits 16 is different; alternatively, the coefficient K of some drive current generating circuits 16 is the same; alternatively, the coefficient K of some drive current generating circuits 16 is different. The present invention does not specifically limit this.

[0146] The specific value of the coefficient K of the driving current generating circuit 16 can be determined according to actual needs, and the present invention does not impose a specific limitation on it.

[0147] In some embodiments, the reference current generating circuit 22 includes a first transistor 24, and the drive current generating circuit 16 includes a second transistor 26. The coefficient of the drive current generating circuit 16 is negatively correlated with the width-to-length ratio of the first transistor 24 and positively correlated with the width-to-length ratio of the second transistor 26.

[0148] Therefore, the coefficients of the drive current generating circuit 16 can be easily determined.

[0149] Specifically, the coefficient of the driving current generating circuit 16 is negatively correlated with the width-to-length ratio of the first transistor 24. When the width-to-length ratio of the first transistor 24 increases, the coefficient of the driving current generating circuit 16 decreases. The coefficient of the driving current generating circuit 16 is positively correlated with the width-to-length ratio of the second transistor 26. When the width-to-length ratio of the second transistor 26 increases, the coefficient of the driving current generating circuit 16 increases.

[0150] Optionally, in Figure 1, both the first transistor 24 and the second transistor 26 are PMOS transistors. The first transistor 24 is a P0 transistor with a width-to-length ratio A0 = W / L. The second transistor 26 of the first drive current generating circuit 16 is a PMOS transistor. <0> Transistor, P <0> The aspect ratio of the transistor is A <0> ,where A <0> =K 1×A0, the coefficient K 1=A of the first drive current generating circuit 16 <0> / A0, drive current I1 = K1 × Iref. The second transistor 26 of the second drive current generation circuit 16 is P. <1> Transistor, P <1> The aspect ratio of the transistor is A <1> ,where A <1> =K 2×A0, the coefficient K 2=A of the second drive current generating circuit 16 <1> / A0, drive current I2 = K2 × Iref, and so on, the second transistor 26 of the Mth drive current generating circuit 16 is P <m-1>Transistor, P <m-1>The aspect ratio of the transistor is A <m-1>,where A <m-1>=KM×A0, the coefficient KM=A of the Mth drive current generating circuit 16 <m-1> / A0, drive current IM=KM×I ref.

[0151] Alternatively, in other embodiments, the first transistor 24 and the second transistor 26 are both NMOS transistors, and the present invention does not specifically limit this.

[0152] In some embodiments, the control unit 18 is configured to control the on / off state of the switching element 20 according to an analog signal to obtain 2J-1 different drive current magnitudes, where J is the number of drive current generating circuits 16, J is a natural number and J>=1.

[0153] Therefore, various driving current magnitudes can be obtained, expanding the brightness adjustment range of the light-emitting element 14 and making its application range wider.

[0154] Specifically, in the illustrated embodiment, a current mirror structure can be used to achieve 2J-1 different drive current magnitudes. More specifically, please refer to Figure 1, N. <0> ~N <m-1>The switching element 20 of the current mirror branch is used to control the on or off state of the corresponding current mirror branch. J current mirror branches are combined with J switching elements 20 in their on or off states to generate 2J-1 different current magnitudes. These 2J-1 different current values ​​are exactly equal to the driving current flowing through the light-emitting element 14, used to drive the light-emitting element 14 to emit light, thus adjusting the brightness of the light-emitting element 14. As shown in Figure 4, when J=2, combined with N... <0> and N <1> The operating state can generate three sets of drive current values: I1 = K1 × Iref, I2 = K2 × Iref, and I3 = K1 × Iref + K2 × Iref. These 2J-1 drive currents, combined with the modulation of the conduction time of the switching element 20 using digital signals, allow for a wider range of adjustable brightness for the light-emitting element 14, making it suitable for more application scenarios. It can be understood that N... <0> ~ N <m-1>When all are off, the light-emitting element 14 cannot be lit, so there are 2J-1 different current magnitudes.

[0155] It is understood that in other embodiments, other methods can be used to generate the driving current in the driving current generating circuit 16, and it is not limited to the current mirror structure. The specific value of J can be determined based on factors such as the brightness adjustment requirements of the light-emitting element 14, the cost and complexity of the pixel circuit 12, etc. For example, if the brightness adjustment of the light-emitting element 14 is more refined, the value of J can be set to be larger. If the cost requirement of the pixel circuit 12 is low, or if the brightness adjustment of the light-emitting element 14 does not need to be refined, the value of J can be set to be smaller, etc. The present invention does not impose specific limitations in this regard.

[0156] In some embodiments, the control unit 18 is configured to: after receiving multi-pixel data, parse the multi-pixel data using a first preset information table to obtain analog signals and digital signals.

[0157] Therefore, analog and digital signals can be acquired conveniently and quickly.

[0158] Specifically, the first preset information table can be an information table with a certain pre-configured correspondence. The first preset information table can be stored in the control unit 18 or other locations. The present invention does not make specific limitations on this.

[0159] After receiving multi-pixel data, the control unit 18 can match the corresponding modulation signal by a lookup table. The modulation signal includes analog signals and digital signals. In one embodiment, the multi-pixel data includes one input analog signal and another input digital signal. In another embodiment, the multi-pixel data is a mixed signal formed by the analog signal and the digital signal through one input. The mixed signal is parsed to obtain the analog signal and the digital signal. In one embodiment, the analog signal can be represented as Analog Bits, the digital signal can be represented as Digital Bits, and the mixed signal can be represented as Analog&Digital. Regardless of whether it is an analog signal, a digital signal, or a mixed signal, the corresponding modulation signal can be matched by a lookup table through a first preset information table. For example, for a mixed signal in the Analog&Digital mixed mode, in the first preset information table, 0001 is set to correspond to analog 1 digital 0 (meaning the analog signal is 1 and the digital signal is 0, the same below), 0010 corresponds to analog 1 digital 1, 0011 corresponds to analog 1 digital 2, and so on. This setting method can be relatively random, but the corresponding method can be flexibly defined in advance, making the data input method more flexible and adjustable.

[0160] In some embodiments, the pixel driving circuit 100 includes a level converter 38 electrically connected between the control unit 18 and the switching element 20, the level converter 38 being configured to perform mutual conversion between the analog voltage domain and the digital voltage domain.

[0161] Therefore, the control unit 18 can control the switching element 20 to conduct.

[0162] Specifically, the level shifter 38 can be used to achieve mutual conversion between the analog voltage domain and the digital voltage domain. In one embodiment, since the turn-on voltage range of the miniature light-emitting diode is between 2V and 3V, combined with the on-state voltage drop of the MOS switching transistor and the current transistor, the analog voltage domain range will be higher than 3V. The digital voltage domain is usually lower than the analog voltage domain. Therefore, the level shifter 38 can be used to drive the higher analog voltage domain from the lower digital voltage domain, thereby increasing the voltage of the control signal output by the control unit 18, enabling the control signal to control the conduction of the switching element 20.

[0163] In one embodiment, if level conversion is not involved, the level converter 38 can be omitted. Optionally, depending on resource requirements, the level converter 38 can be located in the pixel circuit 12 or in the peripheral circuit of the pixel circuit 12; the present invention does not specifically limit this.

[0164] In some implementations, the pixel driving circuit 100 includes an inverter connected between the level converter 38 and the switching element 20.

[0165] Therefore, the application range of the pixel driving circuit 100 can be broadened.

[0166] Specifically, in the embodiments shown in Figures 1 to 9, the switching element 20 is an NMOS transistor, and the logic gate 34 is an NMOS logic gate. In the embodiment shown in Figure 10, when the switching element 20 is a PMOS transistor, the pixel driving circuit 100 includes an inverter connected between the level converter 38 and the switching element 20. The inverter can invert the control signal output by the level converter 38, thereby controlling the on / off state of the PMOS transistor, thus broadening the application range of the pixel driving circuit 100.

[0167] In some embodiments, the pixel driving circuit 100 includes a memory 36 electrically connected to the control unit 18, and the memory 36 is configured to store digital signals and analog signals.

[0168] Therefore, memory 36 can be used to store digital signals and analog signals.

[0169] Specifically, after acquiring the analog signal and the digital signal, the control unit 18 can store the analog signal and the digital signal in the memory 36. The memory 36 can be a memory with multi-bit functionality.

[0170] Optionally, the memory 36 may be located in the pixel circuit 12 or in the peripheral circuit of the pixel circuit 12; the present invention does not specifically limit this.

[0171] It is understood that in other implementations, the input analog and digital signals may not be stored. This allows for selective storage based on requirements, saves resources, and enables flexible multi-mode storage in various application scenarios.

[0172] In some embodiments, the pixel driving circuit 100 includes a memory 36 electrically connected to the control unit 18. The memory 36 is configured to, after receiving multi-bit pixel data, parse the multi-bit pixel data using a second preset information table to obtain and store digital signals and analog signals, and transmit the digital signals and analog signals to the control unit 18.

[0173] Therefore, the memory 36 can be used to acquire and store digital and analog signals, and send the analog and digital signals to the control unit 18.

[0174] Specifically, memory 36 can be a memory 36 with multi-bit functionality, and the second preset information table can be an information table with a pre-configured correspondence. Memory 36 can use the second preset information table to match the multi-bit pixel data to the corresponding digital signal (digital modulation signal) and analog signal (analog modulation signal) through table lookup matching. The matched digital signal and analog signal can be input to control unit 18. The specific configuration method of the second preset information table can be configured with reference to the configuration method of the first preset information table. Optionally, the second preset information table and the first preset information table can have the same configuration method.

[0175] The second preset information table can flexibly define the corresponding method and can also flexibly match the corresponding relationship as needed. Multi-bit pixel data can be stored or not, allowing for selective storage based on requirements while saving resources and enabling flexible multi-mode storage for various application scenarios.

[0176] In some embodiments, the pixel driving circuit 100 includes a digital processing unit 40, which is electrically connected to the control unit 18. The digital processing unit 40 is configured to:

[0177] In the process of the control unit 18 controlling the magnitude of the drive current according to the analog signal, if the actual drive current does not meet the expected value, the digital signal is adjusted according to the difference between the actual drive current and the expected value to compensate for the light emission duration, thereby eliminating the problem of discontinuous light emission brightness of the light-emitting element 14 caused by the actual drive current not meeting the expected value.

[0178] This ensures the continuity of brightness during the analog modulation process.

[0179] Specifically, the digital processing unit 40 is equipped with a digital IP module, which can determine the calculation and distribution of analog and digital data. In this embodiment, the magnitude of the driving current is obtained by replicating the reference current to a certain proportion through a current mirror structure. In actual use, due to factors such as process differences, size differences, etc. of the components in the driving current generation circuit 16 exceeding the design value, or current mirror mismatch, the actual driving current obtained by the conduction state of the switching element 20 does not meet the expected value. The actual driving current not meeting the expected value can be understood as the difference between the actual driving current and the expected value being outside the expected range. For example, referring to Figure 4, each light-emitting element 14 is connected to two current branches. When both switching elements 20 are on, the expected value of the driving current flowing through the light-emitting element 14 is I3' = K1 × Iref + K2 × Iref. When the difference between the actual driving current I3 and the expected value I3', |I3 - I3'|, is outside the expected range, it is determined that the actual driving current does not meet the expected value. The expected range can be set according to the needs, and this invention does not impose specific limitations here.

[0180] Since the luminance of the light-emitting element 14 is the integral of the current over time, the luminance of the light-emitting element 14 may become discontinuous when the actual driving current does not meet the expected value. For example, the light-emitting element 14 may suddenly dim or suddenly brighten. Therefore, the digital processing unit 40 can adjust the digital signal to compensate for the luminous duration based on the difference between the actual driving current and the expected value, thereby eliminating the problem of discontinuous luminance of the light-emitting element 14 caused by the actual driving current not meeting the expected value.

[0181] For example, if the actual drive current does not meet the expected value and is less than the expected value, the control unit 18 can adjust the digital signal to increase the light emission duration compensation so that the light emission brightness of the light-emitting element 14 remains basically unchanged. Optionally, when adjusting the digital signal to increase the light emission duration compensation, the comparison value (m) of the comparator 32 can be increased by adjusting the digital signal, thereby increasing the pulse width of the pulse width modulation signal.

[0182] For example, if the actual driving current does not meet the expected value and is greater than the expected value, the control unit 18 can adjust the digital signal to compensate for the reduction in the light emission duration, so that the light emission brightness of the light-emitting element 14 remains basically unchanged. Optionally, when adjusting the digital signal to compensate for the reduction in the light emission duration, the digital signal can be adjusted to reduce the comparison value (m) of the comparator 32, thereby reducing the pulse width of the pulse width modulation signal. The amount of increase or decrease can be calibrated and stored in advance through simulation, testing, etc., and the present invention does not specifically limit this.

[0183] The present invention does not specifically limit the location of the digital processing unit 40. Optionally, the digital processing unit 40 may be located around the pixel circuit 12.

[0184] Therefore, the digital processing unit 40 can ensure the continuity of brightness during analog modulation. Specifically, when a brightness discontinuity problem occurs during analog modulation, it can be compensated and adjusted digitally or dynamically adjusted by adjusting the modulation signal length, thereby ensuring the continuity of brightness during analog modulation.

[0185] Referring to Figures 1 to 11, the pixel driving circuit 100 of a specific embodiment of the present invention will be further described below.

[0186] Please refer to Figures 1 and 4. For the pixel driving circuit 100 with the structure shown in Figure 1, assuming that the number of analog bits J = 2 and it is in global mode, the corresponding digital-analog mixed pixel circuit 12 with current mirror structure is shown in Figure 4.

[0187] Assuming N=8, J=2, m=2, and LSB=1 and MSB=0 in the analog signal, the timing diagram under these conditions is shown in Figure 5. The timing diagrams in the relevant embodiments all select a clock signal with a uniform width period; however, the actual clock signal can have a period of equal or unequal width. When the count value of counter 30 is ≤2, the modulated signal output by comparator 32 is at a high level (first level). Combined with the set signal, the final output of comparator 32 is shown in Figure 5. The output of comparator 32 is logically ANDed with the input 2-bit analog signal, ultimately outputting the control signal EM that determines the selection of switching element 20. <0> With EM <1> The output control signal undergoes voltage domain conversion via a level shifter 38 to achieve N... <0> With N <1> Control. At this time, the control signal EM... <0> The count is 1 for the duration when the count value is ≤2 after the set signal is high. <0> When the circuit is turned on, the driving current K1×Iref flows through the light-emitting element 14, and the light-emitting duration is determined by the output of comparator 32. Control signal EM <1> The entire process is at a low level, N <1> Turn off.

[0188] Assuming N=8, J=2, m=4, and LSB=1 and MSB=1 in the analog signal, the timing diagram under these conditions is shown in Figure 6. When the count value of counter 30 is ≤4, the modulated signal output by comparator 32 is high. Combined with the set signal, the final modulated signal output by comparator 32 is shown in Figure 6. The modulated signal output by comparator 32 is logically ANDed with the input 2-bit analog signal, and the final output is the control signal EM that determines the selection of switching element 20. <0> With EM <1> As shown in Figure 6, EM at this time <0> &EM <1> The counter 30 is 1 for the duration when the count value is ≤4 after the set signal is high. <0> &N <1> When both are turned on, the driving current of K1×Iref+K2×Iref flows through the light-emitting element 14, and the light-emitting duration is determined by the output of comparator 32.

[0189] As can be seen from the output waveform of comparator 32 and the driving current I of the light-emitting element 14 in Figures 5 and 6, the duration of light emission can be determined by adjusting the set value m, and the operating state of the switching element 20 in the current mirror branch can be adjusted by changing the information in the analog signal, thereby determining the magnitude of the driving current flowing through the light-emitting element 14. The duration of light emission and the magnitude of the driving current together determine the brightness value of the light-emitting element 14.

[0190] For the pixel circuit 12 of the structure in Figure 1, assuming that the number of bits J of the analog signal is 4 and it is in global mode, the corresponding mixed-signal pixel circuit 12 with current mirror structure is shown in Figure 7.

[0191] Assuming N=8, J=4, m=3, and the four bits of the analog signal are 0111 from high to low, the timing diagram under this condition is shown in Figure 8. When the count value of counter 30 is ≤3, the level of the modulation signal output by comparator 32 is high. Combined with the set signal, the final modulation signal output by comparator 32 is shown in Figure 8. The modulation signal output by comparator 32 is logically ANDed with the input 4-bit analog signal, and the final output is the control signal EM that determines the selection of switching element 20. <0> ~EM <3> As shown in Figure 8, at this time EM <0> ~EM <2> The count is 1 for the duration when the count value is ≤3 after the set signal is high. <0> &N <1> &N <2> All are on, and the current of K1×Iref+K2×Iref+K3×Iref flows through the light-emitting element 14. The duration of light emission is determined by the output of comparator 32.

[0192] Figures 4 to 8 above illustrate the modulation mode using a single frame as an example. To better demonstrate the modulation method, two consecutive frames are used to describe the modulation mode. Assuming N=8, J=4, in the first frame m=2, the four bits of the analog signal are 0111 from high to low; in the second frame m=7, the four bits of the analog signal are 1010 from high to low. The corresponding timing diagram is shown in Figure 9. It can be seen that changing the value of m modulates the duration of light emission, and changing the analog signal adjusts the driving current of the light-emitting element 14. Therefore, the pixel driving circuit 100 of this architecture can modulate the brightness of the light-emitting element 14 in the following three ways.

[0193] To ensure consistent light emission duration, the analog signal is adjusted, the on / off state of the switching element 20 is switched, and the driving current of the light-emitting element 14 is adjusted to achieve brightness modulation.

[0194] To ensure that the analog signals are consistent (i.e., the driving current flowing through the light-emitting element 14 is consistent), the duration of light emission is adjusted to achieve brightness modulation.

[0195] The emission duration and analog signal (driving current magnitude) are adjusted synchronously to achieve brightness modulation.

[0196] It should be noted that the above embodiments are all described in the case where the switching element 20 is an NMOS transistor in the current mirror branch. The same solution can be achieved by replacing the NMOS transistor with a PMOS transistor; simply replace the AND logic gate of the control unit 18 with an inverting AND logic gate, or add an inverter after the level converter 38, based on the difference in logic control signals between NMOS and PMOS transistors. The corresponding structural diagram after replacement is shown in Figure 10, and equivalent substitutions can be made in related embodiments.

[0197] The above embodiments describe the analog signal in global mode. If the analog signal is adjusted to local mode, the same solution applies. Taking the analog signal bit depth J=4 and local mode as an example, the corresponding digital-analog mixed pixel circuit 12 of the current mirror structure after replacement is shown in Figure 11. Other related embodiments can be replaced in the same way.

[0198] The pixel driving circuit 100 of the present invention has at least the following characteristics:

[0199] 1. The pixel driving circuit 100 uses a current mirror structure to generate the driving current of the light-emitting element 14. The number of current mirror branches is flexibly adjustable, and the number of current mirror branches can be increased or decreased according to actual needs to achieve flexible modulation of the current of the light-emitting element 14. The advantage of this solution is that it has a wider current modulation range and can be applied to different application scenarios; at the same time, it eliminates the need to consider the consistency problem of Vth compensation of the driving transistor.

[0200] 2. Hybrid Digital-Analog Modulation Mode: The control unit 18 can control the pulse width of the modulation signal according to the PWM signal, and simultaneously modulate the on / off state of the switching element 20 of the current mirror branch according to the analog signal of the input J-bits, thereby determining the magnitude of the driving current flowing through the light-emitting element 14. The hybrid digital-analog modulation method together determines the brightness of the light-emitting element 14.

[0201] 3. In this pixel driving circuit 100, the analog signal in the multi-bit pixel data can be either a global signal or a local signal, making the signal method more flexible. It can flexibly adjust the on / off state of the current mirror branch switching element 20.

[0202] 4. In the pixel driving circuit 100, the memory 36 in the pixel circuit 12 has a multi-bit storage capacity. A certain correspondence can be pre-configured for controlling digital and analog signals to achieve modulation of the analog and digital signals. The correspondence method can be flexibly defined, and the correspondence can be flexibly matched as needed. The analog and digital signals can be in the form of analog signals with a certain number of bits, digital signals with a certain number of bits, or mixed signals of analog and digital components.

[0203] 5. The memory 36 in the pixel driving circuit 100 is more flexible and selective. For input analog and digital signals, it can be processed immediately without storage, or it can be stored and retrieved later as needed.

[0204] 6. The clock circuit 28 can be a single clock signal input to the pixel circuit 12, or multiple clock signals can be input to the pixel circuit 12. The clock signals can have a period of equal width or an unequal width, and the period can be adjusted accordingly.

[0205] 7. The digital processing unit 40 has a digital IP module, which can determine the calculation and distribution of analog and digital data. When a brightness discontinuity problem occurs during analog modulation, it can be compensated by digital adjustment or dynamically adjusted by adjusting the pulse width of the modulation signal, thereby ensuring the continuity of brightness during analog modulation.

[0206] An embodiment of the present invention provides a display device including a pixel driving circuit 100 of any of the above embodiments.

[0207] In the aforementioned display device, the control unit 18 can perform logical operations on the input multi-pixel data, control the on / off state of the corresponding switching element 20 and the conduction duration of the already conducted switching element 20, so as to modulate the brightness of the light-emitting element 14, making the light-emitting element 14 suitable for more application scenarios.

[0208] Specifically, the display device can be a self-emissive display device, including but not limited to micro-LED display devices, LED display devices, organic light-emitting diode (OLED) display devices, etc., and the present invention does not specifically limit it.

[0209] It should be noted that the above explanation of the implementation method and beneficial effects of the pixel driving circuit 100 also applies to the display device of this embodiment. To avoid redundancy, it will not be elaborated in detail here.

[0210] In the description of this specification, the terms "one embodiment," "some embodiments," "illustrative embodiment," "example," "specific example," or "some examples," etc., refer to specific features, structures, materials, or characteristics described in connection with an embodiment or example, which are included in at least one embodiment or example of the present invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples.

[0211] Although embodiments of the invention have been shown and described, those skilled in the art will understand that various changes, combinations, modifications, substitutions and alterations can be made to these embodiments without departing from the principles and spirit of the invention, the scope of which is defined by the claims and their equivalents.

[0212] 100: Pixel driving circuit 12: Pixel Circuit 14: Light-emitting element 16: Drive current generation circuit 18: Control Unit 20: Switching elements 22: Reference Current Generation Circuit 24: First Transistor 26: Second transistor 28: Clock Circuit 30: Counter 32: Comparator 34: Logic gate 36: Memory 38: Level Converter 40: Digital Processing Unit

Claims

1. A pixel driving circuit, comprising a pixel circuit, the pixel circuit comprising: At least one light-emitting element; At least one drive current generating circuit, the drive current generating circuit including a switching element electrically connected to the light-emitting element, the drive current generating circuit being configured to provide a drive current to a corresponding light-emitting element when the corresponding switching element is turned on; a control unit electrically connected to the switching element, the control unit generating, within the pixel circuit, an analog signal for controlling the magnitude of the drive current and a digital signal for controlling the duration of light emission based on input multi-bit pixel data, and controlling the on / off state of the corresponding switching element according to the analog signal to control the magnitude of the drive current, and controlling the on / off duration of the turned-on switching element according to the digital signal to control the duration of light emission of the light-emitting element, so as to jointly adjust the brightness of the light-emitting element.

2. The pixel driving circuit as described in claim 1, wherein the multi-bit pixel data can form one or more bit analog signals and one or more bit signals.

3. The pixel driving circuit as described in claim 2, wherein the multi-bit pixel data is a mixed signal formed by an analog signal and a digital signal through one input, and the mixed signal is parsed to obtain the analog signal and the digital signal; or, the multi-bit pixel data includes the analog signal input through one input and the digital signal input through another input.

4. The pixel driving circuit as claimed in claim 1, wherein the control unit includes a logic gate, the output of the logic gate is connected to the switching element, and the input of the logic gate is used to receive the analog signal and the pulse width modulation signal, wherein the pulse width modulation signal is modulated according to the digital signal.

5. The pixel driving circuit as described in claim 4, wherein the pulse width of the pulse width modulation signal is positively or negatively correlated with the magnitude of a set value, and the set value is determined by the digital signal.

6. The pixel driving circuit as described in claim 5, the pixel driving circuit comprising a clock circuit, a counter, and a comparator; the clock circuit being configured to output a clock signal; the counter being configured to receive the clock signal and count the number of pulses of the clock signal; the comparator being configured to output a pulse width modulation signal based on the relationship between the count value of the counter and the set value; and the logic gate being configured to output a control signal controlling the on / off state of the switching element based on the pulse width modulation signal and the analog signal.

7. The pixel driving circuit as described in claim 6, wherein when the counter's count value is less than or equal to a set value, the pulse width modulation signal level is a first level, and the analog signal level is a first level, the control signal output by the logic gate is a signal controlling the switching element to turn on; when the counter's count value is less than or equal to the set value, the pulse width modulation signal level is a first level, and the analog signal level is a second level, the control signal output by the logic gate is a signal controlling the switching element to turn off; when the counter's count value is greater than the set value, the pulse width modulation signal level is a second level, and the analog signal level is a second level, the control signal output by the logic gate is a signal controlling the switching element to turn off; and when the counter's count value is greater than the set value, the pulse width modulation signal level is a second level, and the analog signal level is a first level, the control signal output by the logic gate is a signal controlling the switching element to turn off.

8. As described in claim 6, in the pixel driving circuit, when the counter's count value is less than or equal to a set value, the pulse width modulation signal level is a first level, and the analog signal level is a second level, the control signal output by the logic gate is a signal to control the switching element to turn on; when the counter's count value is less than or equal to the set value, the pulse width modulation signal level is a first level, and the analog signal level is a first level, the control signal output by the logic gate is a signal to control the switching element to turn off; when the counter's count value is greater than the set value, the pulse width modulation signal level is a second level, and the analog signal level is a first level, the control signal output by the logic gate is a signal to control the switching element to turn on; when the counter's count value is greater than the set value, the pulse width modulation signal level is a second level, and the analog signal level is a second level, the control signal output by the logic gate is a signal to control the switching element to turn on.

9. The pixel driving circuit as claimed in claim 4, the pixel driving circuit having a global mode, wherein in the global mode, the pixel driving circuit is configured to directly input the analog signal to the logic gate.

10. The pixel driving circuit of claim 4, the pixel driving circuit having a local mode, the pixel driving circuit including a memory, wherein in the local mode, the pixel driving circuit is configured to input the analog signal and the digital signal to the memory, and to input the analog signal from the memory to the logic gate.

11. The pixel driving circuit as claimed in claim 1, the pixel driving circuit including a reference current generating circuit electrically connected to the at least one driving current generating circuit, the reference current generating circuit and a corresponding driving current generating circuit forming a current mirror structure.

12. The pixel driving circuit of claim 11, wherein the reference current generating circuit is configured to provide a reference current to each of the driving current generating circuits; and the driving current generating circuit is configured to generate the driving current associated with the reference current.

13. The pixel driving circuit as claimed in claim 12, wherein the driving current and the reference current satisfy the following conditions: IM = KM × Iref, where Iref represents the reference current, IM represents the driving current generated by the Mth driving current generating circuit, KM is the coefficient of the Mth driving current generating circuit, M <= J, J is the number of driving current generating circuits, and M and J are natural numbers and J >= 1.

14. The pixel driving circuit of claim 13, wherein the reference current generating circuit includes a first transistor, the driving current generating circuit includes a second transistor, and the coefficient of the driving current generating circuit is negatively correlated with the aspect ratio of the first transistor and positively correlated with the aspect ratio of the second transistor.

15. The pixel driving circuit of claim 2, wherein the control unit is configured to control the on / off state of the switching element according to the analog signal to obtain 2J-1 different driving current magnitudes, where J is the number of driving current generating circuits, J is a natural number and J>=1.

16. The pixel driving circuit as claimed in claim 2, wherein the control unit is configured to: after receiving the multi-bit pixel data, parse the multi-bit pixel data using a first preset information table to obtain the analog signal and the digital signal.

17. The pixel driving circuit of claim 2, the pixel driving circuit including a level converter electrically connected between the control unit and the switching element, the level converter being configured to perform mutual conversion between analog voltage domain and digital voltage domain.

18. The pixel driving circuit of claim 17, the pixel driving circuit including an inverter connected between the level converter and the switching element.

19. The pixel driving circuit of claim 1, the pixel driving circuit including a memory electrically connected to the control unit, the memory configured to store the multi-bit pixel data.

20. The pixel driving circuit of claim 2, the pixel driving circuit including a memory electrically connected to the control unit, the memory being configured to, upon receiving multi-bit pixel data, parse the multi-bit pixel data using a second preset information table to obtain and store the digital signal and the analog signal, and transmit the digital signal and the analog signal to the control unit.

21. The pixel driving circuit as claimed in claim 1, the pixel driving circuit including a digital processing unit electrically connected to the control unit, the digital processing unit being configured to: when the actual driving current does not meet the expected value during the process of the control unit controlling the magnitude of the driving current according to the analog signal, adjust the digital signal to compensate for the light emission duration according to the difference between the actual driving current and the expected value, thereby eliminating the problem of discontinuous light emission brightness of the light-emitting element caused by the actual driving current not meeting the expected value.

22. A display device comprising a pixel driving circuit as described in any one of claims 1 to 21.

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