Display apparatus and display control method with redundancy repair function

Abstract

This invention provides a display device, comprising: a display module including a plurality of display pixel units arranged in M ​​columns and P rows, and at least one backup pixel driving circuit; a non-volatile memory; and a driving control circuit. The driving control circuit controls the display module to execute a fault detection and backup repair procedure for the pixel units, thereby acquiring and storing repair data in the non-volatile memory. Furthermore, in the display procedure, the driving control circuit reads the repair data from the non-volatile memory and controls the plurality of display pixel units and at least one backup pixel driving circuit to perform image display based on the repair data and display data.

Description

[Technical Field]

[0001] This invention relates to a display device, and more particularly to a display device with a backup repair function. This invention also relates to a display control method with a backup repair function. [Previous Technology]

[0002] Traditional displays mostly use thin-film transistors (TFTs) as the driving substrate. However, the performance of TFT technology in high pixel density (Pixels Per Inch, PPI) applications has gradually been limited, making it difficult to meet the current demand for high-resolution displays. In contrast, micro displays use complementary metal-oxide-semiconductor (CMOS) as the driving substrate, successfully solving the challenge of high PPI displays. This allows applications such as augmented reality (AR), virtual reality (VR), and mixed reality (MR) to be more widely adopted in consumer, commercial, and military display fields. In addition, the CMOS driving substrate incorporates memory-in-pixel (MIP) technology, which distributes built-in memory within each pixel unit to store the data required for pixel display, further improving display performance and reducing the frequency of external data access, thereby further reducing overall power consumption.

[0003] However, prior art microdisplays are still limited by manufacturing processes and device performance in terms of light-emitting driver devices and built-in pixel data storage. Once the light-emitting driver devices or the built-in pixel memory are damaged, the entire driving device and display backplane may fail to function properly, thereby affecting the output image quality and even causing the entire device to fail. Therefore, how to improve the reliability of microdisplays and ensure the stability of light-emitting driver devices and built-in memory storage has become an important issue in the current technology field.

[0004] In view of this, the present invention addresses the shortcomings of the prior art by proposing a display device with built-in pixel memory and light-emitting driving circuit, thereby improving the yield of the display device through a backup repair mechanism and ensuring the integrity of the output image quality. [Summary of the Invention]

[0005] In one viewpoint, the present invention provides a display device comprising: a display module including a plurality of display pixel units arranged in M ​​columns and P rows in physical position and at least one backup pixel driving circuit; a non-volatile memory; and a driving control circuit for controlling the display module to perform a pixel unit backup repair procedure to obtain and store repair data in the non-volatile memory, and for a display procedure to read the repair data from the non-volatile memory, and to control the plurality of display pixel units and the at least one backup pixel driving circuit to display an image based on the repair data and a display data.

[0006] In a preferred embodiment, each of the plurality of display pixel units includes: a pixel unit memory for storing display data corresponding to a portion of the display pixel unit; a main pixel driving circuit including Q sub-pixel driving circuits, where Q is an integer greater than or equal to 1; a driving repair circuit coupled to the main pixel driving circuit and the backup pixel driving circuit; a pixel circuit coupled to the driving repair circuit, including corresponding Q light-emitting diodes; and a pixel unit logic circuit coupled to the pixel unit memory, the main pixel driving circuit, and the backup pixel driving circuit; wherein in the display program, the pixel... The pixel unit logic circuit, under the control of the drive control circuit, reads and converts the display data of the portion of the pixel unit memory to generate a dimming signal. When at least one of the Q sub-pixel drive circuits is determined to be faulty, the pixel unit logic circuit, based on the repair data, controls the drive repair circuit to electrically connect the non-faulty portion of the Q sub-pixel drive circuits and the backup pixel drive circuit to the corresponding Q light-emitting diodes. The pixel unit logic circuit uses the dimming signal to control the non-faulty portion of the Q sub-pixel drive circuits and the backup pixel drive circuit to generate corresponding Q drive currents to drive the Q light-emitting diodes to emit light.

[0007] In a preferred embodiment, each of the display pixel units further includes one of the backup pixel driving circuits; or, the display module includes R backup pixel driving circuits, wherein R is greater than 1 and less than the product of M and N, wherein a predetermined number of the display pixel units share one backup pixel driving circuit.

[0008] In a preferred embodiment, the pixel unit backup repair procedure includes a driving circuit backup repair procedure, wherein the driving circuit backup repair procedure includes: the driving control circuit controlling at least one sub-pixel driving circuit of the Q sub-pixel driving circuits to generate a test current to drive the corresponding light-emitting diode to emit light; determining whether the sub-pixel driving circuit is faulty based on the brightness of the light-emitting diode or the level of the test current; and when it is determined to be faulty, determining the corresponding repair data based on a driver fault address of the faulty sub-pixel driving circuit, wherein the repair data includes mapping information between the driver fault address and one of the corresponding backup pixel driving circuits as an alternative.

[0009] In a preferred embodiment, each of the sub-pixel driving circuit and the backup pixel driving circuit includes: a reference driving current source and a modulation crystal, which are connected in series to the driving repair circuit; wherein in the display program, the pixel unit logic circuit controls the modulation crystal with the dimming signal to generate the driving current based on the reference driving current source, thereby driving the corresponding light-emitting diode to emit light with the corresponding light intensity.

[0010] In a preferred embodiment, the dimming signal controls the dimming crystal in a linear or pulse-width modulation manner to adjust the light intensity of the light-emitting diode.

[0011] In a preferred embodiment, the driving repair circuit includes a plurality of path control switches coupled between the Q sub-pixel driving circuits, the backup pixel driving circuit, and the Q light-emitting diodes. The pixel unit logic circuit generates a corresponding plurality of path control signal according to the repair data to control the plurality of path control switches to turn off the faulty sub-pixel driving circuit and turn on the backup pixel driving circuit to generate the corresponding driving current to drive the corresponding light-emitting diode to emit light.

[0012] In a preferred embodiment, the pixel unit memory includes: a primary pixel memory including T primary memory bits, where T is an integer greater than or equal to 1; and a backup pixel memory including R backup memory bits, where R is an integer greater than or equal to 1; wherein in the display program, when at least one of the T primary memory bits is determined to be faulty, the pixel unit logic circuit controls the non-faulty portion of the T primary memory bits to cooperate with the R backup memory bits according to the repair data to store or read the display data.

[0013] In a preferred embodiment, the pixel unit backup repair procedure includes a memory backup repair procedure, wherein the memory backup repair procedure includes: the drive control circuit reads and writes test data to the main pixel memory to determine whether any main memory bit in the main pixel memory is faulty; and when a fault is determined, the corresponding repair data is determined according to the memory bit fault address of the faulty main memory bit, wherein the repair data includes mapping information between the memory bit fault address and one of the corresponding backup memory bits as a replacement.

[0014] In a preferred embodiment, the display module and the driving control circuit are integrated on a single chip, and the pixel unit memory, the main pixel driving circuit, the driving repair circuit, the pixel circuit and the pixel unit logic circuit in each display pixel unit, as well as the corresponding backup pixel driving circuit, are all physically located near each other.

[0015] In another viewpoint, the present invention provides a display device comprising: a display module including a plurality of display pixel units arranged in M ​​columns and P rows in physical position, wherein each of the plurality of display pixel units includes a pixel unit memory and a pixel unit logic circuit, the pixel unit memory being used to store display data corresponding to a portion of the display pixel unit, the pixel unit logic circuit being coupled to the pixel unit memory, wherein the pixel unit memory includes: a primary pixel memory including T primary memory bits, wherein T is an integer greater than or equal to 1; and a backup pixel memory including R backup memory bits, where R is an integer greater than or equal to 1; a non-volatile memory; and a drive control circuit for controlling the display module to perform a memory backup repair program to obtain and store repair data in the non-volatile memory, and for a display program to read the repair data from the non-volatile memory, and control the plurality of display pixel units to display images according to the repair data and the display data; wherein in the display program, when at least one of the T main memory bits is determined to be faulty, the pixel unit logic circuit controls the non-faulty part of the T main memory bits to cooperate with the R backup memory bits to store or read the display data according to the repair data.

[0016] In another viewpoint, the present invention provides a display control method for controlling a display module, wherein the display module includes a plurality of display pixel units arranged in M ​​columns and P rows in physical location and at least one backup pixel driving circuit. The display control method includes: controlling the display module to perform a pixel unit backup repair procedure to obtain and store repair data to a non-volatile memory; and reading the repair data from the non-volatile memory in a display procedure, and controlling the plurality of display pixel units and the at least one backup pixel driving circuit to display an image based on the repair data and a display data.

[0017] In a preferred embodiment, each of the plurality of display pixel units includes a pixel unit memory for storing display data corresponding to a portion of the display pixel unit, wherein the display program includes: reading and converting a portion of the display data from the pixel unit memory to generate a dimming signal, wherein each of the plurality of display pixel units further includes a main pixel driving circuit and the at least one backup pixel driving circuit, the main pixel driving circuit including Q sub-pixel driving circuits, where Q is an integer greater than or equal to 1; when at least one of the Q sub-pixel driving circuits is determined to be faulty, controlling the non-faulty portion of the Q sub-pixel driving circuits and the backup pixel driving circuit to be electrically connected to Q light-emitting diodes corresponding to a pixel circuit according to the repair data; and controlling the non-faulty portion of the Q sub-pixel driving circuits and the backup pixel driving circuit to generate corresponding Q driving currents with the dimming signal to drive the Q light-emitting diodes to emit light.

[0018] In a preferred embodiment, the pixel unit backup repair procedure includes a driving circuit backup repair procedure, wherein the driving circuit backup repair procedure includes: controlling at least one of the Q sub-pixel driving circuits to generate a test current to drive the corresponding light-emitting diode to emit light; determining whether the sub-pixel driving circuit is faulty based on the brightness of the light-emitting diode or the level of the test current; and when it is determined to be faulty, determining the corresponding repair data based on a driver fault address of the faulty sub-pixel driving circuit, wherein the repair data includes mapping information between the driver fault address and one of the corresponding backup pixel driving circuits as an alternative.

[0019] In a preferred embodiment, the dimming signal controls the dimming crystal of each of the sub-pixel driving circuit and the backup pixel driving circuit in a linear or pulse-width modulation manner to adjust the light intensity of the light-emitting diode.

[0020] In a preferred embodiment, the display program includes: disabling at least one faulty sub-pixel driving circuit according to the repair data, and controlling the backup pixel driving circuit to generate a corresponding driving current to drive the corresponding light-emitting diode to emit light.

[0021] In a preferred embodiment, the pixel unit memory includes: a primary pixel memory including T primary memory bits, where T is an integer greater than or equal to 1; and a backup pixel memory including R backup memory bits, where R is an integer greater than or equal to 1; wherein the display program includes: when at least one of the T primary memory bits is determined to be faulty, controlling the non-faulty portion of the T primary memory bits to cooperate with the R backup memory bits according to the repair data to store or read the display data.

[0022] In a preferred embodiment, the pixel unit backup repair procedure includes a memory backup repair procedure, wherein the memory backup repair procedure includes: reading and writing test data to the main pixel memory to determine whether any main memory bit in the main pixel memory is faulty; and when a fault is determined, determining the corresponding repair data based on the memory bit fault address of the faulty main memory bit, wherein the repair data includes mapping information between the memory bit fault address and one of the corresponding backup memory bits as a replacement.

[0023] In a preferred embodiment, the pixel unit memory, the main pixel driving circuit and the pixel circuit in each display pixel unit, as well as the corresponding backup pixel driving circuit, are all physically located near each other.

[0024] In another viewpoint, the present invention provides a display control method for controlling a display module, wherein the display module includes a plurality of display pixel units arranged in M ​​columns and P rows in physical location. The display control method includes: controlling the display module to perform a memory backup repair procedure to obtain and store repair data to a non-volatile memory, wherein each of the plurality of display pixel units includes a pixel unit memory for storing display data corresponding to a portion of the display pixel unit, wherein the pixel unit memory includes: a main... The system includes a pixel memory comprising T primary memory bits, where T is an integer greater than or equal to 1; and a backup pixel memory comprising R backup memory bits, where R is an integer greater than or equal to 1; and a display program reads the repair data from the non-volatile memory and controls the plurality of display pixel units to display an image based on the repair data and the display data; wherein the display program includes: when at least one of the T primary memory bits is determined to be faulty, controlling the non-faulty portion of the T primary memory bits to cooperate with the R backup memory bits to store or read the display data based on the repair data.

[0025] The following detailed description of specific embodiments will make it easier to understand the purpose, technical content, features and effects achieved by the present invention.

Implementation Method

[0048] The diagrams in this invention are all schematic and are mainly intended to show the coupling relationship between circuits and the relationship between signal waveforms. The circuits, signal waveforms and frequencies are not drawn to scale.

[0049] Figure 1 shows a display device, which includes a display module 200, a non-volatile memory 40, and a drive control circuit 100. The drive control circuit 100 further includes a first sub-drive control circuit 20 and a second sub-drive control circuit 30, wherein the first sub-drive control circuit 20 is arranged in the row direction and is responsible for transmitting and receiving control signals in the row direction to control the display module 200; while the second sub-drive control circuit 30 is arranged in the column direction and is responsible for transmitting and receiving control signals in the column direction to control the display module 200. The display module 200 includes a plurality of display pixel units 10[1,1]-10[M,P] arranged in M ​​columns and P rows.

[0050] The display device is further configured to execute a pixel unit backup repair procedure, which is used to test and acquire fault conditions within the display pixel units 10[1,1]-10[M,P], such as faults in the driving circuit or memory within the pixel unit. During the test, the drive control circuit 100 stores these fault conditions as repair data in the non-volatile memory 40. In the display procedure, the drive control circuit 100 reads the repair data from the non-volatile memory 40 and, based on the repair data and the display data received in the display procedure, further controls the display pixel units 10[1,1]-10[M,P] and the backup pixel driving circuit 104. In particular, according to the present invention, the drive control circuit 100 can use the backup pixel driving circuit 104 to replace the faulty driving circuit or memory in the display module 200 for display operation, thereby ensuring the normal operation of the display device and the picture quality. The specific structure and operation of the backup circuit will be described in detail in the following paragraphs.

[0051] Please refer to Figures 1 and 2 simultaneously. Figure 2 shows a block diagram of an embodiment of a display pixel unit structure in a display device. The display pixel unit 10 includes a pixel unit logic circuit 101, a pixel unit memory 102, a main pixel driving circuit 103, a backup pixel driving circuit 104, a drive repair circuit 105, and a pixel circuit 106. In the embodiment of Figure 2, each display pixel unit 10 includes an independent backup pixel driving circuit 104. The pixel unit memory 102 is configured to store a portion of the display data corresponding to that display pixel unit 10. It is worth noting that, in one embodiment, the pixel unit memory 102 is configured in each display pixel unit, thereby distributing the display data to the display pixel units. This configuration in the display program can effectively reduce the power required for memory access, thereby effectively reducing the power consumption of the display device.

[0052] The main pixel driving circuit 103 includes Q sub-pixel driving circuits. In this embodiment, Q is, for example, 3, shown as 103R, 103G, and 103B in Figure 2. Under the premise of no fault, these circuits are used to drive LEDR, LEDG, and LEDB in the light-emitting diodes, respectively. The drive repair circuit 105 is coupled to the main pixel driving circuit 103 and the backup pixel driving circuit 104. In the event of a fault in at least one of the sub-pixel driving circuits 103R, 103G, and 103B, the repair circuit 105 rearranges the electrical connection between the fault-free sub-pixel driving circuit and the backup pixel driving circuit 104 and the light-emitting diodes LEDR, LEDG, and LEDB, and further generates corresponding drive currents IdrvR, IdrvG, and IdrvB to drive the light-emitting diodes LEDR, LEDG, and LEDB to emit light. Details are described below.

[0053] In the pixel unit backup repair procedure, the pixel unit logic circuit 101 is controlled by the drive control circuit 100, which is responsible for controlling the main pixel drive circuit 103 to perform drive operations, and judging whether there are faults in the sub-pixel drive circuits 103R, 103G and 103B in the main pixel drive circuit 103 based on the result after drive. When a fault is detected, the pixel unit logic circuit 101 will send the relevant fault information back to the drive control circuit 100, which will convert the fault information into repair data and store it in the non-volatile memory 40.

[0054] On the other hand, in the display program, the pixel unit logic circuit 101 obtains display data from the drive control circuit 100 and stores it in the pixel unit memory 102. In addition, the pixel unit logic circuit 101 also obtains repair data stored in the non-volatile memory 40 from the drive control circuit 100. Based on this repair data, the pixel unit logic circuit 101 controls the drive repair circuit 105 to determine whether it is necessary to activate the backup pixel drive circuit 104 to replace the faulty sub-pixel drive circuit. If the repair operation is initiated, the pixel unit logic circuit 101 controls the non-faulty sub-pixel drive circuit and the backup pixel drive circuit 104 according to the dimming signal to generate corresponding drive currents IdrvR, IdrvG and IdrvB to drive the corresponding light-emitting diodes LEDR, LEDG and LEDB to emit light, ensuring that the display device can still display completely even in the event of a fault.

[0055] Figure 3 shows another embodiment of a display device, which has a structure similar to that of Figure 2. In the embodiment of Figure 3, the number of backup pixel driving circuits 104 included in the display module is less than the number of display pixel units 10, and a shared design is adopted. Specifically, in this embodiment, Figure 3 shows two display pixel units 10a and 10b, wherein each display pixel unit includes pixel unit logic circuits 101 (101a, 101b), pixel unit memory 102 (102a, 102b), main pixel driving circuits 103 (103a, 103b) and pixel circuits 106 (106a, 106b), but no separate backup pixel driving circuit is configured. In this embodiment, display pixel units 10a and 10b share a backup pixel driving circuit 104 located outside of both of them. When a sub-pixel driving circuit in the main pixel driving circuits 103a and 103b of the display pixel unit 10a or 10b fails, the drive repair circuit 105 (105a, 105b) within the display pixel unit 10a or 10b will, based on repair data, rearrange the electrical connection between the unfailed sub-pixel driving circuit and the shared backup pixel driving circuit 104, and generate a corresponding driving current to drive the corresponding light-emitting diode to emit light. This embodiment reduces the number of backup pixel driving circuits while still ensuring the overall functionality and image quality of the display device. It should be noted that the aforementioned shared ratio can be adjusted according to requirements such as fault coverage and cost.

[0056] Figure 4 shows a specific display pixel unit driving structure, which is a specific embodiment of the structure described in Figure 2. This embodiment details the specific architecture and operation of the main pixel driving circuit 103, the backup pixel driving circuit 104, and the driving repair circuit 105.

[0057] In this embodiment, the main pixel driving circuit 103 further includes sub-pixel driving circuits 103Ra, 103Ga, and 103Ba, which are used to drive light-emitting diodes LEDR, LEDG, and LEDB respectively under normal operation. The sub-pixel driving circuits 103Ra, 103Ga, and 103Ba each contain a driving structure composed of two transistors: sub-pixel driving circuit 103Ra includes transistors T1 and T2; sub-pixel driving circuit 103Ga includes transistors T3 and T4; and sub-pixel driving circuit 103Ba includes transistors T5 and T6.

[0058] Among them, transistors T1, T3, and T5 are controlled by bias voltage Vbs to provide a fixed DC bias current; while transistors T2, T4, and T6 are connected in series below transistors T1, T3, and T5 and are controlled by dimming signals PWR (dimming signal red channel), PWG (dimming signal green channel), and PWB (dimming signal blue channel) to adjust the drive current according to dimming requirements, thereby realizing brightness control of light-emitting diodes LEDR, LEDG, and LEDB.

[0059] In addition, the backup pixel driving circuit 104 also adopts a similar architecture, including transistors TS1 and TS2. Transistor TS1 is also controlled by the bias voltage Vbs to provide a fixed bias current, while transistor TS2 is controlled by the dimming signal PWS to provide backup driving current to the required light-emitting diode when needed.

[0060] Under normal operation, the sub-pixel driving circuits 103Ra, 103Ga, and 103Ba are electrically connected to the light-emitting diodes LEDR, LEDG, and LEDB through the driving repair circuit 105 (which includes multiplexers 1051a, 1051b, and 1051c), and provide driving currents IdrvR, IdrvG, and IdrvB respectively to drive the corresponding light-emitting diodes to emit light. In this embodiment, a control switch is connected in series between the top of each light-emitting diode LEDR, LEDG, and LEDB and the driving repair circuit 105. This switch is controlled by the control signal EM to determine whether to conduct the driving current.

[0061] In this embodiment, to simulate the failure of the main pixel driving circuit, Figure 4 shows a scenario where the sub-pixel driving circuit 103Ra fails. In this scenario, transistors T1 or T2 fail and therefore cannot provide normal driving current. At this time, the pixel unit logic circuit 101 controls the backup pixel driving circuit 104 to replace the failed sub-pixel driving circuit 103Ra, and changes the control waveform of the original dimming signal PWR to output to the dimming signal PWS, so as to drive transistor TS2 to generate the corresponding alternative driving current. In addition, the drive repair circuit 105 (i.e., multiplexer) selects the alternative driving current provided by the backup pixel driving circuit 104 as the driving current IdrvR according to the control of the pixel unit logic circuit 101, while the driving currents IdrvG and IdrvB maintain the output from the sub-pixel driving circuits 103Ga and 103Ba, thereby completing the alternative drive and ensuring the stability of the display screen.

[0062] Figure 5 shows an embodiment of the specific display pixel unit driving structure corresponding to Figure 3. This embodiment is similar to the embodiment of Figure 4, but the main difference is that the backup pixel driving circuit 104 is shared by multiple display pixel units, rather than the embodiment in Figure 4, where each display pixel unit contains an independent backup pixel driving circuit.

[0063] In this embodiment, the left half of Figure 5 shows a display pixel unit 10a, the right half shows another display pixel unit 10b, and the center shows a shared backup pixel driving circuit 104. The output terminal of the backup pixel driving circuit 104, i.e., the drain of the transistor TS2, is coupled to the driving repair circuit 105a in the display pixel unit 10a and the driving repair circuit 105b in the display pixel unit 10b, respectively. More specifically, the output terminal of the backup pixel driving circuit 104 is coupled to the multiplexer in the driving repair circuits 105a and 105b, for selecting whether to enable the backup pixel driving circuit 104 as the driving current source to replace the faulty sub-pixel driving circuit in the display pixel unit 10a or 10b. The specific driving method in this embodiment is similar to that in the embodiment of Figure 4, so it will not be described in detail again here.

[0064] In the embodiment of FIG5, two display pixel units 10a and 10b are shown to share a backup pixel driving circuit 104. However, in other embodiments, more display pixel units may share a single backup pixel driving circuit to improve the utilization efficiency of the backup circuit and reduce the overall circuit cost.

[0065] Figure 6 shows a schematic diagram of a specific embodiment of the drive repair circuit corresponding to the display pixel unit in Figure 4. In this embodiment, the drive repair circuit 105c includes six multiplexer switches SW1 to SW6. Switches SW1, SW2, and SW3 are used to select whether the backup pixel drive circuit 104 provides the alternative drive current and transmits this alternative drive current to the corresponding light-emitting diodes LEDB, LEDG, or LEDR. Switches SW4, SW5, and SW6 correspond to the sub-pixel drive circuits 103Ba, 103Ga, and 103Ra, respectively, and are used to select whether the main pixel drive circuit 103 provides the drive current.

[0066] During normal operation, multiplexer switches SW4, SW5, and SW6 are in the on state, while multiplexer switches SW1, SW2, and SW3 are in the off state. Under this operation, the display pixel unit is driven by sub-pixel driving circuits 103Ra, 103Ga, and 103Ba to drive light-emitting diodes LEDB, LEDG, and LEDR respectively.

[0067] On the other hand, when, for example, the sub-pixel driving circuit 103Ra fails, the switching state within the drive repair circuit 105c will be adjusted. Specifically, the multiplexing switch SW6 is turned off, and the multiplexing switch SW3 is turned on, allowing the backup pixel driving circuit 104 to replace the failed sub-pixel driving circuit 103Ra and provide the corresponding driving current. On the other hand, multiplexing switches SW4 and SW5 remain on, and multiplexing switches SW1 and SW2 remain off, thereby allowing the sub-pixel driving circuits 103Ba and 103Ga to continue providing normal driving current. Other details of this embodiment are similar to those in FIG4 and will not be repeated here.

[0068] Figure 7 shows a schematic diagram of a specific embodiment of the drive repair circuit corresponding to the display pixel unit in Figure 5. This embodiment is used to illustrate the specific structure and operation of the drive repair circuits 105a and 105b in a scenario where multiple display pixel units share a single backup pixel drive circuit.

[0069] In this embodiment, display pixel units 10a and 10b respectively include drive repair circuits 105a and 105b. These two drive repair circuits each include multiplexer switches SW1 to SW12. Display pixel units 10a and 10b share a backup pixel drive circuit 104 through multiplexer switches SW1 to SW12 to ensure that compensation can still be performed through the drive repair mechanism when one of the pixel units fails. Other details are similar to those in Figures 5 and 6, and will not be repeated here.

[0070] In the embodiments of Figures 6 and 7, the multiplexer switches SW1 to SW12 are controlled by the switch control signals SG1 to SG12 generated by the pixel unit logic circuit 101. Through the aforementioned operation, the drive repair circuit can dynamically select the source of the drive current according to the control of the pixel unit logic circuit.

[0071] FIG8 shows a flowchart of a pixel memory backup repair procedure according to an embodiment of a display device of the present invention. The pixel memory backup repair procedure 50 in FIG8 illustrates a pre-test procedure for potential faults in the main pixel memory. Referring to FIG1 and FIG2 simultaneously, firstly, in step 501, the system writes test data into the main pixel memory 102 through the aforementioned pixel unit logic circuit 101 to check whether the main pixel memory 102 has a fault. Next, in step 502, the pixel unit logic circuit 101 reads the previously written test data from the main pixel memory 102. Subsequently, in step 503, the system determines whether the main pixel memory 102 has a faulty bit based on the read test data; if a faulty bit is detected in step 503, the process proceeds to step 504, where the corresponding repair data is stored in the non-volatile memory (NVM) 40 as a reference for subsequent repair. Otherwise, if no faulty bit is detected, the process directly proceeds to step 505 to execute the normal display procedure. This pixel memory backup repair program ensures that the necessary repair data has been obtained in advance based on the test results of the main pixel memory before the display program starts. It should be noted that the pixel memory backup repair program 50 preferably records the test and repair data for all display pixel units 10[i,j] in Figure 1.

[0072] Please refer to Figures 1, 2, and 9 simultaneously. Figure 9 shows a flowchart of a pixel unit backup repair procedure according to an embodiment of a display device of the present invention. The pixel unit backup repair procedure flowchart 60 of Figure 9 illustrates a pre-test procedure for potential faults in the sub-pixel driving circuit, in order to check whether the sub-pixel driving circuits 103R, 103G, and 103B within the main pixel driving circuit 103 can correctly generate the corresponding driving current according to the test data. First, in step 506, the system writes the test data into the pixel unit memory 102 through the aforementioned pixel unit logic circuit 101. Next, in step 507, the pixel unit logic circuit 101 reads the previously written test data from the pixel unit memory 102.

[0073] Subsequently, in step 508, the pixel unit logic circuit 101 controls the sub-pixel driving circuits 103R, 103G, and 103B within the main pixel driving circuit 103 according to the read test data to drive the light-emitting diode. In step 509, the system determines whether the sub-pixel driving circuits 103R, 103G, and 103B have malfunctioned based on the brightness or driving current level of the LED. If a malfunction is detected in any sub-pixel driving circuit in step 509, the process proceeds to step 510, where the corresponding repair data is stored in the non-volatile memory (NVM) 40 for subsequent repair reference. Conversely, if no malfunction is detected in any sub-pixel driving circuit, the process directly proceeds to step 505 to execute the normal display program.

[0074] The pixel unit backup repair program ensures that the operating status of the sub-pixel driving circuit is pre-tested and recorded before the display program starts, so that alternative driving can be performed in case of failure, thereby improving the reliability of the display device. It should be noted that the pixel unit backup repair program 60 preferably records the test and repair data for all display pixel units 10[i,j] in FIG1.

[0075] FIG10A shows a flowchart of a display program according to an embodiment of a display device of the present invention, which corresponds to the display program of FIG8 or FIG9 mentioned above. The flowchart of FIG10A shows how display data is read and converted according to repair data in the display program to ensure correct display driving operation. Referring to FIG1 and FIG2 simultaneously, firstly, in step 5051, the system (e.g., the drive control circuit) reads the repair data from the non-volatile memory (NVM) 40 and receives the display data.

[0076] Next, in step 5052, the drive control circuit writes display data into the display pixel unit memory 102 according to the repair data through the corresponding pixel unit logic circuit 101. If the display pixel unit memory 102 is faulty, it can write to the backup pixel memory to ensure that the subsequent display process can be correctly processed according to the repair information. Subsequently, in step 5053, the pixel unit logic circuit 101 reads display data from the main pixel memory 102 or the backup pixel memory according to the repair data.

[0077] In step 5054, the pixel unit logic circuit 101 converts the read display data into dimming signals (such as dimming signals PWR, PWG, PWB, PWS) to control the sub-pixel driving circuit or the backup pixel driving circuit 104. Finally, in step 5055, the pixel unit logic circuit 101 controls the sub-pixel driving circuit or the backup pixel driving circuit 104 with dimming signals according to the repair data, and simultaneously controls the drive repair circuit 105 to generate drive currents (IdrvR, IdrvG, IdrvB) to drive the light-emitting diodes (LEDR, LEDG, LEDB) respectively.

[0078] This embodiment ensures that when the display device is displaying, it can make appropriate compensation and adjustment to the pixel unit memory 102 and / or according to the repair data to ensure the correctness of the display driving operation.

[0079] FIG10B shows a flowchart of a display program according to an embodiment of a display device of the present invention. Please refer to FIG1 and FIG2 at the same time. This embodiment is similar to the flowchart shown in FIG10A. The difference is that in this embodiment, the backup pixel driving circuit 104 and the driving repair circuit 105 shown in FIG2 are omitted. In other words, the flowchart in FIG10B is only for repairing the fault of the pixel unit memory 102.

[0080] Specifically, in the process 505' of Figure 10B, steps 5051-5054 are similar to those in Figure 10A, while in step 5055', the pixel unit logic circuit 101 directly controls the sub-pixel driving circuit with only the dimming signal to generate driving current (IdrvR, IdrvG, IdrvB) to drive the light-emitting diodes (LEDR, LEDG, LEDB).

[0081] FIG10C shows a flowchart of a display program according to an embodiment of a display device of the present invention. Referring also to FIG4, this embodiment is similar to the flowchart shown in FIG10A, except that in this embodiment, the backup pixel memory in the pixel unit memory 102 of FIG4 is omitted. Therefore, the flowchart of FIG10C only repairs the fault of the sub-pixel driving circuit. Specifically, in the flowchart 505” of FIG10C, in step 5052’, the pixel unit logic circuit 101 only writes display data into the pixel unit memory 102 (at this time, only the main pixel memory as shown in FIG4 is included), and in the display data reading step 5053’, the pixel unit logic circuit 101 only reads display data from the pixel unit memory 102.

[0082] FIG11A shows the structure of a display pixel unit according to an embodiment of the present invention, and illustrates how the pixel unit logic circuit 101 receives and generates control signals to control the various circuit units in the display pixel unit 10[i,j]. Please refer to FIG1 and FIG2 simultaneously. In this embodiment, the display pixel unit 10[i,j] mainly includes a pixel unit logic circuit 101, a pixel unit memory 102, a main pixel driving circuit 103, a backup pixel driving circuit 104, a driving repair circuit 105, and a pixel circuit 106.

[0083] In the i-th row, the pixel unit logic circuit 101 receives multiple input signals, namely the sequence character data signal WD[i], the sequence bit write trigger signal WR_BIT[i], and the pulse width reference signal PWM_PA[i], and generates corresponding output control signals, including the dimming signal PWM[i,j], the bit trigger signal WL[i][T+R:1], and the sequence bit line signal BL[i,j]. Among them, the dimming signal PWM[i,j] corresponds to the aforementioned dimming signals, such as PWR, PWG, and PWB. This embodiment uses one of the dimming signals as an example to illustrate the generation and application of the dimming signal PWM[i,j]. The bit trigger signal WL[i][T+R:1] and the sequence bit line signal BL[i,j] are mainly used to control the pixel unit memory 102 to store and retrieve display data, thereby controlling the driving operation of the driving circuit.

[0084] Figure 11B shows an array of pixel unit logic circuits 101 consisting of P rows and M columns. For example, in the i-th row and j-th column, the corresponding pixel unit logic circuit is 101[i,j]. As explained above, each pixel unit logic circuit 101[i,j] receives the sequence character data signal WD[i], the sequence bit write trigger signal WR_BIT[i], and the pulse width reference signal PWM_PA[i] from its row, and generates the corresponding dimming signal PWM[i,j] and the sequence bit line signal BL[i,j].

[0085] Figure 11C shows a schematic diagram of a specific embodiment of a display pixel memory according to one embodiment of the present invention. This embodiment shows pixel unit memories 102[i,1]-102[i,M] in the i-th horizontal column and M vertical columns. Taking pixel unit memory 102[i,1] as an example, it contains a total of T main memory bits and R backup memory bits, that is, a total of T+R memory bits. In terms of horizontal control, each memory bit is controlled by a bit trigger signal WL. Specifically, the main memory bits are controlled by bit trigger signals WL[i][1], WL[i][2]...WL[i][T], while the backup memory bits are controlled by bit trigger signals WL[i][T+1]...WL[i][T+R]. In vertical control, the pixel unit memory 102[i,1]-102[i,M] in the i-th column are controlled by the corresponding sequence bit line signals BL[i,1]-BL[i,M] respectively.

[0086] Figure 12A shows a partial circuit diagram of the pixel unit logic circuit 101[i,j]. In this embodiment, the pixel unit logic circuit 101[i,j] includes an AND gate, which performs an AND logic operation on the sequence character data signal WD[i] and the sequence bit write trigger signal WR_BIT[i] to generate the sequence bit line signal BL[i,j].

[0087] Figure 12B shows the waveform diagram corresponding to the pixel unit logic circuit 101[i,j] portion of the circuit described in Figure 12A. In this embodiment, T is set to 8 bits, and R is set to 1 bit, so the sequence bit write trigger signal WR_BIT[i] generates a total of 9 pulses. These pulses serve as synchronization trigger pulses to synchronize the sequence character data signal WD[i], and are ultimately used to generate the sequence bit line signal BL[i,j] through gate-and-signal operations. In this way, the waveform of the sequence bit line signal BL[i,j] is synchronized with the sequence bit write trigger signal WR_BIT[i].

[0088] Figure 13A shows a portion of the pixel unit logic circuit 101[i,j] according to one embodiment of the present invention, which includes an AND gate. The AND gate takes the sequence bit line signal BL[i,j] and the pulse width reference signal PWM_PA[i] as inputs, and generates a dimming signal PWM[i,j] after AND logic operation. Figure 13B shows the corresponding waveform diagram, in which the pulse width reference signal PWM_PA[i] is used as a reference, and its pulse width gradually increases in the form of powers of 2, that is, its duty cycle gradually increases with the sequence power of 2. The dimming signal PWM[i,j] generated by the AND gate operation determines its level according to the bit data (e.g., 1 or 0) corresponding to the sequence bit line signal BL[i,j], and determines the duration of the level based on the pulse width of the pulse width reference signal PWM_PA[i], and finally generates a dimming signal PWM[i,j] with a corresponding dimming duty cycle.

[0089] Figure 14 shows the control signal waveforms of a pixel unit memory 102 according to an embodiment of the present invention. Taking pixel unit memory 102[i,j] as an example, it illustrates the waveforms of the bit trigger signals WL[i][1] to WL[i][T], WL[i][T+1] to WL[i][T+R] and the sequence bit line signal BL[i,j] that control each memory bit of the memory. Specifically, the bit trigger signals WL[i][1] to WL[i][T] are used to control T main memory bits, and the bit trigger signals WL[i][T+1] to WL[i][T+R] are used to control R backup memory bits. In this embodiment, R is, for example, 2, that is, pixel unit memory 102[i,j] has two backup memory bits. In this embodiment, since the main memory bits are all in normal operation, in the corresponding timing, the bit trigger signals WL[i][1] to WL[i][T] generate pulses in sequence, and then according to the sequence data provided by the pixel unit logic circuit 101, the data is written into these T main memory bits in sequence.

[0090] Figure 15 shows a waveform of a fault condition, which is similar to that of Figure 14. However, in this embodiment, it is assumed that the first primary memory bit cannot operate normally due to a fault. Therefore, during the write or read process, the pulse that should have been generated by the bit trigger signal WL[i][1] to control the position of the first primary memory bit (as shown by the dashed circle) is replaced by the pulse of the bit trigger signal WL[i][T+1], so that the data that should have been written to the first primary memory bit can be written to the first backup memory bit.

[0091] Figure 16 further illustrates the waveform of another fault scenario, namely, assuming that two main memory bits in pixel unit memory 102[i,j] are damaged, located at the 2nd bit and the Tth bit respectively. In this case, the bit trigger signals WL[i][2] and WL[i][T] pulses originally used to control the main memory bits of the 2nd bit and the Tth bit are disabled (as shown by the dashed circle). Instead, the pulses generated by the bit trigger signals WL[i][T+1] and WL[i][T+R] at the corresponding time points are used to replace the control of the damaged main memory bits, thereby causing the data that should be written to these two main memory bits to be written to the first and second backup memory bits respectively.

[0092] The present invention has been described above with reference to preferred embodiments. However, the above description is only for the purpose of enabling those skilled in the art to easily understand the content of the present invention and is not intended to limit the broadest scope of the present invention. The various embodiments described are not limited to individual application and can also be combined. For example, two or more embodiments can be used in combination, and some components in one embodiment can be used to replace corresponding components in another embodiment. Furthermore, under the same spirit of the present invention, those skilled in the art can conceive of various equivalent changes and combinations. For example, the present invention's statement of "processing or calculating based on a signal or generating an output result" is not limited to the signal itself, but also includes, when necessary, performing voltage-to-current conversion, current-to-voltage conversion, and / or proportional conversion on the signal, and then processing or calculating based on the converted signal to generate an output result. Therefore, under the same spirit of the present invention, those skilled in the art can conceive of various equivalent changes and combinations, and there are many combinations, which will not be listed here. Therefore, the scope of the present invention should cover the above and all other equivalent changes. [Simplified Explanation of the Diagram]

[0026] FIG1 is a block diagram showing a display device according to one embodiment of the present invention.

[0027] FIG2 is a block diagram showing a display pixel unit in a display device according to one embodiment of the present invention.

[0028] Figure 3 is a block diagram of a display device according to another embodiment of the present invention.

[0029] Figure 4 is a circuit diagram of a specific display pixel unit driving structure according to one embodiment of the present invention.

[0030] Figure 5 shows a circuit diagram of an embodiment of the specific display pixel unit driving structure corresponding to Figure 3.

[0031] Figure 6 shows a schematic diagram of a specific embodiment of the driving repair circuit in the display pixel unit corresponding to Figure 4.

[0032] Figure 7 shows a schematic diagram of a specific embodiment of the driving repair circuit in the display pixel unit corresponding to Figure 5.

[0033] Figure 8 shows a test flowchart of an embodiment of a display device according to the present invention.

[0034] Figure 9 shows a flowchart of a test of a sub-pixel driving circuit according to an embodiment of a display device of the present invention.

[0035] FIG10A shows a flowchart of display data processing according to an embodiment of a display device according to the present invention.

[0036] FIG10B shows a flowchart of display data processing according to an embodiment of a display device according to the present invention.

[0037] FIG10C shows a flowchart of display data processing according to an embodiment of a display device according to the present invention.

[0038] FIG11A shows a circuit diagram of a display pixel unit according to an embodiment of the present invention.

[0039] Figure 11B shows a block diagram of a pixel unit logic circuit array consisting of P horizontal columns and M vertical columns.

[0040] FIG11C shows a block diagram of a display pixel memory array according to one embodiment of the present invention.

[0041] Figure 12A shows a partial circuit diagram of the pixel unit logic circuit.

[0042] Figure 12B shows a waveform diagram corresponding to the pixel unit logic circuit section of Figure 12A.

[0043] Figure 13A shows a portion of the logic circuit of the pixel unit according to one embodiment of the present invention.

[0044] Figure 13B shows the corresponding waveform.

[0045] Figure 14 shows the control signal waveform of a display pixel memory according to one embodiment of the present invention.

[0046] Figure 15 shows a waveform diagram of a fault condition according to one embodiment of the present invention.

[0047] Figure 16 shows a waveform diagram of another fault condition according to one embodiment of the present invention.

Claims

1. A display device, comprising: a display module including a plurality of display pixel units arranged in M ​​columns and P rows in physical position and at least one backup pixel driving circuit, wherein M is a positive integer, P is a positive integer, and at least one of M and P is a complex number; a non-volatile memory; and a driving control circuit for controlling the display module to perform a pixel unit backup repair procedure to obtain and store repair data in the non-volatile memory, and for a display procedure to read the repair data from the non-volatile memory, and to control the plurality of display pixel units and the at least one backup pixel driving circuit to display an image based on the repair data and a display data.

2. The display device as claimed in claim 1, wherein each of the plurality of display pixel units comprises: A pixel unit memory is provided for storing display data corresponding to a portion of the display pixel unit; a main pixel driving circuit includes Q sub-pixel driving circuits, where Q is an integer greater than or equal to 1; a driving repair circuit is coupled to the main pixel driving circuit and the at least one backup pixel driving circuit; a pixel circuit is coupled to the driving repair circuit and includes corresponding Q light-emitting diodes; and a pixel unit logic circuit is coupled to the pixel unit memory, the main pixel driving circuit, and the at least one backup pixel driving circuit; wherein, in the display program, the pixel unit logic circuit is controlled by the driving control circuit. The pixel unit logic circuit reads and converts the display data of that part from the pixel unit memory to generate a dimming signal. When at least one of the Q sub-pixel driving circuits is determined to be faulty, the pixel unit logic circuit controls the driving repair circuit according to the repair data to electrically connect the non-faulty part of the Q sub-pixel driving circuits and the at least one backup pixel driving circuit to the corresponding Q light-emitting diodes. The pixel unit logic circuit uses the dimming signal to control the non-faulty part of the Q sub-pixel driving circuits and the at least one backup pixel driving circuit to generate corresponding Q driving currents to drive the Q light-emitting diodes to emit light.

3. The display device as claimed in claim 1, wherein each of the display pixel units further includes one of the at least one backup pixel driving circuit; or, the number of the at least one backup pixel driving circuit is less than the number of the plurality of display pixel units, wherein each of the at least one backup pixel driving circuit is shared by a predetermined number of the plurality of display pixel units.

4. The display device as claimed in claim 2, wherein the pixel unit backup repair procedure includes a drive circuit backup repair procedure, wherein, The backup repair procedure for the driving circuit includes: the driving control circuit controlling at least one of the Q sub-pixel driving circuits to generate a test current to drive one of the Q light-emitting diodes to emit light; determining whether the at least one sub-pixel driving circuit is faulty based on the brightness of the corresponding light-emitting diode or the level of the test current; and when a fault is determined, determining the corresponding repair data based on a driver fault address of the faulty at least one sub-pixel driving circuit, wherein the repair data includes mapping information between the driver fault address and one of the at least one backup pixel driving circuits that can be used as a substitute.

5. The display device as claimed in claim 2, wherein each of the Q sub-pixel driving circuits and the at least one backup pixel driving circuit comprises: A bias transistor and a modulated transistor are connected in series to the drive repair circuit, wherein the bias transistor is used to provide a DC bias current. In the display program, the pixel unit logic circuit controls the modulation crystal with the dimming signal to generate the driving current, thereby driving one of the Q light-emitting diodes to emit light at the corresponding light intensity.

6. The display device as claimed in claim 5, wherein the dimming signal controls the dimming crystal in a pulse-width modulation manner to adjust the light intensity of the corresponding light-emitting diode.

7. The display device as claimed in claim 5, wherein the drive repair circuit includes a plurality of path control switches coupled between the Q sub-pixel drive circuits, the at least one backup pixel drive circuit, and the Q light-emitting diodes, wherein the pixel unit logic circuit generates a corresponding plurality of path control signal according to the repair data to control the plurality of path control switches to turn off the faulty at least one sub-pixel drive circuit and turn on a corresponding one of the at least one backup pixel drive circuits to generate a corresponding drive current to drive the corresponding light-emitting diode to emit light.

8. The display device as claimed in claim 2, wherein the pixel unit memory comprises: A primary pixel memory includes T primary memory bits, where T is an integer greater than or equal to 1; and a backup pixel memory includes R backup memory bits, where R is an integer greater than or equal to 1; wherein in the display program, when at least one of the T primary memory bits is determined to be faulty, the pixel unit logic circuit controls the non-faulty portion of the T primary memory bits to cooperate with the R backup memory bits according to the repair data to store or read the display data.

9. The display device as claimed in claim 8, wherein the pixel unit backup repair procedure includes a memory backup repair procedure, wherein, The memory backup repair procedure includes: the drive control circuit reading and writing test data to the main pixel memory to determine whether at least one of the T main memory bits is faulty; and when a fault is determined, determining the corresponding repair data based on the memory bit fault address of the at least one faulty main memory bit, wherein the repair data includes mapping information between the memory bit fault address and one of the corresponding R backup memory bits as a replacement.

10. The display device as claimed in claim 2, wherein the display module and the drive control circuit are integrated on a single chip, and the pixel unit memory, the main pixel drive circuit, the drive repair circuit, the pixel circuit and the pixel unit logic circuit in each display pixel unit, as well as one of the at least one backup pixel drive circuit, are physically located near each other.

11. A display device comprising: a display module including a plurality of display pixel units arranged in M ​​columns and P rows in physical position, wherein M is a positive integer, P is a positive integer, and at least one of M and P is a complex number, wherein each of the plurality of display pixel units includes a pixel unit memory and a pixel unit logic circuit, the pixel unit memory being used to store display data corresponding to a portion of the display pixel unit, the pixel unit logic circuit being coupled to the pixel unit memory, wherein the pixel unit memory includes: A primary pixel memory, comprising T primary memory bits, where T is an integer greater than or equal to 1; And a backup pixel memory, including R backup memory bits, where R is an integer greater than or equal to 1; and a non-volatile memory; And a drive control circuit for controlling the display module to perform a memory backup repair program to obtain and store repair data to the non-volatile memory, and for a display program to read the repair data from the non-volatile memory, and to control the plurality of display pixel units to display images according to the repair data and the display data; wherein in the display program, when at least one of the T main memory bits is determined to be faulty, the pixel unit logic circuit controls the non-faulty part of the T main memory bits to cooperate with the R backup memory bits to store or read the display data according to the repair data.

12. The display device as claimed in claim 11, wherein the pixel unit backup repair procedure includes a memory backup repair procedure, wherein, The memory backup repair procedure includes: the drive control circuit reading and writing test data to the main pixel memory to determine whether at least one of the T main memory bits is faulty; and when a fault is determined, determining the corresponding repair data based on the memory bit fault address of the at least one faulty main memory bit, wherein the repair data includes mapping information between the memory bit fault address and one of the R backup memory bits as a replacement.

13. A display control method for controlling a display module, wherein the display module includes a plurality of display pixel units arranged in M ​​columns and P rows in physical location and at least one backup pixel driving circuit, wherein M is a positive integer, P is a positive integer, and at least one of M and P is a complex number, the display control method comprising: controlling the display module to perform a pixel unit backup repair procedure to obtain and store repair data to a non-volatile memory; and reading the repair data from the non-volatile memory in a display procedure, and controlling the plurality of display pixel units and the at least one backup pixel driving circuit to display an image based on the repair data and a display data.

14. The display control method as claimed in claim 13, wherein each of the plurality of display pixel units includes a pixel unit memory for storing display data corresponding to a portion of the display pixel unit, wherein the display program includes: A dimming signal is generated by reading and converting a portion of the display data from the pixel unit memory. Each of the plurality of display pixel units further includes a main pixel driving circuit and at least one backup pixel driving circuit. The main pixel driving circuit includes Q sub-pixel driving circuits, where Q is an integer greater than or equal to 1. When at least one of the Q sub-pixel driving circuits of the main pixel driving circuit is determined to be faulty, the fault-free portion of the Q sub-pixel driving circuits is electrically connected to the at least one backup pixel driving circuit to the corresponding Q light-emitting diodes of a pixel circuit according to the repair data. The dimming signal is used to control the fault-free portion of the Q sub-pixel driving circuits and the at least one backup pixel driving circuit to generate corresponding Q driving currents to drive the Q light-emitting diodes to emit light.

15. The display control method as described in claim 14, wherein the pixel unit backup repair procedure includes a drive circuit backup repair procedure, wherein, The backup repair procedure for the driving circuit includes: controlling at least one of the Q sub-pixel driving circuits to generate a test current to drive a corresponding one of the Q light-emitting diodes to emit light; determining whether the at least one sub-pixel driving circuit is faulty based on the brightness of the corresponding light-emitting diode or the level of the test current; and when a fault is determined, determining the corresponding repair data based on a driver fault address of the faulty at least one sub-pixel driving circuit, wherein the repair data includes mapping information between the driver fault address and one of the corresponding alternatives among the at least one backup pixel driving circuit.

16. The display control method as claimed in claim 14, wherein the dimming signal controls, in a pulse-width modulation manner, one of the modulation crystals of each of the Q sub-pixel driving circuits and the at least one backup pixel driving circuit to adjust the light intensity of a corresponding one of the Q light-emitting diodes.

17. The display control method as described in claim 14, wherein the display procedure includes: According to the repair data, the faulty at least one sub-pixel driving circuit is disabled, and one of the corresponding backup pixel driving circuits is controlled to generate the corresponding driving current to drive one of the Q light-emitting diodes to emit light.

18. The display control method as described in claim 14, wherein the pixel unit memory comprises: A primary pixel memory, comprising T primary memory bits, where T is an integer greater than or equal to 1; And a backup pixel memory, including R backup memory bits, where R is an integer greater than or equal to 1; wherein the display program includes: when at least one of the T main memory bits is determined to be faulty, controlling the non-faulty part of the T main memory bits to cooperate with the R backup memory bits according to the repair data to store or read the display data.

19. The display control method as described in claim 18, wherein the pixel unit backup repair procedure includes a memory backup repair procedure, wherein, The memory backup repair procedure includes: reading and writing test data to the primary pixel memory to determine whether at least one of the T primary memory bits is faulty; and when a fault is determined, determining the corresponding repair data based on the memory bit fault address of the at least one faulty primary memory bit, wherein the repair data includes mapping information between the memory bit fault address and one of the R backup memory bits as a replacement.

20. The display control method as claimed in claim 14, wherein the pixel unit memory, the primary pixel driving circuit and the pixel circuit in each display pixel unit, and a corresponding one of the at least one backup pixel driving circuit are physically located near each other.

21. A display control method for controlling a display module, wherein the display module includes a plurality of display pixel units arranged in M ​​columns and P rows in physical location, wherein M is a positive integer, P is a positive integer, and at least one of M and P is a complex number, the display control method comprising: controlling the display module to perform a memory backup repair procedure to obtain and store repair data to a non-volatile memory, wherein each of the plurality of display pixel units includes a pixel unit memory for storing display data corresponding to a portion of the display pixel unit, wherein the pixel unit memory includes: A primary pixel memory, comprising T primary memory bits, where T is an integer greater than or equal to 1; and a backup pixel memory, comprising R backup memory bits, where R is an integer greater than or equal to 1; and a display program reading the repair data from the non-volatile memory, and controlling the plurality of display pixel units to display an image based on the repair data and the display data; wherein the display program includes: when at least one of the T primary memory bits is determined to be faulty, controlling the non-faulty portion of the T primary memory bits to cooperate with the R backup memory bits to store or read the display data based on the repair data.

22. The display control method as described in claim 21, wherein the pixel unit backup repair procedure includes a memory backup repair procedure, wherein, The memory backup repair procedure includes: reading and writing test data to the primary pixel memory to determine whether at least one of the T primary memory bits is faulty; and when a fault is determined, determining the corresponding repair data based on the memory bit fault address of the at least one faulty primary memory bit, wherein the repair data includes mapping information between the memory bit fault address and one of the R backup memory bits as a replacement.

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