Electronic package and manufacturing method thereof

TWI935761BActive Publication Date: 2026-08-11SILICONWARE PRECISION IND CO LTD
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Patent Information

Application Number
TW114114595
Authority / Receiving Office
TW · TW
Patent Type
Patents
Current Assignee / Owner
Filing Date
2025-04-17
Publication Date
2026-08-11
Estimated Expiration
2045-04-16

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  • Figure TWG2TB001905700_001
    Figure TWG2TB001905700_001
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    Figure TWG2TB001905700_002
  • Figure TWG2TB001905700_003
    Figure TWG2TB001905700_003
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Abstract

An electronic package and its manufacturing method are disclosed. The package includes electronic components / intermediate components and a plurality of functional components on both sides of a circuit structure. The electronic components / intermediate components act as bridging elements to electrically connect the plurality of functional components. A first passivation layer / second passivation layer is formed on the electronic components / intermediate components, and a plurality of conductive vias of the intermediate components are exposed to the second passivation layer. This allows the plurality of conductive components to be disposed on the first passivation layer / second passivation layer and electrically connected to the plurality of conductive vias, avoiding the formation of conductive bumps on the conductive vias and reducing manufacturing costs.
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Claims

1. An electronic package, comprising: The circuit structure has a first side and a second side that are opposite to each other; Electronic components are located on the first side of the circuit structure; An intermediate element is disposed on a first side of the circuit structure and has a plurality of conductive vias; a first passivation layer is formed on the electronic element; a second passivation layer is formed on the intermediate element, and the top surfaces of the plurality of conductive vias are exposed on the second passivation layer; a cover layer has opposing first and second surfaces and the second surface is formed on the first side of the circuit structure to cover the electronic element, the intermediate element, the first passivation layer and the second passivation layer, and the top surfaces of the first passivation layer, the second passivation layer and the plurality of conductive vias are exposed on the first surface, wherein the electronic element and the intermediate element are recessed relative to each other on the first surface of the cover layer to form a first recess and a second recess respectively; and a plurality of functional elements are disposed on a second side of the circuit structure to electrically bridge the plurality of functional elements through the electronic element and / or the intermediate element.

2. The electronic package as claimed in claim 1 further includes a plurality of conductive pillars formed on a first side of the circuit structure and covered by the overlay layer, with the top surfaces of the plurality of conductive pillars exposed on the first surface.

3. The electronic package as described in claim 1 further includes a packaging layer formed on a second side of the circuit structure to cover the plurality of functional elements.

4. The electronic package as claimed in claim 1 further includes a plurality of conductive elements disposed on a first surface of the cover layer and on the first passivation layer and the second passivation layer, and the plurality of conductive elements are electrically connected to the plurality of conductive vias.

5. The electronic package as claimed in claim 1 further includes a first surface forming the cover layer and wiring layers on the first passivation layer and the second passivation layer, and a plurality of conductive elements are provided on the wiring layers.

6. The electronic package as described in claim 1, wherein, The electronic component has an active surface and a non-active surface, and the active surface is electrically connected to the circuit structure facing the first side.

7. The electronic package as described in claim 1, wherein, The intermediary element is electrically connected to the circuit structure through the plurality of conductive vias.

8. The electronic package as described in claim 1, wherein, The functional element is electrically connected to the circuit structure through a plurality of conductive bumps.

9. The electronic package as described in claim 1, wherein, The electronic component and / or the intermediate component serve as a bridging element, and the functional component is a graphics processor or a high-bandwidth memory.

10. The electronic package as described in claim 1, wherein, The first passivation layer and the second passivation layer respectively fill the first recess and the second recess.

11. A method for manufacturing an electronic package, comprising: An electronic module is provided, comprising: a circuit structure having a first side and a second side; an electronic component disposed on the first side of the circuit structure; an intermediate element disposed on the first side of the circuit structure and having a plurality of conductive vias; a covering layer having a first surface and a second surface opposite to each other, with the second surface formed on the first side of the circuit structure to cover the electronic component and the intermediate element; and a plurality of functional elements disposed on the second side of the circuit structure to electrically bridge the plurality of functional elements through the electronic component and / or the intermediate element; performing a thinning process on the electronic component and the intermediate element, such that the electronic component and the intermediate element are recessed relative to each other in the first surface of the covering layer, thereby forming a first recess and a second recess respectively, and causing the plurality of conductive vias to protrude from the second recess; and forming a first passivation layer and a second passivation layer in the first recess and the second recess respectively, and causing the top surfaces of the first passivation layer, the second passivation layer and the plurality of conductive vias to be exposed on the first surface.

12. The method for manufacturing an electronic package as described in claim 11, wherein, The electronic component and the intermediate component are partially removed by wet etching to form the first recess and the second recess, respectively.

13. The method for manufacturing an electronic package as described in claim 11, wherein, The first and second passivation layers are formed by filling the first and second recesses with liquid adhesive to cover the electronic component and the intermediary component.

14. The method of manufacturing an electronic package as described in claim 13 further includes a leveling process to remove a portion of the first passivation layer, a portion of the second passivation layer and a portion of the overlay layer, such that the top surfaces of the first passivation layer, the second passivation layer and the plurality of conductive vias are flush with the first surface of the overlay layer.

15. The method for manufacturing an electronic package as described in claim 11, wherein, The electronic module further includes a plurality of conductive pillars formed on the first side of the circuit structure and covered by the cladding layer, with the top surface of the plurality of conductive pillars exposed on the first surface.

16. The method for manufacturing an electronic package as described in claim 11, wherein, The electronic module further includes an encapsulation layer formed on the second side of the circuit structure to cover the plurality of functional elements.

17. The method of manufacturing an electronic package as described in claim 11 further includes disposing a plurality of conductive elements on a first surface of the cover layer and on the first passivation layer and the second passivation layer, and electrically connecting the plurality of conductive elements to the plurality of conductive vias.

18. The method of manufacturing an electronic package as described in claim 11 further includes forming a wiring layer on a first surface of the covering layer and on the first passivation layer and the second passivation layer, and disposing a plurality of conductive elements on the wiring layer.

19. The method for manufacturing an electronic package as described in claim 11, wherein, The electronic component has an active surface and a non-active surface, and the active surface is electrically connected to the circuit structure facing the first side.

20. A method for manufacturing an electronic package as described in claim 11, wherein, The intermediary element is electrically connected to the circuit structure through the plurality of conductive vias.

21. The method for manufacturing an electronic package as described in claim 11, wherein, The functional element is electrically connected to the circuit structure through a plurality of conductive bumps.

Citation Information

Patent Citations

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