An n-type ohmic electrode and a method for manufacturing an n-type ohmic electrode, and a group III nitride semiconductor light-emitting element and a method for manufacturing a group III nitride semiconductor light-emitting element.

Abstract

This invention provides an n-type ohmic electrode and a method for manufacturing the n-type ohmic electrode, as well as a group III nitride semiconductor light-emitting element and a method for manufacturing the group III nitride semiconductor light-emitting element. The n-type ohmic electrode 30 is disposed on an n-type group III nitride semiconductor layer 10. The n-type ohmic electrode 30 has an Al layer 33 and a second-direction Al-Ti region 34. The second-direction Al-Ti region 34 is located on the second direction opposite to the first direction on the n-type group III nitride semiconductor layer 10 side of the Al layer 33. The second-direction Al-Ti region 34 contains more than 50 at% Al, more than 5 at% and less than 30 at% Ti, and less than 10 at% O.

Description

Technical Field

[0001] This invention relates to an n-type ohmic electrode and a method for manufacturing an n-type ohmic electrode, as well as a group III nitride semiconductor light-emitting element and a method for manufacturing a group III nitride semiconductor light-emitting element. Prior Technology

[0002] Previously, as a method for forming a good n-type ohmic electrode on an n-type group III nitride semiconductor layer, a method of laminating a metal layer including a Ti layer and an Al layer and then performing heat treatment is known.

[0003] For example, Patent Document 1 describes an n-type ohmic electrode in which a Ti film with a thickness of 200 Å, an Al film with a thickness of 600 nm, and a Ti film with a thickness of 5 nm are formed from the n-type group III nitride semiconductor layer side, and finally contact annealing (rapid thermal annealing, RTA) is performed at 550 °C. [Existing Technical Documents] [Patent Literature]

[0004] Patent Document 1: Japanese Patent Application Publication No. 2022-67526 Summary of the Invention

[0005] [The problem that the invention aims to solve] However, the inventors fabricated an n-type ohmic electrode with a multilayer structure as disclosed in Patent Document 1, which resulted in a large forward voltage and a large deviation within the wafer plane.

[0006] Therefore, the present invention aims to provide an n-type ohmic electrode with good forward voltage and small deviation in the wafer plane, and a method for manufacturing the same, as well as a group III nitride semiconductor light-emitting element including the n-type ohmic electrode and a method for manufacturing the same. [Methods for solving problems]

[0007] The inventors conducted in-depth research into directions for solving the aforementioned problem. As a result, by sequentially depositing a first Ti layer, an Al layer, and a second Ti layer from the n-type III nitride semiconductor layer side, and appropriately adjusting the thickness of the second Ti layer, the inventors experimentally demonstrated that the problem could be solved. Furthermore, the inventors experimentally confirmed that after heat-treating the metal laminate thus formed for contact annealing, a region considered to be an Al-Ti alloy (hereinafter referred to as an Al-Ti region) was formed on the opposite side of the n-type III nitride semiconductor layer. Moreover, the inventors also realized that the aforementioned problem could be solved by forming such an alloyed region, thus completing the present invention. In other words, the main structure of the present invention is as follows.

[0008] (1) An n-type ohmic electrode, wherein the n-type ohmic electrode is disposed on an n-type group III nitride semiconductor layer. The n-type ohmic electrode has: Al layer, and The second-direction Al-Ti region is located on the side of the n-type III nitride semiconductor layer of the Al layer, i.e., on the opposite side of the first direction. The second-direction Al-Ti region contains more than 50 at% Al, and contains more than 5 at% and less than 30 at% Ti, and O is less than 10 at%.

[0009] (2) The n-type ohmic electrode as described in (1), wherein, The Al layer is present in the central portion at least in the thickness direction.

[0010] (3) The n-type ohmic electrode as described in (1) or (2) has an oxygen-containing region on the second direction side of the Al-Ti region located on the second direction side in the thickness direction. In the oxygen-containing region on the second directional side, O is above 10 at%.

[0011] (4) The n-type ohmic electrode as described in (1) to (3), wherein, In the oxygen-containing region on the second direction side, at the point where oxygen is extremely large in the thickness direction, the ratio of oxygen atoms at% to the total at% of Al atoms and Ti atoms is less than 1.0.

[0012] (5) The n-type ohmic electrode as described in any one of (1) to (4), wherein, Having an Al-Ti region on the first direction side of the Al layer in the thickness direction, located in the first direction of the Al layer. The Al-Ti region on the first direction side contains more than 50 at% Al, and contains more than 5 at% and less than 30 at% Ti, and O is less than 10 at%.

[0013] (6) A group III nitride semiconductor light-emitting element, comprising: n-type group III nitride semiconductor layer, and An n-type ohmic electrode as described in any one of (1) to (5) is disposed on the surface of the n-type group III nitride semiconductor layer.

[0014] (7) A method for manufacturing an n-type ohmic electrode, comprising: The first step involves sequentially forming a first Ti layer, an Al layer, and a second Ti layer on the surface of an n-type group III nitride semiconductor layer to form an n-side metal stack; and... The second step involves heat-treating the n-sided metal laminate. The thickness of the second Ti layer formed in the first step is set to be 15 nm or more.

[0015] (8) The method for manufacturing an n-type ohmic electrode as described in (7), wherein, In the second step, the second Ti layer is used as the outermost surface and the heat treatment is performed.

[0016] (9) The method for manufacturing an n-type ohmic electrode as described in (7) or (8), wherein, In the second step, the heat treatment is carried out in a mixed gas environment containing more than 1% and less than 60% oxygen.

[0017] (10) A method for manufacturing an n-type ohmic electrode as described in any one of (7) to (9), wherein, The thickness of the second Ti layer formed in the first step is set to be less than 100 nm.

[0018] (11) A method for manufacturing a group III nitride semiconductor light-emitting element, comprising: The steps for forming an n-type group III nitride semiconductor layer, and The step of forming the n-type ohmic electrode on the n-type group III nitride semiconductor layer using the manufacturing method of the n-type ohmic electrode as described in any one of (7) to (10).

[0019] (12) The method for manufacturing a group III nitride semiconductor light-emitting element as described in (11) further includes the steps of forming a light-emitting layer on the n-type group III nitride semiconductor layer, forming a p-type group III nitride semiconductor layer on the light-emitting layer, and forming a p-side metal stack on the p-type group III nitride semiconductor layer. In the second step, the heat treatment is also performed on the p-side metal laminate. [The effects of the invention]

[0020] This invention provides an n-type ohmic electrode with good forward voltage and small deviation in the wafer plane, and a method for manufacturing the same, as well as a group III nitride semiconductor light-emitting element including the n-type ohmic electrode and a method for manufacturing the same. Simple Explanation of the Diagram

[0021] Figure 1 is a schematic cross-sectional view illustrating the n-side metal stack formed in a method for manufacturing an n-type ohmic electrode according to an embodiment of the present invention. Figure 2A is a schematic diagram illustrating a cross-sectional TEM image of an n-type ohmic electrode after heat treatment according to an embodiment of the present invention. Figure 2B is a cross-sectional TEM image of the n-type ohmic electrode of Example 1. The lines used to measure the TEM-EDS profile are shown as dashed lines in the figure. Figure 3 is a schematic cross-sectional view illustrating a group III nitride semiconductor light-emitting element according to an embodiment of the present invention. Figure 4 is a top view of a group III nitride semiconductor light-emitting element according to Embodiment 1 of the present invention. Figure 5 is a cross-sectional view of arrow II in Figure 4. Figure 6 shows the TEM-EDS profile of Example 1. Figure 7 shows the TEM-EDS profile of Comparative Example 1. Figure 8 shows the TEM-EDS profile of Comparative Example 2. Figure 9 shows the TEM-EDS profile of Example 2. Figure 10 shows the TEM-EDS profile of Example 4. Figure 11 shows the TEM-EDS profile of Comparative Example 3. Figure 12 shows the TEM-EDS profile of Comparative Example 4. Figure 13 is a graph showing the ratio of at% of oxygen atoms to the total at% of Al atoms and Ti atoms in the thickness direction of the n-type ohmic electrodes of Example 1, Comparative Example 1 and Comparative Example 2. Figure 14 is a graph showing the atomic fraction of Ti atoms in the thickness direction of the n-type ohmic electrodes of Example 1, Comparative Example 1 and Comparative Example 2. Implementation

[0022] According to an embodiment of the present invention, an n-type ohmic electrode is disposed on an n-type group III nitride semiconductor layer. For ease of explanation, the n-type group III nitride semiconductor layer side in the thickness direction of the n-type ohmic electrode is referred to as the first direction, and the opposite side of the first direction is referred to as the second direction. Examples of n-type group III nitride semiconductor layers include n-type AlGaN layers, n-type GaN layers, n-type AlN layers, or n-type AlInGaN layers. Among these, an n-type AlGaN layer is preferred. Before the detailed description of the embodiment of the present invention, the following points will be explained in advance.

[0023] First, in this specification, when the Al composition ratio is not explicitly stated and the compound is simply referred to as "AlGaN," the composition ratio of Group III elements (the sum of Al (aluminum) and Ga (gallium)) to N (nitrogen) is 1:1. The ratio of Group III elements Al to Ga implies any arbitrary compound. When simply stated as "AlN (aluminum nitride)" or "GaN (gallium nitride)," it means that Ga and Al are respectively not present. Furthermore, the Al composition ratio x or In composition ratio y can be determined by photoluminescence measurement and X-ray diffraction measurement, etc.

[0024] Furthermore, in this specification, a layer that functions electrically as a p-type semiconductor layer is referred to as a p-type semiconductor layer, and a layer that functions electrically as an n-type semiconductor layer is referred to as an n-type semiconductor layer (sometimes simply referred to as an "n-type layer"). On the other hand, when specific impurities such as Si, Mg, Zn, and S are intentionally omitted, it is referred to as "undoped". In this III-V compound semiconductor layer, unavoidable impurities may be introduced during the manufacturing process. Specifically, when the dopant concentrations of both p-type and n-type impurities are low, and the dopant concentrations of these impurities are close to the detection limit of secondary ion mass spectrometry (SIMS), it is treated as "undoped" in this specification. In the case of Si concentration, the detection limit of SIMS analysis described later is 2 × 10¹⁴ / cm³, therefore, the case where the average Si concentration in the layer is less than 2.5 × 10¹⁴ / cm³ is defined as "undoped".

[0025] In this embodiment, the atomic number % (at%) of the elements in the cross-section of the n-type ohmic electrode is the measured value when the cross-section of the n-type ohmic electrode is formed using a focused ion beam (FIB) or similar method, and energy dispersive X-ray spectroscopy (EDS) is used to measure nitrogen (N), oxygen (O), aluminum (Al), silicon (Si), titanium (Ti), nickel (Ni), gallium (Ga), rhodium (Rh), platinum (Pt), and gold (Au), with the total atomic number of each element to be measured set to 100%. As shown by the schematic cross-sectional view in Figure 2A and the cross-sectional transmission electron microscope (TEM) image in Figure 2B (shown as dashed lines), the atomic percentage of each element is determined along a straight line in any thickness direction of the cross-section of the n-type ohmic electrode confirmed by the cross-sectional TEM image (a straight line transversely cutting from the outermost surface of the n-type ohmic electrode to the interface with the n-type semiconductor layer), and this is used as the TEM-EDS profile. EDS analysis was performed using a TEM Talos F200E manufactured by FEI and an EDS detector Super X, with an accelerating voltage of 200 kV. Furthermore, cross-sectional TEM images were obtained from the cross-section after profile formation to observe the cross-section of the fabricated n-type ohmic electrode. The cross-sectional TEM images were obtained using the Talos F200E manufactured by FEI with an accelerating voltage of 200 kV.

[0026] Regarding the semiconductor layers and n-type ohmic electrodes forming this embodiment, the thickness of each semiconductor layer after heat treatment (e.g., in the state of a light-emitting element) and the shape of the granular portions formed in the n-type ohmic electrode are confirmed using cross-sectional TEM images. The average value of each semiconductor layer within the field of view is taken as its respective thickness. Furthermore, the thickness of each metal layer in the metal stack of the n-type ohmic electrode and the like during the manufacturing process before heat treatment can also be calculated based on the cross-sectional TEM image obtained immediately after film formation, just as it is after heat treatment; however, it can also be set to a value precisely controlled based on preliminary tests in a vacuum evaporation machine or sputtering apparatus.

[0027] Hereinafter, various embodiments of the present invention will be described with reference to the accompanying drawings. In addition, in each drawing, for ease of explanation, the aspect ratios of the substrate and each layer are exaggerated compared to the actual ratios.

[0028] (Manufacturing method of n-type ohmic electrode) Referring to FIG1, a method for manufacturing an n-type ohmic electrode according to this embodiment will be described. The method for manufacturing an n-type ohmic electrode 30 based on the present invention includes at least: a first step of sequentially forming a first Ti layer 21, an Al layer 22, and a second Ti layer 23 on the surface of an n-type group III nitride semiconductor layer 10 (hereinafter sometimes simply referred to as "n-type semiconductor layer 10") to form an n-side metal stack 20; and a second step of heat-treating the n-side metal stack 20. Furthermore, the thickness of the second Ti layer 23 formed in the first step is set to 15 nm or more.

[0029] <Step 1> As described above, the first step is to form an n-side metal stack 20 by sequentially forming a first Ti layer 21, an Al layer 22, and a second Ti layer 23 on the surface of the n-type semiconductor layer 10 (FIG. 1). Preferably, no other metal layer is disposed between the Al layer 22 and the second Ti layer 23, and the stack is directly deposited. On the other hand, in this embodiment, other metal layers may be disposed between the n-type semiconductor layer 10 and the first Ti layer 21, and between the first Ti layer 21 and the Al layer 22. Examples of n-type semiconductor layers 10 include n-type AlGaN layers, n-type AlInGaN layers, n-type GaN layers, or n-type AlN layers. The n-type semiconductor layer 10 is preferably an n-type AlGaN layer. The thickness of the first Ti layer 21 is preferably 1 nm or more and 30 nm or less, more preferably 5 nm or more and 27 nm or less, and even more preferably 10 nm or more and 25 nm or less. The thickness of the Al layer 22 is preferably 300 nm or more and 1000 nm or less, more preferably 400 nm or more and 900 nm or less, and even more preferably 500 nm or more and 800 nm or less. The thickness of the second Ti layer 23 is 15 nm or more, more preferably 18 nm or more, and even more preferably 20 nm or more. Furthermore, the thickness of the second Ti layer 23 is preferably 100 nm or less, more preferably 80 nm or less, and even more preferably 60 nm or less. The overall thickness of the n-side metal deposit 20 is preferably 316 nm or more and 1130 nm or less, and even more preferably 423 nm or more and 1007 nm or less. These metal layers can be formed by conventional methods such as vapor deposition.

[0030] <Second Step> As described above, the second step is a heat treatment step of the n-side metal laminate 20, the purpose of which is contact annealing. Preferably, the heat treatment in the second step is performed with the second Ti layer 23 as the outermost surface. Furthermore, when performing the heat treatment in the second step in an oxygen-containing mixed gas environment, the proportion of oxygen in the mixed gas is preferably 1% or more and 60% or less, more preferably 10% or more and 50% or less, and even more preferably 20% or more and 40% or less. The mixed gas used may contain inert gases such as nitrogen or argon. The temperature during heat treatment is preferably 450°C or more and 700°C or less, more preferably 500°C or more and 600°C or less, and even more preferably 520°C or more and 580°C or less. Furthermore, it is more preferable that after the start of heat treatment, before the chamber being treated reaches the specified temperature, the temperature is raised in an inert gas environment without using oxygen in the mixed gas, and oxygen flow is started after the chamber reaches the specified temperature. If the temperature is increased in an oxygen-containing environment, surface oxidation will occur before the formation of the second Al-Ti region 34. Therefore, there is a risk that the effects of low resistance based on the second Al-Ti region 34 and suppression of oxygen intake or migration will be reduced.

[0031] The n-type ohmic electrode 30 obtained through the first and second steps has a good forward voltage and a small deviation in the forward voltage within the wafer plane.

[0032] (n-type ohmic electrode) The n-type ohmic electrode 30 obtained by the manufacturing method of the n-type ohmic electrode 30 will be described. FIG2A shows a schematic diagram of a cross-sectional TEM image of the n-type ohmic electrode 30 of this embodiment. The n-type ohmic electrode 30 is disposed on the n-type semiconductor layer 10. The n-type ohmic electrode 30 has at least an Al layer 33 and a "second granular portion 34" in a second direction located on the side of the n-type semiconductor layer 10 of the Al layer 33, that is, on the side opposite to the first direction. In this specification, the term granular portion refers to a granular region observed in a TEM image as a difference in contrast, as seen in FIG2B. Moreover, since a granular portion is found to exist in this second direction of the cross-sectional TEM image, the TEM-EDS profile is obtained by longitudinally cutting the granular portion along the thickness direction. The composition at the position corresponding to the granular portion is confirmed. If the composition is the "second direction side Al-Ti region 34" (hereinafter also referred to as the second Al-Ti region 34) described later, the granular portion is defined as the "second granular portion 34". Furthermore, based on the TEM-EDS profile, it is confirmed that the n-type ohmic electrode 30 has an Al layer 33 and a "second Al-Ti region 34," which is located in the second direction opposite to the first direction on the side of the n-type semiconductor layer 10 of the Al layer 33. As illustrated in FIG2B, there may be a case where there is no Al-Ti region 34 in the second direction of the Al layer 33. When taking a cross-sectional TEM image with a width of 10 μm, it is sufficient to observe at least the granular portion in the second direction and confirm the presence of the "second Al-Ti region 34" based on the TEM-EDS profile of the granular portion. Furthermore, in this embodiment, the term "central portion in the thickness direction" refers to a region that includes the center of the n-type ohmic electrode 30 in the thickness direction, is located between the second Al-Ti region 34 and the n-type semiconductor layer 10, and has a thickness of 20% or more of the n-type ohmic electrode 30.

[0033] The Al layer 33 is preferably located at the center of the n-type ohmic electrode 30 in at least the thickness direction. In the TEM-EDS profile, the region corresponding to the Al layer 33 preferably has a composition of 80 at% or more Al, less than 5 at% Ti, and less than 10 at% O. The thickness of the Al layer 33 is preferably 100 nm or more and 900 nm or less, more preferably 300 nm or more and 800 nm or less, and even more preferably 400 nm or more and 700 nm or less. The Al layer 33 may also contain impurities such as O atoms or N atoms.

[0034] In the TEM-EDS profile, the second Al-Ti region 34 located in the second direction of the Al layer 33 contains 50 at% or more Al, and 5 at% or more and 30 at% or less Ti, and O is 10 at% or less. Regarding FIG2B, as described above, it is sufficient that at least a portion of the second Al-Ti region satisfying the stated atomic ratio exists in the in-plane direction of the Al layer 33 in the second direction. The second Al-Ti region 34 is intended to be primarily composed of TiAl3, an intermetallic compound, and therefore contains 50 at% or more Al, preferably 55 at% or more, and more preferably 57 at% or more. Furthermore, the second Al-Ti region 34 contains 5 at% or more and 30 at% or less Ti, preferably 7 at% or more and 28 at% or less, and more preferably 8 at% or more and 25 at% or less. As described above, the O content of the second Al-Ti region 34 is 10 at% or less; the O content is not particularly limited as long as this condition is met, but in principle, the O content is 0 at% or more. In the second Al-Ti region 34, the Ti content is preferably greater than the O content.

[0035] The n-type ohmic electrode 30 may have an oxygen-containing region 35 (hereinafter sometimes simply referred to as "second oxygen region 35") located in the second direction of the second Al-Ti region 34 (second granular portion 34) in the thickness direction. The second oxygen region 35 refers to a region containing 10 at% or more of O. The second oxygen region 35 may contain Al or Ti. When a metal layer such as a Pt layer is formed on the n-type ohmic electrode, the second oxygen region 35 may appear near the interface with the metal layer on the n-type ohmic electrode. Moreover, the second oxygen region 35 has a point where oxygen (O) is extremely large in the thickness direction, and the atomic fraction of oxygen atoms in this extreme point is preferably 47 at% or less, more preferably 45 at% or less. In addition, the ratio of oxygen atoms at% in this extreme point to the total at% of Al atoms and Ti atoms is preferably 1.00 or less (100% or less), more preferably 0.95 or less, and even more preferably 0.85 or less. The lower limit is, for example, 0.10. The second oxygen region 35 may contain Al2O3 or TiO2 as oxides of Al or Ti. By the presence of the second Al-Ti region 34 (second granular portion 34) and the fact that the oxygen atom at% ratio of the second oxygen region 35 is less than or equal to the stated value, the effect of reducing resistivity on the second direction side can be considered to be improved.

[0036] The n-type ohmic electrode 30 may have a "first granular portion 31" in the thickness direction of the Al layer 33 in the first direction. A granular portion was found to exist in the first direction of the cross-sectional TEM image. By obtaining a TEM-EDS profile by longitudinally cutting the granular portion along the thickness direction, the composition at the position corresponding to the granular portion was confirmed. If the composition is the "first direction-side Al-Ti region 32" (hereinafter also referred to as the first Al-Ti region 32) described later, the granular portion is designated as the "first granular portion 32". Furthermore, based on the TEM-EDS profile, it can be confirmed whether the n-type ohmic electrode 30 has a "first direction-side Al-Ti region 32" located on the n-type semiconductor layer 10 side of the Al layer 33, i.e., in the first direction.

[0037] In the TEM-EDS profile, the first Al-Ti region 32 located in the first direction of the Al layer 33 preferably contains 50 at% or more Al, and 5 at% or more and 30 at% or less Ti, and O is 10 at% or less. The first Al-Ti region 32 satisfying the atomic ratio may exist in at least a portion of its in-plane direction in the first direction of the Al layer 33. The first Al-Ti region 32 is intended to be mainly composed of TiAl3, an intermetallic compound, and therefore contains 50 at% or more Al, preferably 55 at% or more, and more preferably 57 at% or more. Furthermore, the first Al-Ti region 32 contains 5 at% or more and 30 at% or less Ti, preferably 7 at% or more and 28 at% or less, and more preferably 8 at% or more and 25 at% or less. As mentioned above, the O content of the first Al-Ti region 32 is 10 at% or less; the O content is not particularly limited as long as this condition is met, but in principle, the O content is 0 at% or more. In the first Al-Ti region 34, the Ti content is preferably greater than the O content.

[0038] The n-type ohmic electrode 30 may have a first-direction oxygen-containing region 31 (hereinafter sometimes simply referred to as "first oxygen region 31") on the first direction side of the first Al-Ti region 32 in the thickness direction. The first oxygen region 31 is a region containing more oxygen than the Al layer 33 or the first Al-Ti region 32, and is a region having a point where oxygen is extremely large in the thickness direction. The oxygen content at this location may be less than in the second direction. Moreover, the first oxygen region 31 has a point where oxygen (O) is extremely large in the thickness direction, and the atomic fraction of oxygen atoms at this extreme point is preferably 40 at% or less, more preferably 20 at% or less, and even more preferably 16 at% or less. The first oxygen region 31 may contain Al2O3 or TiO2 as oxides of Al or Ti.

[0039] The "second granular portion 34" and the "first granular portion 32" will be described below. For example, while moving horizontally in the in-plane direction, a cross-sectional TEM image as shown in FIG2B is continuously captured, and multiple cross-sectional TEM images are connected to form a cross-sectional TEM image of an n-type ohmic electrode 30 with a width of 10 μm. In this cross-sectional TEM image, the granular portion may be present in at least a portion or all of the cross-section. The thickness in the depth direction of the "second granular portion 34" and the "first granular portion 32", for example, the maximum thickness in the cross-section, is preferably 30 nm or more and 400 nm or less. In the cross-sectional TEM image, there may also be a region in the in-plane direction where the second granular portion 34 is not present. Within the TEM image range with a width of 10 μm, the second granular portion 34 is preferably at least one, more preferably two or more, and more preferably three or more. Regarding the first granular portion 32, there may also be areas that are partially absent in the in-plane direction. Within a TEM image range with a width of 10 μm, the first granular portion 32 preferably has at least one, more preferably two, and even more preferably three. For example, when acquiring a cross-sectional TEM image with a width of 10 μm, the maximum width of the granular portion is preferably a total of 1 μm or more, and more preferably 5 μm or more.

[0040] In this invention, when the thickness of the second Ti layer 23 is a certain amount or more (i.e., 15 nm or more), if the n-side metal laminate 20 is heat-treated for contact annealing, Al atoms in the Al layer 22 and Ti atoms in the second Ti layer 23 diffuse. As a result, an Al-Ti alloy, considered to be an intermetallic compound TiAl3, is formed on the upper side of the Al layer 33, and is observed as a second granular portion 34. The melting temperature of Al is 660°C, but if it is 450°C or higher and 700°C or lower, this intermetallic compound can be formed. Therefore, in the n-type ohmic electrode 30, a second Al-Ti region 34 corresponding to the second granular portion 34 exists on the upper side (second direction) of the Al layer 33. Furthermore, in the n-type ohmic electrode 30, a second oxygen region 35, which may contain Al2O3 or TiO2, sometimes also exists on the upper side (second direction) of the second Al-Ti region 34. In contrast, if the thickness of the second Ti layer 23 is less than 15 nm, it is difficult to form the second granular portion 34, and a second oxygen region 35 is easily formed on the upper side of the Al layer 33, containing Al2O3 or TiO2 with a high oxygen atom percentage. One reason for obtaining an n-type ohmic electrode 30 with good forward voltage and small in-plane deviation of forward voltage under the conditions of the present invention is the formation of an intermetallic compound such as TiAl3. The inventors believe that if a second Al-Ti region 34 with the stated atomic content is formed, an Al-Ti alloy considered to be TiAl3 is formed, thereby achieving the effects of the present invention. Based on the above, an n-type ohmic electrode 30 based on this embodiment can be obtained by depositing a second Ti layer 23 of appropriate thickness and performing heat treatment.

[0041] Furthermore, Al atoms from Al layer 22 and the first Ti layer 21 diffuse to form an Al-Ti alloy, which is considered to be an intermetallic compound TiAl3, on the underside (first direction) of Al layer 33. This alloy is sometimes observed as the first granular portion 32 (first Al-Ti region 32). The relationship between the thickness of the second Ti layer 23 and the first Al-Ti region 32 and the oxygen-containing region 31 on the first direction side is not yet clear. However, according to the embodiments described later, when the second Al-Ti region 34 is formed, it is observed that the maximum oxygen value in the oxygen-containing region 31 on the first direction side is also less.

[0042] In the n-type ohmic electrode 30, the overall thickness of the ohmic electrode is preferably 316 nm or more and 1130 nm or less, more preferably 423 nm or more and 1007 nm or less, and even more preferably 530 nm or more and 885 nm or less.

[0043] (Manufacturing method of group III nitride semiconductor light-emitting device) Referring to FIG3, a method for manufacturing a group III nitride semiconductor light-emitting element 100 (hereinafter sometimes simply referred to as "light-emitting element 100") according to this embodiment will be described. The light-emitting element 100 includes at least the steps of forming an n-type semiconductor layer 10 and forming the n-type ohmic electrode 30 on the n-type semiconductor layer 10. Furthermore, it may also include the steps of forming a light-emitting layer 11 on the n-type semiconductor layer 10, forming a p-type group III nitride semiconductor layer 12 (hereinafter sometimes simply referred to as "p-type semiconductor layer 12") on the light-emitting layer 11, and forming a first p-side metal stack on the p-type semiconductor layer 12. Here, in the heat treatment of the second step of the method for manufacturing the n-type ohmic electrode 30, it is preferable to perform heat treatment on the first p-side metal stack simultaneously. By simultaneously heat treating the n-side metal stack 20 and the first p-side metal stack, the manufacturing steps can be simplified, and manufacturing costs can be reduced. Furthermore, by heat-treating the n-side metal stack 20 and the first p-side metal stack, an n-type ohmic electrode 30 and a first p-type ohmic electrode 41 are formed, respectively.

[0044] If the p-side metal stack is heat-treated in an oxygen-containing mixed gas environment, it can sometimes become a low-resistance first p-type ohmic electrode 41 or a second p-type ohmic electrode 42. In this case, if the n-side metal stack 20 can be heat-treated even in an oxygen-containing environment, the process can be simplified by performing the heat treatment together with the p-side metal stack. However, since the n-side metal stack 20 contains a large amount of Al, it is considered difficult to form an n-type ohmic electrode 30 that can achieve low resistance even when heated in an oxygen-containing environment. If the manufacturing method of the n-type ohmic electrode 30 of the present invention is to set the thickness of the second Ti layer 23 to 15 nm or more, the second step can be performed on the p-side metal stack together even if the heat treatment in the second step is in an oxygen-containing mixed gas environment. The reason is not yet clear, but it can be anticipated that the TiAl3-like intermetallic compound generated in the second Al-Ti region 34 during heat treatment, in addition to reducing the resistance of the n-type ohmic electrode 30, also has the effect of suppressing the adsorption of oxygen on the second direction side caused by natural oxidation or heat treatment in a mixed gas environment containing oxygen, or suppressing the movement of oxygen to the first direction side of the n-type ohmic electrode 30. The details of each structure and step will be described below, including specific examples.

[0045] First, an n-type semiconductor layer 10 can be formed on a substrate 1 made of sapphire or AlN single crystal. Examples of n-type semiconductor layers 10 include n-type AlGaN layers, n-type AlInGaN layers, n-type GaN layers, or n-type AlN layers. Preferably, the n-type semiconductor layer 10 is an n-type AlGaN layer. Examples of dopants for the n-type semiconductor layer 10 include Si or S. The thickness of the n-type semiconductor layer 10 is preferably 500 nm or more and 5 μm or less, more preferably 1 μm or more and 4 μm or less, and even more preferably 1.5 μm or more and 3 μm or less. An undoped layer can also be formed between the substrate 1 and the n-type semiconductor layer 10.

[0046] Next, a light-emitting layer 11 comprising a group III nitride semiconductor is formed on the n-type semiconductor layer 10. The light-emitting layer 11 can be a single-layer structure or a quantum well structure having a barrier layer and a well layer. The light-emitting layer 11 can be undoped, n-type doped, or p-type doped. The thickness of the light-emitting layer 11 is preferably 5 nm or more and 100 nm or less, more preferably 10 nm or more and 60 nm or less, and even more preferably 20 nm or more and 40 nm or less. In addition, an n-type guiding layer can be formed between the n-type semiconductor layer 10 and the light-emitting layer 11. The group III nitride semiconductor light-emitting element 100 can be configured to have various peak wavelengths from blue to ultraviolet, depending on the composition of the light-emitting layer 11. Preferably, it is configured to be a light-emitting element emitting ultraviolet light with a peak wavelength of 340 nm or less.

[0047] Simply forming a p-type semiconductor layer 12 on the light-emitting layer 11 is sufficient. Examples of dopants for the p-type semiconductor layer 12 include Mg or Be. The thickness of the p-type semiconductor layer 12 is preferably 40 nm or more and 1000 nm or less, more preferably 70 nm or more and 180 nm or less, and even more preferably 80 nm or more and 105 nm or less. Furthermore, a guiding layer can be provided between the light-emitting layer 11 and the p-type semiconductor layer 12. A p-type electron blocking layer, a p-type cladding layer, and a p-type contact layer can be sequentially formed from the light-emitting layer 11 side to obtain the p-type semiconductor layer 12.

[0048] Each semiconductor layer can be formed by epitaxial growth, such as through well-known thin film growth methods like metal-organic chemical vapor deposition (MOCVD) or molecular beam epitaxy (MBE). For example, a predetermined mixing ratio can be used with trimethylgallium (TMGa) or triethylgallium (TEGa) as the Ga source and trimethylaluminum (TMAl) as the Al source. These source gases are used to perform vapor phase growth simultaneously with a carrier gas, thereby forming the desired thickness according to the growth time. When doping each layer to p-type or n-type, simply use the gas source corresponding to the desired dopant.

[0049] Then, by forming a mask on the p-type semiconductor 12 and performing a mesa etching based on dry etching, a portion of the n-type semiconductor layer 10 is exposed. Next, a first p-side metal stack is formed on the p-type semiconductor layer 12. As illustrated in FIG4, the first p-side metal stack can be formed in a manner where five of them are arranged in a long strip shape. The first p-side stack can be, for example, Ni / Rh / Au.

[0050] On the n-type semiconductor layer 10 exposed by mesa etching, an n-side metal stack 20 is formed by sequentially depositing a first Ti layer 21, an Al layer 22, and a second Ti layer 23 using the same method for manufacturing the n-type ohmic electrode 30. As illustrated in FIG4, the n-side metal stack 20 can also be formed as a comb with teeth inserted between the elongated shape. At this time, an n-type protective film formation region 10a, where no electrode is formed, is also present between the elongated shape and the comb teeth (and on the outer periphery of the light-emitting element 100). Next, heat treatment is performed in a mixed gas environment containing oxygen. The proportion of oxygen contained in the mixed gas is preferably 1% or more and 60% or less, more preferably 10% or more and 50% or less, and even more preferably 20% or more and 40% or less. The mixed gas used may contain inert gases such as nitrogen or argon. The heat treatment temperature is preferably 450°C or higher and 700°C or lower, more preferably 500°C or higher and 600°C or lower, and even more preferably 520°C or higher and 580°C or lower. After the heat treatment begins, it is preferable that oxygen is not used in the mixed gas until the chamber being treated reaches the specified temperature, and that oxygen is introduced after the chamber reaches the specified temperature. Through this heat treatment, the first p-side metal laminate becomes the first p-type ohmic electrode 41, and the n-side metal laminate 20 becomes the n-type ohmic electrode 30.

[0051] Next, a second p-side metal stack can be formed on the first p-type ohmic electrode 41. The second p-side metal stack can be, for example, formed as Pt / Au / Ti from the first p-type ohmic electrode 41 side. Heat treatment is then performed to form the second p-type ohmic electrode 42. This heat treatment is the same as described above, except that the temperature is increased under conditions of oxygen flow. The first p-type ohmic electrode 41 and the second p-type ohmic electrode 42 are then combined to form a p-type ohmic electrode 40.

[0052] Next, an n-side Pt-containing layer 50 and a p-side Pt-containing layer 60, containing Pt, can be formed on the n-type ohmic electrode 30 and the p-type ohmic electrode 40, respectively. The n-side Pt-containing layer 50 and the p-side Pt-containing layer 60 can, for example, be formed from the ohmic electrode side as Ti / Pt / Au / Ti.

[0053] Next, a protective film 70 containing a dielectric material can be formed on the entire surface of the light-emitting element 100. Examples of dielectric materials include SiO2 or Si3N4. A portion of the protective film 70 on the upper surfaces of the n-side Pt-containing layer 50 and the p-side Pt-containing layer 60 can also be exposed using buffered hydrofluoric acid (BHF). Preferably, the exposed area is smaller than the n-side Pt-containing layer 50 and the p-side Pt-containing layer 60. A p-side embedded metal layer 65, for example, formed by sequentially stacking layers of Ti and Au, can be formed on the exposed p-side Pt-containing layer 60. If the outermost surface is used as solder, layers of Ti, Pt, and AuSn can be sequentially stacked to serve as p-side solder pad electrodes 81. At this point, as shown in FIG5, a p-side pad electrode 81 can be formed on a portion of the protective film 70 in the following manner: that is, the p-side embedded metal layer 65 of each strip is connected by the n-type ohmic electrode 30 spanning the n-type layer protective film formation region 10a on the protective film 70. The p-side embedded metal layer 65 can be formed, for example, as Ti / Au / Ti / Pt / AuSn from the p-side containing the Pt layer 60.

[0054] Similar to the formation of the p-side embedded metal layer 65 and the p-side pad electrode 81, the n-side embedded metal layer 55 and the n-side pad electrode 82 can also be formed on the n-side Pt-containing layer 50 by removing the protective film 70 by BHF (see Figure 3) in the exposed area (the portion where the n-side embedded metal layer 55 is formed). The n-side embedded metal layer 55 can, for example, be formed as Ti / Au from the n-side Pt-containing layer 50 side. The n-side pad electrode 82 can, for example, be formed as Ti / Pt / AuSn from the n-side Pt-containing layer 50 side.

[0055] Finally, the light-emitting elements 100 on each wafer can be separated using a laser cutting device and a fracture device. In this way, a group III nitride semiconductor light-emitting element 100 including the n-type ohmic electrode 30 can be manufactured. The group III nitride semiconductor light-emitting element 100 has good forward voltage and a small in-plane deviation in forward voltage. [Example]

[0056] An embodiment of the n-type ohmic electrode 30 of this embodiment will be described.

[0057] (Example 1) As the light-emitting element of Embodiment 1, a light-emitting element 100 with the basic shape of the light-emitting element 100 shown in FIG3 is fabricated. FIG4 is a top view of the light-emitting element 100 of Embodiment 1, showing an example of the arrangement of the n-type protective film forming region 10a, the n-type ohmic electrode 30, the p-type ohmic electrode 40, the n-side embedded metal layer 55, the p-side embedded metal layer 65, the protective film 70, the p-side pad electrode 81, and the n-side pad electrode 82.

[0058] Figure 5 shows a cross-sectional view of the light-emitting element 100 shown in Figure 4 from arrow II. As shown in Figure 4, the light-emitting element 100 of Embodiment 1 is formed into a strip shape with five p-type ohmic electrodes 40 formed on approximately the entire surface of the p-type semiconductor layer 12, and n-type ohmic electrodes 30 inserted therebetween as comb teeth. This shape creates an n-type layer protective film forming region 10a that is exposed between the p-type ohmic electrodes 40 and the n-type ohmic electrodes 30 without forming electrodes. Furthermore, the elongated shape of the p-type ohmic electrode 40, the comb-like shape of the n-type ohmic electrode 30, and the p-side embedded metal layer 65 and n-side embedded metal layer 55 described later in this embodiment are similar to the semiconductor light-emitting element disclosed in the specification and drawings (Figures 1 to 7) of Japanese Patent Application Publication No. 2019-106406. Except for the size or structure (the structure of each ohmic electrode, barrier layer, Pt-containing layer, solder pad, etc.), they are fabricated in the same manner. The fabrication conditions of each layer will be described in detail below.

[0059] A sapphire substrate (2 inches in diameter, 430 μm thick, face orientation: (0001), m-axis offset angle θ: 0.11 degrees) was prepared as substrate 1. Then, an AlN template substrate was fabricated by growing an AlN layer with a center thickness of 0.50 μm (average thickness 0.51 μm) on the sapphire substrate using MOCVD. The growth temperature of the AlN layer was 1330°C, the growth pressure in the chamber was 10 Torr, and the flow rates of the ammonia and TMA growth gases were set to a Group V / Group III ratio of 206. The flow rate of Group V gas (NH3) was 250 sccm, and the flow rate of Group III gas (trimethylaluminum (TMA)) was 53 sccm. Furthermore, regarding the film thickness of the AlN layer, an optical interferometric film thickness measurement device (NanoSpec M6100a; manufactured by Nanometrics) was used to measure the film thickness at a total of 25 equally spaced locations, including the center of the wafer (AlN template substrate).

[0060] Next, the AlN template substrate was introduced into a heat treatment furnace. After the pressure was reduced to 10 Pa, nitrogen was purged to atmospheric pressure to create a nitrogen environment inside the furnace. The temperature inside the furnace was then increased to perform heat treatment on the AlN template substrate. At this time, the heating temperature was 1650°C, and the heating time was set to 4 hours.

[0061] An undoped AlGaN layer with an average Al composition ratio of 0.4 and a thickness of 30 nm was formed using MOCVD. Next, an n-type semiconductor layer 10 with a thickness of 2 μm, containing Al0.25Ga0.75N and doped with Si, was formed. Furthermore, SIMS analysis showed that the Si concentration of the n-type semiconductor layer 10 was 5.0 × 1018 atoms / cm3.

[0062] As the light-emitting layer 11, an n-type guiding layer with a thickness of 30 nm, containing Al0.25Ga0.75N and doped with Si, is formed on the n-type semiconductor layer 10. Then, a 14 nm thick Al0.25Ga0.75N barrier layer is formed. Next, two well layers with a thickness of 2 nm each containing Al0.10Ga0.90N and two 14 nm thick barrier layers containing Al0.25Ga0.75N are alternately formed, followed by a 2 nm thick well layer containing Al0.10Ga0.90N. That is, the number of well layers and barrier layers is 3 each, the Al composition ratio of the barrier layers is 0.25, and the Al composition ratio of the well layers is 0.10. Furthermore, Si is doped during the formation of the barrier layers. The light-emitting center wavelength of the light-emitting layer 11 is 340 nm.

[0063] Then, on the third well layer, nitrogen gas was used as the carrier gas to form an undoped AlGaN guiding layer containing Al0.25Ga0.75N. The thickness of the AlGaN guiding layer was set to 2 nm. Next, while stopping the supply of TMA gas and continuing to supply ammonia gas, the nitrogen carrier gas was stopped and hydrogen was supplied instead. After changing the carrier gas to hydrogen, TMA gas and trimethylgallium (TMG) gas, which are the raw materials for group III elements, were supplied again to form a 55 nm thick p-type electron blocking layer containing Al0.45Ga0.55N and doped with Mg. After the p-type electron blocking layer grew to the specified thickness, the flow rate ratio of TMAl gas and TMGa gas was changed to form a 30 nm thick AlGaN cladding layer (p-type cladding layer) containing Al0.20Ga0.80N and doped with Mg.

[0064] Subsequently, the growth of the AlGaN coating layer was stopped, the carrier gas was switched to nitrogen, and the gas flow rate was changed to the set conditions of the p-type GaN contact layer. Then, the carrier gas was switched to hydrogen to form a 5 nm thick p-type GaN contact layer (p-type contact layer) as the Mg-doped p-type semiconductor layer 12.

[0065] A mask is formed on the p-type semiconductor layer 12, and a mesa etching based on dry etching is performed to expose a portion of the n-type semiconductor layer 10. Then, a first p-side metal stack comprising Ni / Rh / Au is formed on the p-type semiconductor layer 12 using sputtering. The first p-side metal stack is formed in a manner of arranging five elongated strips. Furthermore, the Ni film thickness of the first p-side metal stack is 7 nm, the Rh film thickness is 50 nm, and the Au film thickness is 20 nm.

[0066] On the n-type semiconductor layer 10 exposed by mesa etching, an n-side metal stack 20, comprising a first Ti layer 21, an Al layer 22, and a second Ti layer 23 sequentially deposited, is formed by sputtering into a comb-like shape with teeth inserted between the elongated shapes. At this time, between the elongated shapes and the comb teeth (and on the outer periphery of the wafer), an n-type semiconductor layer protective film formation region 10a is formed, including the n-type semiconductor layer 10 exposed without electrodes. In the n-side metal stack 20, the thickness of the first Ti layer 21 is 20 nm, the thickness of the Al layer 22 is 600 nm, and the thickness of the second Ti layer is 20 nm.

[0067] Next, while nitrogen gas flows at 1000 sccm, the temperature is raised to 550°C. After 5 minutes at 550°C, oxygen is added and flowed at an additional 500 sccm, followed by 10 minutes of contact annealing (Rapid Thermal Annealing, RTA) at 550°C. This simultaneously heat-treats the n-type ohmic electrode 30 and the first p-type ohmic electrode 41, forming an ohmic contact with the n-type semiconductor layer 10 and the p-type semiconductor layer 12. The oxygen content in the mixed gas environment during oxygen flow is 33%.

[0068] A second p-side metal stack is formed by sequentially depositing Pt / Au / Ti layers on the first p-type ohmic electrode 41. Here, the Pt layer has a thickness of 50 nm, the Au layer has a thickness of 100 nm, and the Ti layer has a thickness of 5 nm. The temperature is raised to 550°C while nitrogen gas flows at 1000 sccm and oxygen gas flows at 500 sccm, and then annealed for 15 minutes after reaching 550°C. This forms the second p-type ohmic electrode 42. The first p-type ohmic electrode 41 and the second p-type ohmic electrode 42 are combined to form a p-type ohmic electrode 40. The n-type ohmic electrode 30 and the p-type ohmic electrode 40 are simultaneously heat-treated.

[0069] A Ti / Pt / Au / Ti layer is sequentially deposited on the n-type ohmic electrode 30 to form an n-side Pt-containing layer 50. The film thicknesses of each layer from the substrate 1 side are 50 nm for the Ti layer, 50 nm for the Pt layer, 500 nm for the Au layer, and 10 nm for the Ti layer. The initial 50 nm Ti layer containing the Pt layer 50 on the n-side is referred to as the third Ti layer 51.

[0070] Similarly, a p-side Pt-containing layer 60 is formed on the p-type ohmic electrode 40. The p-side Pt-containing layer 60 is formed in the same way as the n-side Pt-containing layer 50. The p-side Pt-containing layer 60 has a rectangular shape with a long side of 734 μm and a short side of 86 μm when viewed from top.

[0071] Next, a protective film 70 containing SiO2 is formed over the entire surface. The protective film 70 on the upper surface of the p-side containing Pt layer 60 is then removed by BHF to expose it. The exposed area (the portion forming the p-side embedded metal layer 65) is formed with a smaller size than the p-side containing Pt layer 60. Its size is a strip shape with a long side of 329 μm and a short side of 72 μm.

[0072] Then, as shown in FIG4, in the exposed p-side region containing the Pt layer 60, layers of Ti and Au are sequentially deposited to form a p-side embedded metal layer 65. With the outermost surface as solder, a p-side pad electrode 81 is formed, on which layers of Ti, Pt, and AuSn are then deposited. At this time, as shown in FIG5, a p-side pad electrode 81 is also formed on a portion of the protective film 70 in such a way that the p-side embedded metal layers 65 of each strip are connected across the n-type ohmic electrode 30 and the n-type protective film formation region 10a between the strips on the protective film 70. The Ti film thickness of the p-side embedded metal layer 65 is 10 nm, the Au film thickness is 1000 nm, the Ti film thickness of the p-side pad electrode 81 is 50 nm, the Pt film thickness is 200 nm, and the AuSn film thickness is 3000 nm.

[0073] Similar to the formation of the p-side embedded metal layer 65 and the p-side pad electrode 81, an n-side embedded metal layer 55 can also be formed on the n-side Pt layer 50 by sequentially stacking layers of Ti and Au in the area exposed by removing the protective film 70 (see Figure 3) through BHF (the portion forming the n-side embedded metal layer 55). This leads to the formation of an n-side pad electrode 82, which is formed by sequentially stacking layers of Ti, Pt, and AuSn. At this time, similar to the p-side pad electrode 81, an n-side pad electrode 82 is also formed on a portion of the protective film 70.

[0074] Finally, the light-emitting elements 100 on each wafer are separated using a laser cutting and breaking device. The wafers are rectangular in shape with dimensions of 1000 μm × 1000 μm.

[0075] (Comparative Example 1) The thickness of the second Ti layer 23 was set to 5 nm, and otherwise it was carried out in the same manner as in Example 1.

[0076] (Comparative Example 2) The thickness of the second Ti layer 23 was set to 10 nm, and otherwise it was carried out in the same manner as in Example 1.

[0077] (Example 2) The well layer of the light-emitting layer 11 was changed to Al0.30Ga0.70N with the light-emitting center wavelength set to 340 nm to 310 nm, and the Al composition of each semiconductor layer was increased accordingly. Otherwise, it was implemented in the same manner as in Example 1. The Al composition ratio of the undoped layer was 0.55, the Al composition ratio of the n-type semiconductor layer 10 was 0.45, the Al composition ratio of the n-type guiding layer and barrier layer was 0.55, and the Al composition ratio of the p-type electron blocking layer was 0.58.

[0078] (Comparative Example 3) The thickness of the second Ti layer 23 was set to 5 nm, and otherwise it was carried out in the same manner as in Example 2.

[0079] (Comparative Example 4) The thickness of the second Ti layer 23 was set to 10 nm, and otherwise it was carried out in the same manner as in Example 2.

[0080] (Example 3) The thickness of the second Ti layer 23 was set to 30 nm, and otherwise it was carried out in the same manner as in Example 2.

[0081] (Example 4) The thickness of the second Ti layer 23 was set to 100 nm, and otherwise it was carried out in the same manner as in Example 2.

[0082] For Examples 1, 1, 2, 2, 4, 3, and 4, cross-sectional TEM images were observed, and the results showed that a first granular portion was observed in each cross-sectional TEM image. Furthermore, a second granular portion was observed in Examples 1, 2, and 4, but not in Comparative Examples 1 to 4. The cross-sectional TEM image of Example 1 is shown in FIG2B. Next, as shown in FIGS. 6 to 12, the TEM-EDS profile in the thickness direction of the n-type ohmic electrode 30 was measured. During the measurement, profiles for nitrogen (N), oxygen (O), aluminum (Al), silicon (Si), titanium (Ti), nickel (Ni), gallium (Ga), rhodium (Rh), platinum (Pt), and gold (Au) were measured, and all profiles were present. However, based on the illustrations, only the profiles of oxygen (O), aluminum (Al), titanium (Ti), and gallium (Ga) were extracted and shown. Additionally, the figure shows the outline of the initial layer containing the Pt layer, namely the third Ti layer 51, to the midway point of the n-type semiconductor layer 10 after heat treatment. Examples 1, 2, and 4 show the TEM-EDS outlines at the location of the second granular portion observed in cross-sectional TEM images. Furthermore, the Pt layer suppresses the diffusion of metal elements formed above the Pt layer, and the elemental percentages of nickel (Ni), rhodium (Rh), platinum (Pt), and gold (Au) contained in the n-type ohmic electrode 30 are trace amounts and less than 0.5 at%.

[0083] In the TEM-EDS outlines of Figures 6-12, the portion representing the first Al-Ti region 32 or the second Al-Ti region 34 is designated as "A". Furthermore, it can be seen that in any outline, near the interface of the third Ti layer 51 containing the Pt layer 50 on the n-side of the second direction side of the Al layer 22, there is also a region with an oxygen content of 10 at% or more (second oxygen region 35). In Examples 1, 2, and 4, corresponding to Figures 6, 9, and 10 respectively, the second oxygen region 35 is located above the second Al-Ti region 34. In the outlines of Figures 6, 9, and 10, the portion representing the maximum percentage of oxygen atoms is designated as "B". Additionally, in Comparative Examples 2 and 4 (referring to Figures 8 and 12) where the thickness of the second Ti layer 23 is 10 nm, since two oxygen maxima are observed in the second oxygen region 35, the inner side of the Al layer is designated as "C". In Comparative Example 1, where the thickness of the second Ti layer 23 is 5 nm, since two oxygen maxima were observed in the first oxygen region 31, the inner side of the Al layer therein was designated as "C".

[0084] Furthermore, Figure 13 shows the ratio of at% of oxygen atoms to the total at% of Al atoms and Ti atoms in the thickness direction of the n-type ohmic electrode 30 of Examples 1, Comparative Example 1, and Comparative Example 2, starting from the interface between the Pt layer in the n-side Pt layer 50 and the third Ti layer 51. As can be seen from Figure 13, the ratio of at% of oxygen atoms in the second oxygen region 35 of Example 1 to the total at% of Al atoms and Ti atoms is in the range of 0.85 or less, which is smaller than that of Comparative Example 1 and Comparative Example 2.

[0085] Furthermore, Figure 14 shows the atomic fraction of Ti atoms in the thickness direction of the n-type ohmic electrode 30 in Examples 1, Comparative Example 1, and Comparative Example 2, starting from the interface between the Pt layer in the n-side Pt layer 50 and the third Ti layer 51. According to the graph, in Comparative Example 1 and Comparative Example 2, if the electrode depth direction is greater than approximately 90 nm, the atomic fraction of Ti is approximately 0. In contrast, Example 1 contains approximately 20 at% Ti.

[0086] In each embodiment and comparative example, after the components are monolithically assembled, the forward voltage Vf is measured using a sorting machine. The forward voltage (Vf) is measured by flowing a forward current of 350 mA. The number of light-emitting elements 100 measured is approximately 1000.

[0087] Table 1 shows the film thickness of the second Ti layer 23, the presence or absence of the first Al-Ti region 32 (first granular portion), the presence or absence of the second Al-Ti region 34 (second granular portion), the maximum oxygen value of the first oxygen region, the maximum oxygen value of the second oxygen region, the average value of O[at%] / (Al+Ti)[at%] of the maximum oxygen value of the second oxygen region, and the average value [standard deviation] of the forward voltage Vf at a forward current of 350 mA for the light-emitting element 100 of Example 1, Comparative Example 1, and Comparative Example 2.

[0088] [Table 1] Comparative Example 1 Comparative Example 2 Example 1 Thickness of the second Ti layer (before heat treatment) 5 nm 10 nm 20 nm The presence or absence of the first Al-Ti region have have have The presence or absence of a second Al-Ti region none none have The O maximum value [at%] in the first oxygen region 19.4 18.2 15.0 The O maxima in the second oxygen region [at%] 49.8 51.0 41.0 O maxima in the second oxygen region O[at%] / (Al+Ti)[at%] 1.1 1.2 0.8 The average value of Vf[V] 4.61 4.18 4.07 The standard deviation of Vf[V] 0.23 0.06 0.02

[0089] Table 2 shows the film thickness of the second Ti layer 23, the presence or absence of the first Al-Ti region 32 (first granular portion), the presence or absence of the second Al-Ti region 34 (second granular portion), the maximum oxygen value of the first oxygen region, the maximum oxygen value of the second oxygen region, the average value of O[at%] / (Al+Ti)[at%] of the maximum oxygen value of the second oxygen region, and the average value [standard deviation] of the forward voltage Vf at a forward current of 350 mA for the light-emitting element 100 of Examples 2, 3, 4, Comparative Example 3 and Comparative Example 4.

[0090] [Table 2] Comparative Example 3 Comparative Example 4 Example 2 Example 3 Example 4 Thickness of the second Ti layer (before heat treatment) 5 nm 10 nm 20 nm 30 nm 100 nm The presence or absence of the first Al-Ti region have have have have have The presence or absence of a second Al-Ti region none none have have have The O maximum value [at%] in the first oxygen region 5.8 17.3 10.0 9.5 8.1 The O maxima in the second oxygen region [at%] 45.1 54.1 39.8 36.0 27.8 O maxima in the second oxygen region O[at%] / (Al+Ti)[at%] 0.9 1.4 0.8 0.7 0.4 The average value of Vf[V] 7.23 6.27 5.59 5.98 5.97 The standard deviation of Vf[V] 0.35 0.22 0.20 0.15 0.13

[0091] According to Tables 1 and 2, the Vf values ​​in Examples 1, 2, 3, and 4, where the thickness of the second Ti layer 23 is 20 nm or more, are lower and have smaller deviations than those in Comparative Examples 1, 2, 3, and 4. Furthermore, it can be seen that as the thickness of the second Ti layer 23 increases to 5 nm, 10 nm, and 20 nm, the average value and standard deviation of Vf decrease. Firstly, it is believed that the minimum Vf in Examples 1 and 2 is due to the second granular portion 34 of the second Al-Ti region 34. It is believed that by including an intermetallic compound (TiAl3) on the second direction side, the resistance of the n-type ohmic electrode 30 decreases, resulting in a good Vf. Furthermore, compared to Comparative Examples 1 and 3, the better results in Comparative Examples 2 and 4 can be expected because when the thickness of the second Ti layer 23 is 5 nm, oxygen is uniformly absorbed in the plane and in a layered manner. However, when the thickness of the second Ti layer 23 is 10 nm, oxygen is dispersed at different depths in the thickness direction, producing the "C"-shaped portion shown in the figure, indicating uneven oxygen distribution in the plane.

[0092] Furthermore, as in Example 4, if the thickness of the second Ti layer 23 exceeds 20 nm and becomes 100 nm, the average value of Vf increases because the volume ratio of Ti, which has a higher resistivity than Al, increases. However, oxygen movement is easily hindered, and the amount of local oxygen (maximum) decreases, thus reducing the standard deviation of Vf (site-dependent deviation).

[0093] In the TEM-EDS profile of Example 4 shown in Figure 10, similar to the TEM-EDS profile of Example 2 (Figure 9), a first Al-Ti region 32 (first granular portion) and a second Al-Ti region 34 (second granular portion) are observed, indicating that the second oxygen region 35 is located above the second Al-Ti region 34. Furthermore, it is also evident that due to the greater thickness of the second Ti layer 23, the second Al-Ti region 34 (second granular portion) is relatively large.

[0094] 1:Substrate 10: n-type semiconductor layer / n-type group III nitride semiconductor layer 10a: n-type layer protective film formation region / n-type semiconductor layer protective film formation region 11: Emissive layer 12: p-type semiconductor layer / p-type group III nitride semiconductor layer 20:n-side metal laminate 21: First Ti layer 22, 33: Al layer 23: Second Ti layer 30:n-type ohmic electrode 31: First oxygen region / First direction side oxygen-containing region 32: First Al-Ti region / First direction side Al-Ti region / First granular portion 34: Second Al-Ti region / Second directional Al-Ti region / Second granular portion 35: Second oxygen region / Second directional oxygen-containing region 40: p-type ohmic electrode 41: First p-type ohmic electrode 42: Second p-type ohmic electrode 50:n side contains Pt layer 51: Third Ti layer 55:n-side embedded metal layer 60:p side contains Pt layer 65:p-side embedded metal layer 70: Protective film 81:p-side solder pad electrode 82:n-side solder pad electrode 100: Group III nitride semiconductor light-emitting element / light-emitting element A, B, C: Parts

Claims

1. An n-type ohmic electrode, disposed on an n-type group III nitride semiconductor layer, the n-type ohmic electrode comprising: an Al layer, a second-direction side Al-Ti region, the second-direction side Al-Ti region being located in a second direction opposite to the n-type group III nitride semiconductor layer side of the Al layer, and a second-direction side oxygen-containing region, the second-direction side oxygen-containing region being located in the second direction of the second-direction side Al-Ti region in the thickness direction, the second-direction side Al-Ti region comprising 50 at% or more Al, and comprising 5 at% or more and 30 at% or less Ti, and O comprising 10 at% or less, and the second-direction side oxygen-containing region comprising 10 at% or more O.

2. The n-type ohmic electrode as described in claim 1, wherein, The Al layer is present in the central portion at least in the thickness direction.

3. The n-type ohmic electrode as described in claim 1, wherein, In the oxygen-containing region on the second direction side, at the point where oxygen is extremely large in the thickness direction, the ratio of oxygen atoms at% to the total at% of Al atoms and Ti atoms is 1.0 or less.

4. The n-type ohmic electrode as described in claim 1, wherein, The material has a first-direction Al-Ti region located in the first direction of the Al layer in the thickness direction. The first-direction Al-Ti region contains more than 50 at% Al, more than 5 at% and less than 30 at% Ti, and less than 10 at% O.

5. A group III nitride semiconductor light-emitting element, comprising: An n-type group III nitride semiconductor layer, and an n-type ohmic electrode disposed on the surface of the n-type group III nitride semiconductor layer as described in any one of claims 1 to 4.

6. A method for manufacturing an n-type ohmic electrode, comprising: a first step of sequentially forming a first Ti layer, an Al layer, and a second Ti layer on the surface of an n-type group III nitride semiconductor layer to form an n-side metal stack; and a second step of heat-treating the n-side metal stack, wherein the thickness of the second Ti layer formed in the first step is set to be 15 nm or more, and the heat treatment is performed in a mixed gas environment containing 1% or more and 60% or less oxygen.

7. A method for manufacturing an n-type ohmic electrode as described in claim 6, wherein, In the second step, the second Ti layer is used as the outermost surface and the heat treatment is performed.

8. A method for manufacturing an n-type ohmic electrode as described in claim 6, wherein, The thickness of the second Ti layer formed in the first step is set to be less than 100 nm.

9. A method for manufacturing a group III nitride semiconductor light-emitting element, comprising: The steps of forming an n-type group III nitride semiconductor layer and the method of manufacturing an n-type ohmic electrode using any one of claims 6 to 8, wherein the n-type ohmic electrode is formed on the n-type group III nitride semiconductor layer.

10. The method for manufacturing a group III nitride semiconductor light-emitting element as described in claim 9 further comprises: In the steps of forming a light-emitting layer on the n-type III nitride semiconductor layer, forming a p-type III nitride semiconductor layer on the light-emitting layer, and forming a p-side metal stack on the p-type III nitride semiconductor layer, the heat treatment of the p-side metal stack is performed simultaneously in the second step.

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