Gain amplifier for re-driver circuit using all-cmos process

Abstract

A gain amplifier includes a gain stage, a transducer stage, and a feedback stage. The gain stage includes a first resistor, a second resistor, first and second PMOS transistors, and first and second NMOS transistors. A first terminal of one of the first PMOS transistors and a first terminal of one of the second PMOS transistors are connected to the first resistor. A first terminal of one of the first NMOS transistors and a first terminal of one of the second NMOS transistors are connected to the second resistor. A second terminal of one of the first PMOS transistors is connected to a second terminal of one of the first NMOS transistors. A gate terminal of one of the first PMOS transistors is connected to a gate terminal of one of the first NMOS transistors. A second terminal of one of the second PMOS transistors is connected to a second terminal of one of the second NMOS transistors. A gate terminal of one of the second PMOS transistors is connected to a gate terminal of one of the second NMOS transistors.

Claims

1. A gain amplifier comprising: a gain stage including: a first resistor; a second resistor; and a first P-type metal-oxide-semiconductor having a first terminal, a second terminal, and a gate terminal, wherein, The first terminal is connected to the first resistor; a first N-type metal-oxide-semiconductor (MOS) transistor has a first terminal, a second terminal, and a gate terminal, wherein the first terminal is connected to the second resistor, the second terminal is connected to the second terminal of the first P-type MOS transistor, and the gate terminal is connected to the gate terminal of the first P-type MOS transistor; a second P-type MOS transistor has a first terminal, a second terminal, and a gate terminal, wherein the first terminal is connected to the first resistor; and a second N-type MOS transistor has a first terminal, a second terminal, and a gate terminal, wherein the first terminal is connected to the second resistor, the second terminal is connected to the second terminal of the second P-type MOS transistor, and the gate terminal is connected to the gate terminal of the second P-type MOS transistor; a transimpedance amplifier stage (TIA stage) coupled to the gain stage; and a feedback stage coupled to the gain stage and the transimpedance amplifier stage.

2. The gain amplifier as claimed in claim 1, wherein the gate terminal of the first P-type metal-oxide-semiconductor and the gate terminal of the first N-type metal-oxide-semiconductor are used to receive a first input signal, and the gate terminal of the second P-type metal-oxide-semiconductor and the gate terminal of the second N-type metal-oxide-semiconductor are used to receive a second input signal.

3. The gain amplifier as claimed in claim 1, wherein a positive input terminal of the transimpedance amplifier stage is coupled to a negative output terminal of the gain stage, and a negative input terminal of the transimpedance amplifier stage is coupled to a positive output terminal of the gain stage.

4. The gain amplifier as claimed in claim 1, wherein a positive input terminal of the feedback stage is coupled to a positive output terminal of the inverting amplifier stage, a negative input terminal of the feedback stage is coupled to a negative output terminal of the inverting amplifier stage, a positive output terminal of the feedback stage is coupled to a negative input terminal of the inverting amplifier stage, and a negative output terminal of the feedback stage is coupled to a positive input terminal of the inverting amplifier stage.

5. The gain amplifier as claimed in claim 1, wherein the feedback stage comprises: a third resistor; a fourth resistor; and a third P-type metal-oxide-semiconductor having a first terminal, a second terminal, and a gate terminal, wherein, The first terminal is connected to the third resistor; a third N-type metal-oxide-semiconductor has a first terminal, a second terminal, and a gate terminal, wherein the first terminal is connected to the fourth resistor, the second terminal is connected to the second terminal of the third P-type metal-oxide-semiconductor, the second terminal of the first P-type metal-oxide-semiconductor, and the second terminal of the first N-type metal-oxide-semiconductor, and the gate terminal is connected to the gate terminal of the third P-type metal-oxide-semiconductor; A fourth P-type metal-oxide-semiconductor has a first terminal, a second terminal, and a gate terminal, wherein the first terminal is connected to the third resistor; and a fourth N-type metal-oxide-semiconductor has a first terminal, a second terminal, and a gate terminal, wherein the first terminal is connected to the fourth resistor, the second terminal is connected to the second terminal of the fourth P-type metal-oxide-semiconductor, the second terminal of the second P-type metal-oxide-semiconductor, and the second terminal of the second N-type metal-oxide-semiconductor, and the gate terminal is connected to the gate terminal of the fourth P-type metal-oxide-semiconductor.

6. The gain amplifier as claimed in claim 1, wherein the gain stage further comprises: a first common-mode control circuit comprising: an operational amplifier; a fifth resistor coupled between the second terminal of the first P-type metal-oxide-semiconductor, the second terminal of the first N-type metal-oxide-semiconductor, and the operational amplifier; and a sixth resistor coupled between the second terminal of the second P-type metal-oxide-semiconductor, the second terminal of the second N-type metal-oxide-semiconductor, and the operational amplifier.

7. The gain amplifier as claimed in claim 6, wherein the gain stage further comprises: a fifth P-type metal-oxide-semiconductor coupled to the first terminal of the first P-type metal-oxide-semiconductor and the first common-mode control circuit; and a sixth P-type metal-oxide-semiconductor coupled to the first terminal of the second P-type metal-oxide-semiconductor and the first common-mode control circuit.

8. The gain amplifier as claimed in claim 7, wherein the fifth P-type metal-oxide-semiconductor, the sixth P-type metal-oxide-semiconductor and the operational amplifier are implemented by high-voltage components, and the first P-type metal-oxide-semiconductor, the first N-type metal-oxide-semiconductor, the second P-type metal-oxide-semiconductor and the second N-type metal-oxide-semiconductor system are implemented by low-voltage components.

9. The gain amplifier as claimed in claim 1, wherein the transimpedance amplifier stage includes: a second common-mode control circuit comprising: an operational amplifier; and a control transistor coupled to the operational amplifier; a first inverter coupled between a positive input terminal of the transimpedance amplifier stage, a negative output terminal of the transimpedance amplifier stage, and the second common-mode control circuit; and a second inverter coupled between a negative input terminal of the transimpedance amplifier stage, a positive output terminal of the transimpedance amplifier stage, and the second common-mode control circuit.

10. A signal repeater (re-driver) comprising: an equalizer; a gain amplifier coupled to the equalizer and comprising: a gain stage comprising: a first resistor; a second resistor; a first P-type metal-oxide-semiconductor having a first terminal, a second terminal, and a gate terminal, wherein, The first terminal is connected to the first resistor; a first N-type metal-oxide-semiconductor (MOS) transistor has a first terminal, a second terminal, and a gate terminal, wherein the first terminal is connected to the second resistor, the second terminal is connected to the second terminal of the first P-type MOS transistor, and the gate terminal is connected to the gate terminal of the first P-type MOS transistor; a second P-type MOS transistor has a first terminal, a second terminal, and a gate terminal, wherein the first terminal is connected to the first resistor; and a second N-type MOS transistor has a first terminal, a second terminal, and a gate terminal, wherein the first terminal is connected to the second resistor, the second terminal is connected to the second terminal of the second P-type MOS transistor, and the gate terminal is connected to the gate terminal of the second P-type MOS transistor; a transimpedance amplifier stage (TIA). A stage), coupled to the gain stage; and a feedback stage, coupled to the gain stage and the transimpedance amplifier stage; and a transmitter, coupled to the gain amplifier.

Images