Method for manufacturing power semiconductor module

TWI936060BActive Publication Date: 2026-08-11LA STRONG PRECISION IND CO LTD
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Patent Information

Application Number
TW115100002
Authority / Receiving Office
TW · TW
Patent Type
Patents
Current Assignee / Owner
Filing Date
2026-01-01
Publication Date
2026-08-11
Estimated Expiration
2045-12-31

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    Figure TWG2TB001906119_003
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Abstract

A method for manufacturing a power semiconductor module includes the following steps: forming a metal pad on a metal substrate; placing a wafer and wafer peripheral components on the metal pad; covering the top surface of the metal substrate, the wafer, wafer peripheral components, and the metal pad with an insulating layer; etching trenches on the insulating layer using a laser; depositing a metal layer on the surface of the insulating layer and in the trenches; etching conductive areas in the metal layer, and removing the metal substrate by etching to obtain a power semiconductor package structure; and stacking a plurality of power semiconductor package structures to obtain a power semiconductor module. This invention first packages each chip individually in a single layer before stacking them, eliminating the need for complex processes to fabricate each power semiconductor package structure, thus reducing costs.
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Claims

1. A method for manufacturing a power semiconductor module, comprising the following steps: forming a plurality of metal pads on a metal substrate; disposing at least one wafer and at least one wafer peripheral component on the metal pads; covering the top surface of the metal substrate, the at least one wafer, the at least one wafer peripheral component, and the metal pads with a plurality of insulating layers; etching a plurality of trenches on the insulating layers by laser; depositing a metal layer on the surface of the insulating layers and in the trenches according to circuit design requirements; etching a plurality of conductive areas in the metal layer, and removing the metal substrate by etching to obtain a power semiconductor package structure; and stacking the plurality of power semiconductor package structures to obtain a power semiconductor module.

2. The method for manufacturing a power semiconductor module as described in claim 1, wherein, The insulating layer is made of a high thermal conductivity medium with a dielectric strength greater than 650V and a thermal conductivity greater than 5.

3. The method for manufacturing a power semiconductor module as described in claim 1, wherein, An inner layer of the insulating layer is close to the metal pads and is made of a highly thermally conductive insulating material, while an outer layer of the insulating layer is away from the metal pads and is made of a low-cost insulating polymer.

4. The method for manufacturing a power semiconductor module as described in claim 1, wherein, The metal layers located in the trenches are defined as a plurality of columns, each column having a width of less than or equal to 100m and greater than or equal to 50m.

5. The method for manufacturing a power semiconductor module as described in claim 1, wherein, A magnetic material is inserted between the equal power semiconductor package structures.

6. A method for manufacturing a power semiconductor module as described in claim 1, wherein, Following the step of depositing a metal layer on the surface of the insulating layer and in the trenches according to the circuit design requirements, the method further includes: a heat dissipation device disposed above the at least one wafer; and the insulating layer covering the heat dissipation device.

7. A method for manufacturing a power semiconductor module as described in claim 1, wherein, The power semiconductor package structure includes a first gate-type three-dimensional metal sheet and a second gate-type three-dimensional metal sheet. The first gate-type three-dimensional metal sheet includes a body, a plurality of first electrical connections, and a plurality of second electrical connections. The first electrical connections are spaced apart at a first end of the body. A second end of the first gate-type three-dimensional metal sheet has a plurality of fins. A trench is formed between adjacent fins at the second end of the first gate-type three-dimensional metal sheet. The second electrical connections are respectively disposed at the first gate-type three-dimensional metal sheet. The bottom of the fins at the second end of the second gate-shaped three-dimensional metal sheet and contact the top surface of the wafer; wherein, the second gate-shaped three-dimensional metal sheet includes a body, a plurality of first electrical connection portions and a plurality of second electrical connection portions, the first electrical connection portions of the second gate-shaped three-dimensional metal sheet are spaced apart at a first end of the second gate-shaped three-dimensional metal sheet, a second end of the second gate-shaped three-dimensional metal sheet has a plurality of fins, the second electrical connection portions of the second gate-shaped three-dimensional metal sheet are respectively disposed at the bottom of the fins at the second end of the second gate-shaped three-dimensional metal sheet and contact the top surface of the wafer, and adjacent fins at the second end of the second gate-shaped three-dimensional metal sheet form a... A groove is formed; wherein one end of each of the second electrical connection portions of the first gate-shaped three-dimensional metal sheet passes through the groove of the second end of the second gate-shaped three-dimensional metal sheet and is alternately arranged between the second electrical connection portions of the second gate-shaped three-dimensional metal sheet, and the other end of each of the second electrical connection portions of the first gate-shaped three-dimensional metal sheet is located outside the groove of the second end of the second gate-shaped three-dimensional metal sheet, so that a gap is formed between the second electrical connection portions of the first gate-shaped three-dimensional metal sheet and the second electrical connection portions of the second gate-shaped three-dimensional metal sheet, and the width of the fins at the second end of the first gate-shaped three-dimensional metal sheet is... The width of the trenches at the second end of the second gate-type three-dimensional metal sheet is greater than that of the trenches at the second end of the second gate-type three-dimensional metal sheet; wherein the insulating layers include a first insulating layer and a second insulating layer, the first insulating layer covers the wafer, the body of the first gate-type three-dimensional metal sheet and the second electrical connection portions, such that the first electrical connection portions of the first gate-type three-dimensional metal sheet and the first electrical connection portions of the second gate-type three-dimensional metal sheet are exposed outside the first insulating layer, the second insulating layer fills the gap, and the thermal conductivity and dielectric constant of the materials of the first insulating layer and the second insulating layer are different.

Citation Information

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