Method for fabricating heteroepitaxial films

TWI937302BActive Publication Date: 2026-09-01SHIN ETSU HANDOTAI CO LTD
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Patent Information

Application Number
TW111132467
Authority / Receiving Office
TW · TW
Patent Type
Patents
Current Assignee / Owner
Priority Date
2021-10-06
Filing Date
2022-08-29
Publication Date
2026-09-01
Estimated Expiration
2042-08-28

AI Technical Summary

Technical Problem

Existing methods for forming heteroepitaxial films on silicon substrates face challenges such as material loss, damage to elements, and inefficient production due to the use of hydrogen implantation, which creates fragile layers and is costly for large substrates, and the process is prone to defects and cracking.

Method used

A method involving reduced-pressure CVD to grow a 3C-SiC single crystal film heteroepitaxially on a single crystal silicon substrate, utilizing specific pressure and temperature conditions to form SiC nuclei and voids at the interface, allowing for efficient peeling and reuse of the substrate, without the need for hydrogen implantation.

Benefits of technology

This method enables high-quality 3C-SiC single crystal film production with minimal substrate loss and damage, facilitating efficient heteroepitaxial growth and stress relaxation, suitable for large substrates, and enabling further integration with GaN or Si layers for enhanced semiconductor performance.

✦ Generated by Eureka AI based on patent content.

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Abstract

This invention discloses a method for fabricating a heteroepitaxial film, which involves heteroepitaxially growing a 3C-SiC single-crystal film on a single-crystal Si substrate and then peeling it off. The method includes: a first step, using a reduced-pressure CVD apparatus to remove the native oxide film on the surface of the single-crystal Si substrate by hydrogen annealing; a second step, supplying a source gas containing carbon and silicon while forming SiC nuclei at a temperature below 1333 Pa and between 300 and 950°C; a third step, forming a 3C-SiC single-crystal film at a temperature below 1333 Pa and between 800°C and 1200°C, and forming a void directly beneath the 3C-SiC single-crystal film; and a fourth step, peeling off the 3C-SiC single-crystal film using the void to fabricate the heteroepitaxial film. This provides a method that efficiently obtains a thin-film heteroepitaxial film with minimal damage to components and reduced material loss.
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Description

[Technical Field]

[0001] This invention relates to a method for manufacturing a heteroepitaxial film. [Previous Technology]

[0002] Advanced CMOS (Complementary Metal Oxide Silicon) and IGBT (Insulated Gate Bipolar Transistor) devices formed on silicon substrates are mostly not used while maintaining the initial silicon substrate thickness. Instead, they are typically thinned using methods such as polishing. This is because a thicker silicon substrate would act as a resistor, creating obstruction. Conversely, a thin silicon substrate from the outset would warp during manufacturing and fail to pass through the device fabrication process, thus requiring thickness. Furthermore, recent devices have increasingly employed not only miniaturization but also integration methods such as Chip on Wafer, where diced devices are mounted onto a pre-existing metallized wafer. In this process, the diced devices are also thinned, removing a significant portion of the silicon substrate.

[0003] Furthermore, the use of materials other than silicon in components is gradually becoming more active, which helps to improve performance. Among them, compared to Si's 1.1 eV, SiC has a wide band gap of 2.2 to 3.3 eV, thus exhibiting high insulation breaking strength and high thermal conductivity. Therefore, it is expected to be used as a semiconductor material for various semiconductor components such as power components and high-frequency components.

[0004] Therefore, considering these points, a technique has been proposed, for example, in Patent Documents 1, 2, and 3, in which hydrogen plasma implantation is performed on SiC and silicon beforehand, and the substrate is peeled off from this implanted layer. If this method is used, the thin film side can be used as an element after peeling, and the thick film side can be reused as a substrate again (although surface polishing is required), making it a highly advantageous method. However, this method peels off by creating a fragile layer through ion implantation, such as hydrogen. Since it requires ion implantation equipment (which is particularly expensive for large-diameter substrates), and the timing of forming the fragile layer is extremely difficult (if the fragile layer is formed in the early stages of the process, there is a possibility of cracking during the thermal steps of the process; on the other hand, if it is formed in the later stages of the process, the currently formed element will be destroyed by ion implantation), there are obstacles to its practical application. [Prior Art Documents] (Patent Documents)

[0005] Patent Document 1: Japanese Patent Application Publication No. 2010-251724; Patent Document 2: Japanese Patent Application Publication No. 2011-223011; Patent Document 3: Japanese Patent Publication No. 2010-502023 [Summary of the Invention]

[0006] [Problem to be Solved by the Invention] The present invention was made to solve the above-mentioned problem by efficiently obtaining a thin-film heteroepitaxial film with minimal damage to components and reduced material loss. [Technical Means for Solving the Problem]

[0007] To achieve the above objective, the present invention provides a method for fabricating a heteroepitaxial film, characterized by: a step of heteroepitaxially growing a 3C-SiC single crystal film on a single crystal silicon substrate and then peeling the 3C-SiC single crystal film off the single crystal silicon substrate, and further comprising: a first step, which uses a reduced-pressure CVD (chemical vapor deposition) apparatus to remove the natural oxide film on the surface of the single crystal silicon substrate by hydrogen baking; a second step, which supplies a source gas containing carbon and silicon into the reduced-pressure CVD apparatus while forming SiC nuclei on the single crystal silicon substrate under conditions of pressure below 1333 Pa and temperature above 300°C and below 950°C; a third step, which... The process involves growing SiC single crystals under conditions of Pa below 800°C and temperature above 800°C but below 1200°C to form a 3C-SiC single crystal film, and forming a void directly below the 3C-SiC single crystal film; and the fourth step, which involves separating and peeling the 3C-SiC single crystal film from the aforementioned single crystal silicon substrate using the aforementioned void to produce the aforementioned heteroepitaxial film.

[0008] By removing the natural oxide film on the surface of the single-crystal silicon substrate in the first step, SiC nucleation can be performed in the second step. Furthermore, by combining the pressure and temperature conditions that facilitate SiC nucleation in the second step with the pressure and temperature conditions that facilitate SiC single-crystal growth in the third step, a heteroepitaxial wafer with a high-quality 3C-SiC single-crystal film can be efficiently manufactured. Moreover, setting the pressure to 1333 Pa (10 Torr) or below prevents secondary or higher-order reactions, such as reactions between reactive species and the raw material gas in the gas phase, thus ensuring more reliable heteroepitaxial growth. This prevents 3C-SiC polycrystallineization. Furthermore, while growing the 3C-SiC single-crystal film, pores can be formed in the silicon layer (single-crystal silicon substrate) directly beneath the 3C-SiC single-crystal film (hereinafter also referred to as the 3C-SiC / silicon interface). The presence of these pores not only mitigates the lattice mismatch between 3C-SiC and silicon, but also relaxes the stress of the epitaxial layer as a whole. Therefore, even thick 3C-SiC single crystal films can more reliably form 3C-SiC single crystal films without crystallization defects.

[0009] As described above, by combining the pressure and temperature conditions that facilitate SiC nucleation with the pressure and temperature conditions that facilitate SiC single crystal growth and form voids at the SiC / silicon interface, a heteroepitaxial wafer having a 3C-SiC single crystal film can be efficiently obtained. Furthermore, by separating and peeling off the voids at the 3C-SiC / silicon interface in the fourth step, a heteroepitaxial film containing the target 3C-SiC single crystal film can be efficiently obtained. Moreover, since peeling occurs at the 3C-SiC / silicon interface, separation can be performed with less loss of the single crystal silicon substrate. In other words, a thicker single crystal silicon substrate can be obtained after separation, which is more effective for reuse. Furthermore, for example, even after peeling off after forming a device on the 3C-SiC single crystal film, the damage to the device is minimal.

[0010] At this time, monomethylsilane or trimethylsilane can be used as the aforementioned source gas.

[0011] If the raw material gas is such, both Si and C can be supplied as a single gas. Therefore, it is not necessary to perform the carbonization process known as the pre-growth carbonization treatment of 3C-SiC single crystal film, which involves attaching carbon atoms to the surface of a single crystal silicon substrate using a gas containing carbon source precursors to form nuclei, as was previously done. Instead, the formation of 3C-SiC single crystal films can be carried out under very simple conditions. In addition, compared with the previous method, it is easier to control the reactive species in the gas phase to make the heteroepitaxial growth more reliable. It is also easier to form thick 3C-SiC single crystal films without stopping the growth of 3C-SiC single crystal films. The previous method initially used a gas containing carbon source precursors to attach carbon atoms to the surface of a single crystal silicon substrate to form nuclei, and then formed 3C-SiC single crystal films using a gas containing carbon source precursors and a gas containing silicon source precursors.

[0012] Furthermore, the aforementioned first step can be carried out under conditions of temperature above 1000°C and below 1200°C.

[0013] Setting the temperature conditions allows for more efficient and effective removal of the natural oxide film on the surface of the single-crystal silicon substrate, thereby enabling more reliable formation of the 3C-SiC single-crystal film. Furthermore, it prevents slip displacement from occurring.

[0014] Furthermore, the aforementioned third step can be performed under pressure conditions below 133 Pa.

[0015] By setting the pressure to below 133 Pa (1 Torr) in the third step, it is possible to grow the 3C-SiC single crystal film while more reliably forming pores at the 3C-SiC / silicon interface, and to more reliably peel off the 3C-SiC single crystal film (heteroepitaxy film) in the fourth step.

[0016] Furthermore, the aforementioned third step can be performed with one or more of the pressure and temperature conditions being higher than those in the aforementioned second step.

[0017] Although the conditions of the third step can be carried out under the same conditions as the second step, if it is carried out in the above manner, the growth rate of the 3C-SiC single crystal film can be accelerated in the third step. Therefore, even if a thick 3C-SiC single crystal film is formed, it can still be carried out efficiently.

[0018] At this time, the aforementioned third step can be carried out under conditions where the temperature is above 1000℃ but below 1200℃.

[0019] Under these growth conditions, heteroepitaxial growth can be made the bottleneck of the gas supply rate without being limited by the following: limiting the facet orientation of the single-crystal silicon substrate to further reduce the lattice mismatch between silicon and SiC that has been generated in previous methods. Furthermore, there is no need to form a fragile layer like hydrogen through ion implantation, allowing for more reliable growth of the 3C-SiC single-crystal film. Moreover, it is easier to form 3C-SiC single-crystal films on single-crystal silicon substrates with large diameters, such as 300 mm.

[0020] Furthermore, it is possible to increase one or more of the pressure and temperature in the aforementioned third step.

[0021] If this method is used, the pressure can also be increased to accelerate the film formation rate in the initial stage of the third step, for example, by setting the pressure to below 133 Pa (1 Torr). Similarly, the temperature can also be set to a higher temperature during the process to accelerate the film formation rate.

[0022] At this time, the aforementioned second step and the aforementioned third step can be performed by gradually increasing the temperature from a range of 300°C to 950°C to a range of 1000°C to 1200°C, thereby continuously performing the aforementioned SiC nucleus formation and the aforementioned 3C-SiC single crystal film formation following the SiC nucleus formation.

[0023] If this is done, heteroepitaxial growth can be set as the bottleneck for the delivery speed of the supply gas, without being limited by the planar orientation of the single-crystal silicon substrate. In addition, it is easier to form 3C-SiC single-crystal films on single-crystal silicon substrates with large diameters.

[0024] Moreover, the aforementioned heating can be carried out at a heating rate of 0.5°C / sec or more and 2°C / sec or less.

[0025] With such a heating rate, temperature control can be performed more reliably. In addition, uniform SiC nucleation can be achieved, and defects during heteroepitaxy growth can be effectively prevented.

[0026] In addition, GaN can be grown on the surface of the 3C-SiC single crystal film formed above to form a GaN layer after the third step and before the fourth step, or Si can be grown on the surface of the 3C-SiC single crystal film formed above to form a Si layer after the third step and before the fourth step.

[0027] The 3C-SiC single crystal film grown in the above manner has a flat surface, so GaN layer and Si layer can be further heteroepitaxially grown on the surface of the 3C-SiC single crystal film.

[0028] Furthermore, after the aforementioned third step, a protective film is formed on the aforementioned 3C-SiC single crystal film before performing the aforementioned fourth step. Alternatively, after the aforementioned third step, an element is formed on the aforementioned 3C-SiC single crystal film and a protective film is formed before performing the aforementioned fourth step. Alternatively, after the aforementioned third step, an element is formed on the aforementioned 3C-SiC single crystal film, and the element is cut along the scribing lines of the element before forming a protective film and performing the aforementioned fourth step.

[0029] This method allows for peeling while maintaining the 3C-SiC single crystal film, and also allows for peeling after device formation. [Effects]

[0030] By means of the heteroepitaxial film fabrication method of the present invention, it is possible to maintain good 3C-SiC single crystallinity on a single crystal silicon substrate while efficiently growing a 3C-SiC single crystal film in the silicon substrate (3C-SiC / silicon interface) in a manner similar to creating voids. Using these voids to peel the 3C-SiC single crystal film from the silicon substrate, a thin-film heteroepitaxial film can be obtained efficiently. Furthermore, it is extremely effective in minimizing damage to components and material loss. Moreover, by using SiC as the substrate in such a heteroepitaxial film, it is possible to utilize the wide bandgap characteristic for component separation through insulation and improve cooling efficiency through high thermal conductivity.

Implementation Method

[0032] The embodiments of the present invention will be described below with reference to the drawings, but the present invention is not limited thereto. As mentioned above, a method for efficiently obtaining heteroepitaxial films (3C-SiC single crystal films) has been sought. Therefore, after conducting research, the inventors discovered the following facts and completed the present invention: using a reduced-pressure CVD apparatus, in addition to hydrogen baking (first step) to remove the natural oxide film on the surface of the single-crystal silicon substrate, a source gas (containing carbon and silicon) is supplied while the pressure / temperature is combined with predetermined conditions for easy SiC nucleation [pressure: 1333 Pa or less, temperature: 300°C or more and 950°C or less] (second step) and predetermined conditions for easy SiC single crystal growth and the formation of pores at the 3C-SiC / silicon interface [pressure: 1333 Pa or less, temperature: 800°C or more and less than 1200°C] (third step), a high-quality 3C-SiC single crystal film can be formed efficiently and well; if the 3C-SiC single crystal film is further separated and peeled off from the single-crystal silicon substrate using these pores (fourth step), a heteroepitaxial film can be obtained efficiently and well.

[0033] The following are specific examples of each step to illustrate the process. Figure 1 is a flowchart showing an example of the method for fabricating the heteroepitaxial film of the present invention. Here, the following steps are performed in sequence: a first step of hydrogen baking (hereinafter also referred to as H2 annealing); a second step of SiC nucleation; a third step of SiC single crystal growth (3C-SiC single crystal film formation); a step of adding the required components and a cutting step; and a fourth step of peeling off the heteroepitaxial film (3C-SiC single crystal film).

[0034] (First Embodiment) Figure 2 shows an example of the growth sequence from the first step to the third step of the first embodiment. The steps are described below. <First Step> First, a single-crystal silicon substrate is placed in a reduced-pressure CVD apparatus (hereinafter also referred to as an RP-CVD apparatus), and hydrogen gas is introduced to remove the native oxide film on the surface by H2 annealing. If an oxide film remains, SiC nucleation cannot be performed on the single-crystal silicon substrate. In this case, the H2 annealing is preferably set to, for example, a temperature of 1000°C or higher and 1200°C or lower. Setting the temperature to 1000°C or higher prevents the processing time for preventing native oxide film residue from becoming too long, thus being more efficient. Furthermore, setting it to 1200°C or lower effectively prevents slippage due to high temperature. However, in this case, the pressure and time of the H2 annealing are not particularly limited as long as the native oxide film is removed. In the example shown in Figure 2, H₂ annealing was performed at 1080°C for 1 minute. Furthermore, the introduction of hydrogen gas continued after this first step and in the second and third steps (as a carrier gas).

[0035] <Second Step> Next, after setting the single-crystal silicon substrate to a predetermined pressure and temperature, a source gas containing carbon and silicon is introduced as the SiC feed gas into the RP-CVD apparatus to form SiC nuclei. For example, monomethylsilane or trimethylsilane (TMS) can be introduced as the source gas. Compared to using multiple gases, this is simpler and easier to control, allowing for more reliable formation of the 3C-SiC single-crystal film. Furthermore, compared to Si, C atoms are smaller and easier to vaporize; therefore, considering feed efficiency, trimethylsilane is easier to set the conditions for. This introduction of the source gas is performed in this second step and the subsequent third step.

[0036] Furthermore, SiC nucleation can be performed on the surface of a single-crystal silicon substrate as long as the pressure is below 1333 Pa (10 Torr) and the temperature is above 300°C and below 950°C. In the SiC nucleation step, if the temperature is higher than 950°C, the reaction between the single-crystal silicon substrate and the raw material gas is more likely to occur, making SiC nucleation impossible on the surface of the single-crystal silicon substrate. Furthermore, when the temperature is below 300°C, the temperature is too low to efficiently perform SiC nucleation. Moreover, considering the third step described later, if the temperature is below 800°C in the third step, heteroepitaxial growth of SiC will not occur. Therefore, for example, the SiC nucleation temperature can be set from the time point of the second step to preferably be above 800°C and below 950°C, and more preferably above 850°C and below 900°C. By setting the temperature of the second step to between 800°C and 950°C, the temperature range required for both the SiC nucleation step (second step) and the subsequent third step of 3C-SiC single-crystal film formation can be repeated, particularly allowing these second and third steps to be performed under the same temperature conditions. Furthermore, by setting the pressure to below 1333 Pa (10 Torr), secondary or higher-order reactions, such as reactions between reactive species and the feed gas in the gas phase, can be prevented, thus improving efficiency. The lower limit of the pressure is not particularly limited and can be, for example, set to 13 Pa (0.1 Torr). Moreover, the pressure can be set to the same conditions in both the second and third steps, similar to the temperature. In the example shown in Figure 2, the second step and the subsequent third step are performed under the same conditions: the same pressure and the same holding temperature (900°C).

[0037] <Third Step> Furthermore, the third step, namely the 3C-SiC single crystal film formation step, is carried out under conditions of pressure below 1333 Pa (10 Torr) and temperature above 800°C but below 1200°C. Under these conditions, SiC single crystals can be grown efficiently to form a 3C-SiC single crystal film. Moreover, in this invention, since the pressure is set to below 1333 Pa (10 Torr) in this third step, polycrystalline formation of the formed 3C-SiC can be prevented, and as mentioned above, secondary or higher-order reactions in the gas phase can be suppressed, thus ensuring a reliable and efficient formation of the 3C-SiC single crystal film. At the same time, pores are formed directly below the 3C-SiC single crystal film, thereby achieving the effect of stress relaxation of the entire heteroepitaxial layer. Furthermore, it is preferable to set the pressure to below 133 Pa (1 Torr) to more reliably form the aforementioned pores and more reliably achieve the aforementioned stress relaxation effect. The lower limit of the pressure is not particularly limited and can be set, for example, to 13 Pa (0.1 Torr). Furthermore, regarding temperature, if it is below 800°C, the growth of the SiC single crystal will not proceed as previously mentioned; if it is above 1200°C, slip displacement may occur. Therefore, as described above, the temperature is set to above 800°C but below 1200°C. In the example shown in Figure 2, the second and third steps are under the same conditions as before, and the formation of the SiC nucleus and the formation of the 3C-SiC single crystal film proceed continuously.

[0038] At this time, since the film thickness depends on the pressure and temperature, the film deposition time can be appropriately set according to the pressure and temperature conditions set in order to achieve the desired film thickness. At this time, the film thickness of the 3C-SiC single crystal film can be deposited, for example, from a thin film of about 2 nm to a thick film of several μm.

[0039] Furthermore, the so-called layered growth in the two-dimensional growth mode shown in Figure 2 refers to epitaxial growth by layer.

[0040] If GaN is grown on a 3C-SiC single crystal film grown in the manner described above, a heteroepitaxy wafer with a high-quality GaN layer can be obtained. In this case, GaN growth is performed by MOCVD (metal-organic chemical vapor deposition) to grow GaN to about 3 μm, and the MOCVD uses an organometallic material such as trimethylgallium and trimethylammonium.

[0041] Furthermore, if Si is grown on a 3C-SiC single crystal film grown in the manner described above, a substrate with a high-quality Si epitaxial layer can be obtained. In this structure, when used for power devices such as IGBTs, this 3C-SiC single crystal film becomes the voltage holding layer on the IGBT. Silicon has an insulation breaking electric field strength of 0.3 MV / cm, while 3C-SiC has an insulation breaking electric field strength of 3 MV / cm, which is 10 times greater. In other words, equivalent performance can be obtained with 1 / 10 the thickness of the voltage holding layer of a previous silicon IGBT. Of course, in this case, it is not necessary to form the voltage holding layer solely with a 3C-SiC single crystal film; a combination of SiC and Si is sufficient. A Si epitaxial layer is grown on SiC grown to a predetermined thickness in the manner described above. Previous SiC devices used SiC to form the gate insulating film, which had reliability issues. However, this structure uses silicon growth and employs silicon to grow the gate insulating film, thus ensuring the same gate reliability as previous silicon IGBTs. Furthermore, the thickness of the silicon layer can be arbitrarily set, as long as it is thicker than the required gate structure.

[0042] <Fourth Step> Next, as the fourth step, a heteroepitaxial film is fabricated by separating and peeling off the formed 3C-SiC single crystal film from the single crystal silicon substrate through a hole. Figure 3 shows an example of the state when a heteroepitaxial film is fabricated by peeling off the 3C-SiC single crystal film from the single crystal silicon substrate. As shown in the upper part of Figure 3, a heteroepitaxial film 3 has been formed on the single crystal silicon substrate 1 by the steps so far. Furthermore, the heteroepitaxial film 3 includes at least a 3C-SiC single crystal film, and examples include: the case where only a 3C-SiC single crystal film is present, the case where a 3C-SiC film and a GaN film are sequentially present from the single crystal silicon substrate side, and the case where a 3C-SiC film and a Si film are sequentially present from the single crystal silicon substrate side. Furthermore, a void region 2 (a region where a void of the 3C-SiC / silicon interface is formed, also called a void forming part) is formed between the monocrystalline silicon substrate 1 and the heteroepitaxial film 3 (more specifically, between the monocrystalline silicon substrate 1 and the 3C-SiC film in the heteroepitaxial film 3).

[0043] Then, as shown in the middle section of Figure 3, a protective film 4 is formed on the 3C-SiC single crystal film (that is, on the surface of the heteroepitaxial film 3). The material of this protective film 4 can be, for example, a resin such as polyimide, or an oxide film deposited by CVD. Then, as shown in the lower section of Figure 3, as a fourth step, the heteroepitaxial film 3 having the 3C-SiC single crystal film is separated and peeled off from the single crystal silicon substrate 1, with the void region 2 as the boundary.

[0044] Furthermore, Figure 4 shows another example of the state of fabricating a heteroepitaxial film. In the example of Figure 4, an element is formed on a 3C-SiC single crystal film (on the surface of the heteroepitaxial film 3) (<Element Step> in Figure 1: Heteroepitaxial film 3' after element formation), and after cutting it, for example, using a cutting device 5 (<Cutting Step> in Figure 1), as a fourth step, the heteroepitaxial film 3' is separated and peeled off using the void region 2. At this time, the heteroepitaxial film 3' obtained by peeling will become a wafer (wafer 6). The above peeling can be easily removed from the single crystal silicon substrate 1 using, for example, a clipper or a pick-up device. Then, it can be attached to other wafers or substrates of other materials to fabricate an element. Furthermore, scribing can also be performed instead of cutting.

[0045] Furthermore, as another example, the fourth step can be performed after forming a protective film on the 3C-SiC single crystal film to form the device. Alternatively, the fourth step can be performed after forming the device on the 3C-SiC single crystal film, cutting the device along the scribing lines, forming a protective film, and then performing the fourth step. Furthermore, the fourth step can also be performed after attaching the device to a holding platform (e.g., various substrates) with or without a protective film, using an adhesive.

[0046] If the method for fabricating the heteroepitaxial film of the present invention is as described, the heteroepitaxial film can be formed efficiently by forming voids, and by separating / peeling in the void region, the damage to the previously formed element is minimal, thus enabling efficient and convenient fabrication of the heteroepitaxial film. Furthermore, since separation is possible at the interface between the 3C-SiC single crystal film and the single crystal silicon substrate, the loss of the single crystal silicon substrate obtained after peeling is greatly reduced, and it can be reused in subsequent fabrication of the heteroepitaxial film.

[0047] (Second Embodiment) Figure 5 shows an example of the growth sequence from the first step to the third step in the second embodiment. <First Step> First, a single-crystal silicon substrate is placed in an RP-CVD apparatus, and the natural oxide film on the surface is removed by H2 annealing. This can be performed in the same manner as in the first embodiment.

[0048] <Second Step> Then, as a nucleation step for SiC, the single-crystal silicon substrate is set to a temperature of 300°C or higher and 950°C or lower, preferably 800°C or higher and 950°C or lower, and more preferably 850°C or higher and 900°C or lower, and monomethylsilane or trimethylsilane is introduced as a raw material gas for SiC. The nucleation time can be set to, for example, 5 minutes.

[0049] <Third Step> Then, as a step in forming the 3C-SiC single crystal film, the temperature of the single crystal silicon substrate is heated to a temperature of 1000°C or higher but not reaching 1200°C, and monomethylsilane or trimethylsilane is introduced as a raw material gas for SiC.

[0050] In the third step of forming the 3C-SiC single crystal film, one or more of the pressure and temperature are increased compared to the second step of the SiC nucleation step, making high-speed growth easier (variation between steps). Furthermore, increasing one or more of the pressure and temperature in the third step also facilitates high-speed growth (variation within steps). It is also possible to perform only one of the aforementioned variations between steps and variations within steps, or both. Then, the temperature in the third step can be set to 1000°C or higher but not exceeding 1200°C. At this time, the heteroepitaxial growth can be made the bottleneck of the gas supply speed. It is not limited by the surface orientation of the single crystal silicon substrate, and it is also easy to accommodate objects with a diameter such as 300 mm.

[0051] Figure 5 shows an example where only the steps are changed from one another. The second step is performed at 900°C, and the third step is performed at 1190°C (the pressure is, for example, the same in the second and third steps). However, it is not limited to this. For example, the second step can be performed at 900°C, and the introduction of trimethylsilane can be temporarily stopped. Then, as the third step, the introduction of trimethylsilane can be restarted and maintained at 900°C, or at a higher temperature than 900°C and a lower temperature than 1190°C, for a predetermined time before the temperature is raised to 1190°C and maintained.

[0052] Furthermore, Figure 5 shows growth at a higher temperature (1190°C) than the first embodiment (900°C). However, we believe that heteroepitaxial growth can also be performed under such conditions to achieve the following effects: the effect of H2 flowing in when the temperature is increased; or the effect of changing the growth mode by changing the temperature during the growth process (i.e., when transitioning from the second step to the third step). As shown in Figure 5, the sequence in Figure 5 also shows two-dimensional growth from nucleus formation.

[0053] In particular, during the initial stage of the SiC nucleation step and the 3C-SiC single crystal film formation step, after forming a void directly below the 3C-SiC single crystal film by setting the pressure to 1333 Pa (10 Torr) or less, preferably 133 Pa (1 Torr) or less, within the range of 1333 Pa (10 Torr), the pressure is changed to a higher condition than in the initial stage, thereby enabling both stress relaxation of the heteroepitaxy layer as a whole and efficient formation of the 3C-SiC single crystal film.

[0054] Then, if GaN or Si is grown on the 3C-SiC single crystal film grown in the manner described above, a substrate with a high-quality GaN epitaxial layer or Si epitaxial layer can be obtained.

[0055] <Fourth Step> A heteroepitaxial film is fabricated by separating and peeling off the formed 3C-SiC single crystal film from a single crystal silicon substrate through a hole. This can be performed in the same manner as in the first embodiment.

[0056] (Third Embodiment) Figure 6 shows an example of the growth sequence of the third embodiment. <First Step> First, a single-crystal silicon substrate is placed in an RP-CVD apparatus and subjected to H2 annealing under the same conditions as in the first embodiment to remove the natural oxide film on the surface.

[0057] <Second Step, Third Step> Then, in order to continuously perform SiC nucleation on the surface of the single-crystal silicon substrate, and subsequently the formation of a 3C-SiC single-crystal film, monomethylsilane or trimethylsilane is introduced as a raw material gas, and the temperature is gradually increased from a range of 300°C to 950°C to a range of 1000°C to 1200°C. As described above, the second and third steps can be performed continuously during the gradual heating process. The heating rate is preferably set to, for example, 0.5°C / sec or more and 2°C / sec or less. If the heating rate is at this level, it is not an excessively rapid heating rate, so it can effectively prevent the set temperature from deviating from the actual temperature, and temperature control can be performed. In addition, since the heating rate is not excessively slow, it can suppress the occurrence of uneven nucleation or defects in heteroepitaxial growth due to the long passage time of the SiC nucleation temperature band.

[0058] At this point, growth can be stopped after heating to a predetermined temperature that has been pre-set to be above 1000°C but below 1200°C, or growth can continue at this temperature until a predetermined film thickness is achieved. Alternatively, if the predetermined film thickness is reached during the heating process even though the temperature is above 1000°C but not yet the predetermined temperature is reached, growth can be stopped there. By changing the temperature while growing, and continuously changing the growth mode (from nucleation to two-dimensional growth), the film formation rate can be gradually increased to a higher speed. In Figure 6, the temperature is increased from 300°C to 1130°C at a heating rate of 1°C / sec, and then maintained at 1130°C for a predetermined time.

[0059] In particular, during the initial stage of the SiC nucleation step and the 3C-SiC single crystal film formation step, after forming a void directly below the 3C-SiC single crystal film by setting the pressure to 1333 Pa (10 Torr) or less, preferably 133 Pa (1 Torr) or less, within the range of 1333 Pa (10 Torr), the pressure is changed to a higher condition than in the initial stage, thereby enabling both stress relaxation of the heteroepitaxy layer as a whole and efficient formation of the 3C-SiC single crystal film.

[0060] Then, if GaN or Si is grown on the 3C-SiC single crystal film grown in the manner described above, a substrate with a high-quality GaN epitaxial layer or Si epitaxial layer can be obtained.

[0061] <Fourth Step> A heteroepitaxial film is fabricated by separating and peeling off the formed 3C-SiC single-crystal film from a single-crystal silicon substrate through holes. This can be performed in the same manner as in the first embodiment. [Example]

[0062] The present invention will be described in more detail below with examples and comparative examples, but the present invention is not limited thereto. (Example 1) A high resistivity single crystal silicon substrate with a diameter of 300 mm, face orientation (111), and boron doped was prepared. The wafer was placed on a sensor in the reactor of an RP-CVD apparatus and annealed with H2 at 1080°C for 1 minute (first step). Then, trimethylsilane gas was introduced at a growth temperature of 900°C and a growth pressure of 133 Pa (1 Torr) to perform the SiC nucleation step (second step) and the growth of the 3C-SiC single crystal film (third step). After 5 minutes of growth, the resulting film thickness was 13 nm.

[0063] Then, after confirming the XRD (X-ray diffraction) spectrum with an in-plane configuration, the results, as shown in the graph of the XRD analysis results in Figure 7, confirmed the peak of 3C-SiC (220) parallel to Si (220), and confirmed that a single-crystal 3C-SiC film had been grown. Furthermore, its cross-sectional TEM image is shown in Figure 8. As a result, it was confirmed that a void (void formation portion 2) was formed directly below the 3C-SiC single-crystal film (heteroepitutive film 3). Furthermore, symbol 10 indicates a surface protective film used for cross-sectional TEM imaging.

[0064] Then, an adhesive is applied to the surface of the protective film on the 3C-SiC single crystal film and adhered to the quartz substrate. Then, the substrate is peeled off while still clamped, resulting in the separation / peeling of the 3C-SiC single crystal film (heteroepitudinal epitaxial film) from the void formation portion of the 3C-SiC / silicon interface (fourth step). Alternatively, as another peeling method, the substrate on which the 3C-SiC single crystal film has been grown can be cut into 1 mm × 1 mm pieces from the 3C-SiC single crystal film side (the cutting depth is slightly deeper than the thickness of the 3C-SiC single crystal film), and a cutter can be used to adhere the surface and peel the 3C-SiC single crystal film from the void formation portion to obtain a wafer.

[0065] (Example 2) A high resistivity single-crystal silicon substrate with a diameter of 300 mm, an orientation of (111), and boron doping was prepared. The wafer was placed on a sensor in the reactor of an RP-CVD apparatus and subjected to H₂ annealing at 1080°C for 1 minute (first step). Then, as the second step (SiC nucleation step), trimethylsilane gas was introduced at a growth temperature of 900°C for 5 minutes. Then, as the third step (3C-SiC single-crystal film formation step), the growth temperature was raised to 1190°C to introduce trimethylsilane gas, and the 3C-SiC single-crystal film was grown. At this time, the growth pressure was always set to 133 Pa (1 Torr). After 1 minute of growth, the resulting film thickness was approximately 30 nm.

[0066] After film formation, XRD spectra were confirmed using an in-plane configuration. Similar to Example 1, a peak of 3C-SiC (220) parallel to Si (220) was observed, confirming the growth of a single-crystal 3C-SiC film. Furthermore, a cross-sectional TEM image is shown in Figure 9. As a result, pores were confirmed to be formed directly beneath the 3C-SiC single-crystal film.

[0067] Then, after performing the fourth step using an adhesive and a quartz substrate in the same manner as in Example 1, it was found that the 3C-SiC single crystal film could be peeled off from the void formation portion of the 3C-SiC / silicon interface. Furthermore, regarding another peeling method, after performing it in the same manner as in Example 1, it was found that the 3C-SiC single crystal film could be peeled off from the void formation portion to obtain a wafer.

[0068] (Example 3) Except that the growth pressure in the second and third steps was set to 1333 Pa (10 Torr) and the growth temperature was set to 950°C, the 3C-SiC single crystal film was formed under the same conditions as in Example 1. As a result, the film thickness was about 20 nm. Then, after confirming the XRD spectrum with in-plane configuration, the peak of 3C-SiC (220) parallel to Si (220) was confirmed, and the growth of the single crystal 3C-SiC film was confirmed. In addition, it was confirmed that a void was formed directly below the 3C-SiC single crystal film. Furthermore, after performing the fourth step using an adhesive and a quartz substrate in the same manner as in Example 1, the 3C-SiC single crystal film could be peeled off from the void formation portion of the 3C-SiC / silicon interface.

[0069] (Example 4) Except that the growth temperatures of the second and third steps were set to 300°C and 800°C respectively, the 3C-SiC single crystal film was formed under the same conditions as in Example 2. As a result, the film thickness was about 12 nm. Then, after confirming the XRD spectrum with in-plane configuration, the peak of 3C-SiC (220) parallel to Si (220) was confirmed, and the growth of the single crystal 3C-SiC film was confirmed. In addition, it was confirmed that a void was formed directly below the 3C-SiC single crystal film. Furthermore, after performing the fourth step using an adhesive and a quartz substrate in the same manner as in Example 2, the 3C-SiC single crystal film could be peeled off from the void formation portion of the 3C-SiC / silicon interface.

[0070] (Comparative Example 1) Except that the growth pressure in the second and third steps was set to 3999 Pa (30 Torr), the 3C-SiC single crystal film was formed under the same conditions as in Example 2. As a result, the film thickness was about 33 nm. Then, after confirming the XRD spectrum with in-plane configuration, the peak of 3C-SiC (220) parallel to Si (220) was confirmed, and the growth of the single crystal 3C-SiC film was confirmed. However, the formation of voids could not be confirmed directly below the 3C-SiC single crystal film. Furthermore, although an attempt was made to peel off the 3C-SiC single crystal film using an adhesive and a quartz substrate in the same manner as in Example 2, it could not be peeled off. We believe the reason is that the aforementioned voids could not be formed.

[0071] (Comparative Example 2) Except for setting the growth temperature of the second step to 200°C or 1000°C, the 3C-SiC single crystal film was formed under the same conditions as in Example 2. As a result, the film thicknesses were approximately 2 nm and 4 nm, respectively. The film thickness formed in the above manner was much thinner than that in Example 2, and the efficiency was significantly worse. We believe the reason is that because the temperature of the second step was too low or too high, SiC nucleation could not be sufficiently carried out, and therefore almost no heteroepitaxy growth was performed in the third step.

[0072] (Comparative Example 3) Except for setting the growth temperature of the third step to 700°C or 1250°C, the 3C-SiC single crystal film was formed under the same conditions as in Example 2. As a result, the film thicknesses were approximately 7 nm and 50 nm, respectively. As mentioned above, when the temperature was 700°C, the film thickness formed was much thinner than that in Example 2, and the efficiency was significantly worse. Furthermore, when the temperature was 1250°C, slip displacement occurred.

[0073] Furthermore, the present invention is not limited to the above-described embodiments. The above-described embodiments are merely illustrative, and any embodiment that has a substantially identical structure to the technical concept described in the claims of the present invention and produces the same effect is included within the technical scope of the present invention. [Simplified Explanation of the Diagram]

[0031] Figure 1 is a flowchart showing an example of a method for fabricating a heteroepitaxial film according to the present invention. Figure 2 is a diagram showing an example of a growth sequence from the first step to the third step in the first embodiment. Figure 3 is a flowchart showing an example of a state when a heteroepitaxial film is fabricated by peeling a 3C-SiC single crystal film from a single crystal silicon substrate. Figure 4 is a flowchart showing another example of a state when a heteroepitaxial film is fabricated by peeling a 3C-SiC single crystal film from a single crystal silicon substrate. Figure 5 is a diagram showing an example of a growth sequence from the first step to the third step in the second embodiment. Figure 6 is a diagram showing an example of a growth sequence from the first step to the third step in the third embodiment. Figure 7 is a diagram showing the results of in-plane XRD analysis of SiC on Si (111) grown in Example 1 (first embodiment). Figure 8 is a measurement diagram showing a cross-sectional TEM (transmission electron microscope) image of SiC on Si in Example 1 (first embodiment). Figure 9 is a measurement diagram showing a cross-sectional TEM image of SiC on Si in Example 2 (Second Embodiment). [Biomaterial Storage]

[0075] Domestic storage information (please note in order of storage institution, date, and number): None. International storage information (please note in order of storage country, institution, date, and number): None.

Claims

1. A method for fabricating a heteroepitaxial film, characterized in that: it includes the step of heteroepitaxially growing a 3C-SiC single crystal film on a single crystal silicon substrate and then peeling the 3C-SiC single crystal film off the single crystal silicon substrate, and further includes: The first step involves using a reduced-pressure CVD apparatus to remove the natural oxide film on the surface of the aforementioned single-crystal silicon substrate by hydrogen annealing. The second step involves supplying a source gas containing carbon and silicon into the aforementioned reduced-pressure CVD apparatus while simultaneously forming SiC nuclei on the aforementioned single-crystal silicon substrate under conditions of pressure below 1333 Pa and temperature above 300°C and below 950°C. The third step involves growing SiC single crystals to form a 3C-SiC single-crystal film under conditions of pressure below 1333 Pa and temperature above 800°C and below 1200°C, and forming a void directly beneath the 3C-SiC single-crystal film. The fourth step involves separating and peeling the aforementioned 3C-SiC single-crystal film from the aforementioned single-crystal silicon substrate through the aforementioned voids to produce the aforementioned heteroepitaxial film.

2. The method for fabricating a heteroepitaxial film as described in claim 1, wherein monomethylsilane or trimethylsilane is used as the aforementioned source gas.

3. The method for fabricating a heteroepitaxial film as described in claim 1, wherein, The aforementioned first step is carried out under conditions where the temperature is above 1000℃ and below 1200℃.

4. The method for fabricating a heteroepitaxial film as described in claim 2, wherein, The aforementioned first step is carried out under conditions where the temperature is above 1000℃ and below 1200℃.

5. The method for fabricating a heteroepitaxial film as described in claim 1, wherein, The aforementioned third step is carried out under pressure conditions below 133 Pa.

6. The method for fabricating a heteroepitaxial film as described in claim 2, wherein, The aforementioned third step is carried out under pressure conditions below 133 Pa.

7. The method for fabricating a heteroepitaxial film as described in claim 3, wherein, The aforementioned third step is carried out under pressure conditions below 133 Pa.

8. The method for fabricating a heteroepitaxial film as described in claim 4, wherein, The aforementioned third step is carried out under pressure conditions below 133 Pa.

9. A method for fabricating a heteroepitaxial film as described in any one of claims 1 to 8, wherein, The aforementioned third step involves increasing one or more of the pressure and temperature conditions compared to the aforementioned second step.

10. The method for fabricating a heteroepitaxial film as described in claim 9, wherein, The aforementioned third step is carried out under conditions where the temperature is above 1000℃ but below 1200℃.

11. The method for manufacturing a heteroepitaxial film according to any one of claims 1 to 8, wherein in the aforementioned third step, one or more of the pressure and temperature are increased within a range of pressure below 1333 Pa and temperature above 800°C but not exceeding 1200°C.

12. The method for fabricating a heteroepitaxial film as described in claim 11, wherein the aforementioned second step and the aforementioned third step are performed by gradually increasing the temperature from a range of 300°C to 950°C to a range of 1000°C to 1200°C to continuously form the aforementioned SiC nucleus and then form the aforementioned 3C-SiC single crystal film following the SiC nucleus formation.

13. The method for fabricating a heteroepitaxial film as described in claim 12, wherein, The aforementioned heating was carried out at a heating rate of 0.5℃ / sec or higher and 2℃ / sec or lower.

14. The method for fabricating a heteroepitaxial film as described in any one of claims 1 to 8, wherein, after the aforementioned third step and before the aforementioned fourth step, GaN is further grown on the surface of the aforementioned 3C-SiC single crystal film to form a GaN layer.

15. The method for fabricating a heteroepitaxial film as described in any one of claims 1 to 8, wherein, after the aforementioned third step and before the aforementioned fourth step, Si is further grown on the surface of the aforementioned 3C-SiC single crystal film to form a Si layer.

16. The method for fabricating a heteroepitaxial film as described in any one of claims 1 to 8, wherein after the aforementioned third step, a protective film is formed on the aforementioned 3C-SiC single crystal film before the aforementioned fourth step is performed.

17. The method for fabricating a heteroepitaxial film as described in any one of claims 1 to 8, wherein after the aforementioned third step, an element is formed on the aforementioned 3C-SiC single crystal film and a protective film is formed before performing the aforementioned fourth step.

18. The method for fabricating a heteroepitaxial film as claimed in any one of claims 1 to 8, wherein after the aforementioned third step, an element is formed on the aforementioned 3C-SiC single crystal film, and after cutting the element along the scribing lines of the element to form a protective film, the aforementioned fourth step is performed.

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