Electrical apparatus

Abstract

An electronic device includes a timing controller, a data driving circuit, and a display panel. The timing controller receives at least one data polarity configuration signal. The timing controller generates and outputs a plurality of polarity conversion signals based on the data polarity configuration signal. The polarity conversion signals have different phases. The data driving circuit is coupled to the timing controller. The data driving circuit receives the plurality of polarity conversion signals. The display panel is coupled to the data driving circuit. The display panel displays an image. The data driving circuit drives the display panel to display the image based on the polarity conversion signals.

Description

Technical Field

[0001] This invention relates to an electronic device, and more particularly to a display device. Prior Technology

[0002] In existing technologies, when an electronic device has a display panel for use as a display device, considering the power of the data driving circuit and the charging capability of the display panel, the data driving circuit mostly uses column inversion to drive the display panel. However, in cases where the transistors within the display panel may experience aging and / or leakage, data inversion can mitigate the DC stress on the transistors. Furthermore, the data inversion driving method allows for greater flexibility in the structural layout of the array substrate containing the transistors, thereby optimizing the optical and / or electrical characteristics of the display panel.

[0003] During normal charging time, display panel drivers typically use two-line inversion to change the polarity of the data supplied to the display panel. However, this two-line inversion method causes horizontal dark lines to appear at the points where the polarity of the data supplied to the display panel is reversed, which are easily noticeable to the human eye and reduce visual appeal. With more line polarity inversions (e.g., four lines or more), the visual appeal is further reduced due to the excessively wide spatial period of the displayed image. Summary of the Invention

[0004] This disclosure provides an electronic device with a gate drive unit that can reduce costs and improve yield.

[0005] This disclosure provides an electronic device that can improve the striped appearance of displayed images caused by line inversion by modulating a polarity conversion signal, thereby enhancing visual quality.

[0006] The disclosed electronic device includes a timing controller, a data driving circuit, and a display panel. The timing controller receives at least one data polarity configuration signal. Based on the data polarity configuration signal, the timing controller generates and outputs multiple polarity conversion signals. The multiple polarity conversion signals have different phases. The data driving circuit is coupled to the timing controller. The data driving circuit receives the polarity conversion signals. The display panel is coupled to the data driving circuit. The display panel displays an image. The data driving circuit drives the display panel to display the image based on the polarity conversion signals.

[0007] In the embodiments disclosed herein, the data polarity configuration signal includes a first data polarity configuration signal. The polarity conversion signal includes a first polarity conversion signal and a second polarity conversion signal. The first data polarity configuration signal serves as the first polarity conversion signal, and the second polarity conversion signal is generated based on the first polarity conversion signal.

[0008] In the embodiments disclosed herein, the timing controller reverses the phase of the first polarity conversion signal to generate the second polarity conversion signal.

[0009] In the embodiments disclosed herein, the data polarity configuration signal further includes a second data polarity configuration signal. The polarity conversion signal includes a third polarity conversion signal and a fourth polarity conversion signal. The second data polarity configuration signal serves as the third polarity conversion signal, and the fourth polarity conversion signal is generated based on the third polarity conversion signal.

[0010] In the embodiments disclosed herein, the timing controller performs a phase reversal on the third polarity conversion signal to generate a fourth polarity conversion signal.

[0011] In the embodiments disclosed herein, the data polarity configuration signal includes a first data polarity configuration signal and a second data polarity configuration signal. The first data polarity configuration signal and the second data polarity configuration signal have different phases.

[0012] In the embodiments disclosed herein, the timing controller receives a first data polarity configuration signal from the previous stage circuit and generates a second data polarity configuration signal based on the first data polarity configuration signal.

[0013] In the embodiments disclosed herein, the timing controller receives a first data polarity configuration signal and a second data polarity configuration signal from the previous stage circuit.

[0014] In the embodiments disclosed herein, the display panel includes a plurality of sub-pixels. A polarity conversion signal drives the display panel such that any sub-pixel located in any column has a different polarity than at least one of the sub-pixels on either side of it.

[0015] In the embodiments disclosed herein, the timing controller drives the display panel to display images via area domain low color shift.

[0016] To make the above-mentioned features and advantages disclosed herein more apparent and understandable, specific embodiments are described below in conjunction with the accompanying drawings for detailed explanation. Simple Explanation of the Diagram

[0017] Figure 1A illustrates a block diagram of an electronic device according to an embodiment of the present disclosure. Figure 1B shows a block diagram of the timing controller in Figure 1A. Figure 2A illustrates a waveform diagram of a data polarity configuration signal according to an embodiment of the present disclosure. Figure 2B illustrates a waveform diagram of a polarity reversal signal according to an embodiment of the present disclosure. Figure 3A illustrates the polarity distribution of subpixels on a display panel according to an embodiment of this invention. Figure 3B illustrates a schematic diagram of an image displayed on a display panel according to an embodiment of the present invention. Figure 4A illustrates the polarity distribution of subpixels on a display panel according to another embodiment. Figure 4B is a schematic diagram illustrating an image displayed on a display panel according to another embodiment of the present invention. Figure 5 illustrates the polarity distribution of subpixels on a display panel according to another embodiment of this invention. Implementation

[0018] This disclosure can be understood by referring to the following detailed description and the accompanying drawings. It should be noted that, for ease of understanding and for the sake of simplicity, many of the drawings in this disclosure depict only a portion of the electronic device, and certain components in the drawings are not drawn to scale. Furthermore, the number and dimensions of the components in the drawings are for illustrative purposes only and are not intended to limit the scope of this disclosure.

[0019] In the following description and scope of the patent application, the words "containing" and "including" are open-ended terms, and therefore should be interpreted as "containing but not limited to...".

[0020] It should be understood that although the terms first, second, third, etc., can be used to describe multiple components, the components are not limited to these terms. These terms are used only to distinguish a single component from other components in the specification. The same terms may not be used in the claims, but rather replaced by first, second, third, etc., according to the order in which the components are declared in the claims. Therefore, in the following description, a first component may be a second component in the claims.

[0021] In some embodiments disclosed herein, terms such as "connection" and "interconnection," unless specifically defined, may refer to two structures in direct contact, or to two structures not in direct contact, with other structures disposed between them. Furthermore, these terms may include situations where both structures are movable or both structures are fixed. Additionally, the term "coupled" includes any direct and indirect electrical connection means. In the case of a direct electrical connection, the endpoints of components on two circuits are directly connected or interconnected by a conductor segment. In the case of an indirect electrical connection, the endpoints of components on two circuits are connected by a switch, diode, capacitor, inductor, resistor, other suitable components, or combinations thereof, but are not limited thereto.

[0022] The electronic devices disclosed herein may include, but are not limited to, display devices, antenna devices, sensing devices, light-emitting devices, or splicing devices. Electronic devices may include bendable or flexible electronic devices. Electronic devices may include electronic components. Electronic devices may include, for example, liquid crystal layers or light-emitting diodes (LEDs). Electronic components may include passive and active components, such as capacitors, resistors, inductors, variable capacitors, filters, diodes, transistors, sensors, microelectromechanical systems (MEMS) components, liquid crystal chips, controllers, etc., but are not limited to these. Diodes may include light-emitting diodes or photodiodes. Light-emitting diodes may include, for example, organic light-emitting diodes (OLEDs), mini LEDs, micro LEDs, quantum dot LEDs, fluorescent, phosphorescent, or other suitable materials, or combinations thereof, but are not limited to these. Sensors may include, for example, capacitive sensors, optical sensors, electromagnetic sensors, fingerprint sensors (FPS), touch sensors, antennas, or pen sensors, but are not limited to these. Controllers may include, for example, timing controllers, but are not limited to these. The following description uses a display device as an example of an electronic device to illustrate the contents of this disclosure, but this disclosure is not limited thereto.

[0023] Reference will now be made in detail to the exemplary embodiments disclosed herein, examples of which are illustrated in the drawings. Wherever possible, the same element symbols are used in the drawings and description to denote the same or similar parts.

[0024] Figure 1A illustrates a block diagram of an electronic device according to an embodiment of the present disclosure. Figure 1B illustrates a block diagram of the timing controller of Figure 1A. Referring to Figures 1A and 1B, the electronic device 100 includes a timing controller 110, a data driving circuit 120, and a display panel 130.

[0025] In Figure 1A, timing controller 110 receives at least one data polarity configuration signal POL_1 (first data polarity configuration signal). Timing controller 110 generates and outputs multiple polarity conversion signals based on the data polarity configuration signal POL_1, such as polarity conversion signals POL_a, POL_b, POL_c, and POL_d. In this embodiment, the phases of polarity conversion signals POL_a, POL_b, POL_c, and POL_d are different. Data driving circuit 120 is coupled to timing controller 110. Data driving circuit 120 receives polarity conversion signals POL_a, POL_b, POL_c, and POL_d. Display panel 130 is coupled to data driving circuit 120. The data driving circuit 120 drives the display panel 130 according to the polarity conversion signals POL_a, POL_b, POL_c, and POL_d, so that the display panel 130 displays an image. In this embodiment, the number of data polarity configuration signals POL_1 and polarity conversion signals POL_a, POL_b, POL_c, and POL_d are only for illustrative purposes and are not intended to limit this disclosure.

[0026] In Figure 1B, the timing controller 110 includes a signal modulation circuit 112 and a data processing circuit 114. The signal modulation circuit 112 generates and outputs polarity conversion signals POL_a, POL_b, POL_c, and POL_d to the data drive circuit 120 based on the data polarity configuration signal POL_1. The data processing circuit 114 receives the video signal VDO and processes the grayscale data in the video signal VDO to drive the display panel 130 to display an image using an area domain low color shift (ADS) method. Therefore, in one embodiment, the timing controller 110 can drive the display panel 130 to display an image using an ADS method.

[0027] Specifically, the data processing circuit 114 adjusts the video signal VDO to generate a display video signal VDO'. For example, the data processing circuit 114 refers to an internal lookup table (LUT) to adjust the grayscale data of the video signal VDO to improve image quality. The lookup table may contain data adjustment information providing gamma correction, spatial pixel low color shift, and / or overdriving to generate the display video signal VDO'.

[0028] Figure 2A illustrates a waveform diagram of a data polarity configuration signal according to an embodiment of the present disclosure. Figure 2B illustrates a waveform diagram of a polarity conversion signal according to an embodiment of the present disclosure. Referring to Figures 2A and 2B, in this embodiment, the data polarity configuration signal includes a first data polarity configuration signal POL_1 and a second data polarity configuration signal POL_2, and as shown in Figure 2A, the first data polarity configuration signal POL_1 and the second data polarity configuration signal POL_2 have different phases.

[0029] In this embodiment, the timing controller 110 receives a first data polarity configuration signal POL_1 from a previous-level circuit, and generates a second data polarity configuration signal POL_2 based on the first data polarity configuration signal POL_1. For example, the timing controller 110 may receive the first data polarity configuration signal POL_1 from a system on a chip (SoC) configured at its previous level, and modulate the first data polarity configuration signal POL_1 through a signal modulation circuit 112 to generate a second data polarity configuration signal POL_2 with a different phase. In one embodiment, the timing controller 110 may also directly receive the first data polarity configuration signal POL_1 and the second data polarity configuration signal POL_2 from the previous-level circuit.

[0030] In this embodiment, the polarity conversion signals include a first polarity conversion signal POL_a, a second polarity conversion signal POL_b, a third polarity conversion signal POL_c, and a fourth polarity conversion signal POL_d. As shown in FIG2B, the first polarity conversion signal POL_a, the second polarity conversion signal POL_b, the third polarity conversion signal POL_c, and the fourth polarity conversion signal POL_d have different phases.

[0031] Specifically, the first data polarity configuration signal POL_1 can be used as the first polarity conversion signal POL_a, and the second polarity conversion signal POL_b can be generated based on the first polarity conversion signal POL_a. The timing controller 110 generates the second polarity conversion signal POL_b by inverting the phase of the first polarity conversion signal POL_a through the signal modulation circuit 112. The second data polarity configuration signal POL_2 can be used as the third polarity conversion signal POL_c, and the fourth polarity conversion signal POL_d can be generated based on the third polarity conversion signal POL_c. The timing controller 110 generates the fourth polarity conversion signal POL_d by inverting the phase of the third polarity conversion signal POL_c through the signal modulation circuit 112.

[0032] Therefore, the timing controller 110 generates and outputs polarity conversion signals POL_a, POL_b, POL_c, and POL_d with different phases to the data driving circuit 120 based on the data polarity configuration signals POL_1 and POL_2. Then, the data driving circuit 120 drives the display panel 130 based on the polarity conversion signals POL_a, POL_b, POL_c, and POL_d, so that the sub-pixels on the display panel 130 have a line-inversion polarity distribution.

[0033] Figure 3A illustrates the polarity distribution of subpixels on a display panel according to an embodiment of the present disclosure. Figure 3B illustrates a schematic diagram of an image displayed on a display panel according to an embodiment of the present disclosure. Referring to Figures 3A and 3B, corresponding to the polarity distribution of subpixels on the display panel 130 of Figure 3A, the display panel 130 displays, for example, the image 300A shown in Figure 3B. In this embodiment, the display panel 130 includes a plurality of subpixels 132. Polarity conversion signals POL_a, POL_b, POL_c, and POL_d drive the display panel 130 to make the polarities of some subpixels located in the same row or column different. For example, to make the polarity of any subpixel located in any column different from at least one of the subpixels on either side of it. In Figure 3A, the subpixels on the display panel 130 exhibit a four-line inversion polarity distribution, but are not limited to this.

[0034] The data driving circuit 120 drives the corresponding pixel rows CL1, CL2, CL3, and CL4 of the display panel 130 according to the polarity conversion signals POL_a, POL_b, POL_c, and POL_d. For example, the data driving circuit 120 drives pixel row CL1 according to the polarity conversion signal POL_a, pixel row CL2 according to the polarity conversion signal POL_b, pixel row CL3 according to the polarity conversion signal POL_c, and pixel row CL4 according to the polarity conversion signal POL_d. The polarity conversion signal driving the other pixel rows can be determined similarly. Pixel rows CL1, CL2, and CL3 can display different colors; for example, pixel row CL1 can display red, pixel row CL2 can display green, and pixel row CL3 can display blue, but this is not a limitation. Pixel rows CL1 and CL4 can display the same color, but are not limited to this.

[0035] Therefore, the data driving circuit 120 drives the corresponding pixel rows CL1, CL2, CL3, and CL4 of the display panel 130 according to the polarity conversion signals POL_a, POL_b, POL_c, and POL_d, so that the sub-pixels 132 on the display panel 130 present the polarity distribution shown in Figure 3A. In Figure 3A, some sub-pixels located in the same column or row have different polarities. For example, some sub-pixels in pixel row CL1 have different polarities, and some sub-pixels in pixel column RW2 also have different polarities.

[0036] In Figure 3A, each pixel row adjusts the polarity of its subpixels according to its corresponding polarity conversion signal. Taking pixel row CL1 as an example, the polarity conversion signal POL_a causes the first four subpixels in pixel row CL1, from top to bottom, to have the same polarity (e.g., positive polarity), and the last four subpixels also have the same polarity, but opposite to the polarity of the first four subpixels (e.g., negative polarity). On the other hand, in Figure 3A, each pixel column also adjusts the polarity of its subpixels according to the polarity conversion signal. Taking pixel column RW2 as an example, the polarity conversion signals POL_a, POL_b, POL_c, and POL_d cause the polarities of the subpixels in pixel column RW2, from left to right, to be positive, negative, negative, positive, positive, and negative, as indicated in Figure 3A, so that the polarity of any subpixel in pixel column RW2 is different from that of at least one of its adjacent subpixels.

[0037] Therefore, in this embodiment, the timing controller 110 outputs N polarity conversion signals according to M data polarity configuration signals, so that the data driving circuit 120 drives the display panel 130 according to the N polarity conversion signals, where M and N are positive integers greater than or equal to 2. Thus, N-line inversion can be achieved on the display panel 130, and the sub-pixels at the points where data polarity inversion occurs in each pixel row do not fall entirely on the same pixel column. This reduces the sense of continuity of dark lines in the image 300A, as shown in Figure 3B, and reduces the perceived brightness difference of the display panel 130 during data polarity inversion, improving visual quality.

[0038] Figure 4A illustrates the polarity distribution of subpixels on a display panel according to another embodiment of the present invention. Figure 4B illustrates a schematic diagram of an image displayed on a display panel according to another embodiment of the present invention. Referring to Figures 4A and 4B, the driving method of the display panel 130 in this embodiment is similar to that of the embodiment in Figure 3A, except that the main difference is that the timing controller 110 drives the display panel 130 to display the image 300B by using a spatial domain low color shift method.

[0039] Specifically, the timing controller 110 can process the grayscale data in the video signal VDO through the data processing circuit 114 to generate a display video signal VDO'. The display video signal VDO' enables two adjacent sub-pixels 400 on the display panel 130 to exhibit different brightness levels, i.e., a low color shift driving mode for spatial pixels. Therefore, in addition to exhibiting an N-line inverted polarity distribution, the display panel 130 can also exhibit different brightness levels between two adjacent sub-pixels.

[0040] Therefore, in this embodiment, the timing controller 110 outputs N polarity conversion signals based on M data polarity configuration signals, so that the data driving circuit 120 drives the display panel 130 according to the N polarity conversion signals, where M and N are positive integers greater than or equal to 2. Thus, N-line inversion can be achieved on the display panel 130, which can improve the dark line and fine texture perception of the image 300B, as shown in Figure 4B. Combined with a driving method that minimizes spatial pixel color shift, the perceived brightness difference of the display panel 130 during polarity transitions can be reduced, improving visual quality.

[0041] Figure 5 illustrates the polarity distribution of subpixels on a display panel according to another embodiment of this disclosure. Referring to Figure 5, the driving method of the display panel 130 in this embodiment is similar to that of the embodiment in Figure 3A, except that the main difference lies, for example, in the different correspondence between the polarity conversion signal and the pixel row.

[0042] Specifically, the data driving circuit 120 drives the corresponding pixel rows CL1, CL2, CL3, and CL4 of the display panel 130 according to the polarity conversion signals POL_a, POL_c, POL_b, and POL_d, so that the sub-pixels 132 on the display panel 130 present the polarity distribution shown in Figure 5. For example, the data driving circuit 120 drives pixel row CL1 according to the polarity conversion signal POL_a, pixel row CL2 according to the polarity conversion signal POL_c, pixel row CL3 according to the polarity conversion signal POL_b, and pixel row CL4 according to the polarity conversion signal POL_d. The other pixel rows are driven by the corresponding polarity conversion signals in the same order. In other words, this disclosure does not limit the correspondence between polarity conversion signals and pixel rows. Therefore, in this embodiment, the timing controller 110 outputs N polarity conversion signals based on M data polarity configuration signals, so that the data driving circuit 120 drives the display panel 130 according to the N polarity conversion signals, where M and N are positive integers greater than or equal to 2. Thus, N-line inversion can be achieved on the display panel 130, which can further improve the appearance of dark lines and fine lines in the image, reduce the perceived brightness difference of the display panel 130 during polarity conversion, and improve visual quality.

[0043] In summary, in the embodiments disclosed herein, the timing controller outputs multiple polarity conversion signals based on at least one data polarity configuration signal, so that the data driving circuit drives the display panel according to the polarity conversion signals. Therefore, multi-line inversion can be achieved on the display panel, improving the appearance of dark lines and fine lines in the image, reducing the perceived brightness difference of the display panel during polarity conversion, and enhancing visual quality. In one embodiment, the display panel can also be driven using a method with low spatial pixel color shift.

[0044] Although the present invention has been disclosed above by way of embodiments, it is not intended to limit the present invention. Anyone skilled in the art can make some modifications and refinements without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention shall be determined by the appended claims.

[0045] 100: Electronic devices 110: Timing Controller 112: Signal modulation circuit 114: Data processing circuit 120: Data drive circuit 130: Display panel 132, 400: Subpixels 300A, 300B: Video feed CL1, CL2, CL3, CL4: Pixel rows POL_1: First data polarity configuration signal POL_2: Second data polarity configuration signal POL_a, POL_b, POL_c, POL_d: Polarity conversion signals RW2: Pixel column VDO: Video signal VDO: Displays video signal

Claims

1. An electronic device comprising: A timing controller is used to receive a first data polarity configuration signal and a second data polarity configuration signal that are out of phase with each other, and the timing controller generates and outputs a plurality of polarity conversion signals based on the first data polarity configuration signal and the second data polarity configuration signal, wherein the plurality of polarity conversion signals are out of phase; a data driving circuit is coupled to the timing controller and is used to receive the plurality of polarity conversion signals; The display panel is coupled to the data driving circuit for displaying an image. The data driving circuit drives the display panel to display the image according to the plurality of polarity conversion signals. The timing controller also receives a video signal and processes the grayscale data in the video signal to generate a brightness adjustment signal. The brightness adjustment signal causes two adjacent sub-pixels on the display panel to present different brightness levels.

2. The electronic device of claim 1, wherein the plurality of polarity conversion signals include a first polarity conversion signal and a second polarity conversion signal, the first data polarity configuration signal serves as the first polarity conversion signal, and the second polarity conversion signal is generated based on the first polarity conversion signal.

3. The electronic device of claim 2, wherein the timing controller reverses the phase of the first polarity conversion signal to generate the second polarity conversion signal.

4. The electronic device of claim 2, wherein the plurality of polarity conversion signals include a third polarity conversion signal and a fourth polarity conversion signal, the second data polarity configuration signal serves as the third polarity conversion signal, and the fourth polarity conversion signal is generated based on the third polarity conversion signal.

5. The electronic device of claim 4, wherein the timing controller performs a phase reversal on the third polarity switching signal to generate the fourth polarity switching signal.

6. The electronic device of claim 1, wherein the display panel includes a plurality of sub-pixels, the plurality of polarity switching signals driving the display panel such that any sub-pixel located in any column has a different polarity than at least one of the sub-pixels on either side of it.

7. The electronic device of claim 1, wherein the timing controller drives the display panel to display the image via spatial pixel low color shift.

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