Semiconductor device

Abstract

The objective of this invention is to obtain a low electron injection and long lifetime structure without the presence of factors that inhibit lifetime. Semiconductor device 10 includes: a semiconductor substrate 12; an anode electrode 20 formed on one side surface of the semiconductor substrate 12; a cathode electrode 22 formed on the other side surface of the semiconductor substrate 12; a P-layer 16 formed within the semiconductor substrate 12 on the side of the anode electrode 20; and an N-layer 14 formed within the semiconductor substrate 12 on the side of the cathode electrode 22 and on the other side of the P-layer 16. The cathode electrode 22 and the N-layer 14 are Schottky-bonded. The cathode electrode 22 is a metal with a work function in the range of 4.2 to 4.3, and the carrier concentration of the N-layer 14 is in the range of 1×e12 to 1×e18 / cm3.

Description

semiconductor devices The present invention relates to a semiconductor device, and more particularly to reducing recovery loss. Current control using a PN junction is used in semiconductor devices. A diode has a PN junction that allows current to flow from the P-side anode to the N-side cathode, while blocking current in the opposite direction. Furthermore, when conducting, a large number of carriers (holes from the anode and electrons from the cathode) are injected, reducing the forward voltage drop (VF) during conduction. On the other hand, during recovery, the injected holes and electrons (carriers) are discharged to the anode and cathode, respectively. Therefore, when a large number of carriers exist, the recovery loss Err becomes large. Patent Document 1 shows that a lifetime killer is provided to eliminate the carriers inside, thereby accelerating the discharge of carriers. [Prior Art Document] [Patent Document] [Patent Document 1] International Publication No. WO2017 / 146148 [Problems to be solved by the invention] Here, the lifetime suppressing factor is set by forming crystal defects in the semiconductor, and in order to carry out this treatment, large-scale equipment and operation steps are required. [Technical means to solve the problem] The semiconductor device of the present invention comprises: a semiconductor substrate; an anode electrode formed on one side surface of the semiconductor substrate; a cathode electrode formed on the other side surface of the semiconductor substrate; a P layer formed on the anode electrode side of the semiconductor substrate; and an N layer formed on the cathode electrode side of the semiconductor substrate and on the other side of the P layer; the cathode electrode and the N layer are Schottky-bonded, the cathode electrode is a metal having a work function in the range of 4.2 to 4.3, and the carrier concentration of the N layer is in the range of 1×e 12 ~1×e 18 / cm 3 [Effects of the invention] According to the semiconductor device of the present invention, a low electron injection and long lifetime structure can be obtained without lifetime-inhibiting factors. Hereinafter, embodiments of the present invention will be described with reference to the drawings. Note that the following embodiments do not limit the present invention, and configurations formed by selectively combining a plurality of exemplary embodiments are also encompassed by the present invention. [Semiconductor Device Configuration] Figure 1 is a schematic diagram illustrating the configuration of a semiconductor device according to an embodiment. Semiconductor device 10 includes a semiconductor substrate 12. Semiconductor substrate 12 is composed, for example, of a silicon (Si) wafer, but may also be other semiconductors such as SiC or gallium oxide. In this embodiment, an N-type FZ (Floating Zone) wafer doped with N-type carriers (impurities) and fabricated using the FZ method is used. Since the semiconductor substrate 12 is an N-type substrate, most of the semiconductor substrate 12 directly becomes the N-layer 14. The N-layer 14 is often referred to as the N-drift layer. A P-layer 16 is formed on one side of the N-layer 14 by doping P-type carriers (impurities) from one surface. Furthermore, an anode electrode 20 is formed on one side surface of the semiconductor substrate 12, that is, on the P layer 16. The anode electrode 20 can be made of a metal such as aluminum. A cathode electrode 22 is formed on the other surface (back surface) of the semiconductor substrate 12, that is, the other surface (back surface) on the N layer 14. Like the anode electrode 20, the cathode electrode 22 can also be formed of metal. Thus, in this embodiment, the cathode electrode 22 is directly in contact with the N layer 14, and the two form a Schottky junction. Furthermore, the metal of the cathode electrode 22 can be set to Al (aluminum) or Al-Si alloy (aluminum silicon alloy), and can be formed with these as the main component. Furthermore, the cathode electrode 22 is made of a metal with a work function in the range of 4.2 to 4.3, such as the metals mentioned above. Furthermore, the carrier concentration of the N layer 14 is set to 1×e 12 ~1×e 18 / cm 3 That is, the semiconductor substrate 12 is not limited to silicon, and may be SiC or gallium oxide, etc. Moreover, the cathode electrode 22 is not limited to aluminum or aluminum alloy, but is selected so that the work function difference between the two is 4.2 to 4.3. Thus, the amount of electrons injected from the cathode electrode 22 side into the N layer 14 is appropriately controlled, recovery loss can be suppressed, and the forward voltage drop VF of the semiconductor device 10 , in this example a diode, can be kept relatively small. The semiconductor device 10 of this embodiment can be used directly as a diode, but can also be used in various devices incorporating a diode. [Recovery Waveform] Figure 2 shows the voltage and current waveforms of a typical diode during recovery. First, during conduction, the voltage between the anode electrode 20 and the cathode electrode is the forward voltage drop VF. When sufficient P-type and N-type carriers are present, the voltage is a specific low voltage, and a specific current IF flows. In this example, voltage Vrr is the cathode voltage. Here, by applying a reverse voltage, the current IF decreases linearly. This is caused by holes being attracted from the N layer 14 through the P layer 16 to the anode electrode 20, and electrons being attracted to the cathode electrode 22. At this point, the current Irr temporarily swings significantly to the negative side before approaching zero. The cathode voltage Vrr swings significantly to the positive side before stabilizing at the applied voltage. The energy loss during recovery is Vrr*Irr*time, and the loss from when Vrr becomes positive to when Irr becomes 0 is the recovery loss Err. Figure 3 shows the relationship between the recovery loss Err and the forward voltage drop VF of a typical diode during recovery. As shown, the forward voltage drop VF increases as the carrier concentration decreases. On the other hand, there is a trade-off: higher carrier concentrations increase the number of carriers remaining during recovery, increasing the recovery loss. FIG4 schematically illustrates the hole and electron injection state in semiconductor device 10 of this embodiment. The Schottky junction between cathode electrode 22 and N-layer 14 suppresses electron injection. This achieves a structure with low electron injection and a long lifetime without any life-limiting factors. Figure 5 shows the energy level of the Schottky junction. By forming the Schottky junction in this way, an energy barrier is formed, thereby suppressing the injection of electrons into the semiconductor side. FIG6 is a graph showing the current waveform during recovery of the semiconductor device 10 according to the embodiment. FIG6 shows the semiconductor device 10 according to the embodiment and an ohmic junction (high electron injection) as a comparative example, in which an N-type high-concentration carrier doped layer is provided adjacent to the cathode electrode. As can be seen in this embodiment, the current during recovery (Irr) can be reduced, and recovery loss can be suppressed. Figure 7 is a graph showing the electron density in the depth direction of semiconductor device 10 when it is on. Furthermore, according to the charge neutrality law, the densities of electrons and holes are equal, so Figure 7 can also be considered a graph showing the hole density. This shows that in this embodiment, electron injection from cathode electrode 22 is suppressed. Furthermore, the carrier concentration in the figure represents the dopant carrier concentration of N layer 14. Figure 8 shows the dependence of recovery loss Err and forward voltage drop VF on the metal's work function. As the work function increases, the recovery loss decreases, but the forward voltage drop VF increases. It can be seen that within the work function range of 4.2 to 4.3, both recovery loss Err and forward voltage drop VF are low. FIG9 is a characteristic diagram showing the dependence of the recovery loss Err and the forward voltage drop VF on the doping carrier concentration of the N-type carriers (impurities) in the N layer 14. When the carrier concentration increases above a certain level, the forward voltage drop VF decreases, but the recovery loss Err increases. It can be seen that if the carrier concentration is 1×e 18 / cm 3 Furthermore, in order to maintain the function as a diode, it is preferable to set the carrier concentration to 1×e 12 Therefore, it can be seen that the carrier concentration is preferably set to 1×e 12 ~1×e 18 / cm 3 within the range. FIG10 is a graph showing the relationship between the recovery loss Err and the forward voltage drop VF during recovery of the semiconductor device 10 according to the embodiment. A comparative example is also shown for a typical case of high electron injection and short lifetime. Thus, the semiconductor device 10 according to the embodiment achieves a low electron injection and long lifetime structure, reducing the forward voltage drop VF and the recovery loss. <Manufacturing Steps> Figure 11 shows the manufacturing steps of the semiconductor device 10 according to the embodiment. First, a semiconductor substrate 12 is prepared (S11). As the semiconductor substrate 12, for example, an N-type FZ (Floating Zone) silicon wafer is used. P-type impurities are doped (implanted) from the front side (S12) and diffused to form a P-type P layer 16 (S12). Next, contacts are formed (S14), and a front electrode, namely, an anode electrode 20, is formed on the front side (S15). Next, the back surface side is polished ( S16 ), and a back surface electrode, ie, cathode electrode 22 is formed by metal deposition ( S17 ). That is, the cathode electrode 22 is formed directly on the N layer 14 , and a Schottky junction is formed there. The semiconductor device 10 is formed in this manner, and then various inspections are performed on the semiconductor device 10 ( S18 ), completing the manufacturing process. 10: semiconductor device 12: semiconductor substrate 14: N layer 16: P layer 20: anode electrode 22: cathode electrode FIG1 is a schematic diagram showing the structure of a semiconductor device according to an embodiment. FIG2 shows the voltage and current waveforms during recovery of a conventional diode. FIG3 is a diagram showing the relationship between the recovery loss Err and the forward voltage drop VF during recovery of a conventional diode based on the work function. FIG4 is a schematic diagram showing the injection state of holes and electrons in the semiconductor device 10 according to this embodiment. FIG5 is a diagram showing the energy level of a Schottky junction. FIG6 is a diagram showing the current waveform during recovery of the semiconductor device 10 according to the embodiment. FIG7 is a diagram showing the electron density in the depth direction of the semiconductor device 10 when it is turned on. FIG8 is a characteristic diagram showing the dependence of the recovery loss Err and the forward voltage drop VF on the work function of the metal. FIG9 is a characteristic diagram showing the dependence of the recovery loss Err and the forward voltage drop VF on the doping carrier concentration of N-type carriers (impurities) in the N layer. FIG10 is a diagram showing the relationship between the recovery loss Err and the forward voltage drop VF during recovery of the semiconductor device 10 according to the embodiment. FIG. 11 is a diagram showing a manufacturing process of a semiconductor device according to an embodiment. 10: Semiconductor devices 12:Semiconductor substrate 14: N-layer 16:P layer 20: Anode electrode 22: cathode electrode

Claims

1. A semiconductor device comprising: a semiconductor substrate; an anode electrode formed on one side surface of the semiconductor substrate; a cathode electrode formed on another side surface of the semiconductor substrate; a P layer formed within the semiconductor substrate on the anode electrode side; and an N layer formed within the semiconductor substrate on the cathode electrode side; wherein the P layer is located on one side of the N layer opposite to the cathode electrode side, and the cathode electrode completely covers the entire surface of the N layer opposite to the P layer, wherein the cathode electrode is Schottky-bonded to the N layer, wherein the cathode electrode is a metal with a work function in the range of 4.2 eV to 4.3 eV, and wherein the carrier concentration of the N layer is in the range of 1×e12 to 1×e18 / cm3.

2. The semiconductor device of claim 1, wherein the metal of the cathode electrode is mainly composed of aluminum or an aluminum-silicon alloy.

3. The semiconductor device of claim 1 or 2, wherein the semiconductor substrate is made of silicon wafer.

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