Plasma treatment unit

TWI937461BActive Publication Date: 2026-09-01TOKYO ELECTRON LTD
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Patent Information

Application Number
TW112148249
Authority / Receiving Office
TW · TW
Patent Type
Patents
Current Assignee / Owner
Priority Date
2023-12-04
Filing Date
2023-12-12
Publication Date
2026-09-01
Estimated Expiration
2043-12-11

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Abstract

In one exemplary embodiment, a plasma processing apparatus is provided. The plasma processing apparatus includes a chamber, a substrate support, an upper electrode, a first insulating member, and a shielding member. The chamber is electrically grounded and provides a plasma processing space. The upper electrode is a portion of a top section disposed above the plasma processing space to close the opening of the chamber. The first insulating member is a portion of the top section and is disposed between the upper electrode and the chamber to electrically isolate the upper electrode from the chamber. The shielding member is another portion of the top section, is conductive, formed of a silicon-containing material, and extends from the periphery of the upper electrode to the chamber. The portion of the top section exposed to the plasma processing space is composed of a conductor including the upper electrode and the shielding member.
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Description

Plasma processing apparatus Embodiments of the present invention relate to a plasma processing apparatus. The plasma processing apparatus is used for plasma processing of a substrate. The plasma processing apparatus disclosed in Patent Document 1 below includes a processing container, an upper electrode, and a shielding member. The upper electrode closes the opening of the top wall of the processing container with an insulating shielding member interposed therebetween. The upper electrode includes an inner electrode plate disposed inside the processing container and an outer electrode plate disposed outside the inner electrode plate. A flow path for gas flow is formed in the gap between the inner electrode plate and the outer electrode plate. Prior Art Documents Patent Documents Patent Document 1: Japanese Patent Laid-Open No. 2021-077808 [Problems to be Solved by the Invention] The present invention provides a technique for suppressing the adhesion of reaction products to portions exposed to the plasma processing space. [Technical Means for Solving the Problems] In one exemplary embodiment, a plasma processing apparatus is provided. The plasma processing apparatus includes a chamber, a substrate support portion, an upper electrode, a first insulating member, and a shielding member. The chamber is electrically grounded to provide a plasma processing space. The substrate support portion is disposed inside the chamber and configured to support a substrate. The upper electrode is a part of the top disposed above the plasma processing space to close the opening of the chamber, configured to be able to apply high-frequency power, and disposed above the substrate support portion. The first insulating member is a part of the top and is disposed between the upper electrode and the chamber to electrically isolate the upper electrode from the chamber. The shielding member is another part of the top, has conductivity, is formed of a silicon-containing material, and extends from the periphery of the upper electrode to the chamber. The portion of the top exposed to the plasma processing space is composed of a conductor including the upper electrode and the shielding member. [Effects of the Invention] According to the present invention, the adhesion of reaction products to portions exposed to the plasma processing space can be suppressed. Hereinafter, various exemplary embodiments will be described in detail with reference to the drawings. In addition, the same or corresponding parts are denoted by the same reference numerals in the respective drawings. FIG. 1 is a diagram for explaining a configuration example of a plasma processing system. In one embodiment, the plasma processing system includes a plasma processing apparatus 1 and a control unit 2. The plasma processing system is an example of a substrate processing system, and the plasma processing apparatus 1 is an example of a substrate processing apparatus. The plasma processing apparatus 1 includes a plasma processing chamber 10, a substrate support unit 11, and a plasma generation unit 12. The plasma processing chamber 10 has a plasma processing space. Further, the plasma processing chamber 10 has at least one gas supply port for supplying at least one processing gas to the plasma processing space, and at least one gas discharge port for discharging gas from the plasma processing space. The gas supply port is connected to the gas supply unit 20 described below, and the gas discharge port is connected to the exhaust system 40 described below. The substrate support unit 11 is disposed in the plasma processing space and has a substrate support surface for supporting a substrate. The plasma generation unit 12 is configured to generate plasma from at least one processing gas supplied into the plasma processing space. The plasma formed in the plasma processing space may also be capacitively coupled plasma (CCP), inductively coupled plasma (ICP), ECR plasma (Electron-Cyclotron-resonance plasma), helicon wave plasma (HWP), or surface wave plasma (SWP), etc. Further, various types of plasma generation units including an AC (Alternating Current) plasma generation unit and a DC (Direct Current) plasma generation unit may be used. In one embodiment, the AC signal (AC power) used in the AC plasma generation unit has a frequency in the range of 100 kHz to 10 GHz. Therefore, the AC signal includes an RF (Radio Frequency) signal and a microwave signal. In one embodiment, the RF signal has a frequency in the range of 100 kHz to 150 MHz. The control unit 2 processes commands executable by a computer that causes the plasma processing apparatus 1 to execute the various steps described in the present invention. The control unit 2 may be configured to control the respective elements of the plasma processing apparatus 1 to execute the various steps described herein. In one embodiment, part or all of the control unit 2 may be included in the plasma processing apparatus 1. The control unit 2 may include a processing unit 2a1, a memory unit 2a2, and a communication interface 2a3. The control unit 2 is realized, for example, by a computer 2a. The processing unit 2a1 may be configured to perform various control operations by reading a program from the memory unit 2a2 and executing the read program. The program may be pre-stored in the memory unit 2a2 or may be obtained via a medium when needed. The obtained program is stored in the memory unit 2a2 and read from the memory unit 2a2 by the processing unit 2a1 and then executed. The medium may be various memory media readable by the computer 2a or may be a communication line connected to the communication interface 2a3. The processing unit 2a1 may also be a (CPU: Central Processing Unit, central processing unit). The memory unit 2a2 may also include a RAM (Random Access Memory), a ROM (Read Only Memory), an HDD (Hard Disk Drive), an SSD (Solid State Drive), or a combination thereof. The communication interface 2a3 may communicate with the plasma processing apparatus 1 via a communication line such as a LAN (Local Area Network). Hereinafter, a configuration example of a capacitively coupled plasma processing apparatus as an example of the plasma processing apparatus 1 will be described. FIG. 2 is a diagram for explaining a configuration example of a capacitively coupled plasma processing apparatus. The capacitively coupled plasma processing apparatus 1 includes a plasma processing chamber 10, a gas supply unit 20, a power supply 30, and an exhaust system 40. Further, the plasma processing apparatus 1 includes a substrate support unit 11 and a gas introduction unit. The gas introduction unit is configured to introduce at least one processing gas into the plasma processing chamber 10. The gas introduction unit includes a showerhead 13. The substrate support unit 11 is disposed in the plasma processing chamber 10. The showerhead 13 is disposed above the substrate support unit 11. In one embodiment, the showerhead 13 constitutes at least a part of the ceiling of the plasma processing chamber 10. The plasma processing chamber 10 has a plasma processing space 10s defined by the showerhead 13, the side wall 10a of the plasma processing chamber 10, and the substrate support unit 11. The plasma processing chamber 10 is grounded. The showerhead 13 and the substrate support unit 11 are electrically insulated from the housing of the plasma processing chamber 10. The substrate support portion 11 includes a main body portion 111 and an annular assembly 112. The main body portion 111 has a central region 111a for supporting the substrate W and an annular region 111b for supporting the annular assembly 112. The wafer is an example of the substrate W. The annular region 111b of the main body portion 111 surrounds the central region 111a of the main body portion 111 in a top view. The substrate W is disposed on the central region 111a of the main body portion 111, and the annular assembly 112 is disposed on the annular region 111b of the main body portion 111 so as to surround the substrate W on the central region 111a of the main body portion 111. Therefore, the central region 111a is also referred to as a substrate support surface for supporting the substrate W, and the annular region 111b is also referred to as an annular support surface for supporting the annular assembly 112. In one embodiment, the main body portion 111 includes a base 1110 and an electrostatic chuck 1111. The base 1110 includes a conductive member. The conductive member of the base 1110 can function as a lower electrode. The electrostatic chuck 1111 is disposed on the base 1110. The electrostatic chuck 1111 includes a ceramic member 1111a and an electrostatic electrode 1111b disposed within the ceramic member 1111a. The ceramic member 1111a has a central region 111a. In one embodiment, the ceramic member 1111a also has an annular region 111b. Furthermore, other members surrounding the electrostatic chuck 1111, such as an annular electrostatic chuck or an annular insulating member, may also have an annular region 111b. In this case, the annular assembly 112 can be disposed on the annular electrostatic chuck or the annular insulating member, or can be disposed on both the electrostatic chuck 1111 and the annular insulating member. Also, at least one RF / DC electrode coupled to the following RF power supply 31 and / or DC power supply 32 can be disposed within the ceramic member 1111a. In this case, at least one RF / DC electrode functions as a lower electrode. When the following bias RF signal and / or DC signal is supplied to at least one RF / DC electrode, the RF / DC electrode is also referred to as a bias electrode. Furthermore, the conductive member of the base 1110 and at least one RF / DC electrode can also function as a plurality of lower electrodes. Also, the electrostatic electrode 1111b can also function as a lower electrode. Therefore, the substrate support portion 11 includes at least one lower electrode. The annular assembly 112 includes one or a plurality of annular members. In one embodiment, one or a plurality of annular members include one or a plurality of edge rings and at least one cover ring. The edge ring is formed of a conductive material or an insulating material, and the cover ring is formed of an insulating material. Further, the substrate support portion 11 may also include a temperature adjustment module configured to adjust at least one of the electrostatic chuck 1111, the ring assembly 112, and the substrate to a target temperature. The temperature adjustment module may also include a heater, a heat transfer medium, a flow path 1110a, or a combination thereof. A heat transfer fluid such as brine or gas flows through the flow path 1110a. In one embodiment, the flow path 1110a is formed in the base 1110, and one or more heaters are disposed in the ceramic member 1111a of the electrostatic chuck 1111. Further, the substrate support portion 11 may also include a heat transfer gas supply portion configured to supply a heat transfer gas to a gap between the back surface of the substrate W and the central region 111a. The shower head 13 is configured to introduce at least one process gas from the gas supply portion 20 into the plasma processing space 10s. The shower head 13 has at least one gas supply port 13a, at least one gas diffusion chamber 13b, and a plurality of gas introduction ports 13c. The process gas supplied to the gas supply port 13a is introduced into the plasma processing space 10s from the plurality of gas introduction ports 13c through the gas diffusion chamber 13b. Further, the shower head 13 includes at least one upper electrode. Furthermore, the gas introduction portion may include, in addition to the shower head 13, one or more side gas injectors (SGIs) installed in one or more openings formed in the side wall 10a. The gas supply portion 20 may also include at least one gas source 21 and at least one flow controller 22. In one embodiment, the gas supply portion 20 is configured to supply at least one process gas from the respective corresponding gas sources 21 to the shower head 13 via the respective corresponding flow controllers 22. Each flow controller 22 may, for example, also include a mass flow controller or a pressure-controlled flow controller. Further, the gas supply portion 20 may also include at least one flow modulation element for modulating or pulsing the flow rate of at least one process gas. The power supply 30 includes an RF power supply 31 coupled to the plasma processing chamber 10 via at least one impedance matching circuit. The RF power supply 31 is configured to supply at least one RF signal (RF power) to at least one lower electrode and / or at least one upper electrode. Thereby, a plasma is formed from at least one process gas supplied to the plasma processing space 10s. Therefore, the RF power supply 31 can function as at least a part of the plasma generation unit 12. Further, by supplying a bias RF signal to at least one lower electrode, a bias potential can be generated on the substrate W, and the ion component in the formed plasma can be fed into the substrate W. In one embodiment, the RF power supply 31 includes a first RF generation unit 31a and a second RF generation unit 31b. The first RF generation unit 31a is configured to be coupled to at least one lower electrode and / or at least one upper electrode via at least one impedance matching circuit, and generate a source RF signal (source RF power) for plasma generation. In one embodiment, the source RF signal has a frequency in the range of 10 MHz to 150 MHz. In one embodiment, the first RF generation unit 31a may also be configured to generate a plurality of source RF signals having different frequencies. The generated one or more source RF signals are supplied to at least one lower electrode and / or at least one upper electrode. The second RF generation unit 31b is configured to be coupled to at least one lower electrode via at least one impedance matching circuit, and generate a bias RF signal (bias RF power). The frequency of the bias RF signal may be the same as or different from the frequency of the source RF signal. In one embodiment, the bias RF signal has a frequency lower than the frequency of the source RF signal. In one embodiment, the bias RF signal has a frequency in the range of 100 kHz to 60 MHz. In one embodiment, the second RF generation unit 31b may also be configured to generate a plurality of bias RF signals having different frequencies. The generated one or more bias RF signals are supplied to at least one lower electrode. Also, in various embodiments, at least one of the source RF signal and the bias RF signal may be pulsed. Furthermore, the power supply 30 may also include a DC power supply 32 coupled to the plasma processing chamber 10. The DC power supply 32 includes a first DC generation unit 32a and a second DC generation unit 32b. In one embodiment, the first DC generation unit 32a is configured to be connected to at least one lower electrode and generate a first DC signal. The generated first DC signal is applied to at least one lower electrode. In one embodiment, the second DC generation unit 32b is configured to be connected to at least one upper electrode and generate a second DC signal. The generated second DC signal is applied to at least one upper electrode. In various embodiments, the first and second DC signals may also be pulsed. In such a case, a sequence of voltage pulses is applied to at least one lower electrode and / or at least one upper electrode. The voltage pulses may also have a pulse waveform such as a rectangle, a trapezoid, a triangle, or a combination thereof. In one embodiment, a waveform generator for generating a sequence of voltage pulses from a DC signal is connected between the first DC generator 32a and at least one lower electrode. Thus, the first DC generator 32a and the waveform generator constitute a voltage pulse generator. When the second DC generator 32b and the waveform generator constitute a voltage pulse generator, the voltage pulse generator is connected to at least one upper electrode. The voltage pulses may have a positive polarity or a negative polarity. Also, the sequence of voltage pulses may include one or more positive-polarity voltage pulses and one or more negative-polarity voltage pulses within one period. Furthermore, the first and second DC generators 32a, 32b may be provided outside the RF power source 31, or the first DC generator 32a may be provided in place of the second RF generator 31b. The exhaust system 40 may be connected, for example, to a gas discharge port 10e provided at the bottom of the plasma processing chamber 10. The exhaust system 40 may also include a pressure regulating valve and a vacuum pump. The pressure in the plasma processing space 10s is adjusted by the pressure regulating valve. The vacuum pump may include a turbo molecular pump, a dry vacuum pump, or a combination thereof. Hereinafter, a plasma processing apparatus according to an exemplary embodiment will be described with reference to FIGS. 2 and 3. FIG. 3 is a diagram showing an upper electrode and a shielding member provided in the plasma processing apparatus shown in FIG. 2. As shown in FIG. 3, the side wall 10a of the plasma processing chamber 10 has a substantially cylindrical shape. The side wall 10a is grounded and its potential is set to the ground potential. The upper end of the side wall 10a is open. The plasma processing apparatus 1 has a top 14 above the plasma processing space 10s. The top 14 is provided so as to close the opening of the plasma processing chamber 10. That is, the top 14 covers and closes the opening at the upper end of the side wall 10a. A part of the top 14 is exposed in the plasma processing space 10s. The shower head 13 that forms a part of the top 14 includes at least one upper electrode 13d. The upper electrode 13d is a part of the top 14 and is configured to be able to apply high-frequency power, and is provided above the substrate support 11. The upper electrode 13d is electrically connected to the first RF generator 31a, for example. The first RF generator 31a is an example of a high-frequency power source. The upper electrode 13d includes a top plate 13e and a first support 13f. The top plate 13e has a substantially disk shape. The top plate 13e is in contact with the plasma processing space 10s. The top plate 13e is formed of a conductive material such as silicon, alumina, or quartz. Further, the top plate 13e may also be constituted by forming a corrosion-resistant film on the surface of a member made of a conductor such as aluminum. The corrosion-resistant film is formed of a material such as alumina or yttrium oxide, for example. The first support 13f is provided on the top plate 13e. The first support 13f supports the top plate 13e in a detachable manner. The first support 13f is formed of aluminum, for example. The first support 13f provides at least one gas diffusion chamber 13b inside thereof. The first support 13f provides at least one gas inlet 13c together with the top plate 13e. At least one gas inlet 13c extends downward from at least one gas diffusion chamber 13b and penetrates the top plate 13e. The top 14 further includes a first insulating member 41. The first insulating member 41 is a part of the top 14. The first insulating member 41 is provided between the upper electrode 13d and the plasma processing chamber 10. The first insulating member 41 electrically isolates the upper electrode 13d from the plasma processing chamber 10. The first insulating member 41 is provided outside the upper electrode 13d (on the side wall 10a side). The first insulating member 41 has a substantially annular shape and extends in the circumferential direction so as to surround the upper electrode 13d. The first insulating member 41 is formed of an insulator such as quartz. The top 14 further includes a shielding member 42. The shielding member 42 is another part of the top 14 and has conductivity. The shielding member 42 is formed of a silicon-containing material, for example. The shielding member 42 extends from the periphery of the upper electrode 13d to the plasma processing chamber 10. The shielding member 42 extends in the circumferential direction so as to surround the peripheral portion of the top plate 13e. The shielding member 42 has a substantially annular shape, for example. The shielding member 42 is electrically floating. That is, the shielding member 42 has a floating potential different from the potential of the upper electrode 13d and the potential of the plasma processing chamber 10. The portion of the top 14 exposed in the plasma processing space 10s is constituted by a conductor including the upper electrode 13d and the shielding member 42. For example, the portion of the top 14 exposed in the plasma processing space 10s is constituted only by a conductor. Hereinafter, the portion of the top 14 exposed in the plasma processing space 10s will be referred to as the "exposed portion of the top 14". In the example shown in FIG. 3, the exposed portion of the top 14 is constituted only by the upper electrode 13d (or the top plate 13e) and the shielding member 42. The shielding member 42 is provided below the first insulating member 41, for example. The shielding member 42 extends so that the first insulating member 41 is not exposed in the plasma processing space 10s. In the example shown in FIG. 3, the shielding member 42 is provided below a part of the first support 13f, the first insulating member 41, and a part of the following second support 43. In the plasma processing apparatus 1, the entire area of the exposed portion of the top 14 is formed of a conductive material. Therefore, reaction products adhering to the exposed portion can be removed by the electric bias during dry cleaning. As a result, it is possible to suppress the reaction products from adhering to the substrate W as particles. The plasma processing chamber 10 may further include a second support 43. The second support 43 is disposed outside the first insulating member 41 and above the shielding member 42. A minute gap is provided between the second support 43 and the shielding member 42. The second support 43 is disposed on the side wall 10a of the plasma processing chamber 10. The second support 43 is electrically connected to the side wall 10a of the plasma processing chamber 10. The potential of the second support 43 is set to the ground potential. The first insulating member 41 is disposed between the first support 13f of the upper electrode 13d and the second support 43. The second support 43 has a substantially annular shape and extends in the circumferential direction so as to surround the first insulating member 41. The second support 43 is formed of a metal such as aluminum. The plasma processing apparatus 1 further includes at least one second insulating member 44. The at least one second insulating member 44 is disposed outside the first insulating member 41 and on the shielding member 42. The at least one second insulating member 44 is interposed between the plasma processing chamber 10 and the shielding member 42. In the example shown in FIG. 3, the at least one second insulating member 44 is disposed such that its lower surface is in contact with the upper surface of the outside of the shielding member 42. The at least one second insulating member 44 is disposed between the shielding member 42 and the second support 43. The at least one second insulating member 44 is, for example, a member having a substantially annular plate shape. The at least one second insulating member 44 is formed of an insulator such as insulating ceramics, quartz, or metal oxide. The plasma processing apparatus 1 further includes at least one third insulating member 45. The at least one third insulating member 45 is disposed below the shielding member 42. The at least one third insulating member 45 is interposed between the plasma processing chamber 10 and the shielding member 42. The shielding member 42 is supported between the at least one second insulating member 44 and the at least one third insulating member 45. In the example shown in FIG. 3, the at least one third insulating member 45 includes a third support 45a and a sealing member 45b. The third support 45a is disposed on the side wall 10a. The third support 45a supports the shielding member 42 from below. A part of the inside of the third support 45a may be exposed below the top 14 in the plasma processing space 10s. The sealing member 45b is disposed between the shielding member 42 and the third support 45a. The sealing member 45b is disposed so as to be in contact with the outside portion of the shielding member 42 and the outside portion of the third support 45a. The sealing member 45b is, for example, an O-ring that separates the reduced-pressure environment including the plasma processing space 10s from the atmospheric pressure environment. As a current flow path for high-frequency power supplied to the upper electrode 13d, a first path that does not pass through the plasma and a second path that passes through the plasma are considered. In the first path, current flows from the upper electrode 13d through the shielding member 42, at least one second insulating member 44, and the second support body 43 to the side wall 10a. In the second path, current flows from the upper electrode 13d through the plasma in the plasma processing space 10s to the side wall 10a. At least one second insulating member 44 reduces the capacitance between the shielding member 42 and the second support body 43, and increases the impedance of the first path. The high-frequency power supplied to the upper electrode 13d is efficiently coupled by the plasma in the plasma processing space 10s. Also, the high-frequency power supplied to the upper electrode 13d is more efficiently coupled to the plasma below the shielding member 42. Regarding whether the high-frequency power is more efficiently coupled to the plasma in the plasma processing space 10s of the second path, it can be determined by the change of the impedance circuit (matcher) provided in the power supply 30. When the high-frequency power is more efficiently coupled to the plasma, the resistance value identified by the impedance circuit increases as the plasma density increases, and decreases as the plasma density decreases. Here, the so-called resistance value refers to the real part of the impedance of the load identified in the impedance circuit. Hereinafter, refer to FIG. 4. FIG. 4 is a graph showing the change of the real part (resistance value) of the impedance of the load of the high-frequency power supply corresponding to the power level of the high-frequency power supplied to the upper electrode. In the graph shown in FIG. 4, the horizontal axis is the power level (W) of the high-frequency power supplied to the upper electrode 13d, and the vertical axis is the real part of the impedance of the load of the high-frequency power supply (the first RF generation unit 31a), that is, the resistance value (Ω). In the horizontal axis of FIG. 4, as moving from left to right, the power level (W) of the high-frequency power is higher. The characteristics shown in the graph of FIG. 4 are obtained in a state where the second insulating member 44 with a thickness of 5 mm is provided between the shielding member 42 and the second support body 43. Furthermore, the second insulating member 44 is a quartz member. The gap between the upper electrode 13d and the shielding member 42 is 0.5 mm. The graph shown in FIG. 4 shows the resistance value when the power level of the high-frequency power is changed. Furthermore, the impedance of the load of the high-frequency power supply (the first RF generation unit 31a) and its real part (resistance value) are identified in the matcher connected between the high-frequency power supply and the upper electrode 31d. As shown in FIG. 4, the real part of the impedance of the load of the high-frequency power supply, that is, the resistance value increases as the power level of the high-frequency power increases. Furthermore, the resistance value changes linearly with the increase of the power level of the high-frequency power. This indicates that the high-frequency power is efficiently coupled to the plasma. FIG. 5 is a graph showing the relationship between the plasma density and the real part (resistance value) of the impedance of the load of the high-frequency power supply. In the graph shown in FIG. 5, the horizontal axis represents the plasma density (S / m), and the vertical axis represents the real part of the impedance of the load of the high-frequency power supply (the first RF generation unit 31a), that is, the resistance value (Ω). In the horizontal axis of FIG. 5, the plasma density (S / m) increases as it advances from left to right. FIG. 5 shows the measurement results when the thickness of the second insulating member 44 is set to 5 mm, 10 mm, 15 mm, 20 mm, and 35 mm, respectively. As shown in FIG. 5, when generating plasma, the real part of the impedance of the load of the high-frequency power supply, that is, the resistance value decreases as the plasma density increases. This result indicates that the plasma density can be specified based on this resistance value, and the plasma density can be controlled based on this resistance value. Also, as shown in FIG. 5, the larger the thickness of the second insulating member 44, the greater the change in this resistance value with the change in plasma density. This situation indicates that by using the second insulating member 44 with a larger thickness, it becomes easier to capture the change in plasma density and easier to control the plasma density. As described above, various exemplary embodiments have been described, but are not limited to the above exemplary embodiments, and various additions, omissions, replacements, and changes can also be made. Also, elements in different embodiments can be combined to form other embodiments. For example, at least one of the upper electrode 13d and the shielding member 42 can also be electrically connected to the second DC generation unit 32b. The second DC generation unit 32b is an example of a DC power supply. Hereinafter, with reference to FIG. 6, a plasma processing apparatus according to another exemplary embodiment employed in the plasma processing apparatus will be described. FIG. 6 is a diagram for explaining the plasma processing apparatus according to another exemplary embodiment. The plasma processing apparatus 1A according to the exemplary embodiment shown in FIG. 6 is different from the plasma processing apparatus 1 in that the first insulating member 41A has a first insulating portion 46 and a second insulating portion 47. That is, the plasma processing apparatus 1A is different in that it does not include the second insulating member 44 of the plasma processing apparatus 1. The top 14 includes the first insulating member 41A. The first insulating member 41A is a part of the top 14. The first insulating member 41A is formed of an insulator such as quartz. The first insulating member 41A has a first insulating portion 46 and a second insulating portion 47. The first insulating portion 46 is provided between the upper electrode 13d and the plasma processing chamber 10. The first insulating portion 46 electrically isolates the upper electrode 13d and the plasma processing chamber 10. The first insulating portion 46 is provided outside the upper electrode 13d (on the side wall 10a side). The first insulating portion 46 has a substantially annular shape and extends in the circumferential direction so as to surround the upper electrode 13d. The second insulating part 47 is disposed outside the first insulating part 46 and on the shielding member 42. The second insulating part 47 has, for example, a substantially annular shape and extends in the circumferential direction so as to surround the first insulating part 46. The second insulating part 47 extends so as to protrude outward from the lower end portion of the first insulating part 46. The second insulating part 47 is interposed between the plasma processing chamber 10 and the shielding member 42. In the example shown in FIG. 6, the second insulating part 47 is disposed such that its lower surface is in contact with the upper surface outside the shielding member 42. The second insulating part 47 is disposed between the shielding member 42 and the second support 43. Thus, in the plasma processing apparatus 1A, the first insulating member 41A having the first insulating part 46 and the second insulating part 47 is interposed between the upper electrode 13d and the plasma processing chamber 10, and between the plasma processing chamber 10 and the shielding member 42. Thereby, the number of members for insulating the current can be reduced, and the number of steps in setting up the plasma processing apparatus 1A can be reduced. Further, a DC connection part 48 is provided inside the second support 43. The DC connection part 48 extends from the inside of the second support 43, penetrates the second insulating part 47, and is connected to a portion outside the shielding member 42. The portion outside the shielding member 42 refers to, for example, a portion outside the shielding member 42 in the radial direction and is a portion not exposed to the plasma processing space 10s. The portion outside the shielding member 42 may also be a peripheral portion of the shielding member 42. The portion outside the shielding member 42 is supported by being sandwiched between the lower end portion of the DC connection part 48 and at least one third insulating member 45. For example, the lower end portion of the DC connection part 48 is disposed directly above the sealing member 45b of at least one third insulating member 45 in the circumferential direction. The shielding member 42 in the plasma processing apparatus 1A may not be electrically floating. The second DC signal generated by the second DC generation part 32b is applied to the shielding member 42 via the DC connection part 48. The second DC generation part 32b generates a signal having a frequency of, for example, 400 kHz as the second DC signal and supplies it to the shielding member 42 via the DC connection part 48. At this time, for example, the first RF generation part 31a may also generate a signal having a frequency of, for example, 100 MHz as the source RF signal and supply it to the upper electrode 13d. Further, at this time, the second RF generation part 31b may also generate a signal having a frequency of, for example, 13 MHz as the bias RF generation signal and supply it to the lower electrode. Thus, even when the DC connection part 48 is located outside the first insulating member 41A, the second DC signal can be appropriately applied to the shielding member 42 by connecting the DC connection part 48 to the shielding member 42 through the second insulating part 47. Further, the inner wall portion 10t on the inner side of the side wall 10a facing the plasma processing space 10s is formed of silicon. The inner wall portion 10t can serve as a counter electrode with respect to the shielding member 42. At least a part of the current applied to the shielding member 42 flows to the side wall 10a via the plasma in the plasma processing space 10s and the inner wall portion 10t. Thus, since the inner wall portion 10t is formed of silicon, it is no longer necessary to additionally dispose other members (devices) serving as counter electrodes in the plasma processing space 10s. Therefore, the number of steps when setting up the plasma processing device 1A can be reduced. Hereinafter, an example of a processing circuit that can be used as one or more processing circuits in the plasma processing device 1, such as the control unit 2, will be described. FIG. 7 is a block diagram of a processing circuit that implements the operations described in this specification on a computer. FIG. 7 illustrates a processing circuit 130 that can be used to control control processing on any computer. The descriptions or blocks in the flowchart represent a part of a module, section, or code that includes one or more executable commands for implementing a specific logical function or step of the processing. As understood by those skilled in the art, other embodiments having functions that can be executed in an order different from the illustrated or described order, such as substantially simultaneously or in the reverse order, according to relevant functions, are included in the scope of the exemplary embodiments of the present invention. The various elements, features, and processes described in this specification can be used independently of each other or can be combined in various ways. All conceivable combinations and partial combinations can be included in the scope of the present invention. In FIG. 7, the processing circuit 130 includes a CPU 1200 that implements one or more of the above-described / below-described control processes. Processing data and commands can also be stored in the memory 1202. These processing data and commands can be stored in a memory medium disk 1204 such as a hard disk drive (HDD) or a portable memory medium, or can be stored remotely. Furthermore, the present invention described in the claims is not limited by the form of the computer-readable medium that stores the commands for the processes of the present invention. For example, these commands can also be stored in a CD (Compact Disc), DVD (Digital Versatile Disc), flash memory, RAM, ROM, PROM (Programmable Read Only Memory), EPROM (Erasable Programmable Read Only Memory), EEPROM (electrically erasable programmable read only memory), hard disk, or any other information processing device such as a server and / or computer that communicates with the processing circuit 130. Furthermore, the invention described in the claims can be provided as a component of an application program, a background mode, an operating system, or a combination thereof, and can also be executed in conjunction with known operating systems such as the CPU 1200 and MS Windows, UNIX, Solaris, LINUX, and Apple MAC-OS. The hardware elements of the processing circuit 130 can be realized by various circuit elements. Furthermore, each function of the above-described embodiment can be implemented by a circuit including one or more processing circuits. As shown in FIG. 7, the processing circuit includes a processing device that has been specifically programmed, such as the processing device (CPU) 1200. The processing circuit also includes components such as a circuit suitable for a specific purpose (ASIC: Application Specific Integrated Circuit) or a previous circuit component configured to implement the described function. In FIG. 7, the processing circuit 130 includes the CPU 1200 that performs the above-described processing. The processing circuit 130 can be a general-purpose computer or a specific dedicated machine. In one embodiment, when the processing device 1200 is programmed to control the plasma generation unit 12 and the gas supply unit 20 (in particular, when any of the processes described in FIGS. 1 to 6 is implemented), the processing circuit 130 functions as a specific dedicated machine. Alternatively, as understood by those skilled in the art, the CPU 1200 can also be installed on an FPGA (field programmable gate array), an ASIC, a PLD (programmable logic device), or using discrete logic circuits. Furthermore, the CPU 1200 can also be implemented as a plurality of processing devices that cooperate in a manner to execute the commands for implementing the above-described processing of the present invention in parallel. The processing circuit 130 of FIG. 7 further includes a network controller 1206 for interfacing with the network 1228, such as an Intel Ethernet PRO network interface card of Intel Corporation in the United States. As can be understood, the network 1228 can be a public network such as the Internet, a personal network such as a LAN or a WAN (Wide Area Network), or any combination thereof. It can also include a subnet such as a PSTN (public switched telephone network) or an ISDN (international subscriber directory number). The network 1228 can be wired, such as Ethernet, or wireless, such as a cellular network including an EDGE, 3G, or 4G wireless cellular system. The wireless network can also be Wi-Fi, Bluetooth, or any other known wireless communication form. The processing circuit 130 further includes a display device controller 1208, such as a graphics card or a graphics adapter, for interfacing with a display device 1210 such as a monitor. A general-purpose I / O (input / output) interface 1212 interfaces with a keyboard and / or a mouse 1214, and a touch panel 1216 integrated with or separate from the display device 1210. The general-purpose I / O interface is also connected to various peripheral devices 1218 such as a printer and a scanner. The memory device controller 1224 is connected to the memory medium disk 1204 via a communication bus 1226 such as an ISA (industry standard architecture), an EISA (enhanced industry standard architecture), a VESA (video electronics standards association), or a PCI (Peripheral Component Interconnect), and all components of the processing circuit 130 are interconnected. Regarding the general features and functions of the display device 1210, the keyboard and / or the mouse 1214, the display device controller 1208, the memory device controller 1224, the network controller 1206, the sound controller 1220, and the general-purpose I / O interface 1212, they are omitted as known for the sake of simplification in this specification. The exemplary circuit elements described in the present invention can be replaced with other elements and may have a structure different from the examples described in this specification. Further, a circuit configured to implement the features described in this specification can be implemented using a plurality of circuit units (e.g., wafers), or these features can also be assembled into the circuit of a single chipset. The functions and features described in this specification can also be executed by various components distributed on the system. For example, one or more processing devices can also execute the functions of such a system. In this case, the processing devices are distributed over a plurality of components communicating within the network. As the distributed components, in addition to various human-machine interfaces and communication devices (display monitors, smartphones, tablets, personal information terminals (PDA: Personal Digital Assistant), etc.), it can also include one or more client machines and servers that can share processing. The network can be a personal network such as a LAN or WAN, or a public network such as the Internet. Input to the system can be accepted by the direct input of the user, or can be accepted remotely in real time or as batch processing. Further, a part of the embodiments can be implemented on a module or hardware different from the above. Therefore, other embodiments are also included in the scope of the patent application. Here, various exemplary embodiments included in the present invention are described in [E1] to [E9] below. [E1] A plasma processing apparatus, comprising: a chamber that is electrically grounded and provides a plasma processing space; a substrate support portion disposed in the chamber and configured to support a substrate; an upper electrode that is a part of the top disposed above the plasma processing space to close the opening of the chamber and is configured to be able to apply high-frequency power, disposed above the substrate support portion; a first insulating member that is a part of the top and is disposed between the upper electrode and the chamber to electrically isolate the upper electrode from the chamber; and a shielding member that is another part of the top, has conductivity, is formed of a silicon-containing material, and extends from the periphery of the upper electrode to the chamber; a portion of the top exposed in the plasma processing space is composed of a conductor including the upper electrode and the shielding member. [E2] The plasma processing apparatus according to [E1], further comprising at least one second insulating member, the at least one second insulating member being disposed outside the first insulating member and on the shielding member so as to be interposed between the chamber and the shielding member. [E3] The plasma processing apparatus according to [E2] further includes at least one third insulating member. The at least one third insulating member is disposed below the shielding member so as to be interposed between the chamber and the shielding member, and supports the shielding member between the at least one second insulating member and the at least one third insulating member. [E4] The plasma processing apparatus according to [E3], wherein the at least one third insulating member is formed of an insulating ceramic, quartz, or a metal oxide. [E5] The plasma processing apparatus according to [E1], wherein the first insulating member has: a first insulating portion disposed between the upper electrode and the chamber; and a second insulating portion disposed outside the first insulating portion and on the shielding member so as to be interposed between the chamber and the shielding member. [E6] The plasma processing apparatus according to [E5] further includes at least one other insulating member. The at least one other insulating member is disposed below the shielding member so as to be interposed between the chamber and the shielding member, and supports the shielding member between the second insulating portion of the first insulating member and the at least one other insulating member. [E7] The plasma processing apparatus according to [E6], wherein the at least one other insulating member is formed of an insulating ceramic, quartz, or a metal oxide. [E8] The plasma processing apparatus according to any one of [E1] to [E7] further includes a DC power source electrically connected to at least one of the upper electrode and the shielding member. [E9] The plasma processing apparatus according to any one of [E1] to [E7], wherein the shielding member is electrically floating. [E10] The plasma processing apparatus according to any one of [E1] to [E9] further includes a high-frequency power source configured to generate the high-frequency power and electrically connected to the upper electrode. Based on the above description, it should be understood that various embodiments of the present invention are described in this specification for illustrative purposes, and various changes can be made without departing from the scope and gist of the present invention. Therefore, the various embodiments disclosed in this specification are not intended to be limiting, and the true scope and gist are represented by the appended claims. 1: Plasma processing apparatus 1A: Plasma processing apparatus 2: Control unit 2a: Computer 2a1: Processing unit 2a2: Memory unit 2a3: Communication interface 10: Plasma processing chamber 10a: Side wall 10e: Gas discharge port 10s: Plasma processing space 10t: Inner wall part 11: Substrate support part 12: Plasma generation part 13: Shower head 13a: Gas supply port 13b: Gas diffusion chamber 13c: Gas introduction port 13d: Upper electrode 13e: Top plate 13f: First support body 14: Top part 20: Gas supply part 21: Gas source 22: Flow controller 30: Power supply 31: RF power supply 31a: First RF generation part 31b: Second RF generation part 32: DC power supply 32a: First DC generation part 32b: Second DC generation part 40: Exhaust system 41: First insulating member 41A: First insulating member 42: Shielding member 43: Second support body 44: Second insulating member 45: Third insulating member 45a: Third support body 45b: Sealing member 46: First insulating part 47: Second insulating part 48: DC connection part 111: Body part 112: Ring assembly 130: Processing circuit 1110: Base 1110a: Flow path 1111: Electrostatic chuck 1111a: Ceramic member 1111b: Electrostatic electrode 1202: Memory 1204: Memory medium disk 1206: Network controller 1208: Display device controller 1210: Display device 1212: General I / O interface 1214: Keyboard and / or mouse 1216: Touch panel 1218: Peripheral device 1224: Memory device controller 1226: Communication bus 1228: Network W: Substrate FIG. 1 is a diagram for explaining a configuration example of a plasma processing system. FIG. 2 is a diagram for explaining a configuration example of a capacitively coupled plasma processing apparatus. FIG. 3 is a diagram for explaining a plasma processing apparatus according to an exemplary embodiment. FIG. 4 is a graph showing a change in the real part (resistance value) of the impedance of the load of a high-frequency power supply corresponding to the power level of the high-frequency power supplied to the upper electrode. FIG. 5 is a graph showing the relationship between the plasma density and the real part (resistance value) of the impedance of the load of the high-frequency power supply. FIG. 6 is a diagram for explaining a plasma processing apparatus according to another exemplary embodiment. FIG. 7 is a block diagram of a processing circuit for performing the operations described in this specification on a computer. 1: Plasma processing apparatus 10: Plasma processing chamber 10a: Side wall 10s: Plasma processing space 11: Substrate support part 13: Shower head 13a: Gas supply port 13b: Gas diffusion chamber 13c: Gas inlet 13d: Upper electrode 13e: Top plate 13f: First support 14: Top 41: First insulating member 42: Shielding member 43: Second support 44: Second insulating member 45: Third insulating member 45a: Third support 45b: Sealing member 111: Body part 112: Ring assembly 1110: Base 1110a: Flow path 1111: Electrostatic chuck 1111a: Ceramic member 1111b: Electrostatic electrode W: Substrate

Claims

1. A plasma processing apparatus comprising: a chamber providing a plasma processing space; a substrate support disposed within the chamber and configured to support a substrate; an upper electrode being a portion of a top disposed above the plasma processing space to close the opening of the chamber, and configured to be capable of applying high-frequency power, and disposed above the substrate support; a first insulating member being a portion of the top and disposed between the upper electrode and the chamber to electrically isolate the upper electrode from the chamber; and a shielding member being another portion of the top, having conductivity, formed of a silicon-containing material, and extending from the periphery of the upper electrode to the chamber; At least one second insulating member is disposed outside the first insulating member and on the shielding member, interposed between the chamber and the shielding member; and at least one third insulating member is disposed below the shielding member, interposed between the chamber and the shielding member, and supports the shielding member between the at least one second insulating member and the at least one third insulating member; the portion of the top exposed in the plasma processing space is composed of a conductor including the upper electrode and the shielding member.

2. The plasma processing apparatus of claim 1, wherein at least one of the third insulating members is formed of insulating ceramic, quartz or metal oxide.

3. A plasma processing apparatus comprising: a chamber providing a plasma processing space; a substrate support disposed within the chamber and configured to support a substrate; an upper electrode, which is a portion of a top disposed above the plasma processing space to close the opening of the chamber, and configured to be capable of applying high-frequency power, and disposed above the substrate support; a first insulating member, which is a portion of the top and disposed between the upper electrode and the chamber to electrically isolate the upper electrode from the chamber; and a shielding member, which is another portion of the top, is conductive, formed of a silicon-containing material, and extends from the periphery of the upper electrode to the chamber; the portion of the top exposed in the plasma processing space is composed of a conductor including the upper electrode and the shielding member; wherein the first insulating member has: The first insulating portion is disposed between the upper electrode and the chamber; and the second insulating portion is disposed outside the first insulating portion and on the shielding member, such that it is placed between the chamber and the shielding member.

4. The plasma processing apparatus of claim 3, further comprising at least one other insulating member disposed below the shielding member in a manner interposed between the chamber and the shielding member, and supporting the shielding member between the second insulating portion of the first insulating member and the at least one other insulating member.

5. The plasma processing apparatus of claim 4, wherein at least one of the other insulating components is formed of insulating ceramic, quartz or metal oxide.

6. The plasma processing apparatus of any one of claims 1 to 5, further comprising a DC power supply electrically connected to at least one of the upper electrode and the shielding member.

7. The plasma processing apparatus of any one of claims 1 to 5, wherein the aforementioned shielding member is electrically floating.

8. The plasma processing apparatus of any one of claims 1 to 5, further comprising a high-frequency power supply configured to generate the aforementioned high-frequency power and electrically connected to the aforementioned upper electrode.

9. The plasma processing apparatus of any one of claims 1 to 5, wherein the inner inner wall of the sidewall of the chamber is formed of silicon.

10. The plasma processing apparatus of any one of claims 1 to 5 further includes a DC power supply electrically connected to a portion outside the aforementioned shielding member.

11. The plasma processing apparatus of any one of claims 3 to 5, further comprising a DC power supply electrically connected to a portion outside the shielding member via a connecting portion; and the connecting portion passing through the second insulating portion and connected to the portion outside the shielding member.

Citation Information

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