Electronic device
Patent Information
- Application Number
- TW113117329
- Authority / Receiving Office
- TW · TW
- Patent Type
- Patents
- Current Assignee / Owner
- Filing Date
- 2024-05-10
- Publication Date
- 2026-09-01
- Estimated Expiration
- 2044-05-09
AI Technical Summary
Existing full-screen electronic devices with under-display sensors require a non-display area for the sensor, leading to noticeable display defects.
An electronic device design with specific ratios and distances between elements in the display area to accommodate a sensor, allowing for a full-screen display without visible defects by optimizing the emission and penetration areas.
The design enables good sensing capabilities while maintaining a seamless full-screen display, with sensing accuracy greater than 90% and consistent image quality across the screen.
Smart Images

Figure TWG2TB001908476_001 
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Abstract
Description
[Technical Field]
[0001] This invention relates to an electronic device, and more particularly to a full-screen electronic device with sensing capabilities. [Previous Technology]
[0002] Existing full-screen electronic devices have sensing functions by integrating under-display sensors; however, at least one penetration area must be left in the display area of the full-screen electronic device to correspond to the under-display sensor. Since no display element is set in this penetration area, users can easily notice the display defects when viewing the screen of this full-screen electronic device. [Summary of the Invention]
[0003] Some embodiments disclosed herein are directed to an electronic device that can have relatively good sensing capabilities in the case of full-screen display.
[0004] An electronic device provided according to some embodiments of the present disclosure includes an electronic panel and a sensor. The electronic panel has a first region and a second region. The first region includes a first element and a second element, which are spaced apart by a first distance. The second region includes a third element and a fourth element, which are spaced apart by a second distance. Each of the first and second elements has a transmitting region and a transmitting region. The sensor overlaps with the first region of the electronic panel and is configured to receive a sensing signal through the transmitting region. A first ratio between the second distance and the first distance is 0.76 to 1.24, and a second ratio between the area of the transmitting region and the area of the first element is 0.52 to 0.96.
[0005] Based on this, an emission area and a penetration area are provided in the first region of the electronic device provided in this disclosure, and this disclosure limits the proportion range of the penetration area in the first element of the first region to obtain a relatively good sensing accuracy, which enables the electronic device provided in this disclosure to have a relatively good sensing function in the case of full-screen display.
[0006] To make the above-mentioned features and advantages disclosed herein more apparent and understandable, specific embodiments are described below in conjunction with the accompanying drawings.
Implementation Method
[0008] Reference will now be made in detail to exemplary embodiments of the invention, examples of which are illustrated in the accompanying drawings. Wherever possible, the same element symbols are used in the drawings and description to denote the same or similar parts.
[0009] This disclosure can be understood by referring to the following detailed description and accompanying drawings. It should be noted that, in order to facilitate the reader's understanding and for the sake of simplicity, many of the drawings in this disclosure only depict a portion of the electronic device, and certain components in the drawings are not drawn to scale. Furthermore, the number and size of each component in the drawings are for illustrative purposes only and are not intended to limit the scope of this disclosure.
[0010] Certain terms are used throughout this disclosure and in the appended claims to refer to specific elements. Those skilled in the art will understand that electronic device manufacturers may use different names to refer to the same element. This document is not intended to distinguish between elements that have the same function but different names. In the following description and claims, words such as "comprising," "containing," and "having" are open-ended terms and should therefore be interpreted as "containing but not limited to...". Therefore, when the terms "comprising," "containing," and / or "having" are used in the description of this disclosure, they specify the presence of the corresponding feature, area, step, operation, and / or component, but do not exclude the presence of one or more of the corresponding feature, area, step, operation, and / or component.
[0011] The directional terms used herein, such as "up," "down," "front," "back," "left," and "right," are only for reference to the accompanying drawings. Therefore, the directional terms used are for illustrative purposes and not for limiting this disclosure. In the accompanying drawings, the various figures illustrate general features of the methods, structures, and / or materials used in specific embodiments. However, these figures should not be construed as defining or limiting the scope or nature covered by these embodiments. For example, for clarity, the relative dimensions, thicknesses, and positions of various films, regions, and / or structures may be reduced or enlarged.
[0012] When a corresponding component (e.g., a membrane or region) is referred to as "on another component," it can be directly on the other component, or there may be other components between them. On the other hand, when a component is referred to as "directly on another component," there are no components between them unless otherwise specified in the specification. In addition, when a component is referred to as "on another component," the two are vertically related in the planar view, and this component can be above or below the other component, depending on the orientation of the device.
[0013] The terms “equal to” or “same as”, “substantially” or “approximately” are generally interpreted as being within 20% of a given value or range, or as being within 10%, 5%, 3%, 2%, 1% or 0.5% of a given value or range.
[0014] The ordinal numbers used in the specification and claims, such as "first" and "second," to modify elements do not inherently imply or represent any prior ordinal number for that element (or those elements), nor do they represent the order of one element with another, or the order of manufacturing processes. The use of these ordinal numbers is solely to clearly distinguish one named element from another element with the same name. The claims and specification may not use the same terminology; therefore, a first component in the specification may be a second component in the claims.
[0015] It should be understood that the features in the following embodiments can be replaced, reorganized, or mixed to complete other embodiments without departing from the spirit of this disclosure. Features between embodiments can be arbitrarily mixed and combined as long as they do not violate the spirit of the invention or conflict with it.
[0016] The electrical connection or connection described in this disclosure can refer to a direct connection or an indirect connection. In the case of a direct connection, the endpoints of the two circuit components are directly connected or connected to each other by a conductor segment. In the case of an indirect connection, there is a switch, diode, capacitor, inductor, other suitable components, or a combination of the above components between the endpoints of the two circuit components, but not limited thereto.
[0017] In this disclosure, the thickness, length, width, and area can be measured using an optical microscope, and the thickness can be measured from a cross-sectional image in an electron microscope, but is not limited thereto. Furthermore, any two values or directions used for comparison may have a certain degree of error. If the first value equals the second value, it implies an error of approximately 10% between the first and second values; if the first direction is perpendicular to the second direction, the angle between the first and second directions may be between 80 and 100 degrees; if the first direction is parallel to the second direction, the angle between the first and second directions may be between 0 and 10 degrees.
[0018] The electronic device disclosed herein can be applied to display devices, light-emitting devices, backlight devices, antenna devices, sensing devices, or splicing devices, or as a temporary substrate for arranging electronic units at specific intervals, but is not limited thereto. The electronic device can be bendable or flexible. The display device can be a non-self-emissive display device or a self-emissive display device. The antenna device can be a liquid crystal antenna device or a non-liquid crystal antenna device. The sensing device can be a sensing device for sensing capacitance, light, heat, or ultrasound, but is not limited thereto. The electronic device may include passive and active electronic components, such as capacitors, resistors, inductors, diodes, transistors, etc. Diodes may include light-emitting diodes or photodiodes. Light-emitting diodes (LEDs) may include, for example, organic light-emitting diodes (OLEDs), mini LEDs, micro LEDs, or quantum dot LEDs, but are not limited thereto. The splicing device may be, for example, a display splicing device or an antenna splicing device, but is not limited thereto. It should be noted that the electronic device may be any arrangement or combination of the aforementioned, but is not limited thereto. Furthermore, the shape of the electronic device may be rectangular, circular, polygonal, with curved edges, or other suitable shapes. The electronic panel may include a display panel, a sensing panel, or an antenna panel, but is not limited thereto.
[0019] FIG1A is a partial top view of the electronic device of the first embodiment of the present disclosure, FIG1B is an enlarged top view of region R1 in FIG1A, FIG1C is an enlarged top view of region R2 in FIG1A, FIG1D is a cross-sectional view of FIG1A along section line A1-A1', and FIG1E is a cross-sectional view of FIG1A along section line A2-A2'.
[0020] Please refer to Figures 1A to 1E simultaneously. The electronic device 10a in this embodiment includes a substrate SB, an electronic panel 100, and a sensor 200. That is, in this embodiment, the electronic device 10a is a display device including a sensing function, but this disclosure is not limited thereto.
[0021] The material of the substrate SB may be, for example, glass, plastic, or a combination thereof. For example, the material of the substrate SB may include quartz, sapphire, silicon (Si), germanium (Ge), silicon carbide (SiC), gallium nitride (GaN), silicon germanium (SiGe), polymethyl methacrylate (PMMA), polycarbonate (PC), polyimide (PI), polyethylene terephthalate (PET), or other suitable materials or combinations thereof, and this disclosure is not limited thereto. In this embodiment, the material of the substrate SB includes glass.
[0022] The electronic panel 100 is disposed, for example, on a substrate SB. In this embodiment, the electronic panel 100 includes a plurality of electronic components EC and a shielding layer BM.
[0023] Multiple electronic components EC are disposed, for example, on a substrate SB. In some embodiments, the multiple electronic components EC may include a wafer, a light-emitting diode, a variable capacitor, a variable resistor, a varactor diode, other suitable electronic components, or combinations thereof, and this disclosure is not limited thereto. In this embodiment, at least one of the multiple electronic components EC includes a light-emitting element. For example, the electronic component EC may include a diode, an organic light-emitting diode (OLED), an inorganic light-emitting diode (LED), such as a mini LED or micro LED, a quantum dot (QD), a quantum dot light-emitting diode (QDLED), fluorescence, phosphorescence, other suitable materials, or combinations thereof, but this disclosure is not limited thereto. In other embodiments, at least one of the multiple electronic components EC may include a communication element. In this embodiment, the electronic component EC is a vertical micro light-emitting diode. In detail, one of the multiple electronic components EC may include, for example, a first semiconductor layer SE1, a second semiconductor layer SE2, and an emitter layer L, but this disclosure is not limited thereto. The first semiconductor layer SE1 and the second semiconductor layer SE2 may each include, for example, an N-type doped semiconductor and a P-type doped semiconductor; or each may include a P-type doped semiconductor and an N-type doped semiconductor. The materials of the first semiconductor layer SE1 and the second semiconductor layer SE2 may include, for example, gallium nitride (GaN), indium gallium nitride (InGaN), gallium arsenide (GaAs), aluminum gallium indium phosphide (AlGaInP), or other materials composed of Group IIIA and Group VA elements, or other suitable materials, and this disclosure is not limited thereto. The emitter layer L may, for example, have quantum wells (QWs), which may be, for example, single quantum wells (SQWs), multiple quantum wells (MQWs), or other quantum wells. Based on this, holes and electrons provided by the first semiconductor layer SE1 and the second semiconductor layer SE2 can combine in the emitter layer L and emit light energy.
[0024] In this embodiment, the plurality of electronic components EC include a first component EC1, a second component EC2, a third component EC3 and a fourth component EC4, which will be described in detail in the following embodiments.
[0025] A shielding layer BM is disposed, for example, on a substrate SB, and is, for example, adjacent to or surrounding a plurality of electronic components EC. The material of the shielding layer BM may include, for example, black resin, black photoresist, metal, or combinations thereof, but this disclosure is not limited thereto. In some embodiments, the shielding layer BM includes a via BM_V, through which the second semiconductor layer SE2 of the electronic component EC is electrically connected to a transistor (not shown) and / or a trace (not shown) disposed on the substrate SB, but this disclosure is not limited thereto. In this embodiment, the shielding layer BM includes a plurality of openings BM_OP. In some embodiments, the openings BM_OP may have a circular, elliptical, or other suitable shape in the top view z direction of the electronic device 10a, and this disclosure is not limited thereto. The plurality of openings BM_OP may be used to define the penetration regions TR of the first component EC1 and the second component EC2, which will be detailed in the following embodiments.
[0026] In some embodiments, the electronic panel 100 may further include a separator layer RL and a filler layer FL.
[0027] The separator layer RL is disposed, for example, on the shielding layer BM, and is disposed, for example, adjacent to or surrounding the electronic component EC. In some embodiments, the material of the separator layer RL includes, for example, a light-absorbing material, a reflective material, a scattering material, or a combination thereof, and this disclosure is not limited thereto. The separator layer RL may, for example, reduce the possibility of light emanating from adjacent electronic components EC interfering with each other and / or may, for example, reduce the problem of light leakage from electronic components EC. In addition, the separator layer RL may also, for example, have a heat dissipation function. In some embodiments, the separator layer RL may include a distributed Bragg reflector (DBR), but this disclosure is not limited thereto. The Bragg reflector includes a plurality of high-refractive-index insulating layers and low-refractive-index insulating layers stacked alternately on top of each other.
[0028] The filler layer FL is disposed, for example, on the shielding layer BM, and is disposed, for example, adjacent to or surrounding the electronic component EC. In some embodiments, the filler layer FL is disposed between the separator layer RL and the electronic component EC, but this disclosure is not limited thereto. The filler layer FL may be used, for example, to fix or protect the electronic component EC. In some embodiments, the filler layer FL may comprise a transparent material. For example, the material of the filler layer FL may comprise epoxy resin, acrylic, other suitable materials, or combinations thereof, but this disclosure is not limited thereto.
[0029] In this embodiment, the electronic panel 100 has a first region 100R1 and a second region 100R2. The first region 100R1 is, for example, the region where the electronic panel 100 and the sensor 200 overlap in the top view z direction of the electronic device 10a, and the second region 100R2 is, for example, the region where the electronic panel 100 and the sensor 200 do not overlap in the top view z direction of the electronic device 10a. In this embodiment, the second region 100R2 surrounds the first region 100R1, but this disclosure is not limited thereto.
[0030] The first region 100R1 of the electronic panel 100 includes, for example, a first element EC1 and a second element EC2. Detailed descriptions of the first element EC1 and the second element EC2 can be found in the electronic element EC of the above embodiment. Briefly, the first element EC1 and the second element EC2 of this embodiment can be the aforementioned vertical micro-light-emitting diodes, which will not be repeated here. In this embodiment, since the first region 100R1 is the region where the electronic panel 100 and the sensor 200 overlap in the top-view direction z of the electronic device 10a, each of the first element EC1 and the second element EC2 has an emission region ER1 and a transmission region TR as shown in FIG. 1B, where FIG. 1B uses the first element EC1 as an example. The emission region ER1 is defined, for example, as the emission area of the first element EC1. In some embodiments, the first element EC1 may have a plurality of first units U1. Therefore, the emission region ER1 may be defined, for example, as the sum of the emission areas of the plurality of first units U1. In some embodiments, the first unit U1 may include light-emitting elements that emit light of the same or different colors, and this disclosure is not limited thereto. Similarly, the second element EC2 may also have, for example, multiple first units U1, which will not be described further here. The definition of the penetration area TR is, for example, an area in the electronic panel 100 that allows the sensing signal to be sensed by the sensor 200 to penetrate, which may be defined, for example, by multiple openings BM_OP of the shielding layer BM.
[0031] In some embodiments, the area of the transmitting region ER1 is smaller than the area of the penetrating region TR, as shown in FIG1B. Further, in some embodiments, the ratio between the area of the penetrating region TR and the area of the first element EC1 is 0.52 to 0.96, but this disclosure is not limited thereto. In other embodiments, the ratio between the area of the penetrating region TR and the area of the first element EC1 is 0.7 to 0.9. In still other embodiments, the ratio between the area of the penetrating region TR and the area of the first element EC1 is 0.7 to 0.84. The area of the first element EC1 is defined, for example, as the area of the first region 100R1 divided by the number of first elements EC1 in the first region 100R1. For example, when the area of the first region 100R1 is A and the number of first elements EC1 in the first region 100R1 is B, the area of the first element EC1 is A / B. In this embodiment, the area of the first element EC1 is the area of region R1 as shown in FIG1B, but this disclosure is not limited thereto. Similarly, the area of the penetration region TR and the area of the second element EC2 can also have the above-mentioned ratio relationship, which will not be repeated here.
[0032] Please refer to Figure 2, which shows a graph showing the relationship between the sensing accuracy of sensor 200 and the ratio between the area of the penetration region TR and the area of the first element EC1. The graph is obtained from the detection results of a large-scale data experiment, where the number of experiments is greater than 100. In this embodiment, by making the ratio between the area of the penetration region TR and the area of the first element EC1 between 0.52 and 0.96, sensor 200 can have a sensing accuracy greater than 90%. Based on this, the electronic device 10a of this embodiment, in addition to having a display function, can also have a relatively good sensing function.
[0033] In this embodiment, the first element EC1 and the second element EC2 are spaced apart by a first distance s1. The first distance s1 is defined, for example, as the shortest distance between the first element EC1 and the second element EC2 in a direction perpendicular to the top view direction z of the electronic device 10a. In detail, referring to FIG1D, the first element EC1 and the second element EC2 are spaced apart by a first distance s1 in the direction x, wherein this first distance s1 is defined as the distance from the first unit U1 of the first element EC1 closest to the second element EC2 to the first unit U1 of the second element EC2 closest to the first element EC1.
[0034] The second region 100R2 of the electronic panel 100 includes, for example, a third element EC3 and a fourth element EC4. In some embodiments, the third element EC3 and the fourth element EC4 may each be the same as or similar to the first element EC1 and / or the second element EC2. That is, the third element EC3 and the fourth element EC4 may be, for example, the vertical micro-light-emitting diodes described above, which will not be repeated here.
[0035] In this embodiment, since the second region 100R2 is the region in which the electronic panel 100 and the sensor 200 do not overlap in the top view z direction of the electronic device 10a, each of the third element EC3 and the fourth element EC4 has an emitting region ER2 and a shielding region BR as shown in FIG. 1C, where FIG. 1C uses the third element EC3 as an example. The emitting region ER2 is defined, for example, as the emitting area of the third element EC3. In some embodiments, the third element EC3 has a plurality of second units U2. Therefore, the emitting region ER2 may be defined, for example, as the sum of the emitting areas of the plurality of second units U2. In some embodiments, the third element EC3 may include light-emitting elements that emit light of the same or different colors, and this disclosure is not limited thereto. Similarly, the fourth element EC4 may also have, for example, a plurality of second units U2, which will not be described further here. The shielding region BR is defined, for example, as components and wiring inside the electronic device 10a that are not intended to be seen by the user in the electronic panel 100, but this disclosure is not limited thereto. In this embodiment, the shielding region BR includes the shielding layer BM described above. The shielding layer BM is, for example, adjacent to or surrounding a plurality of second units U2. In some embodiments, the area of the emitting region ER2 is smaller than the area of the shielding region BR, as shown in FIG1C.
[0036] In this embodiment, the third element EC3 and the fourth element EC4 are spaced apart by a second distance s2. The second distance s2 is defined, for example, as the shortest distance between the third element EC3 and the fourth element EC4 in a direction perpendicular to the top view direction z of the electronic device 10a. Specifically, referring to FIG1E, the third element EC3 and the fourth element EC4 are spaced apart by a second distance s2 in the direction x, wherein this second distance s2 is defined as the distance from the second unit U2 of the third element EC3 closest to the fourth element EC4 to the second unit U2 of the fourth element EC4 closest to the third element EC3. In this embodiment, the ratio between the second distance s2 and the first distance s1 is 0.76 to 1.24. By making the ratio between the second distance s2 and the first distance s1 have the above-mentioned ratio range, the electronic device 10a of this embodiment can make the display screen of the first area 100R1 and the second area 100R2 more consistent when displaying in full screen.
[0037] In this embodiment, the distance d1 between two adjacent first units U1 is smaller than the distance d2 between two adjacent second units U2. Specifically, please refer to FIG1F, which is an enlarged top view of region R3 in FIG1A. FIG1F illustrates that the distance d1 between two adjacent first units U1 in the first element EC1 is smaller than the distance d2 between two adjacent second units U2 in the third element EC3. Furthermore, in this embodiment, the size of the first unit U1 is smaller than the size of the second unit U2. Through the above design, the first element EC1 and the second element EC2 in the first region 100R1 can each include a relatively small emission area ER1, so that the first element EC1 and the second element EC2 can each have a relatively large penetration area TR, thereby enabling the electronic device 10a to have relatively good sensing capabilities.
[0038] Please continue to refer to FIG1F, which also shows the pitch p1 between adjacent first element EC1 and second element EC2 and the pitch p2 between adjacent third element EC3 and fourth element EC4. The pitch p1 can be defined, for example, as the distance between adjacent first element EC1 and second element EC2 in the same relative position, and the pitch p2 can be defined, for example, as the distance between adjacent third element EC3 and fourth element EC4 in the same relative position. In this embodiment, the pitch p1 and pitch p2 can be equal to each other because the size of the first unit U1 is proportionally reduced to the distance d1 between two adjacent first units U1, but this disclosure is not limited thereto. In addition, it is worth noting that the pitch p1 can be, for example, the size of the first element EC1 and / or the second element EC2 in the direction perpendicular to the top view direction z of the electronic device 10a, and the pitch p2 can be, for example, the size of the third element EC3 and / or the fourth element EC4 in the direction perpendicular to the top view direction z of the electronic device 10a. In this embodiment, pitch p1 is the length of the first element EC1 and the second element EC2 in the x-direction and / or the width in the y-direction, and pitch p2 is the length of the third element EC3 and the fourth element EC4 in the x-direction and / or the width in the y-direction, but this disclosure is not limited thereto. Additionally, in this embodiment, pitch p12 is the distance between the second element EC2 and the third element EC3 in the x-direction, which may also be equal to pitch p1 and pitch p2, but this disclosure is not limited thereto.
[0039] The sensor 200 overlaps, for example, with a first region 100R1 of the electronic panel 100. Referring to FIG1D, in this embodiment, the sensor 200 overlaps with the first region 100R1 of the electronic panel 100 in the top view z direction of the electronic device 10a. The sensor 200 is configured, for example, to receive a sensing signal through a penetration region TR of the first region 100R1, wherein the definition of the penetration region TR can be referred to in the above embodiment and will not be repeated here. In some embodiments, the sensor 200 includes a light sensor, which can be used to sense visible or non-visible light. In this embodiment, the sensor 200 is disposed on the surface of the substrate SB away from the electronic component EC, but this disclosure is not limited thereto. The sensor 200 may include, for example, a visible light sensor, a near-infrared light sensor, an infrared light sensor, a Li-Fi (light fidelity) receiver, or other suitable sensors, and this disclosure is not limited thereto.
[0040] FIG3A is a partial top view of the electronic device according to the second embodiment of the present disclosure, FIG3B is a cross-sectional view of an embodiment in FIG3A along section line B-B', FIG3C is a cross-sectional view of another embodiment in FIG3A along section line B-B', and FIG3D is a partial top view of the insulating layer facing the substrate in FIG3A. It should be noted that the embodiments of FIG3A and FIG3B (FIG3C) can each use the component reference numerals and some contents of the embodiments of FIG1A and FIG1D, wherein the same or similar reference numerals are used to represent the same or similar components, and the description of the same technical content is omitted.
[0041] Please refer to Figures 3A and 3B at the same time. The main difference between the electronic device 10b in this embodiment and the electronic device 10a described above is that the electronic device 10b also includes a signal source SS.
[0042] In detail, in this embodiment, the second region 100R2 of the electronic panel 100 further includes a signal source SS. The signal source SS is configured, for example, to provide a sensing signal, wherein the peak wavelength of this sensing signal is, for example, 700 nm to 1400 nm. For example, the signal source SS may include a near-infrared light emitter (NIR emitter). In detail, the signal source SS may include a first semiconductor layer SE1', a second semiconductor layer SE2', and an emitting layer L'. The emitting layer L' may, for example, include a material suitable for emitting near-infrared light having a peak wavelength of 700 nm to 1400 nm, but this disclosure is not limited thereto. The first semiconductor layer SE1' and the second semiconductor layer SE2' can each refer to the description of the first semiconductor layer SE1 and the second semiconductor layer SE2 in the above embodiments, and will not be repeated here.
[0043] It is worth noting that although FIG. 3A shows the signal source SS arranged in an array in the display area of the electronic device 10b, this disclosure is not limited thereto. In other embodiments, the signal source SS may be arranged in the peripheral area of the electronic device 10b and / or attached to the periphery of the electronic device 10b.
[0044] In this embodiment, the electronic device 10b further includes an insulating layer PV, a common electrode CE, and a collimation structure AS.
[0045] An insulating layer PV is disposed, for example, between the shielding layer BM and the substrate SB. In this embodiment, the insulating layer PV is disposed in the first region 100R1 and the second region 100R2 of the electronic panel 100, and is filled in a plurality of openings BM_OP of the shielding layer BM. The insulating layer PV may, for example, include a suitable insulating material to reduce the possibility that the sensing signal received by the sensor 200 will be blocked. In this embodiment, the insulating layer PV includes a plurality of through holes PV_V, wherein one of the plurality of through holes PV_V is in communication with a corresponding through hole BM_V of the shielding layer BM.
[0046] Referring to FIG3C, in some embodiments, a heat dissipation layer HD may be further provided on the sidewall of at least one of the plurality of openings BM_OP of the shielding layer BM to reduce the heat generated by the electronic component EC. The heat dissipation layer HD may be electrically connected, for example, to the common electrode CE. Additionally, referring to FIG3D, the heat dissipation layer HD may have an annular shape, for example, in the top view z direction of the electronic device 10b, but this disclosure is not limited thereto. In other embodiments, an optical layer (not shown) may be provided on the sidewall of at least one of the plurality of openings BM_OP of the shielding layer BM, which may have the function of absorbing and / or reflecting light, but this disclosure is not limited thereto.
[0047] A plurality of first pads PAD1 are disposed, for example, on the surface of the insulating layer PV near the substrate SB. The first pads PAD1 may, for example, comprise a suitable conductive material, and this disclosure is not limited thereto. In some embodiments, each of the plurality of first pads PAD1 may be electrically connected to an electronic component EC or a signal source SS through a via BM_V of a corresponding shielding layer BM and a via PV_V communicating therewith, but this disclosure is not limited thereto.
[0048] Please refer to Figure 3E, which shows the arrangement of the plurality of first pads PAD1. In this embodiment, the plurality of first pads PAD1 do not overlap with the penetration area TR in the top view z direction of the electronic device 10b. This design reduces the possibility that the sensing signal received by the sensor 200 will be affected by the plurality of first pads PAD1. In addition, in this embodiment, the traces CL electrically connected to the corresponding first pads PAD1 also do not overlap with the penetration area TR in the top view z direction of the electronic device 10b, so as to reduce the possibility that the sensing signal received by the sensor 200 will be affected.
[0049] The common electrode CE is disposed, for example, on the surface of the insulating layer PV away from the substrate SB, and may at least partially overlap with the electronic component EC and the signal source SS in the top view z direction of the electronic device 10b. In this embodiment, the common electrode CE is electrically connected to the second semiconductor layer SE2 of the electronic component EC and the second semiconductor layer SE2' of the signal source SS, and can be electrically connected to the first pad PAD1 through the aforementioned vias BM_V and PV_V.
[0050] The collimation structure AS is disposed, for example, on the common electrode CE. In this embodiment, the collimation structure AS includes collimation structure AS1 and collimation structure AS2, wherein collimation structure AS1 and signal source SS at least partially overlap in the top view z direction of electronic device 10b, and collimation structure AS2 and penetration region TR at least partially overlap in the top view z direction of electronic device 10b. In some embodiments, the collimation structure AS includes a microlens. For example, the collimation structure AS may be a biconvex lens, a plano-convex lens, or a concave-convex lens, but this disclosure is not limited thereto. With the collimation structure AS disposed, the signal emitted by signal source SS can be formed into an array optical signal via collimation structure AS1 and reach the sensing object, and the sensor 200 can receive the collimated optical signal via collimation structure AS2, which can effectively suppress crosstalk or background noise (unintended sensing signals) from non-corresponding regions, thereby further increasing the signal-to-noise ratio (SNR).
[0051] It is worth noting that in this embodiment, the first unit U1 has a relatively small size (e.g., less than 10 micrometers). Therefore, although the first unit U1 and the penetration area TR at least partially overlap in the top view direction z of the electronic device 10b, its relatively small size can reduce the possibility of affecting the signal sensed by the sensor 200.
[0052] In some embodiments, a protective layer PL may be provided to encapsulate the sensor 200 to protect the sensor 200, but this disclosure is not limited thereto.
[0053] FIG4 is a partial cross-sectional schematic diagram of the electronic device according to the third embodiment of the present disclosure. It should be noted that the embodiment of FIG4 may use the component reference numerals and some contents of the embodiments of FIG3B and FIG3C, wherein the same or similar reference numerals are used to represent the same or similar components, and the description of the same technical content is omitted.
[0054] Referring to FIG4, the main difference between the electronic device 10c of this embodiment and the electronic device 10b described above is that the electronic device 10c further includes a circuit board 300a.
[0055] In this embodiment, the circuit board 300a is disposed on the surface of the substrate SB facing the insulating layer PV, and includes a driver DR, a capsule layer EL, and a second pad PAD2.
[0056] The driver DR may include, for example, a micro integrated circuit chip (micro IC). For example, the driver DR may include suitable semiconductor chips such as application-specific integrated circuit chips, analog chips, digital chips, voltage regulator chips, sensor chips, and / or memory chips, but this disclosure is not limited thereto. In some embodiments, the driver DR may include integrated circuits fabricated using silicon wafers as a substrate; or it may include integrated circuits (glass ICs) fabricated using glass as a substrate, but this disclosure is not limited thereto. In some embodiments, a chip adhesive film (not shown) may be formed between the driver DR and the surface of the substrate SB facing the insulating layer PV to allow the driver DR to adhere to the substrate SB. The material of the chip adhesive film may include, for example, organic materials, inorganic materials, or other suitable adhesive materials, but this disclosure is not limited thereto. In this embodiment, the driver DR is configured face-up. In other words, in some embodiments, a bonding pad (not shown) may be provided on the surface of the driver DR away from the substrate SB, but this disclosure is not limited thereto.
[0057] In this embodiment, the driver DR does not overlap with the penetration area TR in the top view z direction of the electronic device 10c, so as to reduce the possibility of affecting the signal sensed by the sensor 200.
[0058] The encapsulation layer EL is disposed, for example, on the driver DR. In this embodiment, the encapsulation layer EL is disposed around the driver DR and includes an interconnect structure IS, wherein the driver DR is electrically connected to the interconnect structure IS. The material of the encapsulation layer EL may be, for example, an organic material or other suitable material. In this embodiment, the material of the encapsulation layer EL may be epoxy resin, but this disclosure is not limited thereto.
[0059] The second pad PAD2 is disposed, for example, on the encapsulation layer EL, and is electrically connected to the driver DR, for example, through the interconnect structure IS in the encapsulation layer EL. The material of the second pad PAD2 may be the same as or similar to the material of the first pad PAD1 in the above embodiment, and will not be described again here.
[0060] In this embodiment, the first pad PAD1 and the second pad PAD2 are joined. In detail, the first pad PAD1 and the second pad PAD2 can be electrically connected to each other through a redistribution layer (not shown) disposed therebetween, which will be described in detail in the following embodiments.
[0061] FIG5 is a partial cross-sectional schematic diagram of the electronic device according to the fourth embodiment of the present disclosure. It should be noted that the embodiment of FIG5 may use the component reference numerals and some contents of the embodiment of FIG4, wherein the same or similar reference numerals are used to represent the same or similar components, and the description of the same technical content is omitted.
[0062] Referring to FIG5, the main difference between the electronic device 10d in this embodiment and the electronic device 10c described above is that the electronic device 10d further includes a redistribution layer 400a and a sensor 210.
[0063] The redistribution layer 400a is disposed, for example, between the electronic panel 100 and the circuit board 300a. In this embodiment, the redistribution layer 400a includes a connection structure CS1, a plurality of third pads PAD3 and a plurality of fourth pads PAD4.
[0064] The connection structure CS1 can, for example, serve as a wiring layer of the electronic device 10d to provide the required conductive transmission path. For example, as shown in FIG5, the connection structure CS1 may include an insulating layer IL1, a conductive layer M1, an insulating layer IL2, a conductive layer M2, an insulating layer IL3, and a conductive layer M3. Each of the insulating layers IL1, IL2, and IL3 has a plurality of vias, and the corresponding vias of the insulating layers IL1 and IL2, and the corresponding vias of the insulating layers IL2 and IL3, at least partially overlap and communicate with each other. The conductive layers M1, M2, and M3 are each filled in the plurality of vias of the insulating layers IL1, IL2, and IL3, and are electrically connected to each other through the aforementioned communicating vias to form a conductive transmission path, but this disclosure is not limited thereto.
[0065] A plurality of third pads PAD3 are disposed, for example, on the surface of the insulating layer IL1 near the electronic panel 100, and are electrically connected, for example, to the conductive layer M1. The material of the third pads PAD3 may be the same as or similar to the material of the first pads PAD1, for example, and will not be described further here. In this embodiment, the third pads PAD3 are electrically connected to the first pads PAD1. In detail, the third pads PAD3 and the first pads PAD1 may be electrically connected to each other through an interconnect structure (not shown) or a conductive adhesive layer (not shown) disposed therebetween.
[0066] A plurality of fourth pads PAD4 are disposed, for example, on the surface of the insulating layer IL3 near the sensor 200, and are electrically connected, for example, to the conductive layer M3. The material of the fourth pads PAD4 may be the same as or similar to the material of the first pads PAD1, and will not be described further here. In this embodiment, the fourth pads PAD4 are electrically connected to the second pads PAD2. Specifically, the fourth pads PAD4 and the second pads PAD2 may be electrically connected to each other through an interconnect structure (not shown) or a conductive adhesive layer (not shown) disposed therebetween.
[0067] Based on the above, in this embodiment, the corresponding third pad PAD3 can be electrically connected to the corresponding fourth pad PAD4 through the connection structure CS1.
[0068] In this embodiment, the center C3 of the third pad PAD3 and the center C4 of the fourth pad PAD4 are offset in the horizontal direction. Specifically, referring to the partial cross-sectional view shown in FIG5, since the third pad PAD3 is correspondingly arranged with the first pad PAD1, and the fourth pad PAD4 is correspondingly arranged with the second pad PAD2, the center C3 of the third pad PAD3 and the center C4 of the fourth pad PAD4 are each offset in the x-direction due to the arrangement of the first pad PAD1 and the second pad PAD2.
[0069] Sensor 210 is disposed, for example, on the surface of substrate SB away from electronic component EC, and is adjacent to sensor 200, for example. In this embodiment, the transmission direction of the signal sensed by sensor 210 is opposite to the transmission direction of the signal sensed by sensor 220. Therefore, sensor 210 may overlap with the second region 100R2 of electronic panel 100 in the top view z direction of electronic device 10d, but this disclosure is not limited thereto. In this embodiment, sensor 210 is a sensor using photoplethysmography (PPG). By setting sensor 210, electronic device 10d can be used, for example, to detect blood oxygen saturation in the human body. For example, the human heart causes blood vessels to contract and expand with each beat, both of which affect the reflection and / or scattering of light by blood vessels. Based on this, when the signal source (signal source SS in the above embodiment) emits near-infrared light to the human body, the sensor 210 can be used to receive the near-infrared light reflected and / or scattered by the blood vessels of the human body. By using a processing circuit (not shown) to read the electrical signals (e.g., electrons and / or holes) generated by the sensor 210 and calculate, the blood oxygen saturation in the human body can be determined. However, this disclosure is not limited thereto. In other embodiments, the electronic device 10d can be applied to biometric systems for fingerprints, irises, retina, or other human organs.
[0070] FIG6 is a partial cross-sectional schematic diagram of the electronic device according to the fifth embodiment of the present disclosure. It should be noted that the embodiment of FIG6 may use the component reference numerals and some contents of the embodiment of FIG5, wherein the same or similar reference numerals are used to represent the same or similar components, and the description of the same technical content is omitted.
[0071] Referring to FIG6, the main difference between the electronic device 10e in this embodiment and the electronic device 10d described above is that the architecture of the redistribution layer 400b in the electronic device 10e is different from that of the redistribution layer 400a.
[0072] In detail, the redistribution layer 400b includes, for example, a connection structure CS2, a plurality of third pads PAD3 and a plurality of fourth pads PAD4, wherein the description of the third pads PAD3 and the fourth pads PAD4 can be referred to the above embodiments and will not be repeated here.
[0073] In this embodiment, the sensor 200 corresponds to an insulating layer in the connection structure CS2 in the top view z direction of the electronic device 10e. Specifically, the insulating layers IL1', IL2', and IL3' of the connection structure CS2 may have the structure shown in FIG6, wherein each of the insulating layers IL2' and IL3' has an opening corresponding to the sensor 200 in the top view z direction of the electronic device 10e, and the insulating layer IL1' is filled into this opening. Based on this, the possibility of the insulating layers IL1', IL2', and IL3' having different refractive indices affecting the signal received by the sensor 200 can be reduced.
[0074] In addition, in this embodiment, a transparent conductive layer TL may be provided on the surface of the insulating layer IL1' near the electronic panel 100. The transparent conductive layer TL is disposed corresponding to the penetration area TR in the top view z direction of the electronic device 10e and is electrically connected to the corresponding third pad PAD3. The transparent conductive layer TL can, for example, further provide the conductive transmission path required by the electronic device 10e and can reduce the possibility of affecting the signal received by the sensor 200.
[0075] FIG7 is a partial cross-sectional schematic diagram of a circuit board in an electronic device according to an embodiment of the present disclosure. It should be noted that the embodiment of FIG7 may use the component reference numerals and some contents of the embodiment of FIG4, wherein the same or similar reference numerals are used to represent the same or similar components, and the description of the same technical content is omitted.
[0076] Referring to FIG7, the circuit board 300b of this embodiment shows that the types of drivers DR may include driver DR1 and / or driver DR3, and shows the setting relationship between driver DR1 and temperature sensor DR2.
[0077] The driver DR1 may include, for example, a driving element for controlling the operation of the electronic component EC in the above embodiments, and the temperature sensor DR2 may include, for example, a driving element for sensing the temperature of the electronic component EC in the above embodiments during operation. In some embodiments, the temperature sensor DR2 may include a thermal diode, but this disclosure is not limited thereto.
[0078] In some embodiments, the temperature sensor DR2 may be transferred together with the driver DR1 to the same surface of the substrate SB, wherein the temperature sensor DR2 is disposed between adjacent drivers DR1 for being driven thereto, but this disclosure is not limited thereto. The density of the temperature sensor DR2 on the substrate SB may, for example, be different from the density of the driver DR1 on the substrate SB, but this disclosure is not limited thereto. In other embodiments, the temperature sensor DR2 may be integrated with the driver DR1 via an interposer INT using a panel-level package to form a driver DR3, but this disclosure is not limited thereto. The interposer INT may be, for example, a silicon interposer, a glass interposer, or an organic interposer. For example, a plurality of microbump structures (not shown) may be provided on the surface of the interposer 200 facing the temperature sensor DR2 to allow the temperature sensor DR2 to be bonded to the interposer INT. Although not shown in FIG7, in yet another embodiment, the temperature sensor DR2 may be disposed in an array on a carrier (not shown), wherein this carrier may be attached to the surface of the substrate SB away from the driver DR1.
[0079] In this embodiment, by setting the temperature sensor DR2, the temperature sensor DR2 can detect the temperature information of each area of the electronic device 10c, and can transmit this information to the driver DR1 so that the driver DR1 can correspondingly provide voltage control to the electronic components EC in each area.
[0080] FIG8 is a partial cross-sectional schematic diagram of the electronic device according to the sixth embodiment of the present disclosure. It should be noted that the embodiment of FIG8 may use the component reference numerals and some contents of the embodiment of FIG5, wherein the same or similar reference numerals are used to represent the same or similar components, and the description of the same technical content is omitted.
[0081] Referring to FIG8, the main difference between the electronic device 10f in this embodiment and the electronic device 10d described above is that the sensor 200 and the plurality of drivers DR in the electronic device 10f are disposed on the same surface of the substrate SB.
[0082] In detail, the sensor 200 may be transferred, for example, together with a plurality of drivers DR to a surface of the substrate SB near the electronic panel 100. In this embodiment, the encapsulation layer EL may surround the sensor 200 and the plurality of drivers DR.
[0083] In this embodiment, since the driver DR and the sensor 200 are disposed together on the surface of the substrate SB near the electronic panel 100, the driver DR and the sensor 200 are arranged facing upwards. The driver DR can be electrically connected to the conductive layer M3 of the connection structure CS1 through the bonding pad, but this disclosure is not limited thereto.
[0084] In this embodiment, the redistribution layer 400a can be bonded to the electronic panel 100 via the adhesive layer AL. The adhesive layer AL may, for example, comprise a conductive material. For instance, the adhesive layer AL may comprise anisotropic conductive film (ACF) or other suitable materials, and this disclosure is not limited thereto.
[0085] FIG9A is a partial cross-sectional schematic diagram of the electronic device according to the seventh embodiment of the present disclosure. It should be noted that the embodiment of FIG9A may use the component reference numerals and some contents of the embodiment of FIG8, wherein the same or similar reference numerals are used to represent the same or similar components, and the description of the same technical content is omitted.
[0086] Referring to FIG9A, the main difference between the electronic device 10g of this embodiment and the electronic device 10f described above is that the architecture of the circuit board 500 in the electronic device 10g is different from the overall architecture composed of the circuit board 300a, the redistribution layer 400a and the board SB.
[0087] In this embodiment, the circuit board 500 includes a base layer 510, a first circuit layer 520 and a second circuit layer 530.
[0088] The substrate layer 510, for example, has a through-hole 510_V, wherein the through-hole 510_V penetrates a first side 510S1 and a second side 510S2 of the substrate layer 510, and the first side 510S1 is closer to the electronic panel 100 than the second side 510S2. The material of the substrate layer 510 can be described, for example, with reference to the substrate SB of the above embodiment, and will not be repeated here. In this embodiment, the material of the substrate layer 510 is glass. Based on this, the through-hole 510_V of the substrate layer 510 can be, for example, a through-glass via (TGV). In other embodiments, the material of the substrate layer 510 includes polymethyl methacrylate (PMMA), polycarbonate (PC), polyimide (PI), polyethylene terephthalate (PET), or other suitable materials or combinations thereof.
[0089] It is worth noting that, in this embodiment, the density of vias 510_V overlapping with the first region 100R1 in the top view z direction of the electronic device 10g can be less than the density of vias 510_V overlapping with the second region 100R2 in the top view z direction of the electronic device 10g. This design reduces the possibility that the sensing signal received by the sensor 200 will be affected by the vias 510_V.
[0090] It is worth noting that the second region 100R2 is considered as the display area in the electronic device 10g, and the first region 100R1 is considered as the area in the electronic device 10g that can be used for both sensing and display, but this disclosure is not limited thereto.
[0091] In some embodiments, a crack sensor may be further disposed on the first side 510S1 of the substrate 510. The crack sensor may be disposed, for example, in the edge region of the substrate 510 and / or in the region where the density of the vias 510_V in the substrate 510 changes (e.g., at the junction of the first region 100R1 and the second region 100R2), because cracks are more likely to occur in the aforementioned regions.
[0092] The first circuit layer 520 is disposed, for example, on the first side 510S1 of the substrate layer 510. In this embodiment, the first circuit layer 520 includes an insulating layer IL1, a conductive layer M1, an insulating layer IL2, a conductive layer M2, an insulating layer IL3, and a conductive layer M3. The conductive layers M1 to M3 are electrically connected to each other to form a conductive transmission path, as described in the above embodiment regarding the connection structure CS1, and will not be repeated here. The first circuit layer 520 is electrically connected to the third pad PAD3, for example, through the conductive layer M1.
[0093] The second circuit layer 530 is disposed, for example, on the second side 510S2 of the base layer 510. In this embodiment, the second circuit layer 530 includes an insulating layer IL4, a conductive layer M4, an insulating layer IL5, a conductive layer M5, an insulating layer IL6, and a conductive layer M6. The conductive layers M4 to M6 are electrically connected to each other to form a conductive transmission path, as described in the above embodiment regarding the connection structure CS1, and will not be repeated here. The conductive layer M6 in the second circuit layer 530 may be, for example, a heat dissipation pad, but this disclosure is not limited thereto.
[0094] In some embodiments, the conductive layer M6 in the second circuit layer 530 is electrically connected to the conductive terminal CT, thereby enabling electrical connection to an external electronic component (not shown). The conductive terminal CT may be, for example, a solder ball as shown in FIG. 9A, but this disclosure is not limited thereto. In this embodiment, the first circuit layer 520 and the second circuit layer 530 are electrically connected through a via 510_V in the base layer 510. Specifically, the conductive layer M3 in the first circuit layer 520 is electrically connected, for example, to the via EL_V of the encapsulation layer EL, and the conductive layer M4 in the second circuit layer 530 is electrically connected, for example, to the via 510_V of the base layer 510. Since the corresponding via EL_V of the encapsulation layer EL and the corresponding via 510_V of the base layer 510 at least partially overlap and are electrically connected to each other, the first circuit layer 520 and the second circuit layer 530 can be electrically connected to each other.
[0095] In addition, in this embodiment, the circuit board 500 is electrically connected to the electronic panel 100 through the third pad PAD3.
[0096] In this embodiment, the electronic device 10g further includes a driver DR and a sensor 200. The driver DR is disposed on the circuit board 500, for example, and may be configured to drive a first element EC1, a second element EC2, a third element EC3, and a fourth element EC4. For example, the driver DR may provide signals to the first element EC1, the second element EC2, the third element EC3, and / or the fourth element EC4 to cause them to emit light or electromagnetic waves, but this disclosure is not limited thereto. The sensor 200 is disposed on the circuit board 500, for example, and may include a sensor 200a and a sensor 200b. The sensor 200a and the sensor 200b may have the same or different functions and may be configured to receive the same or different sensing signals, for example. In this embodiment, the driver DR and the sensor 200 are disposed together on the first side 510S1 of the substrate layer 510. That is, the driver DR and the sensor 200 are configured with their faces facing upwards, and each can be electrically connected to the conductive layer M3 of the first circuit layer 520 via bonding pads, but this disclosure is not limited thereto.
[0097] FIG9B is a partial cross-sectional schematic diagram of the electronic device according to the eighth embodiment of the present disclosure. It should be noted that the embodiment of FIG9B may use the component reference numerals and some contents of the embodiment of FIG9A, wherein the same or similar reference numerals are used to represent the same or similar components, and the description of the same technical content is omitted.
[0098] Referring to FIG9B, the main difference between the electronic device 10h in this embodiment and the electronic device 10g described above is that the driver DR and the sensor 200 in the electronic device 10h are disposed together on the second side 510S2 of the substrate layer 510.
[0099] In detail, the driver DR and the sensor 200 are disposed on the insulating layer IL6 of the second circuit layer 530, and each can be electrically connected to the conductive layer M6 of the second circuit layer 530 through bonding pads CP1, CP2 and CP3, but this disclosure is not limited thereto.
[0100] Additionally, in this embodiment, the substrate layer 510 further includes a via 510_V'. The via 510_V' overlaps, for example, with the penetration region TR in the first region 100R1 in the top view z direction of the electronic device 10h. In this embodiment, the material in the via 510_V' is the same as or similar to the material of the insulating layer PV. This design reduces the possibility that the sensing signal received by the sensor 200 will be affected by the substrate layer 510, which has a different refractive index.
[0101] It is worth noting that, although not shown in FIG9B, in other embodiments, the via 510_V' may comprise two materials. Specifically, the material of the inner layer of the via 510_V' is, for example, the same as or similar to the material of the insulating layer PV, and the material of the outer layer of the via 510_V' is, for example, the same as or similar to the material of the via 510_V. This design can further improve the collimation of the sensing signal received by the sensor 200.
[0102] FIG9C is a partial cross-sectional schematic diagram of the electronic device according to the ninth embodiment of the present disclosure. It should be noted that the embodiment of FIG9C may use the component reference numerals and some contents of the embodiment of FIG9B, wherein the same or similar reference numerals are used to represent the same or similar components, and the description of the same technical content is omitted.
[0103] Refer to FIG9B. The main difference between the electronic device 10i in this embodiment and the electronic device 10h described above is that the driver DR and the sensor 200 in the electronic device 10i are disposed together on the second side 510S2 of the substrate layer 510.
[0104] The side wiring layer 540 is disposed, for example, on the third side 510S3 and the fourth side 510S4 of the substrate layer 510, wherein the third side 510S3 and the fourth side 510S4 of the substrate layer 510 are respectively connected to the first side 510S1 and the second side 510S2. In this embodiment, the side wiring layer 540 is electrically connected to the first wiring layer 520 and the second wiring layer 530 through the second pad PAD2 and the fourth pad PAD4, which can provide additional circuit transmission paths. Furthermore, in some embodiments, the side wiring layer 540 may extend from the third side 510S3 and / or the fourth side 510S4 of the substrate layer 510 to the side surface of the first wiring layer 520 and / or the second wiring layer 530 to be electrically connected to the corresponding conductors in the first wiring layer 520 and / or the second wiring layer 530.
[0105] A protective layer 550 is disposed, for example, on the third side 510S3 and the fourth side 510S4 of the base layer 510, and for example, covers the side circuit layer 540. In some embodiments, the material of the protective layer 550 may include acrylic resin, polyurethane resin, synthetic rubber resin, or silicone resin. The protective layer 550 may, for example, have relatively high hardness and / or strength to provide scratch resistance, thereby protecting the side circuit layer 540.
[0106] The encapsulation layer 560 is disposed, for example, on the electronic panel 100. In this embodiment, the encapsulation layer 560 covers the electronic panel 100. The encapsulation layer 560 may be used, for example, to protect the electronic components EC in the electronic panel 100. In this embodiment, the encapsulation layer 560 may be further disposed between the electronic panel 100 and the first circuit layer 520 to protect the first pad PAD1 and the third pad PAD3. In some embodiments, the encapsulation layer 560 may further extend to the side surface of the first circuit layer 520. The material of the encapsulation layer 560 may be, for example, an inorganic material (e.g., silicon oxide, silicon nitride, silicon oxynitride, or a stack of at least two of the above materials), an organic material (e.g., polytetrafluoroethylene, polyimide, poly(p-xylene), benzocyclobutene, or other suitable materials), or a combination thereof, but this disclosure is not limited thereto.
[0107] FIG9D is a partial cross-sectional schematic diagram of the electronic device according to the tenth embodiment of the present disclosure. It should be noted that the embodiment of FIG9D may use the component reference numerals and some contents of the embodiment of FIG9A, wherein the same or similar reference numerals are used to represent the same or similar components, and the description of the same technical content is omitted.
[0108] Refer to FIG9D. The main difference between the electronic device 10j in this embodiment and the electronic device 10g described above is that: (1) the electronic panel 100' in the electronic device 10j includes a plurality of communication elements 600; (2) the driver DR and the sensor 200 are embedded in the substrate layer 510.
[0109] The communication element 600 may be applicable, for example, to the fields of communications, radar / light-based systems, Reconfigurable Intelligent Surface (RIS) technology, or other suitable fields / technologies, and this disclosure is not limited thereto. In some embodiments, the communication element 600 may include a variable capacitor, a variable resistor, a varactor diode, a phase shifter, an amplifier, an antenna, a biometric sensor, a graphene sensor, other suitable tuning elements, or combinations thereof. The communication element 600 may, for example, have functions to increase the operable bandwidth, but this disclosure is not limited thereto.
[0110] In this embodiment, the communication element 600 includes a communication element 600a and a communication element 600b. The communication element 600a overlaps with the first region 100R1 in the top view z direction of the electronic device 10j, for example, and the communication element 600b does not overlap with the first region 100R1 in the top view z direction of the electronic device 10j, for example. In this embodiment, the size of the communication element 600a is smaller than the size of the communication element 600b and / or the density of the communication element 600a is smaller than the density of the communication element 600b. This design reduces the possibility that the sensing signal received by the sensor 200 will be affected by the communication element 600a.
[0111] In this embodiment, the substrate 510 has a first groove 512 and a second groove 514, and the sensor 200 and the driver DR are respectively disposed in the first groove 512 and the second groove 514. In some embodiments, the driver DR and the sensor 200 may be embedded together in the first side 510S1 of the substrate 510, but this disclosure is not limited thereto. In other embodiments, the driver DR may be embedded in the first side 510S1 of the substrate 510, and the sensor 200 may be embedded in the second side 510S2 of the substrate 510, in which case the sensor 200 is configured in a face-down manner, but this disclosure is not limited thereto.
[0112] In some embodiments, at least some of the communication elements 600b disposed in the second region 100R2 may also be replaced with flip-chip light-emitting diodes, which enable the second region 100R2 to have both light-emitting and communication functions.
[0113] FIG9E is a partial top view of the electronic device according to FIG9B. It should be noted that the embodiment of FIG9E may use the component reference numerals and some contents of the embodiment of FIG9B, wherein the same or similar reference numerals are used to represent the same or similar components, and the description of the same technical content is omitted.
[0114] Referring to FIG9E, the electronic device 10h may further include a communication element 600'. In this embodiment, the communication element 600' is a near field communication (NFC) antenna, but this disclosure is not limited thereto.
[0115] The communication element 600' may, for example, be disposed between the electronic panel 100 and the first circuit layer 520. In this embodiment, the trace CL in the communication element 600' belongs to the same layer as the cathode traces of the first unit U1 and the second unit U2 in the electronic panel 100. The communication element 600' can be electrically connected to the common electrode CE through the through-hole BM_V of the shielding layer BM.
[0116] Figures 10A, 10B, and 10C are each enlarged top views of some embodiments of region R4 in Figure 9C. It should be noted that the embodiments of Figures 10A, 10B, and 10C may use the component reference numerals and some content of the embodiments of Figure 9C, wherein the same or similar reference numerals are used to represent the same or similar components, and the description of the same technical content is omitted.
[0117] Referring to FIG10A, the electronic device 10i may include a filter structure FS. The filter structure FS is disposed on the substrate layer 510, for example. In some embodiments, the filter structure FS is disposed on a first side 510S1 of the substrate layer 510, but this disclosure is not limited thereto. In this embodiment, the filter structure FS and the transmission region TR at least partially overlap in the top view z direction of the electronic device 10i. Based on this, the sensor 200 can receive the optical signal to be sensed via the filter structure FS, thereby further increasing the signal-to-noise ratio of the optical signal.
[0118] Referring to FIG10B, the electronic device 10i may include a beam splitter BS. The beam splitter BS is disposed, for example, on the substrate layer 510. In some embodiments, the beam splitter BS is disposed on a first side 510S1 of the substrate layer 510, but this disclosure is not limited thereto. The material of the beam splitter BS may include, for example, a metallic material or a dielectric material. For example, the material of the beam splitter BS may include aluminum, tin, copper, silver, silicon nitride, or aluminum nitride. In this embodiment, the beam splitter BS and the penetration region TR at least partially overlap in the top view direction z of the electronic device 10i. Based on this, the beam splitter BS can split the optical signal to facilitate the subsequent sensing of the optical signal by the sensor 200.
[0119] Referring to FIG10C, the electronic device 10i may include a lens structure LS. The lens structure LS is disposed on the substrate layer 510, for example. In some embodiments, the lens structure LS is disposed on a first side 510S1 of the substrate layer 510, but this disclosure is not limited thereto. The lens structure LS may be formed, for example, by performing an atomic layer deposition (ALD) process, a physical vapor deposition (PVD) process, or a chemical vapor deposition (CVD) process, but this disclosure is not limited thereto. The material of the lens structure LS may include, for example, a metallic material or a dielectric material. For example, the material of the lens structure LS may include titanium dioxide, aluminum oxide, hafnium oxide, zinc oxide, or silicon nitride. In this embodiment, the lens structure LS and the transmission region TR at least partially overlap in the top view direction z of the electronic device 10i. Based on this, by setting the lens structure LS, the sensor 200 can receive collimated light signals via the lens structure LS, which can effectively suppress crosstalk or background noise from signals from non-corresponding regions, thereby further increasing the signal-to-noise ratio.
[0120] In summary, the electronic device provided in some embodiments of this disclosure includes a first region and a second region, wherein the first region overlapping with the sensor is provided with a transmitting region and a transmitting region. By limiting the proportion of the transmitting region in the first region to obtain a relatively good sensing accuracy, the electronic device provided in some embodiments of this disclosure can have relatively good sensing functionality in full-screen display. Furthermore, by making the first unit in the first region have a relatively small size and / or making the distance between adjacent first units relatively small, the first region can have a relatively large transmitting region, thereby enabling the electronic device provided in some embodiments of this disclosure to have relatively good sensing functionality.
[0121] In the electronic device provided in other embodiments of this disclosure, by making the distance between adjacent electronic components in the first region and the second region have a specific proportional range, the electronic device provided in other embodiments of this disclosure can have relatively good sensing function in the case of full-screen display.
[0122] In the electronic device provided in some embodiments of this disclosure, by forming various structures between the penetrating area of the electronic panel and the sensor to reduce the influence of the sensing signal, the signal-to-noise ratio of the sensing signal of the sensor can be further increased.
[0123] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions disclosed herein, and are not intended to limit them. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features therein. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments disclosed herein. [Simplified Explanation of the Diagram]
[0007] Figure 1A is a partial top view of the electronic device according to the first embodiment of the present disclosure. Figure 1B is an enlarged top view of region R1 in Figure 1A. Figure 1C is an enlarged top view of region R2 in Figure 1A. Figure 1D is a cross-sectional view of Figure 1A along section line A1-A1'. Figure 1E is a cross-sectional view of Figure 1A along section line A2-A2'. Figure 1F is an enlarged top view of region R3 in Figure 1A. Figure 2 is a graph showing the relationship between the sensing accuracy of the sensor and the ratio between the area of the penetration region and the area of the first element. Figure 3A is a partial top view of the electronic device according to the second embodiment of the present disclosure. Figure 3B is a cross-sectional view of one embodiment of Figure 3A along section line B-B'. Figure 3C is a cross-sectional view of another embodiment of Figure 3A along section line B-B'. Figure 3D is a partial top view of one embodiment of the heat dissipation layer in Figure 3A. Figure 3E is a partial top view of one embodiment of the arrangement of the plurality of first pads in Figure 3A. Figure 4 is a partial cross-sectional schematic diagram of an electronic device according to a third embodiment of the present disclosure. Figure 5 is a partial cross-sectional schematic diagram of an electronic device according to a fourth embodiment of the present disclosure. Figure 6 is a partial cross-sectional schematic diagram of an electronic device according to a fifth embodiment of the present disclosure. Figure 7 is a partial cross-sectional schematic diagram of a circuit board in an electronic device according to an embodiment of the present disclosure. Figure 8 is a partial cross-sectional schematic diagram of an electronic device according to a sixth embodiment of the present disclosure. Figure 9A is a partial cross-sectional schematic diagram of an electronic device according to a seventh embodiment of the present disclosure. Figure 9B is a partial cross-sectional schematic diagram of an electronic device according to an eighth embodiment of the present disclosure. Figure 9C is a partial cross-sectional schematic diagram of an electronic device according to a ninth embodiment of the present disclosure. Figure 9D is a partial cross-sectional schematic diagram of an electronic device according to a tenth embodiment of the present disclosure. Figure 9E is a partial top view of an electronic device according to Figure 9B. Figure 10A is an enlarged top view of an embodiment of region R4 in Figure 9C. Figure 10B is an enlarged top view of another embodiment of region R4 in Figure 9C. Figure 10C is an enlarged top view of yet another embodiment of region R4 in Figure 9C.
Claims
1. An electronic device comprising: An electronic panel has a first region and a second region, wherein the first region includes a first element and a second element, the first element and the second element being spaced apart from each other by a first distance, the second region includes a third element and a fourth element, the third element and the fourth element being spaced apart from each other by a second distance, and each of the first element and the second element has a emitting region and a penetrating region; The third element includes a sensor that overlaps with the first region of the electronic panel, wherein the sensor is configured to receive a sensing signal through the penetration region, wherein a first ratio between the second distance and the first distance is 0.76 to 1.24, and a second ratio between the area of the penetration region and the area of the first element is 0.52 to 0.96, wherein the first element has a plurality of first units, the third element has a plurality of second units, and the distance between two adjacent first units is less than the distance between two adjacent second units.
2. The electronic device as claimed in claim 1, wherein the second ratio is 0.7 to 0.
9.
3. The electronic device as claimed in claim 2, wherein the second ratio is 0.7 to 0.
84.
4. The electronic device as claimed in claim 1, wherein the area of the transmitting region is smaller than the area of the penetrating region.
5. The electronic device of claim 1, wherein the second region further includes a signal source configured to provide the sensing signal, and the sensing signal has a peak wavelength of 700 nm to 1400 nm.
6. The electronic device of claim 1, further comprising a circuit board disposed between the electronic panel and the sensor, wherein the electronic panel is electrically connected to the circuit board.
7. The electronic device of claim 6, wherein the electronic panel includes a first pad, the circuit board includes a second pad, the first pad is engaged with the second pad, the first pad is electrically connected to the first element, and the first pad does not overlap with the penetration area.
8. The electronic device of claim 7, further comprising a redistribution layer disposed between the electronic panel and the circuit board, wherein the redistribution layer comprises: The third pad is electrically connected to the first pad; The fourth pad is electrically connected to the second pad; And a connecting structure electrically connected to the third pad and the fourth pad, wherein, in the cross-sectional view of the electronic device, the center of the third pad and the center of the fourth pad are offset in the horizontal direction.
9. The electronic device of claim 1, further comprising a circuit board electrically connected to the electronic panel, wherein the circuit board comprises: basal layer; The first circuit layer is disposed on the first side of the base layer; And a second circuit layer, disposed on the second side of the substrate layer, wherein the first circuit layer and the second circuit layer are electrically connected through vias in the substrate layer, and the first side is closer to the electronic panel than the second side.
10. The electronic device as claimed in claim 9, wherein the substrate layer comprises glass.
11. The electronic device of claim 9, further comprising a driver disposed on the circuit board and configured to drive the first element, the second element, the third element, and the fourth element.
12. The electronic device of claim 11, wherein the driver and the sensor are disposed on the second side of the substrate layer.
13. The electronic device of claim 11, wherein the driver and the sensor are disposed on the first side of the substrate layer.
14. The electronic device of claim 11, wherein the driver and the sensor are each disposed on the second side and the first side of the substrate layer.
15. The electronic device of claim 11, wherein the substrate layer has a first recess and a second recess, and the sensor and the driver are respectively disposed in the first recess and the second recess.
16. The electronic device as claimed in claim 11, wherein the driver does not overlap with the penetration region.
Citation Information
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