Silicon carbide semiconductor structure, manufacturing method thereof and manufacturing method of semiconductor device using the same

Abstract

A silicon carbide semiconductor structure is disclosed, wherein its III-V group substrate and support substrate serve as the basic growth interface for growing a silicon carbide epitaxial layer or a silicon carbide epitaxial doped layer into a perfect single crystal. The support substrate can be, for example, a sapphire substrate, an aluminum nitride substrate, or a silicon carbide substrate. If the support substrate is an aluminum nitride substrate, the silicon carbide epitaxial layer or silicon carbide epitaxial doped layer can be grown directly. The III-V group substrate is composed of aluminum nitride (AlN), gallium nitride (GaN), or a hybrid of aluminum nitride / gallium nitride (AlN / GaN). The silicon carbide epitaxial layer or silicon carbide epitaxial doped layer is formed on the III-V group substrate through an epitaxial process. The III-V group substrate is formed on the support substrate. After forming a semiconductor working device semi-finished product using the silicon carbide semiconductor structure, the support substrate and the III-V group substrate can be peeled off through various scientific processes.

Description

[Technical Field]

[0001] The present invention relates to a silicon carbide semiconductor structure, a method for manufacturing the same, and a method for manufacturing a semiconductor device using the same, and particularly to a silicon carbide semiconductor structure, a method for manufacturing the same, and a method for manufacturing a semiconductor device using the same, wherein a silicon carbide semiconductor structure is epitaxially grown using a support substrate (e.g., a sapphire substrate, an aluminum nitride substrate, or a silicon carbide substrate) and a III-V layer (Note: if the support substrate is an aluminum nitride substrate, a silicon carbide epitaxial layer or a silicon carbide epitaxial doped layer can be grown directly, and a III-V layer may be omitted) by epitaxy. [Previous Technology]

[0002] Compared to silicon semiconductor devices, silicon carbide (SiC) semiconductor devices possess 10 times the breakdown electric field, 3 times the bandgap width, 50 times the power density, and 3 times the thermal conductivity. This makes them more suitable as materials for high-power components such as power electronic charging devices. Their applications span electric vehicles, rail transportation, wind power generation, and even high-performance applications like high-speed communication, high-efficiency power management, and artificial intelligence processing, where SiC semiconductor devices are more competitive. SiC semiconductor devices are suitable for high-voltage, high-current applications, further improving the efficiency of electric vehicles and renewable energy equipment systems. Silicon carbide exhibits excellent high-temperature stability, making it suitable for applications in high-temperature environments, such as automotive engine control, aerospace, and high-temperature power conversion. These advantages have led to widespread attention and strong market demand for SiC semiconductor devices across various application fields, driving continuous innovation and progress in the semiconductor industry.

[0003] Currently, silicon carbide semiconductor structures are formed using homoepitaxial methods to create 4H-silicon carbide (4H-SiC) epitaxial layers, 4H-silicon carbide epitaxial doped layers, 6H-silicon carbide (6H-SiC) epitaxial layers, 6H-silicon carbide epitaxial doped layers, 3C-silicon carbide (3C-SiC) epitaxial layers, or 3C-silicon carbide epitaxial doped layers on doped silicon carbide substrates. However, previous research has found that device size is very sensitive to the yield of silicon carbide semiconductor devices. The main reason is that defects in the epitaxial layer can lead to device failure, and most of these defects originate from defects in the doped silicon carbide substrate. Low-defect doped silicon carbide substrates are typically expensive; therefore, six-inch doped silicon carbide substrates are currently commonly used for homoepitaxial fabrication. For example, mainstream silicon carbide MOSFETs are formed by homoepitaxial growth of a 4H-silicon carbide epitaxial layer on a 4H-silicon carbide N+ substrate.

[0004] Furthermore, previous studies have found that 2H-silicon carbide (2H-SiC) has superior electrical properties compared to 4H-silicon carbide and 6H-silicon carbide. Therefore, there is still a demand in the industry for 2H-silicon carbide epitaxial layers or 2H-silicon carbide epitaxial doped layers that can be epitaxially produced at a lower cost with low defects. [Summary of the Invention]

[0005] According to any of the above objectives, the present invention provides a silicon carbide semiconductor structure, which includes a support substrate, a III-V substrate, and a silicon carbide epitaxial layer or a silicon carbide epitaxial doped layer. The III-V substrate and the support substrate can serve as the basic growth interface for growing the silicon carbide epitaxial layer or the silicon carbide epitaxial doped layer into a perfect single crystal. The support substrate is, for example, a sapphire substrate, an aluminum nitride substrate, or a silicon carbide substrate. If the support substrate is an aluminum nitride substrate, the silicon carbide epitaxial layer or the silicon carbide epitaxial doped layer can be grown directly. The III-V substrate is composed of aluminum nitride (AlN), gallium nitride (GaN), or a mixture of aluminum nitride / gallium nitride (AlN / GaN). The silicon carbide epitaxial layer or the silicon carbide epitaxial doped layer is formed on the III-V substrate through an epitaxial process. The III-V substrate is formed on the sapphire substrate, and after a semiconductor working device semi-finished product is formed using a silicon carbide semiconductor structure, the sapphire substrate and the III-V substrate can be peeled off through various scientific processes, such as, but not limited to, laser lift-off processes, chemical lift-off processes (e.g., etching processes) or other lift-off processes.

[0006] According to the above-described silicon carbide semiconductor structure, the silicon carbide epitaxial layer is a poly-type silicon carbide epitaxial layer, which includes, but is not limited to, one of a 6H-silicon carbide (6H-SiC) epitaxial layer, a 4H-silicon carbide (4H-SiC) epitaxial layer, a 3C-silicon carbide (3C-SiC) epitaxial layer, and a 2H-silicon carbide (2H-SiC) epitaxial layer, and the silicon carbide epitaxial doped layer is a poly-type silicon carbide epitaxial doped layer, which includes, but is not limited to, one of a 6H-silicon carbide (6H-SiC) epitaxial doped layer, a 4H-silicon carbide (4H-SiC) epitaxial doped layer, a 3C-silicon carbide (3C-SiC) epitaxial doped layer, and a 2H-silicon carbide (2H-SiC) epitaxial doped layer.

[0007] According to the silicon carbide semiconductor structure described above, the supporting substrate is a C-plane sapphire substrate having an off-axis angle of, for example, but not limited to, 0.5 to 10 degrees.

[0008] According to the above-mentioned silicon carbide semiconductor structure, the silicon carbide semiconductor structure further includes a transition metal chalcogenide layer, wherein the transition metal chalcogenide layer is formed between the sapphire substrate and the silicon carbide epitaxial layer or the silicon carbide epitaxial doped layer.

[0009] According to the aforementioned silicon carbide semiconductor structure, the silicon carbide semiconductor structure further includes another III-V substrate and another silicon carbide epitaxial layer or another silicon carbide epitaxial doped layer. The other III-V substrate is composed of one of aluminum nitride, gallium nitride, or a mixture of aluminum nitride and gallium nitride, and is located on the silicon carbide epitaxial layer or the silicon carbide epitaxial doped layer. The other silicon carbide epitaxial layer or the other silicon carbide epitaxial doped layer is formed on the other III-V substrate through an epitaxial process.

[0010] According to the above-described silicon carbide semiconductor structure, the silicon carbide semiconductor structure further includes at least one other silicon carbide epitaxial doped layer, wherein the at least one other silicon carbide epitaxial doped layer is formed on the silicon carbide epitaxial layer or the silicon carbide epitaxial doped layer, wherein the doping type of the other silicon carbide epitaxial doped layer is the same as or different from the doping type of the silicon carbide epitaxial doped layer, and the doping concentration of the other silicon carbide epitaxial doped layer is the same as or different from the doping concentration of the silicon carbide epitaxial doped layer.

[0011] According to the above-mentioned silicon carbide semiconductor structure, the semiconductor working device semi-finished product includes at least one of the following: MOSFET device semi-finished product, Schottky diode device semi-finished product, gallium nitride power device semi-finished product, super junction MOSFET (SJ MOSFET) device semi-finished product, insulated gate bipolar transistor (IGBT) device semi-finished product, and thyristor device semi-finished product.

[0012] In accordance with any of the above objectives, the present invention provides a method for manufacturing a silicon carbide semiconductor structure, and the method includes the following steps: forming a III-V substrate on a support substrate, wherein the III-V substrate is composed of one of aluminum nitride, gallium nitride, and a mixture of aluminum nitride and gallium nitride; and forming a silicon carbide epitaxial layer or a silicon carbide epitaxial doped layer on the III-V substrate through an epitaxial process; wherein after forming a semiconductor working device semi-finished product using the silicon carbide semiconductor structure, the support substrate and the III-V substrate can be peeled off through various scientific processes, such as, but not limited to, laser lift-off, chemical lift-off (e.g., etching) or other lift-off processes.

[0013] According to the above-described manufacturing method for manufacturing silicon carbide semiconductor structures, the support substrate is a C-plane sapphire substrate with an off-axis angle of 0.5 to 10 degrees.

[0014] According to the above-described manufacturing method for manufacturing silicon carbide semiconductor structures, the manufacturing method further includes the following steps: forming a transition metal chalcogenide layer between a support substrate and a silicon carbide epitaxial layer or a silicon carbide epitaxial doped layer.

[0015] According to the above-described manufacturing method for manufacturing silicon carbide semiconductor structures, the manufacturing method further includes the following steps: forming another III-V substrate on a silicon carbide epitaxial layer or a silicon carbide epitaxial doped layer, wherein the other III-V substrate is composed of aluminum nitride material, gallium nitride material, and aluminum nitride / gallium nitride (a mixed material); and forming another silicon carbide epitaxial layer or another silicon carbide epitaxial doped layer on another III-V substrate through an epitaxial process.

[0016] According to the above-described manufacturing method for manufacturing a silicon carbide semiconductor structure, the manufacturing method further includes the following steps: forming at least one other silicon carbide epitaxial layer on a silicon carbide epitaxial layer or a silicon carbide epitaxial doped layer, wherein the doping type of the other silicon carbide epitaxial doped layer is the same as or different from the doping type of the silicon carbide epitaxial doped layer, and the doping concentration of the other silicon carbide epitaxial doped layer is the same as or different from the doping concentration of the silicon carbide epitaxial doped layer.

[0017] According to the above-described manufacturing method for manufacturing silicon carbide semiconductor structures, the semiconductor working device semi-finished product includes at least one of MOSFET device semi-finished product, Schottky diode device semi-finished product, gallium nitride power device semi-finished product, super-junction MOSFET device semi-finished product, insulated gate bipolar transistor device semi-finished product, and thyristor device semi-finished product.

[0018] In accordance with any of the above objectives, the present invention provides a method for manufacturing a semiconductor working device, the method comprising the following steps: forming a semiconductor working device semi-finished product on a silicon carbide epitaxial layer or a silicon carbide epitaxial doped layer of the silicon carbide semiconductor structure; peeling off a support substrate and a III-V base layer through various scientific processes, such as, but not limited to, laser lift-off processes, chemical lift-off processes (e.g., etching processes) or other lift-off processes; and performing post-processing, wherein the post-processing can be various scientific processes, such as, but not limited to, at least one of polishing, etching, forming a back metal, or transferring the semiconductor working device semi-finished product to a functional substrate.

[0019] According to the above-described manufacturing method for manufacturing semiconductor working devices, the semiconductor working device semi-finished product includes at least one of MOSFET device semi-finished product, Schottky diode device semi-finished product, gallium nitride power device semi-finished product, super-junction MOSFET device semi-finished product, insulated gate bipolar transistor device semi-finished product, and thyristor device semi-finished product.

[0020] In accordance with any of the above objectives, the present invention provides a semiconductor working device, which is manufactured by the above-described manufacturing method for manufacturing semiconductor working devices, wherein the semiconductor working device includes at least one of a MOSFET device, a Schottky diode device, a gallium nitride power device, a superjunction MOSFET device, an insulated gate bipolar transistor device, and a thyristor device.

[0021] In summary, the silicon carbide semiconductor structure, its manufacturing method and the manufacturing method of the semiconductor working device using it provided by the present invention can make its silicon carbide epitaxial layer or silicon carbide epitaxial doped layer have better electrical properties, and can save manufacturing costs, improve the yield of manufacturing semiconductor working devices and reduce the defects of semiconductor working devices.

Implementation Method

[0023] In order to help the examiner understand the technical features, content and advantages of the present invention and the effects it can achieve, the present invention is described in detail below with reference to the accompanying drawings and in the form of embodiments. The drawings used therein are only for illustration and auxiliary purposes and may not be the actual proportions and precise configurations after the implementation of the present invention. Therefore, the proportions and configurations of the accompanying drawings should not be interpreted or limited to the scope of the present invention in actual implementation. This is hereby stated.

[0024] Please refer to Figure 1, which is a schematic cross-sectional view of a silicon carbide semiconductor structure according to an embodiment of the present invention. The silicon carbide semiconductor structure 1 includes a support substrate 100, a III-V base layer 101, and a silicon carbide epitaxial layer 102. The III-V base layer 101 is composed of aluminum nitride (AlN), gallium nitride (GaN), or a mixture of aluminum nitride / gallium nitride (AlN / GaN). A silicon carbide epitaxial layer 102 is formed on a III-V substrate 101 through an epitaxial process. The silicon carbide epitaxial layer 102 is a poly-type silicon carbide epitaxial layer, which includes, but is not limited to, one of a 6H-silicon carbide (6H-SiC) epitaxial layer, a 4H-silicon carbide (4H-SiC) epitaxial layer, a 3C-silicon carbide (3C-SiC) epitaxial layer, and a 2H-silicon carbide (2H-SiC) epitaxial layer. The III-V substrate 101 is formed on a support substrate 100, and after a semiconductor working device semi-finished product is formed using the silicon carbide semiconductor structure 1, the support substrate 100 and the III-V substrate 101 are subjected to various scientific processes, such as, but not limited to, laser lift-off processes, chemical lift-off processes (e.g., etching processes), or other lift-off processes.

[0025] It should be noted that the main inventive spirit of this case is that the III-V base layer 101 and the support substrate 100 can be used as the basic growth interface for the growth of silicon carbide epitaxial layer 102 (or silicon carbide epitaxial doped layer 106 in Figure 4) into a perfect single crystal. The support substrate 100 is, for example, a sapphire substrate, an aluminum nitride substrate or a silicon carbide substrate. However, if the support substrate is an aluminum nitride substrate, the silicon carbide epitaxial layer or the silicon carbide epitaxial doped layer can be grown directly, and the III-V base layer 101 can be omitted.

[0026] Further, the support substrate 100 is a C-plane support substrate with an off-axis angle of 0.5 to 10 degrees, and the direction in which the off-axis angle is 0 or 10.5 degrees. However, the present invention is not limited to the direction in which the off-axis angle is 0 or 10.5 degrees. In some cases, the off-axis angle may be 0 degrees or 10.5 degrees. Similarly, the direction in which the off-axis angle is oriented is not necessarily a limitation of the present invention. The formation of the silicon carbide semiconductor structure 1 requires only a single piece of equipment, unlike the prior art which required at least two pieces of equipment when forming silicon carbide semiconductor structures using silicon carbide substrates. On the other hand, the support substrate 100 can be a recycled sapphire substrate, aluminum nitride substrate, or silicon carbide substrate. That is, the support substrate 100 can be reused, thus reducing the manufacturing cost of the silicon carbide semiconductor structure 1. Furthermore, the support substrate 100 can be 6 inches, 8 inches, 12 inches, or larger. In addition, compared with previous technologies, when the silicon carbide epitaxial layer 102 is a 2H-silicon carbide epitaxial layer, it can have better electrical properties. Moreover, by using heteroepitaxial method, the problem that the silicon carbide epitaxial layer 102 is prone to defects due to defects in the silicon carbide substrate can be avoided. Therefore, the semiconductor working device formed using the silicon carbide semiconductor structure 1 will have lower defects and higher yield.

[0027] Please refer to FIG2, which is a schematic cross-sectional view of a silicon carbide semiconductor structure according to another embodiment of the present invention. Compared with the embodiment of FIG1, the silicon carbide semiconductor structure 2 further includes a III-V group substrate 103 and a silicon carbide epitaxial layer 104. The III-V group substrate 103 is composed of one of aluminum nitride, gallium nitride, or a mixture of aluminum nitride and gallium nitride, and is located on the silicon carbide epitaxial layer 102. The silicon carbide epitaxial layer 104 is formed on the III-V substrate 103 through an epitaxial process. The silicon carbide epitaxial layer 104 is a poly-type silicon carbide epitaxial layer, which includes one of the following: a 6H-silicon carbide (6H-SiC) epitaxial layer, a 4H-silicon carbide (4H-SiC) epitaxial layer, a 3C-silicon carbide (3C-SiC) epitaxial layer, and a 2H-silicon carbide (2H-SiC) epitaxial layer. It should be noted that the silicon carbide semiconductor structure 2 of this embodiment can also periodically form other III-V substrates and other silicon carbide epitaxial layers; that is, there can be two or more stacked combinations of III-V substrates and silicon carbide epitaxial layers.

[0028] Please refer to Figure 3, which is a schematic cross-sectional view of a silicon carbide semiconductor structure according to another embodiment of the present invention. Compared with the embodiment of Figure 1, the silicon carbide semiconductor structure 3 further includes a transition metal chalcogenide layer 105, wherein the transition metal chalcogenide layer 105 is formed between the support substrate 100 and the III-V substrate 101. The material of the transition metal chalcogenide layer 105 can be MoS2, MoSe2, WS2, WSe2, MoTe2, etc. The provision of the transition metal chalcogenide layer 105 makes the attraction between the transition metal chalcogenide layer 105 and the III-V substrate 101 and the silicon carbide epitaxial layer 102 a Vander Waals force, thus making it easier to separate the layers. Furthermore, in other embodiments, the silicon carbide semiconductor structure 3 may be a semiconductor structure having a complex array of periodic III-V group base layer 101, a transition metal chalcogenide layer 105 and a silicon carbide epitaxial layer 102 on the support substrate 100, and the present invention is not limited thereto.

[0029] Please refer to Figure 4, which is a schematic cross-sectional view of a silicon carbide semiconductor structure according to another embodiment of the present invention. Unlike the embodiment in Figure 1, the silicon carbide semiconductor structure 4 further includes two silicon carbide epitaxial doped layers 106 and 107. The silicon carbide epitaxial doped layer 106 is formed on the silicon carbide epitaxial layer 102, and may be, for example, but not limited to, N+ doped. The silicon carbide epitaxial doped layer 107 is formed on the silicon carbide epitaxial doped layer 106, and may be, for example, but not limited to, N- doped. The doping type and doping concentration of the silicon carbide epitaxial doped layers 106 and 107 may be P+ or P- doped, and the doping type and doping concentration of the silicon carbide epitaxial doped layers 106 and 107 are not intended to limit the present invention. Furthermore, each of the silicon carbide epitaxial doped layers 106 and 107 is a poly-type silicon carbide epitaxial doped layer, including one of the following: a 6H-silicon carbide (6H-SiC) epitaxial doped layer, a 4H-silicon carbide (4H-SiC) epitaxial doped layer, a 3C-silicon carbide (3C-SiC) epitaxial doped layer, and a 2H-silicon carbide (2H-SiC) epitaxial doped layer. The silicon carbide epitaxial doped layers 106 and 107 can be formed by direct epitaxy, or by first epitaxially forming the silicon carbide epitaxial layer and then forming the silicon carbide epitaxial doped layers 106 and 107 through ion implantation. The doping types (N or P) of the silicon carbide epitaxial doped layers 106 and 107 can be the same or different from each other, and the doping concentrations (e.g., lightly doped or multi-doped) of the silicon carbide epitaxial doped layers 106 and 107 can be the same or different from each other.

[0030] Please refer to Figures 5 and 6. Figure 5 is a schematic cross-sectional view of a silicon carbide MOSFET device semi-finished product according to an embodiment of the present invention, and Figure 6 is a schematic cross-sectional view of a silicon carbide MOSFET device according to an embodiment of the present invention. The silicon carbide MOSFET device semi-finished product 5 in Figure 5 is implemented using the silicon carbide semiconductor structure 1 of the embodiment in Figure 1. First, an N+-doped silicon carbide epitaxial layer 106 is formed on the silicon carbide epitaxial layer 102. Then, an N-doped silicon carbide epitaxial layer 107 is formed on the silicon carbide epitaxial layer 106, thus forming the silicon carbide semiconductor structure 4 in Figure 4. Afterward, two P-type wells 108 and 109 are formed on both sides of the silicon carbide epitaxial layer 107. Then, N+ doped regions 110 and 111 are formed in the two P-type wells 108 and 109. Next, two metal electrodes 112 and 113 (used as source electrodes) are formed on the two N+ doped regions 110 and 111. A gate oxide layer 115 is formed between the two N+ doped regions 110 and 111, and a metal electrode 114 (used as a gate electrode) is formed on the gate oxide layer 115, thereby forming a silicon carbide MOSFET device semi-finished product 5. After forming the silicon carbide MOSFET device semi-finished product 5, a post-laser stripping process is performed to remove the support substrate 100 and the III-V base layer 101. Then, the silicon carbide epitaxial layer 102 is ground down to the silicon carbide epitaxial doped layer 106. After that, a metal electrode 116 (used as a drain electrode) is formed under the silicon carbide epitaxial doped layer 106, thereby forming a silicon carbide MOSFET device 6.

[0031] Please refer to FIG7, which is a schematic cross-sectional view of a silicon carbide semiconductor structure according to another embodiment of the present invention. Unlike the embodiment of FIG1, the silicon carbide semiconductor structure 7 does not have a silicon carbide epitaxial layer 102, but includes a silicon carbide epitaxial doped layer 106. The silicon carbide epitaxial doped layer 106 may be, for example, N+ doped, but the present invention is not limited by the doping type and doping concentration. In another aspect, the silicon carbide semiconductor structure 7 may further include a transition metal chalcogenide layer 105, which is disposed between the silicon carbide epitaxial doped layer 106 and the III-V group base layer 101. Furthermore, the silicon carbide semiconductor structure 7 can be a semiconductor structure having a complex array of periodic III-V base layers 101, a transition metal chalcogenide layer 105, and a silicon carbide epitaxial doped layer 106 on the support substrate 100, or it can be a semiconductor structure having a complex array of periodic III-V base layers 101 and a silicon carbide epitaxial doped layer 106 on the support substrate 100.

[0032] Please refer to FIG8, which is a schematic cross-sectional view of a silicon carbide semiconductor structure according to another embodiment of the present invention. Unlike the embodiment of FIG7, the silicon carbide semiconductor structure 8 further includes a silicon carbide epitaxial doped layer 107. The silicon carbide epitaxial doped layer 107 is formed on the silicon carbide epitaxial doped layer 106, and may be, for example, but not limited to, N-doped.

[0033] Please refer to Figures 9 and 6. Figure 9 is a schematic cross-sectional view of a silicon carbide MOSFET device semi-finished product according to another embodiment of the present invention. The silicon carbide MOSFET device semi-finished product 9 in Figure 9 is realized using the silicon carbide semiconductor structure 7 of the embodiment in Figure 7. First, an N-doped silicon carbide epitaxial doping layer 107 is formed on an N+ doped silicon carbide epitaxial doping layer 106, that is, the silicon carbide semiconductor structure 8 in Figure 8 is formed. Then, two P-type wells 108 and 109 are formed on both sides of the silicon carbide epitaxial doping layer 107, and then N+ doped regions 110 and 111 are formed in the two P-type wells 108 and 109. Next, two metal electrodes 112 and 113 (used as source electrodes) are formed on the two N+ doped regions 110 and 111, a gate oxide layer 115 is formed between the two N+ doped regions 110 and 111, and a metal electrode 114 (used as a gate electrode) is formed on the gate oxide layer 115, thereby forming a silicon carbide MOSFET device semi-finished product 9. After forming the silicon carbide MOSFET device semi-finished product 9, a post-laser peeling process is performed to peel off the support substrate 100 and the III-V base layer 101, and a portion of the lower surface of the silicon carbide epitaxial doped layer 106 is polished (e.g., but not limited to chemical mechanical polishing (CMP)). Then, a metal electrode 116 (used as a drain electrode) is formed under the silicon carbide epitaxial doped layer 106, thereby forming a silicon carbide MOSFET device 6.

[0034] Please refer to Figures 10 and 11. Figure 10 is a schematic cross-sectional view of a Schottky diode device semi-finished product according to an embodiment of the present invention, and Figure 11 is a schematic cross-sectional view of a Schottky diode device according to an embodiment of the present invention. The Schottky diode device semi-finished product 10 of Figure 10 is realized using the silicon carbide semiconductor structure 7 of the embodiment of Figure 7. First, an N-doped silicon carbide epitaxial doped layer 107 is formed on an N+ doped silicon carbide epitaxial doped layer 106, that is, the silicon carbide semiconductor structure 8 of Figure 8 is formed. Then, two P-type wells 108 and 109 are formed on both sides of the silicon carbide epitaxial doped layer 107. Then, an ohmic contact electrode 117 (used as a cathode electrode, the material of which is titanium or platinum, but not limited thereto) is formed between the two P-type wells 108 and 109 to form the Schottky diode device semi-finished product 10. After forming the Schottky diode device semi-finished product 10, a post-laser peeling process is performed to peel off the support substrate 100 and the III-V base layer 101, and a portion of the lower surface of the silicon carbide epitaxial doped layer 106 is ground (e.g., but not limited to chemical mechanical polishing). Then, a metal electrode 116 (used as an anode electrode) is formed under the silicon carbide epitaxial doped layer 106 to form the Schottky diode device 11.

[0035] Please refer to FIG12, which is a schematic cross-sectional view of a gallium nitride power device semi-finished product according to an embodiment of the present invention. The gallium nitride power device semi-finished product 12 in FIG12 is realized using the silicon carbide semiconductor structure 1 of FIG1 embodiment. First, an aluminum nitride layer 201, a gallium nitride layer 202, an aluminum nitride layer 203, an alloy layer 204 formed of aluminum nitride and gallium nitride, and a gallium nitride capping layer 205 are sequentially formed on the silicon carbide epitaxial layer 102, which serves as a temporary carrier. Then, through the process, multiple metal electrodes 208, 209, and 210 are defined as source electrodes, gate electrodes, and drain electrodes. A silicon nitride layer 206 covers a gallium nitride layer 202, an aluminum nitride layer 203, an alloy layer 204 formed of aluminum nitride and gallium nitride, a gallium nitride capping layer 205, metal electrodes 208, 209, and 210, and gate electrodes 211 and 212 located on the gallium nitride capping layer 205. A passivation layer 207 covers the metal electrodes 208, 209, and 210 and the silicon nitride layer 206. The support substrate 100 and the III-V base layer 101 in the gallium nitride power device semi-finished product 12 can be laser-stripped, and then the silicon carbide epitaxial layer 102 is ground down to the aluminum nitride layer 201. The entire semiconductor structure is then transferred to a functional substrate (e.g., but not limited to, a copper substrate for thermal conductivity).

[0036] Please refer to FIG13, which is a schematic cross-sectional view of a gallium nitride power device semi-finished product according to another embodiment of the present invention. The gallium nitride power device semi-finished product 13 of FIG13 is also implemented using the silicon carbide semiconductor structure 1 of FIG1 embodiment, but the difference from FIG12 is that the gallium nitride power device semi-finished product 13 has an additional hafnium dioxide layer 213 located below the silicon nitride layer 206. The support substrate 100 and the III-V base layer 101 in the gallium nitride power device semi-finished product 13 can be laser-stripped, and then the silicon carbide epitaxial layer 102 is ground down to the aluminum nitride layer 201, and then the entire semiconductor structure is transferred to a functional substrate (e.g., but not limited to a copper substrate for thermal conductivity).

[0037] Please refer to Figure 14, which is a schematic cross-sectional view of a silicon carbide MOSFET device according to another embodiment of the present invention. The silicon carbide MOSFET device 14 in Figure 14 is implemented using the aforementioned silicon carbide semiconductor structure 1 or 7. The silicon carbide MOSFET device 14 includes a stacked structure consisting of a metal electrode 300 (used as a drain electrode), an N+-doped silicon carbide epitaxial doped layer 301, and an N-doped silicon carbide epitaxial doped layer 302, arranged sequentially from bottom to top. P-type wells 303 and 304 are formed on both sides of the silicon carbide epitaxial doped layer 302, respectively. A P+ doped region 305 and an N+ doped region are formed in the P-type well 303. In region 309, P+ doped region 306 and N+ doped region 310 are formed in P-type well 304. Metal electrode 311 (used as source electrode) is formed on P+ doped region 305 and N+ doped region 309. Metal electrode 312 (used as source electrode) is formed on P+ doped region 306 and N+ doped region 310. Gate oxide layer 314 is formed between metal electrodes 311 and 312. Metal electrode 313 (used as gate electrode) is formed on gate oxide layer 314.

[0038] Please refer to Figure 15, which is a schematic cross-sectional view of a silicon carbide superjunction MOSFET device according to an embodiment of the present invention. The silicon carbide superjunction MOSFET device 15 in Figure 15 is implemented using the aforementioned silicon carbide semiconductor structure 1 or 7. The silicon carbide superjunction MOSFET device 15 differs from the silicon carbide MOSFET device 14 in that the silicon carbide superjunction MOSFET device 15 has two P-type regions 315 and 316 formed in the silicon carbide epitaxial doped layer 302, and are respectively located below the P-type wells 303 and 304.

[0039] Please refer to Figure 16, which is a schematic cross-sectional view of a silicon carbide insulated-gate bipolar transistor device according to an embodiment of the present invention. The silicon carbide insulated-gate bipolar transistor device 16 in Figure 16 is implemented using the aforementioned silicon carbide semiconductor structure 1 or 7. The silicon carbide insulated-gate bipolar transistor device 16 differs from the silicon carbide MOSFET device 14 in that the silicon carbide insulated-gate bipolar transistor device 16 further has a P+ doped silicon carbide epitaxial doped layer 317 located below the N+ doped silicon carbide epitaxial doped layer 301.

[0040] Please refer to FIG17, which is a schematic cross-sectional view of a thyristor device according to an embodiment of the present invention. The thyristor device 17 in FIG17 is implemented using the aforementioned silicon carbide semiconductor structure 1 or 7. The thyristor device 17 includes a stacked structure consisting of a metal electrode 300 (used as a drain electrode), a P+ doped silicon carbide epitaxial doped layer 317, an N+ doped silicon carbide epitaxial doped layer 301, an N- doped silicon carbide epitaxial doped layer 302, and a P-type base 318, arranged from bottom to top. P+ doped regions 319 and 320 are formed on both sides of the P-type base 318, respectively. Metal electrodes 311 and 312 are formed on the P+ doped regions 319 and 320, respectively. An N+ doped silicon carbide epitaxial doped layer 321 is formed between the metal electrodes 311 and 312, and a metal electrode 313 is formed on the N+ doped silicon carbide epitaxial doped layer 321.

[0041] In addition, according to the above description, the present invention further provides a method for manufacturing a silicon carbide semiconductor structure, and the manufacturing method includes the following steps: forming a III-V base layer on a support substrate, wherein the III-V base layer is composed of one of aluminum nitride material, gallium nitride material, and aluminum nitride / gallium nitride hybrid material; and forming a silicon carbide epitaxial layer or a silicon carbide epitaxial doped layer on the III-V base layer through an epitaxial process; wherein after forming a semiconductor working device semi-finished product using the silicon carbide semiconductor structure, the support substrate and the III-V base layer can be peeled off through a laser lift-off process.

[0042] In one embodiment of the manufacturing method for manufacturing a silicon carbide semiconductor structure, the support substrate is a C-plane sapphire substrate having an off-axis angle of 0.5 to 10 degrees, and the direction in which the off-axis angle is oriented is or .

[0043] In one embodiment of the manufacturing method for manufacturing a silicon carbide semiconductor structure, the manufacturing method further includes the step of forming a transition metal chalcogenide layer between a support substrate and a silicon carbide epitaxial layer or a silicon carbide epitaxial doped layer.

[0044] In one embodiment of the manufacturing method for manufacturing a silicon carbide semiconductor structure, the manufacturing method further includes the following steps: forming another III-V substrate on a silicon carbide epitaxial layer or a silicon carbide epitaxial doped layer, wherein the other III-V substrate is composed of an aluminum nitride material, a gallium nitride material, or an aluminum nitride / gallium nitride (hybrid material); and forming another silicon carbide epitaxial layer or another silicon carbide epitaxial doped layer on the other III-V substrate through an epitaxial process.

[0045] In one embodiment of the manufacturing method for manufacturing a silicon carbide semiconductor structure, the manufacturing method further includes the following steps: forming at least one other silicon carbide epitaxial layer on a silicon carbide epitaxial layer or a silicon carbide epitaxial doped layer, wherein the doping type of the other silicon carbide epitaxial doped layer is the same as or different from the doping type of the silicon carbide epitaxial doped layer, and the doping concentration of the other silicon carbide epitaxial doped layer is the same as or different from the doping concentration of the silicon carbide epitaxial doped layer.

[0046] In one embodiment of the manufacturing method for manufacturing a silicon carbide semiconductor structure, the semiconductor working device semi-finished product includes at least one of a MOSFET device semi-finished product, a Schottky diode device semi-finished product, a gallium nitride power device semi-finished product, a super-junction MOSFET device semi-finished product, an insulated gate bipolar transistor device semi-finished product, and a thyristor device semi-finished product.

[0047] Furthermore, according to the above description, the present invention also provides a manufacturing method for manufacturing a semiconductor working device, and the manufacturing method includes the following steps: forming a semiconductor working device semi-finished product on the silicon carbide epitaxial layer or silicon carbide epitaxial doped layer of the silicon carbide semiconductor structure described above; peeling off the support substrate and the III-V base layer through various scientific processes, such as, but not limited to, laser lift-off process, chemical lift-off process (e.g., etching process) or other lift-off process; and performing post-processing, wherein the post-processing includes at least one of polishing, etching, forming a back metal or transferring the semiconductor working device semi-finished product to a functional substrate.

[0048] In summary, the present invention provides a silicon carbide semiconductor structure grown by epitaxy using a support substrate and a III-V group substrate to grow a silicon carbide epitaxial layer or a silicon carbide epitaxial doped layer, a method for manufacturing the structure, and a method for manufacturing a semiconductor device using the structure. When the silicon carbide epitaxial layer is a 2H silicon carbide epitaxial layer, or the silicon carbide epitaxial doped layer is a 2H-silicon carbide epitaxial doped layer, the 2H-silicon carbide epitaxial layer or the 2H-silicon carbide epitaxial doped layer has superior electrical properties compared to the 4H-silicon carbide epitaxial layer, the 4H-silicon carbide epitaxial doped layer, the 6H-silicon carbide epitaxial layer, and the 6H-silicon carbide epitaxial doped layer. Furthermore, compared to the previous method of using silicon carbide substrates, the method of using support substrates and III-V base layers can effectively save costs, and the support substrate has lower defects. Therefore, the silicon carbide epitaxial layer or silicon carbide epitaxial doping has lower defects, and the semiconductor working device implemented using the present invention will also have lower defects and higher yield.

[0049] The above-described embodiments are only for illustrating the technical ideas and features of the present invention. Their purpose is to enable those skilled in the art to understand the content of the present invention and implement it accordingly. They should not be used to limit the patent scope of the present invention. That is, all equivalent changes or modifications made in accordance with the spirit disclosed in the present invention should still be covered within the patent scope of the present invention. [Simplified Explanation of the Diagram]

[0022] The accompanying drawings are provided to enable those skilled in the art to further understand the invention, and are incorporated in and constitute a part of the specification of the invention. The drawings illustrate exemplary embodiments of the invention and are used together with the specification of the invention to explain the principles of the invention, but are not intended to limit the invention. A brief description of the accompanying drawings of this invention is as follows: Figure 1 is a schematic cross-sectional view of a silicon carbide semiconductor structure according to an embodiment of the present invention; Figure 2 is a schematic cross-sectional view of a silicon carbide semiconductor structure according to another embodiment of the present invention; Figure 3 is a schematic cross-sectional view of a silicon carbide semiconductor structure according to another embodiment of the present invention; Figure 4 is a schematic cross-sectional view of a silicon carbide semiconductor structure according to another embodiment of the present invention; Figure 5 is a schematic cross-sectional view of a silicon carbide MOSFET device semi-finished product according to an embodiment of the present invention; Figure 6 is a schematic cross-sectional view of a silicon carbide MOSFET device according to an embodiment of the present invention; Figure 7 is a schematic cross-sectional view of a silicon carbide semiconductor structure according to another embodiment of the present invention; Figure 8 is a schematic cross-sectional view of a silicon carbide semiconductor structure according to another embodiment of the present invention; Figure 9 is a schematic cross-sectional view of a silicon carbide MOSFET device semi-finished product according to another embodiment of the present invention; Figure 10 is a schematic cross-sectional view of a Schottky diode device semi-finished product according to an embodiment of the present invention; Figure 11 is a schematic cross-sectional view of a Schottky diode device according to an embodiment of the present invention; Figure 12 is a schematic cross-sectional view of a gallium nitride power device semi-finished product according to an embodiment of the present invention. Figure 13 is a schematic cross-sectional view of a gallium nitride power device semi-finished product according to another embodiment of the present invention; Figure 14 is a schematic cross-sectional view of a silicon carbide MOSFET device according to another embodiment of the present invention; Figure 15 is a schematic cross-sectional view of a silicon carbide superjunction MOSFET device according to an embodiment of the present invention; Figure 16 is a schematic cross-sectional view of a silicon carbide insulated gate bipolar transistor device according to an embodiment of the present invention; Figure 17 is a schematic cross-sectional view of a thyristor device according to an embodiment of the present invention.

Claims

1. A silicon carbide semiconductor structure, comprising: A support substrate (100); a III-V base layer (101) formed on the support substrate (100), which is composed of aluminum nitride (AlN), gallium nitride (GaN), or a mixture of aluminum nitride and gallium nitride (AlN / GaN); a silicon carbide epitaxial layer (102) or a silicon carbide epitaxial doped layer (106) formed on the III-V base layer (101) through an epitaxial process; After a semiconductor working device semi-finished product is formed using the silicon carbide semiconductor structure, the support substrate (100) and the III-V base layer (101) can be peeled off through a scientific process; and at least one other silicon carbide epitaxial doped layer (107) is formed on the silicon carbide epitaxial layer (102) or the silicon carbide epitaxial doped layer (106), wherein the doping type of the other silicon carbide epitaxial doped layer (107) is the same as or different from the doping type of the silicon carbide epitaxial doped layer (106), and the doping concentration of the other silicon carbide epitaxial doped layer (107) is the same as or different from the doping concentration of the silicon carbide epitaxial doped layer (106).

2. The silicon carbide semiconductor structure as claimed in claim 1, wherein the silicon carbide epitaxial layer (102) is a poly-type silicon carbide epitaxial layer comprising one of a 6H-silicon carbide (6H-SiC) epitaxial layer, a 4H-silicon carbide (4H-SiC) epitaxial layer, a 3C-silicon carbide (3C-SiC) epitaxial layer, and a 2H-silicon carbide (2H-SiC) epitaxial layer, and the silicon carbide epitaxial doped layer (106) is a poly-type silicon carbide epitaxial doped layer comprising one of a 6H-silicon carbide (6H-SiC) epitaxial doped layer, a 4H-silicon carbide (4H-SiC) epitaxial doped layer, a 3C-silicon carbide (3C-SiC) epitaxial doped layer, and a 2H-silicon carbide (2H-SiC) epitaxial doped layer.

3. The silicon carbide semiconductor structure as claimed in claim 1, wherein the support substrate (100) is a C-plane support substrate having an off-axis angle of 0.5 to 10 degrees.

4. The silicon carbide semiconductor structure as described in any one of claims 1 to 3, further comprising: A transition metal chalcogenide layer (105) is formed between the support substrate (100) and the silicon carbide epitaxial layer (102) or the silicon carbide epitaxial doped layer (106).

5. The silicon carbide semiconductor structure as claimed in any one of claims 1 to 3, wherein the semiconductor working device semi-finished product includes at least one of a MOSFET device semi-finished product, a Schottky diode device semi-finished product, a gallium nitride power device semi-finished product, a super junction MOSFET (SJ MOSFET) device semi-finished product, an insulated gate bipolar transistor (IGBT) device semi-finished product, and a thyristor device semi-finished product.

6. A silicon carbide semiconductor structure, comprising: A support substrate (100); a III-V substrate (101) formed on the support substrate (100), which is composed of aluminum nitride (AlN), gallium nitride (GaN), or a mixture of aluminum nitride and gallium nitride (AlN / GaN); a silicon carbide epitaxial layer (102) or a silicon carbide epitaxial doped layer (106) formed on the III-V substrate (101) through an epitaxial process; wherein after a semiconductor working device semi-finished product is formed using the silicon carbide semiconductor structure, the support substrate (100) and the III-V substrate (101) can be peeled off through a scientific process; Another III-V substrate (103) is composed of aluminum nitride, gallium nitride, or a mixture of aluminum nitride and gallium nitride, and is located on the silicon carbide epitaxial layer (102) or the silicon carbide epitaxial doped layer (106); and another silicon carbide epitaxial layer (104) or another silicon carbide epitaxial doped layer is formed on the other III-V substrate (103) through the epitaxial process.

7. A manufacturing method for manufacturing a silicon carbide semiconductor structure, comprising: A III-V substrate (101) is formed on a support substrate (100), wherein the III-V substrate (101) is composed of aluminum nitride, gallium nitride, or a mixture of aluminum nitride and gallium nitride; a silicon carbide epitaxial layer (102) or a silicon carbide epitaxial doped layer (106) is formed on the III-V substrate (101) through an epitaxial process; wherein after a semiconductor working device semi-finished product is formed using the silicon carbide semiconductor structure, the support substrate (100) and the III-V substrate (101) can be peeled off through a scientific process; and at least one other silicon carbide epitaxial doped layer (107) is formed on the silicon carbide epitaxial layer (102) or the silicon carbide epitaxial doped layer (106), wherein the other silicon carbide epitaxial doped layer (107) The doping type of the silicon carbide epitaxial doped layer (106) is the same as or different from that of the silicon carbide epitaxial doped layer (106), and the doping concentration of the other silicon carbide epitaxial doped layer (107) is the same as or different from that of the silicon carbide epitaxial doped layer (106).

8. The manufacturing method as described in claim 7, further comprising: A transition metal chalcogenide layer (105) is formed between the support substrate (100) and the silicon carbide epitaxial layer (102) or the silicon carbide epitaxial doped layer (106).

9. A manufacturing method for manufacturing a silicon carbide semiconductor structure, comprising: A III-V substrate (101) is formed on a support substrate (100), wherein the III-V substrate (101) is composed of aluminum nitride, gallium nitride, or a mixture of aluminum nitride and gallium nitride; a silicon carbide epitaxial layer (102) or a silicon carbide epitaxial doped layer (106) is formed on the III-V substrate (101) through an epitaxial process; wherein after a semiconductor working device semi-finished product is formed using the silicon carbide semiconductor structure, the support substrate (100) and the III-V substrate (101) can be peeled off through a scientific process; Another III-V substrate (103) is formed on the silicon carbide epitaxial layer (102) or the silicon carbide epitaxial doped layer (106), wherein the other III-V substrate (103) is composed of aluminum nitride, gallium nitride, or a mixture of aluminum nitride and gallium nitride; and another silicon carbide epitaxial layer (104) or another silicon carbide epitaxial doped layer is formed on the other III-V substrate (103) through the epitaxial process.

10. A manufacturing method for manufacturing a semiconductor working device, comprising: A semiconductor working device semi-finished product is formed on the 2H-silicon carbide epitaxial layer (102) or the 2H-silicon carbide epitaxial doped layer (106) of the silicon carbide semiconductor structure as described in claim 1; the support substrate (100) and the III-V base layer (101) are peeled off by a laser lift-off process; and a post-processing is performed, the post-processing including at least one of polishing, etching, forming a back metal and transferring the semiconductor working device semi-finished product to a functional substrate.

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