Plasma treatment unit

Abstract

The plasma processing apparatus includes: a chamber; first and second bias power supplies for supplying first and second bias signals; a substrate support for supporting a substrate and an edge ring within the chamber; an adjustment mechanism; and an electrical path. The substrate support includes: first and second regions respectively supporting the substrate and the edge ring; first and second bias electrodes within the first and second regions; and an adjustment electrode located in the second region and grounded. The adjustment mechanism includes a first adjustment mechanism for controlling the first bias signal, an isolator for blocking the second bias signal between the adjustment electrode and the first adjustment mechanism, and a second adjustment mechanism for controlling the second bias signal. The isolator and the first and second adjustment mechanisms are connected in parallel and connected to the adjustment electrode. The electrical path connects the first and second bias power supplies to the first and second bias electrodes.

Description

Technical Field

[0001] This disclosure relates to a plasma processing apparatus. Prior Technology

[0002] Patent document 1 discloses a technique for adjusting the capacitance of a variable capacitor to affect the RF amplitude near the edge of a substrate when the plasma sheath layer descends close to the edge ring due to erosion of the edge ring.

[0003] [Previous Technical Documents] [Patent Literature] Patent document 1: Japanese Patent Application Publication No. 2017-130659. Summary of the Invention

[0004] [The problem the invention aims to solve] This disclosure provides a plasma processing apparatus that improves controllability over multiple bias RF signals of different frequencies.

[0005] [Technical means to solve the problem] This disclosure discloses a plasma processing apparatus comprising: a chamber; a first bias power supply configured to supply a first bias signal; a second bias power supply configured to supply a second bias signal; a substrate support for supporting a substrate and an edge ring within the chamber; an impedance adjustment mechanism; and an electrical path. The substrate support is configured to have: a first region supporting the substrate; a second region disposed around the first region and supporting the edge ring; a first bias electrode disposed within the first region; a second bias electrode disposed within the second region; and an impedance adjustment electrode disposed within the second region and grounded. The impedance adjustment mechanism comprises: a first impedance adjustment mechanism controlling the first bias signal; an isolator connected between the impedance adjustment electrode and the first impedance adjustment mechanism and blocking the second bias signal; and a second impedance adjustment mechanism controlling the second bias signal. The isolator and the first and second impedance adjustment mechanisms are configured to be connected in parallel and connected to the impedance adjustment electrode. The electrical path is configured to connect the first bias power supply and the second bias power supply to the first bias electrode and the second bias electrode.

[0006] According to this disclosure, it is possible to improve the controllability of multiple bias RF signals with different frequencies. Simple Explanation of the Diagram

[0007] Figure 1 is a diagram showing an example of the configuration of a plasma processing apparatus in the first embodiment of this disclosure. Figure 2 is an example of the relationship between the consumption and tilt of the edge ring. Figure 3 is a diagram showing an example of the circuit configuration of the impedance adjustment mechanism in the first embodiment. Figure 4 is a diagram showing another example of the circuit configuration of the impedance adjustment mechanism in the first embodiment. Figure 5 is a graph showing an example of the relationship between capacitance and reactance of a variable capacitor. Figure 6 is a graph showing an example of the relationship between capacitance and reactance of a variable capacitor. Figure 7 is a diagram illustrating an example of the effects among multiple variable capacitors. Figure 8 is a diagram illustrating an example of the effects among multiple variable capacitors. Figure 9 is a diagram showing an example of the adjustment of multiple variable capacitors in the first embodiment. Figure 10 is a diagram showing an example of edge ring consumption in the reference example. Figure 11 is a diagram showing an example of edge ring consumption in variant example 1. Figure 12 is an example of the relationship between the sheath potential and the capacitance of the variable capacitor in Modification 1. Figure 13 is a diagram showing an example of the deviation in etching rate. Figure 14 shows an example of the configuration of the conductive rod in Modified Example 2. Figure 15 shows an example of the configuration of the conductive rod in Modified Example 3. Figure 16 shows an example of the configuration of the conductive rod in Modified Example 4. Figure 17 shows an example of the configuration of the conductive rod in Modified Example 5. Figure 18 is a diagram showing one configuration example of the electrical path in Modified Example 6. Figure 19 is a diagram showing a configuration example of the plasma processing apparatus in the second embodiment. Figure 20 is a diagram showing an example of the independent controllability of the edge ring side in the second embodiment. Implementation

[0008] The following describes in detail, based on the drawings, an embodiment of the disclosed plasma processing apparatus. Furthermore, the disclosed technology is not limited by the following embodiments.

[0009] In plasma processing apparatuses, the potential difference between the substrate and the edge ring can cause variations in the thickness of the plasma sheath layer. For example, when the edge ring is consumed, the height of the plasma sheath layer above the edge ring decreases (the sheath layer thickness increases). Consequently, at the periphery of the substrate, the direction of the electric field is no longer perpendicular to the substrate, causing the ion orbits to tilt and resulting in etched holes tilting obliquely (inward). To address this, for example, it is possible to independently control the potential on the edge ring side. However, for example, when using two different frequency bias RF signals as bias power supplies, there may be situations where the potential at one frequency can be controlled, but the potential at the other frequency cannot. Therefore, it is desirable to improve the controllability of multiple bias RF signals with different frequencies.

[0010] (First Implementation Type) [Composition of Plasma Processing Unit 1] The following describes an example of the configuration of a plasma processing system. Figure 1 shows an example of the configuration of a plasma processing apparatus in the first embodiment of this disclosure. The plasma processing system includes an inductively coupled plasma processing apparatus 1 and a control unit 2. The inductively coupled plasma processing apparatus 1 includes a plasma processing chamber 10, a gas supply unit 20, a power supply 30, and an exhaust system 40. The plasma processing chamber 10 includes a dielectric window 101. Furthermore, the plasma processing apparatus 1 includes a substrate support 11, a gas inlet unit, and an antenna 14. The substrate support 11 is disposed within the plasma processing chamber 10. The antenna 14 is disposed on or above the plasma processing chamber 10 (i.e., on or above the dielectric window 101). The plasma processing chamber 10 has a plasma processing space 10s defined by the dielectric window 101, the sidewall 102 of the plasma processing chamber 10, and the substrate support 11. The plasma processing chamber 10 has at least one gas supply port for supplying at least one processing gas to the plasma processing space 10s, and at least one gas outlet for discharging gas from the plasma processing space. The plasma processing chamber 10 is grounded.

[0011] The substrate support portion 11 includes a body portion 111 and a ring assembly 112. The body portion 111 has a central region 111a for supporting the substrate W and an annular region 111b for supporting the ring assembly 112. The wafer is an example of the substrate W. The annular region 111b of the body portion 111 surrounds the central region 111a of the body portion 111 when viewed from above. The substrate W is disposed on the central region 111a of the body portion 111, and the ring assembly 112 is disposed on the annular region 111b of the body portion 111 in a manner surrounding the substrate W on the central region 111a of the body portion 111. Therefore, the central region 111a is also referred to as the substrate support surface for supporting the substrate W, and the annular region 111b is also referred to as the annular support surface for supporting the ring assembly 112. Furthermore, the substrate support portion 11 is an example of a substrate support, the central region 111a is an example of a first region, and the annular region 111b is an example of a second region. Furthermore, in the following description, the central region 111a may be referred to as the substrate support surface 111a, and the annular region 111b may be referred to as the annular support surface 111b.

[0012] In one embodiment, the body 111 includes a base 1110, an electrostatic chuck 1111, and an adhesive layer 1112. The base 1110 includes a conductive member. The conductive member of the base 1110 functions as part of an electrical path 38 connected to the first bias electrode 34 and the second bias electrode 35 (described later). A power supply line 33a is connected to the bottom of the base 1110. Furthermore, a power supply line 33a is also included on the electrical path 38. The electrostatic chuck 1111 is disposed on the base 1110 through the adhesive layer 1112. The electrostatic chuck 1111 is disposed on the base 1110. The electrostatic chuck 1111 includes a ceramic component 1111a and an electrostatic electrode 1111b disposed within the ceramic component 1111a. The ceramic component 1111a has a central region 111a. In one embodiment, the ceramic component 1111a also has an annular region 111b. Furthermore, other components surrounding the electrostatic chuck 1111, such as an annular electrostatic chuck or an annular insulating member, may also have an annular region 111b. In this case, the ring assembly 112 may be disposed on the annular electrostatic chuck or annular insulating member, or on both the electrostatic chuck 1111 and the annular insulating member. Also, at least one RF / DC electrode connected to the RF (Radio Frequency) power supply 31 and / or DC (Direct Current) power supply 32 (described later) may be disposed within the ceramic component 1111a. In this case, at least one RF / DC electrode functions as a bias electrode. That is, the first bias electrode 34 and the second bias electrode 35 (described later) are electrically connected to the RF power supply 31 and / or DC power supply 32 through the electrical path 38. Furthermore, the conductive components of the base 1110 and at least one RF / DC electrode may also function as multiple bias electrodes. Additionally, the electrostatic electrode 1111b may also function as a bias electrode, and the first bias electrode 34 may also function as an electrostatic electrode. Therefore, the substrate support portion 11 includes at least one bias electrode.

[0013] The ring assembly 112 comprises one or more annular members. In one embodiment, the one or more annular members include one or more edge rings and at least one cover ring. The edge rings are formed of a conductive or insulating material, and the cover rings are formed of an insulating material.

[0014] Furthermore, the substrate support portion 11 may also include a temperature control module configured to adjust at least one of the electrostatic chuck 1111, the ring assembly 112, and the substrate W to the target temperature. The temperature control module may also include a heater, a heat-conducting medium, a flow channel 1110a, or a combination thereof. A heat-conducting fluid such as brine or gas flows in the flow channel 1110a. In one embodiment, the flow channel 1110a is formed within the base 1110, and one or more heaters are disposed within the ceramic component 1111a of the electrostatic chuck 1111. Additionally, the substrate support portion 11 may also include a heat-conducting gas supply portion configured to supply heat-conducting gas to the gap between the back surface of the substrate W and the central region 111a.

[0015] The electrostatic chuck 1111 is located on the lower part of the substrate support surface 111a, and sequentially includes an electrostatic electrode 1111b and a first bias electrode 34 from the substrate support surface 111a side, and is formed of a dielectric material such as ceramic. Furthermore, the electrostatic chuck 1111 is located on the lower part of the ring support surface 111b, and sequentially includes an impedance adjustment electrode 50 and a second bias electrode 35 from the ring support surface 111b side. The first bias electrode 34 is connected to, for example, the bottom of the base 1110 through a conductor 36b passing through a through hole 36a in the base 1110. In addition, an insulating sleeve (not shown) is provided inside the through hole 36a, making the base 1110 and the conductor 36b electrically insulated within the through hole 36a. The second bias electrode 35 is connected to, for example, the bottom of the base 1110 through a conductor 37b passing through a through hole 37a in the base 1110. In addition, an insulating sleeve (not shown) is provided inside the through hole 37a, so that the base 1110 and the conductor 37b are electrically insulated within the through hole 37a.

[0016] That is, the first bias electrode 34 and the second bias electrode 35 are connected to the matching circuit 33 (described later) through conductors 36b and 37b, the base 1110, and the power supply line 33a to form an electrical path 38. Furthermore, the connection between the first bias electrode 34 and the second bias electrode 35 and the base 1110 is not limited to conductive components; any method capable of supplying bias RF signals, such as magnetic resonance, capacitive coupling, and inductive coupling, is acceptable. In other words, the electrical path 38 is configured to connect a bias power supply (e.g., the first bias RF generator 31b (described later), the first bias electrode 34, and the second bias electrode 35). Additionally, in the electrical path 38, the first bias RF generator 31b and the second bias RF generator 31c (described later) may not be connected to the base 1110; instead, the first bias RF generator 31b and the second bias RF generator 31c may be directly connected to the first bias electrode 34 and the second bias electrode 35. In addition, the second bias electrode 35 also has the function of suppressing abnormal discharge of the LF1 power supplied from the first bias RF generation unit 31b described later.

[0017] The impedance adjustment electrode 50 is grounded through the impedance adjustment mechanism 51. The impedance adjustment mechanism 51 adjusts the amount of RF signal (electrical bias) supplied from the second bias electrode 35 flowing to the ground side. By adjusting the amount of RF signal flowing to the ground side through the impedance adjustment electrode 50, the potential of the ring assembly 112 is adjusted to control the tilt angle and / or adjust the etching rate. At least one impedance adjustment electrode 50 is provided in the electrostatic chuck 1111. When multiple impedance adjustment electrodes 50 are provided, for example, two or more are provided in the circumferential direction of the substrate support portion 11, the impedance adjustment mechanism 51 is also provided in a number corresponding to the impedance adjustment electrodes 50. Furthermore, two or more impedance adjustment electrodes 50 may also be provided in the radial direction of the substrate support portion 11. In addition, two or more impedance adjustment electrodes 50 may be provided in both the circumferential and radial directions of the substrate support portion 11. Moreover, the impedance adjustment electrode 50 is configured to be parallel to the second bias electrode 35.

[0018] By bringing the first bias electrode 34 and the second bias electrode 35 as close as possible to the substrate W and the ring assembly 112, the impedance of the capacitor formed by the substrate W, the ring assembly 112, the ceramic of the electrostatic chuck 1111, and the electrodes is reduced. This reduces the potential difference between the first bias electrode 34 and the second bias electrode 35 and the substrate W and the ring assembly 112. Similarly, the impedance of the capacitor formed by the first bias electrode 34 and the electrostatic electrode 1111b, and the second bias electrode 35 and the impedance adjustment electrode 50, respectively, also decreases. Furthermore, the impedance of the capacitor formed by the electrostatic electrode 1111b, the substrate W, the impedance adjustment electrode 50, and the ring assembly 112, respectively, also decreases.

[0019] Alternatively, an impedance adjustment electrode can be provided at the lower part of the substrate support surface 111a, and an impedance adjustment mechanism connected to the impedance adjustment electrode can be provided.

[0020] The gas introduction section is configured to introduce at least one processing gas from the gas supply section 20 into the plasma processing space 10s. In one embodiment, the gas introduction section includes a central gas injector (CGI) 13. The central gas injector 13 is disposed above the substrate support section 11 and installed in the central opening formed in the dielectric window 101. The central gas injector 13 has at least one gas supply port 13a, at least one gas flow channel 13b, and at least one gas inlet port 13c. The processing gas system supplied to the gas supply port 13a is introduced into the plasma processing space 10s through the gas inlet port 13c and the gas flow channel 13b. Alternatively, the gas introduction section may include, in addition to or in place of the central gas injector 13, one or more side gas injectors (SGIs) installed in one or more openings formed in the sidewall 102.

[0021] The gas supply unit 20 may also include at least one gas source 21 and at least one flow controller 22. In one embodiment, the gas supply unit 20 is configured to supply at least one process gas from a corresponding gas source 21 to a gas inlet unit via a corresponding flow controller 22. Each flow controller 22 may also include, for example, a mass flow controller or a pressure control type flow controller. In addition, the gas supply unit 20 may also include one or more flow adjustment elements that adjust or pulse the flow rate of the at least one process gas.

[0022] The power supply 30 includes an RF power supply 31 connected to the plasma processing chamber 10 via at least one impedance matching circuit. The RF power supply 31 is configured to supply at least one RF signal (RF power) to at least one first bias electrode 34, a second bias electrode 35, and an antenna 14. This allows plasma to be formed from at least one processing gas supplied to the plasma processing space 10s. Therefore, the RF power supply 31 can function as at least part of a plasma generation unit configured to generate plasma from one or more processing gases within the plasma processing chamber 10. Furthermore, supplying a bias RF signal to at least one first bias electrode 34 and a second bias electrode 35 generates a bias potential on the substrate W and attracts ions from the formed plasma to the substrate W.

[0023] In one embodiment, the RF power supply 31 includes a source RF generation unit 31a, a first bias RF generation unit 31b, and a second bias RF generation unit 31c. The source RF generation unit 31a is configured to be connected to the antenna 14 and generate a source RF signal (source RF power) for plasma generation through at least one impedance matching circuit. In one embodiment, the source RF signal has a frequency in the range of 10MHz to 150MHz. In another embodiment, the source RF generation unit 31a may also be configured to generate multiple source RF signals with different frequencies. The generated one or more source RF signals are supplied to the antenna 14.

[0024] The first bias RF generation unit 31b is configured to be connected to the first bias electrode 34 and the second bias electrode 35 via a matching circuit 33, a power supply line 33a, and a base 1110, and generates a first bias RF signal (hereinafter also referred to as LF1 power). The generated first bias RF signal is supplied to the first bias electrode 34 and the second bias electrode 35. In one embodiment, the first bias RF signal has a frequency lower than that of the source RF signal. In another embodiment, the first bias RF signal has a frequency in the range of 100kHz to 5MHz. The generated first bias RF signal is supplied to at least one first bias electrode 34 and a second bias electrode 35.

[0025] The second bias RF generator 31c is configured to be connected to the first bias electrode 34 and the second bias electrode 35 via a matching circuit 33, a power supply line 33a, and a base 1110, and generates a second bias RF signal (hereinafter also referred to as LF2 power). The generated second bias RF signal is supplied to the first bias electrode 34 and the second bias electrode 35. The frequency of the second bias RF signal can be the same as or different from the frequency of the source RF signal. The frequency of the second bias RF signal is higher than the frequency of the first bias RF signal. In one embodiment, the second bias RF signal has a frequency in the range of 1MHz to 60MHz. The generated second bias RF signal is supplied to at least one first bias electrode 34 and the second bias electrode 35. Furthermore, in various embodiments, at least one of the source RF signal, the first bias RF signal, and the second bias RF signal can be pulsed. In addition, at least one of the first bias RF signal and the second bias RF signal can have at least two power levels.

[0026] Matching circuit 33 is connected to the first bias RF generation unit 31b, the second bias RF generation unit 31c, and the substrate support unit 11 (base 1110). Matching circuit 33 can supply the first bias RF signal from the first bias RF generation unit 31b to the substrate support unit 11 via matching circuit 33. Furthermore, matching circuit 33 can supply the second bias RF signal from the second bias RF generation unit 31c to the substrate support unit 11 via matching circuit 33.

[0027] Furthermore, the power supply 30 may also include a DC power supply 32 connected to the plasma processing chamber 10. The DC power supply 32 includes a bias DC generating unit 32a. In one embodiment, the bias DC generating unit 32a is configured to be connected to at least one first bias electrode 34 and a second bias electrode 35, and generates a bias DC signal. The generated bias DC signal is applied to at least one first bias electrode 34 and a second bias electrode 35.

[0028] In various embodiments, the bias DC signal can also be pulsed. In this case, a series of voltage pulses are applied to at least one first bias electrode 34 and a second bias electrode 35. The voltage pulses can have rectangular, trapezoidal, triangular, or combinations thereof pulse waveforms. In one embodiment, a waveform generation unit for generating a voltage pulse sequence from the DC signal is connected between the bias DC generation unit 32a and at least one first bias electrode 34 and a second bias electrode 35. Therefore, the bias DC generation unit 32a and the waveform generation unit constitute a voltage pulse generation unit. The voltage pulses can have positive or negative polarity. Furthermore, the voltage pulse sequence can include one or more positive voltage pulses and one or more negative voltage pulses within one cycle. In addition, the bias DC generation unit 32a can be provided separately from the RF power supply 31, or it can be provided in place of at least one of the first bias RF generation unit 31b and the second bias RF generation unit 31c. Furthermore, in the following description, the first bias signal may include a first bias RF signal and / or a bias DC signal, and the second bias signal may include a second bias RF signal and / or a bias DC signal.

[0029] Antenna 14 includes one or more coils. In one embodiment, antenna 14 may also include an outer coil and an inner coil arranged coaxially. In this case, RF power supply 31 may be connected to both the outer coil and the inner coil, or to either the outer coil or the inner coil. In the former case, the same RF generating unit may be connected to both the outer coil and the inner coil, or individual RF generating units may be connected to the outer coil and the inner coil respectively.

[0030] The exhaust system 40 can be connected to, for example, a gas outlet 10e located at the bottom of the plasma processing chamber 10. The exhaust system 40 may also include a pressure regulating valve and a vacuum pump. The pressure within the plasma processing space 10s is adjusted by the pressure regulating valve. The vacuum pump may include a turbomolecular pump, a dry pump, or a combination thereof.

[0031] The control unit 2 processes computer-executable instructions that cause the plasma processing apparatus 1 to perform the various processes described in this disclosure. The control unit 2 can be configured to control the components of the plasma processing apparatus 1 to perform the various processes described herein. In one embodiment, part or all of the control unit 2 may be included in the plasma processing apparatus 1. The control unit 2 may include a processing unit 2a1, a storage unit 2a2, and a communication interface 2a3. The control unit 2 is implemented by, for example, a computer 2a. The processing unit 2a1 can be configured to read programs from the storage unit 2a2 and perform various control actions by executing the read programs. The programs may be pre-stored in the storage unit 2a2 or retrieved via media when needed. The retrieved programs are stored in the storage unit 2a2 and read and executed by the processing unit 2a1. The media may be various memory media readable by the computer 2a or a communication line connected to the communication interface 2a3. The processing unit 2a1 may be a CPU (Central Processing Unit). The storage unit 2a2 may include RAM (Random Access Memory), ROM (Read Only Memory), HDD (Hard Disk Drive), SSD (Solid State Drive), or a combination thereof. The communication interface 2a3 can communicate with the plasma processing device 1 through a communication line such as a LAN (Local Area Network).

[0032] [The relationship between edge loop consumption and skew] Next, Figure 2 will be used to illustrate the relationship between edge ring wear and tilt. Figure 2 is an example diagram showing the relationship between edge ring wear and tilt. State 60 shown in Figure 2 represents the state of the plasma sheath layer at the periphery of the substrate W when the edge ring is not worn. State 61 represents the state where the substrate W is processed within a predetermined period, causing further wear of the edge ring. State 62 represents the state where, starting from state 61, the substrate W is further processed within a predetermined period, causing even further wear of the edge ring.

[0033] In state 60, the height of the upper surface of the unconsumed edge ring 112a is higher than that of the upper surface of the substrate W. Therefore, the plasma sheath layer 64a rises between the periphery of the substrate W and the upper surface of the edge ring 112a. At this time, the distance from the upper surface of the edge ring 112a to the plasma sheath layer 64a is 65. In this case, at the periphery of the substrate W, the direction 66a of the electric field is tilted outwards towards the substrate W, and as shown by the hole 67a, the bottom of the hole tilts outwards towards the substrate W. Afterwards, the edge ring 112a is further consumed, becoming the edge ring 112b shown in state 61.

[0034] In state 61, the height of the upper surface of the edge ring 112b is approximately the same as the upper surface of the substrate W. When the bias power applied to the edge ring 112b is the same as in state 60, the plasma sheath layer 64b becomes approximately the same height as the periphery of the substrate W. At this time, the bias power between the upper surface of the edge ring 112b and the plasma sheath layer 64b remains unchanged, and therefore the interval is 65, the same as in state 60. In this case, the direction 66b of the electric field is not tilted at the periphery of the substrate W, and as shown by the hole 67b, no tilting occurs. Subsequently, the edge ring 112b is further consumed, becoming the edge ring 112c shown in state 62.

[0035] In state 62, the height of the upper surface of the edge ring 112c is lower than that of the upper surface of the substrate W. Therefore, the plasma sheath layer 64c descends from the periphery of the substrate W to the upper surface of the edge ring 112c. At this time, the bias power remains constant from the upper surface of the edge ring 112c to the plasma sheath layer 64c, and is therefore spaced 65 as in state 60. In this case, at the periphery of the substrate W, the direction 66c of the electric field is inclined inwards towards the substrate W, and as shown by the hole 67c, the bottom of the hole is inclined inwards towards the substrate W. In this embodiment, the bias power applied to the ring assembly 112 is adjusted according to the consumption of the edge ring included in the ring assembly 112 so that the heights of the plasma sheath layers on the upper surface of the substrate W and the upper surface of the ring assembly 112 are approximately the same. In this embodiment, the bias power applied to the ring assembly 112 is LF1 power and LF2 power, which can be adjusted by the impedance adjustment mechanism 51 connected to the impedance adjustment electrode 50. Furthermore, in the following description, the edge ring included in the ring assembly 112 may sometimes be simply referred to as the ring assembly 112.

[0036] [Circuit configuration of the impedance adjustment mechanism] Next, the circuit configuration of the impedance adjustment mechanism 51 will be explained using FIG3. FIG3 is a diagram showing an example of the circuit configuration of the impedance adjustment mechanism in the first embodiment. As shown in FIG3, the impedance adjustment mechanism 51 includes a first variable capacitor 52 that controls a first bias RF signal, a second variable capacitor 53 that controls a second bias RF signal, and an isolator 54. Furthermore, in the following description, the frequency of the first bias RF signal is, for example, 400kHz, and the frequency of the second bias RF signal is, for example, 12.88MHz.

[0037] The first variable capacitor 52 has a variable capacitance range of, for example, 200pF to 2000pF, so as to control the first bias RF signal (LF1 power) as the low-frequency side (400kHz). The second variable capacitor 53 has a variable capacitance range of, for example, 10pF to 475pF, so as to control the second bias RF signal (LF2 power) as the high-frequency side (12.88MHz). That is, the first variable capacitor 52 can be controlled in the high capacitance range in the impedance adjustment mechanism 51, and the second variable capacitor 53 can be controlled in the low capacitance range in the impedance adjustment mechanism 51. Furthermore, in the following description, the variable capacitor will sometimes be referred to as a variable capacitor (VC). For example, the first variable capacitor 52 will sometimes be referred to as the first variable capacitor 52, and the second variable capacitor 53 will sometimes be referred to as the second variable capacitor 53.

[0038] Isolator 54 is connected between impedance adjustment electrode 50 and first variable capacitor 52, and blocks the second bias RF signal. That is, isolator 54 is connected in series with first variable capacitor 52 on the side closer to impedance adjustment electrode 50 than first variable capacitor 52. In impedance adjustment mechanism 51, first variable capacitor 52 and isolator 54 are connected in parallel with second variable capacitor 53 and connected to impedance adjustment electrode 50.

[0039] The isolator 54 includes a capacitor 54a and a coil 54b. The capacitor 54a and the coil 54b form a parallel resonant circuit. The isolator 54 blocks the second bias RF signal flowing from the impedance adjustment mechanism 51 by setting the frequency of the second bias RF signal (12.88MHz) as the resonant frequency. Furthermore, the resonant frequency of the parallel resonant circuit of the isolator 54 can be a frequency near the frequency of the second bias RF signal. For example, when the frequency of the second bias RF signal is 12.88MHz, the resonant frequency of the parallel resonant circuit of the isolator 54 can be 13MHz. Alternatively, the isolator 54 can be a low-pass filter, for example, using a coil, which allows the first bias RF signal to pass through but blocks the second bias RF signal.

[0040] Furthermore, the first variable capacitor 52 and the second variable capacitor 53 can also be configured with other types of circuit constants. In this case, the first variable capacitor 52 and the second variable capacitor 53 can be represented as a first impedance adjustment mechanism 52 and a second impedance adjustment mechanism 53, respectively. The changes in the circuit configuration when the first impedance adjustment mechanism 52 and the second impedance adjustment mechanism 53 are shown in FIG4.

[0041] Figure 4 shows another example of the circuit configuration of the impedance adjustment mechanism in the first embodiment. As shown in Figure 4, the first impedance adjustment mechanism 52 and the second impedance adjustment mechanism 53 may have various configurations such as circuits 170-174. Circuit 170 is an LC series circuit using an inductor and a variable capacitor. Circuit 171 is an RC series circuit using a resistor and a variable capacitor. Circuit 172 is an RR series circuit using a resistor and a variable resistor. Circuit 173 is a circuit that can switch between a high-frequency LC series circuit and a low-frequency RR series circuit using a switch SW. Circuit 174 is a circuit that can switch between a high-efficiency LC series circuit (inductor L1, variable capacitor C1) and a low-efficiency LC series circuit (inductor L2, variable capacitor C2) using a switch SW. As shown in Figure 175, circuit 174 widens the adjustment range by switching the switch SW. In addition, although not shown in Figure 4, the impedance adjustment mechanisms 52 and 53 may also be configured using a circuit with a variable inductor.

[0042] In this way, regardless of the type of circuit constant (R, L, C) to be adjusted, variable resistors, variable capacitors, variable inductors, etc., can be used in the first impedance adjustment mechanism 52 and the second impedance adjustment mechanism 53. Furthermore, the first impedance adjustment mechanism 52 and the second impedance adjustment mechanism 53 can be combined with one or more variable mechanisms (variable resistors, variable capacitors, variable inductors, etc.) according to the frequency of the bias RF signal, component size, and adjustment range. In addition, since the first impedance adjustment mechanism 52 and the second impedance adjustment mechanism 53 do not require the heater current to be switched on, variable resistors or variable capacitors can be used. Furthermore, the first impedance adjustment mechanism 52 and the second impedance adjustment mechanism 53 can also be composed of at least one of variable resistors, variable capacitors, variable inductors, and a DC power supply. For example, when the bias RF signal is high frequency, the impedance between the second bias electrode 35 and the impedance adjustment electrode 50, and the impedance between the impedance adjustment electrode 50 and the ring assembly 112, will be smaller. Therefore, by using a DC power supply to control the potential, the potential can be controlled more effectively.

[0043] Here, Figures 5 and 6 are used to illustrate the control range of the first variable capacitor 52 in the first bias RF signal and the second bias RF signal. Figures 5 and 6 are graphs showing an example of the relationship between the capacitance and reactance of the variable capacitor. Graph 70 shown in Figure 5 shows the relationship between the capacitance C and reactance X of the first variable capacitor 52 in the first bias RF signal (400kHz). As shown in Graph 70, for the first bias RF signal (400kHz), the control range 71 of reactance X can be approximately 900Ω. The capacitance C corresponding to the control range 71 is approximately 350pF to 3000pF. Furthermore, when the lower limit of capacitance C increases to approximately 200pF, the control range 71 of reactance X can be extended to approximately 1500Ω. Therefore, as described above, the variable range of the first variable capacitor 52 can be 200pF to 2000pF.

[0044] Figure 6 shows the relationship between the capacitance C and reactance X of the first variable capacitor 52 in the second bias RF signal (12.88MHz). As shown in Figure 72, for the second bias RF signal (12.88MHz), the control amplitude 73 of reactance X is approximately 50Ω. The capacitance C corresponding to the control amplitude 73 is approximately 150pF~500pF. That is, the first variable capacitor 52 is in a state where there is almost no control amplitude over the second bias RF signal (12.88MHz). This is considered to be the effect of floating capacitance. Therefore, for the second bias RF signal (12.88MHz), the isolator 54 is used to block the first variable capacitor 52 side, and the second variable capacitor 53 is used to adjust the impedance.

[0045] Next, Figures 7 and 8 will be used to illustrate the effect of the change in capacitance of the first variable capacitor 52 on the second variable capacitor 53 when a second bias RF signal (12.88MHz) is supplied. Figures 7 and 8 are graphs showing an example of the effect between multiple variable capacitors. In graph 74 shown in Figure 7, the currents of the first variable capacitor 52, the second variable capacitor 53, and the plasma are shown when the first variable capacitor 52 is set to 200pF, a second bias RF signal is supplied, and the capacitance C of the second variable capacitor 53 is changed. Curve 75 represents the current on the second variable capacitor 53 side. Curve 76 represents the plasma current. Curve 77 represents the current on the first variable capacitor 52 side. As shown by curves 75-77, when the capacitance C of the second variable capacitor 53 is changed from 10pF to 475pF, the plasma current decreases, and the current on the second variable capacitor 53 side increases. On the other hand, the current on the first variable capacitor 52 side hardly flows and does not change.

[0046] Figure 8 shows graph 78, which illustrates the currents of the first variable capacitor 52, the second variable capacitor 53, and the plasma when the first variable capacitor 52 is set to 2000pF, a second bias RF signal is supplied, and the capacitance C of the second variable capacitor 53 is changed. Curve 75a represents the current on the second variable capacitor 53 side. Curve 76a represents the plasma current. Curve 77a represents the current on the first variable capacitor 52 side. As shown by curves 75a-77a, when the capacitance C of the second variable capacitor 53 is changed from 10pF to 475pF, the plasma current decreases, and the current on the second variable capacitor 53 side increases. On the other hand, the current on the first variable capacitor 52 side hardly flows and remains unchanged. Thus, it can be seen that the isolator 54 functions in the impedance adjustment mechanism 51 so that even when the capacitance C of the first variable capacitor 52 is changed from 200pF to 2000pF, it does not affect the second bias RF signal. That is, it can be seen that even if the capacitance C of the first variable capacitor 52 is changed to a high capacitance, no current will flow through the first variable capacitor 52.

[0047] [Example of adjustment for a variable capacitor] Next, an example of adjusting the first variable capacitor 52 and the second variable capacitor 53 will be described using FIG9. FIG9 is a diagram showing an example of adjusting the multiple variable capacitors in the first embodiment. In FIG9, from left to right, an example is shown of adjusting the capacitance of the first variable capacitor 52 and the second variable capacitor 53 according to the consumption of the edge ring included in the ring assembly 112. In addition, in FIG9, the first bias electrode 34, the second bias electrode 35 and the electrostatic electrode 1111b are omitted, and the flow direction of LF1 power and LF2 power is indicated by white arrows. Also, the representation of the flow direction of LF1 power and LF2 power in FIG9 is relative and not limited thereto. Furthermore, LF1 power and LF2 power can be supplied simultaneously or switched.

[0048] First, the unconsumed edge ring 112d on the left side of Figure 9 will be explained. The capacitances of the first variable capacitor 52 and the second variable capacitor 53 are adjusted so that the plasma sheath layer 64d is at the same height as the upper part of the edge ring 112d on the substrate W. For example, the first variable capacitor 52 is adjusted to 2000pF, and the second variable capacitor 53 is adjusted to 475pF. When the LF2 power (12.88MHz) is supplied to the impedance adjustment electrode 50, the LF2 power tends to flow towards the impedance adjustment mechanism 51 side compared to the edge ring 112d side. That is, the LF2 power tends to flow towards the second variable capacitor 53 side, which has been adjusted to 475pF, compared to the edge ring 112d side. Furthermore, since the LF2 power is blocked by the isolator 54, it hardly flows to the first variable capacitor 52 side. That is, when the LF2 power is supplied to the impedance adjustment electrode 50, the impedance adjustment mechanism 51 appears to be a capacitive load with a capacitance of 475pF.

[0049] When LF1 power (400kHz) is supplied to the impedance adjustment electrode 50, LF1 power tends to flow towards the impedance adjustment mechanism 51 side more than the edge ring 112d side. That is, compared to the edge ring 112d side, LF1 power tends to flow towards the first variable capacitor 52, which has been adjusted to 2000pF, and the second variable capacitor 53, which has been adjusted to 475pF. Furthermore, since LF1 power is not blocked by the isolator 54, it tends to flow towards the first variable capacitor 52 side more than the second variable capacitor 53 side. In other words, when LF1 power is supplied to the impedance adjustment electrode 50, the impedance adjustment mechanism 51 appears to be a capacitive load with a capacitance of 2475pF.

[0050] Next, the further consumed edge ring 112e in the center of Figure 9 will be explained. The capacitances of the first variable capacitor 52 and the second variable capacitor 53 are adjusted so that the plasma sheath layer 64e is at the same height on the upper part of the substrate W as the upper part of the edge ring 112e. For example, the first variable capacitor 52 is adjusted to 1000pF, and the second variable capacitor 53 is adjusted to 200pF. When the LF2 power (12.88MHz) is supplied to the impedance adjustment electrode 50, the LF2 power flows to the same extent on the edge ring 112e side and the impedance adjustment mechanism 51 side. That is, the LF2 power flows to the same extent on the edge ring 112e side and the side of the second variable capacitor 53, which has been adjusted to 200pF. Furthermore, since the LF2 power is blocked by the isolator 54, it hardly flows to the first variable capacitor 52 side. That is, when the LF2 power is supplied to the impedance adjustment electrode 50, the impedance adjustment mechanism 51 appears to be a capacitive load with a capacitance of 200pF.

[0051] When LF1 power (400kHz) is supplied to the impedance adjustment electrode 50, LF1 power flows to the same extent on the edge ring 112e side and the impedance adjustment mechanism 51 side. That is, LF1 power flows to the same extent on the edge ring 112e side, the first variable capacitor 52 which has been adjusted to 1000pF, and the second variable capacitor 53 which has been adjusted to 200pF. Furthermore, LF1 power is not blocked by the isolator 54, so it tends to flow to the first variable capacitor 52 side more than the second variable capacitor 53 side. In other words, when LF1 power is supplied to the impedance adjustment electrode 50, the impedance adjustment mechanism 51 appears to be a capacitive load with a capacitance of 1200pF.

[0052] Next, the further consumed edge ring 112f on the right side of Figure 9 will be explained. The capacitances of the first variable capacitor 52 and the second variable capacitor 53 are adjusted so that the plasma sheath layer 64f is at the same height on the upper part of the substrate W as the upper part of the edge ring 112f. For example, the first variable capacitor 52 is adjusted to 200pF and the second variable capacitor 53 is adjusted to 10pF. When the LF2 power (12.88MHz) is supplied to the impedance adjustment electrode 50, the LF2 power tends to flow to the edge ring 112f side compared to the impedance adjustment mechanism 51 side. That is, the LF2 power tends to flow to the edge ring 112f side compared to the second variable capacitor 53 side, which has been adjusted to 10pF. Furthermore, since the LF2 power is blocked by the isolator 54, it hardly flows to the first variable capacitor 52 side. That is, when the LF2 power is supplied to the impedance adjustment electrode 50, the impedance adjustment mechanism 51 appears to be a capacitive load with a capacitance of 10pF.

[0053] When LF1 power (400kHz) is supplied to impedance adjustment electrode 50, LF1 power tends to flow towards the first edge ring 112f side relative to the impedance adjustment mechanism 51 side. That is, LF1 power tends to flow towards the edge ring 112f side relative to the first variable capacitor 52 (adjusted to 200pF) and the second variable capacitor 53 (adjusted to 10pF). Furthermore, since LF1 power is not blocked by isolator 54, it tends to flow towards the first variable capacitor 52 side relative to the second variable capacitor 53 side. In other words, when LF1 power is supplied to impedance adjustment electrode 50, impedance adjustment mechanism 51 appears as a capacitive load with a capacitance of 210pF.

[0054] In the adjustment example shown in Figure 9, for power LF1, the variable range of the capacitance of the impedance adjustment mechanism 51 is 210pF to 2475pF. Furthermore, for power LF2, the variable range of the capacitance of the impedance adjustment mechanism 51 is 10pF to 475pF. That is, the plasma processing apparatus 1 of this embodiment can improve the controllability of multiple bias RF signals with different frequencies.

[0055] (Variation Example 1) Next, a variation of the first embodiment will be described using Figures 10 to 12. In Variation 1, a countermeasure is shown that, due to the presence of the impedance adjustment electrode 50 and the impedance adjustment mechanism 51, the height of the plasma sheath layer on the upper part of the ring assembly 112 tends to be lower than the height of the plasma sheath layer on the upper part of the substrate W. Furthermore, although there is a method to supply bias power to the ring assembly 112 from a power source different from the first bias RF generation unit 31b and the second bias RF generation unit 31c, the edge rings become prone to wear.

[0056] In Modification 1, the initial thickness of the edge ring of the ring assembly 112 is thicker than that of the first embodiment. For example, assuming the impedance adjustment mechanism 51 is not provided, the initial thickness of the edge ring is set such that the height of the plasma sheath layer on the upper part of the ring assembly 112 is higher than the height of the plasma sheath layer on the upper part of the substrate W. That is, in the absence of the impedance adjustment mechanism 51, the initial thickness of the edge ring is set to be inclined outward. In Modification 1, in the initial state, the impedance adjustment mechanism 51 is set to a low impedance (large capacitance C) so that the height of the plasma sheath layer on the upper part of the ring assembly 112 is approximately the same as the height of the plasma sheath layer on the upper part of the substrate W. That is, in the initial state, the inclination angle at the periphery of the substrate W is vertical. Then, corresponding to the consumption of the edge ring, the impedance adjustment mechanism 51 is adjusted to the high impedance (small capacitance C) side so that the height of the plasma sheath layer on the upper part of the ring assembly 112 is approximately the same as the height of the plasma sheath layer on the upper part of the substrate W. That is, corresponding to the consumption of the edge ring, the impedance adjustment mechanism 51 is adjusted to the high impedance (small capacitance C) side, thereby correcting the tilt angle.

[0057] Here, Figures 10 and 11 are used to illustrate the consumption of the edge ring over time and the bias power. Figure 10 is a diagram showing an example of the edge ring consumption in the reference example. The reference example in Figure 10 is the case where the impedance adjustment mechanism 51 is not provided in the edge ring. The graph 80 shown in Figure 10 shows the relationship between the bias power supplied to the edge ring and the usage time in the reference example. Furthermore, the area 80a of graph 80 represents the cumulative consumption of the edge ring relative to the usage time. As shown in graph 80, in the reference example, a constant bias power (represented as 100% in Figure 10) is supplied to the edge ring regardless of the usage time, therefore the consumption of the edge ring is also a constant value regardless of the usage time.

[0058] Figure 11 is a diagram showing an example of edge ring consumption in Modification 1. Modification 1 in Figure 11 shows the case where the impedance adjustment mechanism 51 is adjusted from low impedance to high impedance in stages, corresponding to the edge ring consumption (corresponding to usage time). Graph 81 shown in Figure 11 represents the relationship between the bias power supplied to the edge ring and usage time in Modification 1. Furthermore, the bias power includes LF1 power and LF2 power. Also, the area 81a of graph 81 represents the cumulative edge ring consumption relative to usage time. As shown in graph 81, in Modification 1, when the edge ring consumption is low, the impedance adjustment mechanism 51 is adjusted to a low impedance to reduce the bias power supplied to the edge ring. Then, in Modification 1, the impedance adjustment mechanism 51 is adjusted to a high impedance in stages, corresponding to the edge ring consumption. Comparing the area 80a of the reference example with the area 81a of Modification 1, it is found that area 81a is smaller; therefore, in Modification 1, the lifespan of the edge ring of the ring assembly 112 can be extended.

[0059] Figure 12 is an example of the relationship between the sheath potential and the capacitance of the variable capacitor in Modification 1. As shown in graph 82 of Figure 12, when the impedance adjustment mechanism 51 of Modification 1 is at a low impedance, for example, when the capacitance C is 2000 pF, the sheath potential at the edge ring of the ring assembly 112 will be smaller than the sheath potential at the top of the substrate W. Furthermore, in graph 82, the absolute value of the sheath potential is normalized within a predetermined range. That is, the gap between the upper surface of the edge ring of the ring assembly 112 and the plasma sheath will also be smaller than the gap between the upper surface of the substrate W and the plasma sheath. Since initially, the upper surface of the edge ring of the ring assembly 112 in Modification 1 is higher than the upper surface of the substrate W, the thickness of the edge ring of the ring assembly 112 fills the gap difference between the plasma sheath and the substrate W. That is, the thickness of the edge ring of the ring assembly 112 is taken into account to make the height of the plasma sheath at the top of the ring assembly 112 approximately the same as the height of the plasma sheath at the top of the substrate W. Then, corresponding to the consumption of the edge ring of the ring assembly 112, the impedance adjustment mechanism 51 is adjusted towards the high impedance (small capacitance C) side. That is, it is adjusted according to the consumption of the edge ring of the ring assembly 112 so that the height of the plasma sheath layer on the upper part of the ring assembly 112 is approximately the same as the height of the plasma sheath layer on the upper part of the substrate W.

[0060] (Variation Example 2) Next, a variation of the first embodiment, Figure 2, will be described using Figures 13 and 14. In variation 2, a countermeasure example is shown for the etching rate deviation caused by the arrangement of the conductive rod connecting the impedance adjustment electrode 50 and the impedance adjustment mechanism 51.

[0061] First, the deviation of the etching rate will be explained using Figure 13. Figure 13 is a diagram showing an example of the deviation of the etching rate. Figure 13 shows an example of the etching rate deviation of the substrate W in the electrostatic chuck 1111 without adjustment by the impedance adjustment mechanism 51, viewed from a top angle. In addition, in Figure 13, the difference in etching rate is represented by different shaded lines. As shown in Figure 13, an introduction electrode 35a connected to the second bias electrode 35, an impedance adjustment mechanism 51, and an arc-shaped conductive rod 55 connected to the impedance adjustment mechanism 51 are arranged on the lower part of the substrate support surface 111a. The introduction electrode 35a forms part of the electrical path 38 and is connected to the first bias RF generation section 31b and the second bias RF generation section 31c. The conductive rod 55 is arranged along the inner periphery of the ring assembly 112 from its connection with the impedance adjustment mechanism 51, and is connected to the impedance adjustment electrode 50 near the introduction electrode 35a. The other end of the impedance adjustment mechanism 51 is electrically connected to the outside of the electrostatic chuck 1111 and grounded. As shown in Figure 13, from a top view angle where the impedance adjustment mechanism 51 and the conductive rod 55 are located, the etching rate of the substrate W deviates in the 9 o'clock to 12 o'clock direction.

[0062] Figure 14 shows an example of the arrangement of the conductive rod in Modification 2. In the electrostatic chuck 1111c of Modification 2 shown in Figure 14, an introduction electrode 35a, an impedance adjustment mechanism 51, and an arc-shaped conductive rod 56 are arranged from the periphery of the central region 111c to the lower part of the ring assembly 112 (annular region 111b). The attraction electrode 35a, connected to the second bias electrode 35, forms part of the electrical path 38 and is connected to the first bias RF generation section 31b and the second bias RF generation section 31c. Furthermore, the conductive rod 56, connected to the impedance adjustment mechanism 51, is arranged approximately around the inner periphery of the ring assembly 112, starting from the first connection portion 56a between it and the impedance adjustment mechanism 51. The conductive rod 56 is connected to the impedance adjustment electrode 50 through the second connection portion 56b between it and the impedance adjustment electrode 50 near the introduction electrode 35a. That is, the conductive rod 56 is arranged along the inner circumference of the annular region 111b (second region) and has a first connection portion 56a between it and the impedance adjustment mechanism 51, and a second connection portion 56b between it and the impedance adjustment electrode 50. Furthermore, in the conductive rod 56, the first connection portion 56a and the second connection portion 56b are adjacent in the circumferential direction, separated by a gap 56c where they are not connected in the circumferential direction. The other end of the impedance adjustment mechanism 51 is electrically connected to the outside of the electrostatic chuck 1111c and grounded. In the conductive rod 56, since the current flows in the direction of arrow 56d, the deviation of the etching rate in the circumferential direction of the substrate W caused by the magnetic field generated by the current can be suppressed.

[0063] (Variation Example 3) Next, a variation of the first embodiment, namely, Example 3, will be described using FIG15. In Example 3, similar to Example 2, a countermeasure example is shown for the etch rate deviation caused by the arrangement of the conductive rod connecting the impedance adjustment electrode 50 and the impedance adjustment mechanism 51.

[0064] Figure 15 shows an example of the arrangement of the conductive rods in Modified Example 3. In the electrostatic chuck 1111d of Modified Example 3 shown in Figure 15, a plurality of lead-in electrodes 35b connected to the second bias electrode 35 and an impedance adjustment mechanism 51a are arranged in the lower part of the central region 111d. Furthermore, an arc-shaped first conductive rod 57 connected to the impedance adjustment mechanism 51a is arranged in the lower part of the central region 111d, and a plurality of second conductive rods 58 are arranged from the first conductive rod 57 toward the center of the central region 111d. Each of the plurality of second conductive rods 58 has a first connecting portion 58a connected to the impedance adjustment mechanism 51a. In addition, the other end of the impedance adjustment mechanism 51a is electrically connected to the outside of the electrostatic chuck 1111d and grounded.

[0065] The introduced electrode 35b forms part of the electrical path 38 and is connected to the first bias RF generation unit 31b and the second bias RF generation unit 31c. The first conductive rod 57 is arranged around the inner circumference of the ring assembly 112. The first conductive rod 57 has multiple second connection portions 57b that are connected to the impedance adjustment electrode 50 on the connection portions 57a of the multiple second conductive rods 58, respectively. In addition, the impedance adjustment electrode 50 may also be, for example, multiple impedance adjustment electrodes divided in the circumferential direction. In this case, each of the multiple impedance adjustment electrodes is regarded as a second connection portion 57b.

[0066] In other words, the electrostatic chuck 1111d has a first conductive rod 57 arranged circumferentially along the inner periphery of the annular region 111b (second region), and a plurality of second conductive rods 58 arranged from the first conductive rod 57 toward the center of the base 1110 of the substrate support portion 11. Furthermore, each of the plurality of second conductive rods 58 has a first connecting portion 58a connected to the impedance adjustment mechanism 51a. Also, the first conductive rod 57 has a plurality of second connecting portions 57b connected to the plurality of impedance adjustment electrodes 50 on its respective connecting portion 57a. Thus, the first conductive rod 57 and the plurality of second conductive rods 58 are arranged such that the plurality of lead-in electrodes 35b connected to the impedance adjustment electrodes 50 are equidistantly arranged relative to the impedance adjustment mechanism 51a arranged in the center of the central region 111d. In this way, the first conductive rod 57 and the plurality of second conductive rods 58 can suppress the deviation of the etching rate in the circumferential direction of the substrate W.

[0067] (Variation Example 4) Next, a variation of the first embodiment, namely Example 4, will be described using FIG16. In Example 4, a countermeasure example is shown, similar to that in Example 2, for the deviation in etching rate caused by the arrangement of the conductive rod connecting the impedance adjustment electrode 50 and the impedance adjustment mechanism 51.

[0068] Figure 16 shows an example of the arrangement of the conductive rod in Modification 4. In Modification 4 shown in Figure 16, a conductive rod 59 is arranged below the base 1110 of the body portion 111. The conductive rod 59 is arranged in multiple turns along the ring assembly 112, i.e., the annular region 111b (second region). That is, the diameter of the conductive rod 59 can be less than, for example, the diameter of the electrostatic chuck 1111, and more than half the diameter of the central region 111a. One end of the conductive rod 59 is connected to the impedance adjustment electrode 50, and the other end is connected to the impedance adjustment mechanism 51. Furthermore, the other end of the impedance adjustment mechanism 51 is electrically connected to the outside of the plasma processing chamber 10 and grounded. In this way, the current of the conductive rod 59 flows in a coil shape along the ring assembly 112, thereby suppressing the deviation of the etching rate in the circumferential direction of the substrate W.

[0069] Furthermore, in Modification 4, similarly to the first embodiment, the LF1 power and LF2 power supplied from the first bias RF generation unit 31b and the second bias RF generation unit 31c are supplied to the first bias electrode 34 and the second bias electrode 35 via the electrical path 38. That is, the LF1 power and LF2 power are supplied to the first bias electrode 34 and the second bias electrode 35 via the electrical path 38 formed by the base 1110 and the conductors 36b and 37b.

[0070] (Variation Example 5) Next, a variation 5 of the first embodiment will be described using FIG17. In variation 5, a countermeasure example is shown for the etch rate deviation caused by the arrangement of the conductive rod connecting the impedance adjustment electrode 50 and the impedance adjustment mechanism 51, and the power loss caused by the propagation of RF power from the base 1110 to the space of the conductive rod.

[0071] Figure 17 shows an example of the arrangement of the conductive rod in Modification 5. In Modification 5 shown in Figure 17, similar to Modification 4, a conductive rod 56e is arranged below the base 1110 of the main body 111. The conductive rod 56e is arranged along the ring assembly 112, i.e., the annular region 111b (second region). That is, the diameter of the conductive rod 56e can be less than, for example, the diameter of the electrostatic chuck 1111, and more than half the diameter of the central region 111a. One end 56g of the conductive rod 56e is connected to the impedance adjustment electrode 50, and the other end 56f is connected to the impedance adjustment mechanism 51. Furthermore, the other end of the impedance adjustment mechanism 51 is electrically connected to the outside of the plasma processing chamber 10 and grounded.

[0072] The conductive rod 56e has the same shape as the conductive rod 56 in Modified Example 2, and is adjacent to the end 56g and end 56f in the circumferential direction by a gap 56h between the unconnected portions in the end 56g and end 56f. The conductive rod 56e functions as a split-ring resonator. This split-ring resonator is configured such that, for example, when the impedance adjustment mechanism 51 adjusts the power of LF1, it has a resonant frequency that resonates with the power of LF2. That is, the resonant frequency of the split-ring resonator is the frequency of the second bias RF signal. In addition, the resonant frequency of the split-ring resonator can also be the frequency of the RF signal (RF power) used for plasma generation. In this way, by making the conductive rod 56e function as a split-ring resonator, the spatial propagation 83 of RF power from the HOT portion of the base 1110, etc., to the conductive rod 56e can be suppressed, thereby suppressing the power loss of RF power. Furthermore, the current in the conductive rod 56e flows circumferentially along the ring assembly 112, thus suppressing the deviation of the etching rate in the circumferential direction of the substrate W.

[0073] (Variation Example 6) Next, a variation of the first embodiment, namely, Example 6, will be described using FIG18. Example 6 describes a case where the power of the electrical bias voltage output from the first bias RF generation unit 31b, the second bias RF generation unit 31c, and / or the bias DC generation unit 32a is controlled. FIG18 shows, as an example, the first bias RF generation unit 31b and the second bias RF generation unit 31c.

[0074] Figure 18 is a diagram showing one configuration example of the electrical path in Modified Example 6. As shown in Figure 18, in the plasma processing apparatus 1 of Modified Example 6, a measuring unit 46 is provided on the electrical path 38 between the first bias voltage RF generating unit 31b and the second bias voltage RF generating unit 31c and the base 1110. Furthermore, in the plasma processing apparatus 1 of Modified Example 6, a high-voltage probe 47 may also be provided between the base 1110 and the ground (earth, ground surface).

[0075] The measuring unit 46, for example a VI probe, is controlled to measure the voltage and current of the bias RF signal and / or bias DC signal output from the first bias RF generation unit 31b, the second bias RF generation unit 31c, and / or the bias DC generation unit 32a. That is, the measuring unit 46 is controlled to measure the power of the bias RF signal and / or bias DC signal. The measuring unit 46 outputs the measured voltage and current to the control unit 2. In other words, the measuring unit 46 is configured to measure the voltage and current of the bias RF signal and / or bias DC signal output from the bias power supply.

[0076] The high-voltage probe 47 is controlled to measure the potential (Vpp) of the base 1110. Alternatively, for example, the high-voltage probe 47 can be pre-removed during program execution by pre-measuring the correlation between the voltage of the bias RF signal and / or bias DC signal measured by the measurement unit 46 and the potential (Vpp) of the base 1110 measured by the high-voltage probe 47. In this case, the control unit 2 can infer the potential (Vpp) of the base 1110 based on the correlation between the voltage of the bias RF signal and / or bias DC signal pre-measuring by the measurement unit 46 and the pre-measuring potential (Vpp) of the base 1110.

[0077] In Variation 6, when the impedance adjustment mechanism 51 is adjusted, the control unit 2 controls the first bias RF generation unit 31b, the second bias RF generation unit 31c, and / or the bias DC generation unit 32a based on the voltage and current input from the measurement unit 46. That is, the first bias RF generation unit 31b, the second bias RF generation unit 31c, and / or the bias DC generation unit 32a control the power of the bias RF signal and / or the bias DC signal (feedback control) based on the voltage and current measured by the measurement unit 46, so that the potentials of the first bias electrode 34 and the second bias electrode 35 become preset values. Here, the preset value is, for example, the value when the potential (Vpp) of the base 1110 measured by the high-voltage probe 47 becomes the desired potential. Furthermore, in Modification 6, it can be assumed that the potentials of the first bias electrode 34 and the second bias electrode 35 are approximately equal to the potential (Vpp) of the base 1110 and the potential (Vdc) of the substrate W and the ring assembly 112.

[0078] That is, the plasma processing apparatus 1 further includes a measuring unit 46, which is configured to measure the voltage and current of the bias RF signal output from at least one of the first bias power supply (first bias RF generation unit 31b) and the second bias power supply (second bias RF generation unit 31c). The bias power supply is configured to control the power of the bias RF signal based on the voltage and current measured by the measuring unit 46 when the impedance adjustment mechanism 51 is adjusted, so that the potentials of the first bias electrode 34 and the second bias electrode 35 become preset values. Furthermore, the plasma processing apparatus 1 further includes a measuring unit 46, which is configured to measure the voltage and current of the bias DC signal output from at least one of the first bias power supply and the second bias power supply (bias DC generation unit 32a). The bias power supply system is configured such that when the impedance adjustment mechanism 51 is adjusted, it controls the power of the bias DC signal based on the voltage and current measured by the measurement unit 46, so that the power supplied to the first bias electrode 34 and the second bias electrode 35 becomes a preset value.

[0079] (Second Implementation Type) In the first embodiment described above, the second bias electrode 35 is normally connected to the base 1110. However, a switch can also be provided to switch the conduction / disconnection according to the frequency of the bias RF signal. This embodiment will be described as the second embodiment. Furthermore, the plasma processing device in the second embodiment is the same as the first embodiment, except for the switch provided on the conductor 37b connecting the base 1110 and the second bias electrode 35. Therefore, the repeated description of this configuration and operation is omitted.

[0080] Figure 19 is a diagram showing a configuration example of the plasma processing apparatus in the second embodiment. As shown in Figure 19, the plasma processing apparatus 1a of the second embodiment has a switch 37c provided on the conductor 37b of the first embodiment.

[0081] Switch 37c is disposed on the conductor 37b connecting the base 1110 and the second bias electrode 35. Switch 37c is disposed, for example, between the connection portion of the conductor 37b to the base 1110 and the opening of the through hole 37a. When LF1 power is supplied, switch 37c is controlled to be on, so that LF1 power is supplied to the second bias electrode 35. On the other hand, when LF2 power is supplied, switch 37c is controlled to be off, so that LF2 power is not supplied to the second bias electrode 35. That is, LF1 power is supplied to both the first bias electrode 34 and the second bias electrode 35, while LF2 power is supplied to the first bias electrode 34 but not to the second bias electrode 35.

[0082] Figure 20 shows an example of the independent controllability of the edge ring side in the second embodiment. Table 90 shown in Figure 20 summarizes the controllability of the sheath potential (denoted as "Vdc" in Table 90) when the switch 37c is turned on / off under the condition of supplying 12.88MHz, 20W LF2 power. In addition, Table 90, as shown in the connection example, has reviewed the case where the adjustment electrode 50A with the inner peripheral side and the adjustment electrode 50B with the outer peripheral side are used as the impedance adjustment electrode 50. Also, a switch 51b is provided between the adjustment electrode 50A and the impedance adjustment mechanism 51. In addition, in Table 90, the adjustment electrodes 50A and 50B are referred to as adjustment electrodes A and B, respectively, and the second bias electrode 35 is referred to as the ER bias electrode. Also, in Table 90, since the adjustment electrode 50B is not provided with a switch, the adjustment electrode 50B is connected to the impedance adjustment mechanism 51 (denoted as "Short" in Table 90). Furthermore, in Table 90, the first bias electrode 34 and the second bias electrode 35 will be at the same potential.

[0083] Table 90 shows the sheath potential (Vdc) when both switches 37c and 51b are on (represented as "Short" in Table 90 for the bias electrodes A and ER). In Figure 91, curve 92 represents the sheath potential on the upper part of the substrate W, and curve 93 represents the sheath potential on the upper edge ring of the ring assembly 112. Comparing curves 92 and 93, it can be seen that the curves have the same shape, and the sheath potential on the upper part of the substrate W changes with the sheath potential on the upper edge ring of the ring assembly 112. This is believed to be due to the extremely low impedance between the second bias electrode 35 and the bias electrodes 50A and 50B at LF2 power of 12.88MHz. That is, it can be seen that at LF2 power, even if the sheath potential on the upper edge ring of the ring assembly 112 is adjusted by changing the capacitance C of the impedance adjustment mechanism 51, there is no independent control over the sheath potential on the upper part of the substrate W. Furthermore, when both switches 37c and 51b are on, the impedance between the second bias electrode 35 and the adjustment electrodes 50A and 50B is high when LF1 power (400kHz) is supplied. Therefore, when LF1 power is supplied, the sheath potential at the upper edge ring of the ring assembly 112 can be controlled independently. Furthermore, the impedance adjustment mechanism 51 in the second embodiment only needs to include a variable capacitor; for example, as in the first embodiment, the first variable capacitor 52 can be connected in series with the isolator 54, and the second variable capacitor 53 can be connected in parallel. Also, the impedance adjustment mechanism 51 in the second embodiment can be a single variable capacitor or a combination circuit of a variable capacitor, resistor, and inductor.

[0084] Table 90 shows the sheath potential (Vdc) when both switches 37c and 51b are open (represented as "Open" in Table 90 by adjusting the bias electrodes A and ER). In Figure 94, curve 95 represents the sheath potential on the upper part of the substrate W, and curve 96 represents the sheath potential on the upper edge ring of the ring assembly 112. Comparing curves 95 and 96, it can be seen that the slope of curve 95 is different from that of curve 96, meaning that the sheath potential on the upper edge ring of the ring assembly 112 can be independently controlled relative to the sheath potential on the upper part of the substrate W. Similarly, when switch 51b is on, the sheath potential on the upper edge ring of the ring assembly 112 can also be independently controlled relative to the sheath potential on the upper part of the substrate W. Furthermore, even with both switches 37c and 51b open, considering the supply of LF1 power (400kHz), since the second bias electrode 35 is floating on the ring assembly 112 side, LF1 power will be supplied from the base 1110. Therefore, the impedance between the base 1110 and the adjustment electrodes 50A and 50B is relatively high. Thus, it can be considered that even when supplying LF1 power, the sheath potential on the upper edge of the ring assembly 112 can be independently controlled.

[0085] In the second embodiment of the plasma processing apparatus 1a, the switch 37c is turned on when a first bias RF signal (LF1 power) is supplied, and turned off when a second bias RF signal (LF2 power) is supplied. This improves the controllability of multiple bias RF signals with different frequencies.

[0086] Furthermore, the above-mentioned embodiments and variations can be appropriately combined within a range that does not contradict each other. For example, the first embodiment and the second embodiment can be combined, or variations 1 to 6 of the first embodiment can be combined with the second embodiment.

[0087] According to the first embodiment, the plasma processing apparatus 1 includes: a chamber (plasma processing chamber 10); a first bias power supply (first bias RF generation unit 31b) configured to supply a first bias signal; a second bias power supply (second bias RF generation unit 31c) configured to supply a second bias signal; a substrate support (substrate support unit 11) which supports the substrate W and an edge ring (ring assembly 112) within the chamber; an impedance adjustment mechanism 51; and an electrical path 38. The substrate support is configured to have: a first region (central region 111a) which supports the substrate W; a second region (annular region 111b) which is disposed around the first region and supports the edge ring; a first bias electrode 34 disposed within the first region; a second bias electrode 35 disposed within the second region; and an impedance adjustment electrode 50 disposed within the second region and grounded. The impedance adjustment mechanism 51 includes: a first impedance adjustment mechanism (first variable capacitor 52) that controls a first bias signal; an isolator 54 connected between the impedance adjustment electrode 50 and the first impedance adjustment mechanism, which blocks a second bias signal; and a second impedance adjustment mechanism (second variable capacitor 53) that controls a second bias signal. The isolator 54 and the first and second impedance adjustment mechanisms are connected in parallel and connected to the impedance adjustment electrode 50. The electrical path 38 is configured to connect the first and second bias power supplies to the first bias electrode 34 and the second bias electrode 35. As a result, the controllability of multiple bias signals (e.g., bias RF signals) with different frequencies can be improved.

[0088] Furthermore, according to the second embodiment, a switch 37c is provided between the first bias power supply and the second bias power supply and the second bias electrode 35 in the electrical path 38. When the first bias signal is supplied, the switch 37c is controlled to be turned on, and when the second bias signal is supplied, the switch 37c is controlled to be turned off. As a result, the sheath potential of the upper edge ring of the ring assembly 112 can be controlled independently relative to the sheath potential of the upper part of the substrate W.

[0089] Furthermore, according to various embodiments, the first impedance adjustment mechanism is composed of at least one of a variable resistor, a variable capacitor, and a variable inductor. Also, the second impedance adjustment mechanism is composed of at least one of a variable resistor, a variable capacitor, and a variable inductor. As a result, the potential of the impedance adjustment electrode can be adjusted.

[0090] Furthermore, according to the first embodiment, the frequency of the first bias signal is lower than the frequency of the second bias signal, the first impedance adjustment mechanism is composed of a first variable capacitor 52, and the second impedance adjustment mechanism is composed of a second variable capacitor 53. The capacitance range of the first variable capacitor 52 is greater than the capacitance range of the second variable capacitor 53. As a result, the controllability of the sheath potential on the ring assembly 112 side can be improved for either the first bias signal or the second bias signal.

[0091] Furthermore, according to the first embodiment, the isolator 54 includes a resonant circuit with a resonant frequency equal to the frequency of the second bias signal. As a result, the second bias signal can be blocked from the first variable capacitor 52.

[0092] Furthermore, according to the second embodiment, the plasma processing apparatus 1a includes: a chamber (plasma processing chamber 10); a first bias power supply (first bias RF generation unit 31b) configured to supply a first bias signal; a second bias power supply (second bias RF generation unit 31c) configured to supply a second bias signal; a substrate support (substrate support unit 11) supporting the substrate W and an edge ring (ring assembly 112) within the chamber; an impedance adjustment mechanism 51; and an electrical path 38. The substrate support is configured to have: a first region (central region 111a) supporting the substrate W; a second region (annular region 111b) disposed around the first region and supporting the edge ring; a first bias electrode 34 disposed within the first region; a second bias electrode 35 disposed within the second region; and an impedance adjustment electrode 50 disposed within the second region and grounded. The impedance adjustment mechanism 51 is configured to be connected to the impedance adjustment electrode 50. Electrical path 38 is configured to connect a first bias power supply and a second bias power supply to a first bias electrode 34 and a second bias electrode 35. A switch 37c is provided between the first bias power supply and the second bias power supply and the second bias electrode 35. When a first bias signal is supplied, switch 37c is controlled to be turned on; when a second bias signal is supplied, switch 37c is controlled to be turned off. As a result, the sheath potential of the upper edge ring of the ring assembly 112 can be independently controlled relative to the sheath potential of the upper part of the substrate W.

[0093] Furthermore, according to the first embodiment, the impedance adjustment mechanism 51 includes: a first impedance adjustment mechanism (first variable capacitor 52) that controls a first bias signal; an isolator 54 connected between the impedance adjustment electrode 50 and the first impedance adjustment mechanism, which blocks a second bias signal; and a second impedance adjustment mechanism (second variable capacitor 53) that controls a second bias signal; the isolator 54 and the first and second impedance adjustment mechanisms are connected in parallel. As a result, the controllability of multiple bias signals (e.g., bias RF signals) with different frequencies can be improved.

[0094] Furthermore, depending on the embodiment, the frequency of the first bias signal is lower than the frequency of the second bias signal. As a result, the controllability of the potential can be improved at both the frequencies of the first bias signal and the second bias signal (e.g., the first bias RF signal and the second bias RF signal).

[0095] Furthermore, according to the first embodiment and variation 1, the impedance adjustment mechanism 51 is adjusted from low impedance to high impedance in response to an increase in the consumption of the edge ring. As a result, the controllability of multiple bias signals (e.g., bias RF signals) with different frequencies can be improved, and the lifespan of the edge ring can be extended.

[0096] Furthermore, according to Modification 2, the impedance adjustment mechanism 51 is connected to the impedance adjustment electrode 50 via a conductive rod 56. The conductive rod 56 is arranged along the inner periphery of the second region and has a first connection portion 56a between itself and the impedance adjustment mechanism 51 and a second connection portion 56b between itself and the impedance adjustment electrode 50. The first connection portion 56a and the second connection portion 56b are adjacent in the circumferential direction, separated by a circumferential unconnected portion (gap 56c). As a result, deviations in the etching rate in the circumferential direction of the substrate W can be suppressed.

[0097] Furthermore, according to Modification 5, the conductive rod 56e is disposed at the lower part of the base 1110 of the substrate support, acting as a gap ring resonator. As a result, power loss of RF power (and / or pulsed DC power) can be suppressed, and deviation of the etching rate in the circumferential direction of the substrate W can be suppressed.

[0098] Furthermore, according to Modification 5, the resonant frequency of the gap ring resonator is the frequency of the second bias signal. As a result, the spatial propagation of RF power (and / or pulsed DC power) to the conductive rod 56e can be suppressed.

[0099] Furthermore, according to Variation 3, the impedance adjustment mechanism 51a is connected to the plurality of impedance adjustment electrodes 50 via conductive rods (first conductive rod 57, second conductive rod 58). The conductive rods include a first conductive rod 57 arranged circumferentially along the inner periphery of the second region, and a plurality of second conductive rods 58 arranged from the first conductive rod 57 toward the center of the base 1110 of the substrate support. Each of the plurality of second conductive rods 58 has a first connection portion 58a connected to the impedance adjustment mechanism 51a. The first conductive rod 57 has a plurality of second connection portions 57b connected to the plurality of impedance adjustment electrodes 50 on its respective connection portion 57a ​​with the plurality of second conductive rods 58. As a result, deviations in the etching rate in the circumferential direction of the substrate W can be suppressed.

[0100] Furthermore, according to Modification 4, the impedance adjustment mechanism 51 is connected to the impedance adjustment electrode 50 via a conductive rod 59, which is arranged along the second region in a multi-turn configuration. As a result, deviations in the etching rate in the circumferential direction of the substrate W can be suppressed.

[0101] Furthermore, according to Modification 6, the plasma processing apparatus 1 further includes a measuring unit 46, which is configured to measure the voltage and current of a bias RF signal output from at least one of the first bias power supply (first bias RF generation unit 31b) and the second bias power supply (second bias RF generation unit 31c). The bias power supply is configured to control the power of the bias RF signal based on the voltage and current measured by the measuring unit 46 when the impedance adjustment mechanism 51 is adjusted, so that the potentials of the first bias electrode 34 and the second bias electrode 35 reach preset values. As a result, by controlling the bias RF power, changes in the etching rate when the VC value changes can be suppressed.

[0102] Furthermore, according to Modification 6, the plasma processing apparatus 1 further includes a measuring unit 46, which is configured to measure the voltage and current of the bias DC signal output from at least one of the first and second bias power supplies (bias DC generation unit 32a). The bias power supply is configured to control the power of the bias DC signal based on the voltage and current measured by the measuring unit 46 when the impedance adjustment mechanism 51 is adjusted, so that the power supplied to the first bias electrode 34 and the second bias electrode 35 reaches a preset set value. As a result, by controlling the bias DC power, changes in the etching rate when the VC value changes can be suppressed.

[0103] It should be understood that the embodiments disclosed herein are illustrative in all respects and not intended to be limiting. The aforementioned embodiments may be omitted, substituted, or modified in various ways without departing from the scope and purpose of the patent application.

[0104] Furthermore, although the embodiments described above are illustrated using plasma processing apparatuses 1 and 1a that use inductively coupled plasma as a plasma source to perform etching and other processes on the substrate W, the disclosed technology is not limited to this. As long as the apparatus uses plasma to process the substrate W, the plasma source is not limited to inductively coupled plasma, and any plasma source such as capacitively coupled plasma, microwave plasma, or magnetron plasma can also be used.

[0105] In addition, this disclosure may also be constructed in the following manner. (1) A plasma treatment apparatus, comprising: chamber; The first bias power supply is configured to provide a first bias signal; The second bias power supply is configured to provide a second bias signal; The substrate support is used to support the substrate and edge ring within the cavity; Impedance adjustment mechanism; and Electrical path; The substrate support system is configured to have: The first region supports the substrate; The second region is located around the first region and will support the edge ring; The first bias electrode is disposed in this first region; The second bias electrode is disposed in the second region; and The impedance adjustment electrode is located in this second area and is grounded. The impedance adjustment mechanism has the following features: The first impedance adjustment mechanism controls the first bias signal; An isolator is connected between the impedance adjustment electrode and the first impedance adjustment mechanism, and blocks the second bias signal; and The second impedance adjustment mechanism controls the second bias signal; The isolator and the first impedance adjustment mechanism are connected in parallel with the second impedance adjustment mechanism and are connected to the impedance adjustment electrode; The electrical path is configured to connect the first bias power supply and the second bias power supply to the first bias electrode and the second bias electrode. (2) The plasma processing apparatus as described in (1) above, wherein the electrical path is provided with a switch between the first bias power supply and the second bias power supply and the second bias electrode, wherein the switch is controlled to be turned on when the first bias signal is supplied, and the switch is controlled to be turned off when the second bias signal is supplied. (3) The plasma processing apparatus as described in (1) or (2) above, wherein the first impedance adjustment mechanism is composed of at least one of a variable resistor, a variable capacitor and a variable inductor; The second impedance adjustment mechanism is composed of at least one of a variable resistor, a variable capacitor, and a variable inductor. (4) The plasma processing apparatus as described in (3) above, wherein the frequency of the first bias signal is lower than the frequency of the second bias signal; The first impedance adjustment mechanism is composed of a first variable capacitor; The second impedance adjustment mechanism is composed of a second variable capacitor; The capacitance range of the first variable capacitor is greater than that of the second variable capacitor. (5) Any of the plasma processing devices described in (1) to (4) above, wherein the isolator includes a resonant circuit with a resonant frequency of the second bias signal. (6) A plasma treatment apparatus, comprising: chamber; The first bias power supply is configured to provide a first bias signal; The second bias power supply is configured to provide a second bias signal; The substrate support is used to support the substrate and edge ring within the cavity; Impedance adjustment mechanism; and Electrical path; The substrate support system is configured to have: The first region supports the substrate; The second region is located around the first region and will support the edge ring; The first bias electrode is disposed in this first region; The second bias electrode is disposed in the second region; and The impedance adjustment electrode is located in this second area and is grounded. The impedance adjustment mechanism is configured to be connected to the impedance adjustment electrode; The electrical path system is configured to connect the first bias power supply and the second bias power supply to the first bias electrode and the second bias electrode. A switch is provided between the first bias power supply and the second bias power supply and the second bias electrode. When the first bias signal is supplied, the switch is controlled to be turned on, and when the second bias signal is supplied, the switch is controlled to be turned off. (7) The plasma treatment apparatus as described in (6) above, wherein the impedance adjustment mechanism comprises: The first impedance adjustment mechanism controls the first bias signal; An isolator is connected between the impedance adjustment electrode and the first impedance adjustment mechanism, and blocks the second bias signal; and The second impedance adjustment mechanism controls the second bias signal; The isolator and the first impedance adjustment mechanism are connected in parallel with the second impedance adjustment mechanism. (8) The plasma processing apparatus as described in (7) above, wherein the first impedance adjustment mechanism is composed of at least one of a variable resistor, a variable capacitor and a variable inductor; The second impedance adjustment mechanism is composed of at least one of a variable resistor, a variable capacitor, and a variable inductor. (9) Any of the plasma processing apparatuses described in (1) to (8) above, wherein the frequency of the first bias signal is lower than the frequency of the second bias signal. (10) Any of the plasma processing devices described in (1) to (9) above, wherein the impedance adjustment mechanism is adjusted from low impedance to high impedance in response to an increase in the consumption of the edge ring. (11) Any of the plasma processing apparatuses described in (1) to (10) above, wherein the impedance adjustment mechanism is connected to the impedance adjustment electrode via a conductive rod; The conductive rod is arranged along the inner periphery of the second region and has a first connection portion between itself and the impedance adjustment mechanism and a second connection portion between itself and the impedance adjustment electrode. The first connection portion and the second connection portion are adjacent in the circumferential direction, separated by the unconnected portions in the first connection portion and the second connection portion. (12) The plasma processing apparatus as described in (11) above, wherein the conductive rod is disposed at the lower part of the base of the substrate support and functions as a gap ring resonator. (13) The plasma processing apparatus as described in (12) above, wherein the resonant frequency of the gap ring resonator is the frequency of the second bias signal. (14) Any of the plasma processing apparatuses described in (1) to (10) above, wherein the impedance adjustment mechanism is connected to a plurality of impedance adjustment electrodes via a conductive rod; The conductive rod system has a first conductive rod arranged circumferentially along the inner periphery of the second region, and a plurality of second conductive rods arranged from the first conductive rod toward the center of the base of the substrate support; The plurality of the second conductive rods each have a first connecting portion that is connected to the impedance adjustment mechanism; The first conductive rod has multiple second connection portions on its connection portions to the multiple second conductive rods, which are connected to the multiple impedance adjustment electrodes. (15) Any of the plasma processing apparatuses described in (1) to (10) above, wherein the impedance adjustment mechanism is connected to the impedance adjustment electrode via a conductive rod; The conductive rod is arranged along the second region in a manner with multiple turns. (16) Any of the plasma processing apparatuses described in (1) to (15) above, further comprising a measuring unit configured to measure the voltage and current of a bias RF signal output from at least one of the first bias power supply and the second bias power supply; The bias power supply is configured such that when the impedance adjustment mechanism is adjusted, it controls the power of the bias RF signal based on the voltage and current measured by the measuring unit, so that the potentials of the first bias electrode and the second bias electrode become preset values. (17) Any of the plasma processing apparatuses described in (1) to (15) above, further comprising a measuring unit configured to measure the voltage and current of a bias DC signal output from at least one of the first bias power supply and the second bias power supply; The bias power supply is configured such that when the impedance adjustment mechanism is adjusted, it controls the power of the bias DC signal based on the voltage and current measured by the measuring unit, so that the power supplied to the first bias electrode and the second bias electrode becomes a preset value.

[0106] 1, 1a: Plasma treatment device 10: Plasma treatment chamber 11: Substrate support 31a: Source RF Generation Department 31b: First bias voltage RF generation section 31c: Second bias RF generation section 34: First bias electrode 35: Second bias electrode 37c: Switch 38: Electrical Path 50: Impedance adjustment electrode 51, 51a: Impedance adjustment mechanism 52: First variable capacitor (first impedance adjustment mechanism) 53: Second variable capacitor (second impedance adjustment mechanism) 54: Isolator 56, 56e, 59: Conductive rods 56a, 58a: First connecting part 56b, 57b: Second connecting part 56c: Gap 57: First conductive rod 57a: Connecting part 58: Second conductive rod 112: Ring Component 111a, 111c, 111d: Central Area 111b: Annular region 1110: Base 1111, 1111c, 1111d: Electrostatic chucks W: substrate

Claims

1. A plasma processing apparatus comprising: a chamber; a first bias power supply configured to supply a first bias signal; a second bias power supply configured to supply a second bias signal; a substrate support for supporting a substrate and an edge ring within the chamber; an impedance adjustment mechanism; and an electrical path; the substrate support being configured to have: a first region supporting the substrate; a second region disposed around the first region and supporting the edge ring; a first bias electrode disposed within the first region; a second bias electrode disposed within the second region; and an impedance adjustment electrode disposed within the second region and grounded; the impedance adjustment mechanism being configured to have: a first impedance adjustment mechanism controlling the first bias signal; an isolator connected between the impedance adjustment electrode and the first impedance adjustment mechanism and blocking the second bias signal; and a second impedance adjustment mechanism controlling the second bias signal; the isolator and the first impedance adjustment mechanism being connected in series, and the isolator being connected in parallel with the second impedance adjustment mechanism and connected to the impedance adjustment electrode; The electrical path is configured to connect the first bias power supply and the second bias power supply to the first bias electrode and the second bias electrode.

2. The plasma processing apparatus as claimed in claim 1, wherein the electrical path is provided with a switch between the first bias power supply and the second bias power supply and the second bias electrode, wherein the switch is controlled to be turned on when the first bias signal is supplied, and the switch is controlled to be turned off when the second bias signal is supplied.

3. The plasma processing apparatus as claimed in claim 1 or 2, wherein the first impedance adjustment mechanism is composed of at least one of a variable resistor, a variable capacitor, and a variable inductor; and the second impedance adjustment mechanism is composed of at least one of a variable resistor, a variable capacitor, and a variable inductor.

4. The plasma processing apparatus as claimed in claim 3, wherein the frequency of the first bias signal is lower than the frequency of the second bias signal; the first impedance adjustment mechanism is composed of a first variable capacitor; the second impedance adjustment mechanism is composed of a second variable capacitor; and the capacitance range of the first variable capacitor is greater than the capacitance range of the second variable capacitor.

5. The plasma processing apparatus as claimed in claim 1, wherein the isolator includes a resonant circuit with a resonant frequency equal to the frequency of the second bias signal.

6. A plasma processing apparatus comprising: a chamber; a first bias power supply configured to supply a first bias signal; a second bias power supply configured to supply a second bias signal; a substrate support for supporting a substrate and an edge ring within the chamber; an impedance adjustment mechanism; and an electrical path; the substrate support being configured to have: a first region supporting the substrate; a second region disposed around the first region and supporting the edge ring; a first bias electrode disposed within the first region; a second bias electrode disposed within the second region; and an impedance adjustment electrode disposed within the second region and grounded; the impedance adjustment mechanism being configured to be connected to the impedance adjustment electrode; the electrical path being configured to connect the first bias power supply and the second bias power supply to the first bias electrode and the second bias electrode, wherein a switch is provided between the first bias power supply and the second bias power supply and the second bias electrode, the switch being controlled to be turned on when the first bias signal is supplied, and the switch being controlled to be turned off when the second bias signal is supplied.

7. The plasma processing apparatus as claimed in claim 6, wherein the impedance adjustment mechanism comprises: a first impedance adjustment mechanism for controlling the first bias signal; an isolator connected between the impedance adjustment electrode and the first impedance adjustment mechanism and blocking the second bias signal; and a second impedance adjustment mechanism for controlling the second bias signal; the isolator and the first impedance adjustment mechanism are connected in series, and the isolator and the second impedance adjustment mechanism are connected in parallel.

8. The plasma processing apparatus as claimed in claim 7, wherein the first impedance adjustment mechanism is composed of at least one of a variable resistor, a variable capacitor, and a variable inductor; and the second impedance adjustment mechanism is composed of at least one of a variable resistor, a variable capacitor, and a variable inductor.

9. The plasma processing apparatus as claimed in claim 1 or 6, wherein the frequency of the first bias signal is lower than the frequency of the second bias signal.

10. The plasma processing apparatus as claimed in claim 1 or 6, wherein the impedance adjustment mechanism is adjusted from low impedance to high impedance in response to an increase in the consumption of the edge ring.

11. The plasma processing apparatus as claimed in claim 1 or 6, wherein the impedance adjustment mechanism is connected to the impedance adjustment electrode via a conductive rod; the conductive rod is arranged along the inner periphery of the second region and has a first connection portion between itself and the impedance adjustment mechanism and a second connection portion between itself and the impedance adjustment electrode, wherein the first connection portion and the second connection portion are adjacent in the circumferential direction, separated by unconnected portions in the circumferential direction.

12. The plasma processing apparatus as claimed in claim 11, wherein the conductive rod is disposed at the lower part of the base of the substrate support and functions as a gap ring resonator.

13. The plasma processing apparatus as claimed in claim 12, wherein the resonant frequency of the gap ring resonator is the frequency of the second bias signal.

14. The plasma processing apparatus as claimed in claim 1 or 6, wherein the impedance adjustment mechanism is connected to a plurality of impedance adjustment electrodes via conductive rods; the conductive rods have a first conductive rod arranged circumferentially along the inner periphery of the second region, and a plurality of second conductive rods arranged from the first conductive rod toward the center of the base of the substrate support; the plurality of second conductive rods have first connecting portions respectively connected to the impedance adjustment mechanism; the first conductive rod has a plurality of second connecting portions connected to the plurality of impedance adjustment electrodes at the connecting portions to the respective connecting portions of the plurality of second conductive rods.

15. The plasma processing apparatus as claimed in claim 1 or 6, wherein the impedance adjustment mechanism is connected to the impedance adjustment electrode via a conductive rod; the conductive rod is arranged along the second region in a manner having multiple turns.

16. The plasma processing apparatus as described in claim 1 or 6, further comprising a measuring unit configured to measure the voltage and current of a bias RF signal output from at least one of the first bias power supply and the second bias power supply; the bias power supply being configured to control the power of the bias RF signal based on the voltage and current measured by the measuring unit when the impedance adjustment mechanism is adjusted, so that the potentials of the first bias electrode and the second bias electrode become preset values.

17. The plasma processing apparatus as claimed in claim 1 or 6, further comprising a measuring unit configured to measure the voltage and current of a bias DC signal output from at least one of the first bias power supply and the second bias power supply; the bias power supply being configured to control the power of the bias DC signal based on the voltage and current measured by the measuring unit when the impedance adjustment mechanism is adjusted, so that the power supplied to the first bias electrode and the second bias electrode becomes a preset set value.

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