Evaluation device
Patent Information
- Application Number
- TW113147264
- Authority / Receiving Office
- TW · TW
- Patent Type
- Patents
- Current Assignee / Owner
- Priority Date
- 2024-04-12
- Filing Date
- 2024-12-05
- Publication Date
- 2026-09-01
- Estimated Expiration
- 2044-12-04
AI Technical Summary
The increasing size and multilayer nature of evaluation substrates have led to higher manufacturing costs and longer production times, necessitating a reduction in costs and production time while accommodating various demands.
An evaluation apparatus comprising a plurality of independent evaluation substrates with electronic components, arranged on a reinforcing member to face the same direction, allowing for easy replacement and alignment, thereby reducing manufacturing complexity and costs.
This configuration reduces manufacturing costs and shortens production time by enabling flexible substrate selection and easy replacement, enhancing manufacturing efficiency and reducing the need for modifying large substrates.
Smart Images

Figure TWG2TB001908613_001 
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Abstract
Description
[Technical Field]
[0001] The present invention relates to an evaluation apparatus comprising an evaluation substrate used in the evaluation and calibration of semiconductor inspection apparatus. [Previous Technology]
[0002] To measure the electrical characteristics of integrated circuits and other objects under inspection, semiconductor inspection devices such as IC testers are used. For accurate measurement of the characteristics of the objects under inspection, the performance and function of the semiconductor inspection device must be normal. Therefore, the semiconductor inspection device must be evaluated and calibrated.
[0003] The evaluation and calibration of a semiconductor inspection apparatus requires a substrate (hereinafter also referred to as an "evaluation substrate") electrically connected to the Device Under Test (DUT) unit of the semiconductor inspection apparatus, which is connected to the object being inspected. For example, a circular evaluation substrate is used when the DUT unit is a probe card, and a rectangular evaluation substrate is used when the DUT unit is a handler. An evaluation apparatus including the evaluation substrate is prepared, which is equipped with electronic components corresponding to the inspection path configuration of the semiconductor inspection apparatus and for purposes such as evaluation, calibration, and measurement. (Prior Art Documents) (Patent Documents)
[0004] Patent Document 1: Japanese Patent Publication No. 2019-163943 [Summary of the Invention]
[0005] (Problem to be solved by the invention) Due to the increasing size and multilayering of evaluation substrates, the manufacturing cost of evaluation substrates has increased and the manufacturing period has become longer. Moreover, multiple types of evaluation substrates must be prepared to meet various needs. Therefore, there is a strong desire to reduce the manufacturing cost and shorten the manufacturing period of evaluation devices.
[0006] The object of the present invention is to provide an evaluation device that can reduce manufacturing costs and shorten manufacturing time. (Means for solving the problem)
[0007] One aspect of the evaluation apparatus of the present invention comprises: a plurality of evaluation substrates, each mounted with electronic components used for evaluation and calibration in a semiconductor inspection apparatus, and electrically connecting the electrodes of the semiconductor inspection apparatus and the electronic components; and a reinforcing member, which arranges the plurality of independent evaluation substrates on the same plane such that the main surfaces of the evaluation substrates face the same direction. (Effects of the Invention)
[0008] According to the present invention, an evaluation device that can reduce manufacturing costs and shorten manufacturing time can be provided.
Implementation Method
[0010] Next, embodiments of the present invention will be described with reference to the drawings. In the following drawings, the same or similar parts are indicated by the same or similar symbols. However, it should be noted that the drawings are illustrative, and the thickness and proportions of each part may differ from the actual object. Furthermore, it goes without saying that the drawings may also include parts with different dimensional relationships and / or proportions. The embodiments shown below are examples of apparatuses and / or methods used to embody the technical concept of the present invention, and the materials, shapes, structures, and arrangements of the constituent parts of the embodiments of the present invention are not limited to those disclosed below.
[0011] The evaluation apparatus 1 of the embodiment is used for the evaluation and calibration of semiconductor inspection apparatus such as IC testers. Evaluation and calibration is a concept that includes the evaluation, calibration, and measurement of semiconductor inspection apparatus. As shown in FIG1, the evaluation apparatus 1 includes: a plurality of independent evaluation substrates 10 and a rigid reinforcing member 20, which arranges the plurality of evaluation substrates 10 on the same plane such that the main surface 101 of the evaluation substrates 10 faces the same direction. FIG1 is a top view when viewed from the normal direction of the main surface 101 of the evaluation substrates 10 (hereinafter also referred to as "top view").
[0012] As described later, each of the evaluation substrates 10 is equipped with electronic components (not shown in FIG. 1). The electronic components mounted on the evaluation substrate 10 are, for example, chip resistors and chip capacitors, used in the evaluation or calibration of semiconductor inspection equipment. These electronic components are electrically connected to connectors 15 disposed on the evaluation substrate 10. For example, the evaluation substrate 10 has wiring that electrically connects the electronic components to the connectors 15. The connectors 15 are used for electrical connection to electrodes used for connection to the object to be inspected by the semiconductor inspection equipment. In other words, the electronic components mounted on the evaluation substrate 10 are electrically connected to the electrodes of the semiconductor inspection equipment via the connectors 15. The connectors 15 may be, for example, zero insertion force (ZIF) connectors.
[0013] The evaluation substrate 10 shown in FIG1 has a fan-shaped shape when viewed from above. The evaluation substrates 10 are arranged on the same plane such that each vertex points to the same location of the reinforcing member 20. Thus, the overall shape formed by arranging a plurality of evaluation substrates 10 is circular when viewed from above. The evaluation apparatus 1 shown in FIG1 includes evaluation substrates 10 with different areas of main surface 101. In addition, the shape of the evaluation substrates 10 can be the same when viewed from above.
[0014] As shown in Figures 2 and 3, the evaluation substrate 10 and the reinforcing member 20 are fixed by fixing screws 30. The fixing screws 30 fix the outer peripheral side and the vertex side of the evaluation substrate 10 to the reinforcing member 20 respectively. The number of fixing screws 30 can be arbitrarily set according to the area of the main surface 101 of the evaluation substrate 10. Moreover, the evaluation substrate 10 and the reinforcing member 20 are aligned when viewed from above by alignment pins 40. Therefore, by aligning the reinforcing member 20 with the semiconductor inspection device, the positional alignment of the connector 15 of the evaluation substrate 10 and the electrodes of the semiconductor inspection device is completed.
[0015] The rigidity of the reinforcing member 20 is higher than that of the evaluation substrate 10, so that the evaluation substrate 10 will not warp, thus ensuring the mechanical strength of the evaluation device 1. Furthermore, the reinforcing member 20 can be used as a support to fix the constituent parts of the evaluation device 1. The reinforcing member 20 may also be made of metal, for example.
[0016] The reinforcing member 20, as shown in FIG. 4 when viewed from above, has a shape in which a circular outer ring 21 and an inner circular central portion 22 are connected by spokes. The outer ring 21 and the central portion 22 are each provided with a fixing screw 30 and an alignment pin 40. For example, the fixing screw 30 fixes the outer ring 21 to the outer periphery of the evaluation substrate 10, and the fixing screw 30 also fixes the central portion 22 to the vertex side of the evaluation substrate 10.
[0017] The evaluation device 1 is mounted on the semiconductor inspection device in such a way that the electrodes of the semiconductor inspection device are positioned in the gap between the outer ring 21 and the central portion 22 of the reinforcing member 20. Figure 5 shows an example of mounting the evaluation device 1 on the semiconductor inspection device 2. For example, the evaluation device 1 is mounted on the semiconductor inspection device 2 such that the surface on which the reinforcing member 20 is disposed faces the semiconductor inspection device 2.
[0018] As described above, in the evaluation apparatus 1, each evaluation substrate 10 and the reinforcing member 20 are fixed by fixing screws 30, so that the evaluation substrate 10 can be freely mounted and dismounted on the reinforcing member 20. Therefore, the evaluation substrate 10 in the evaluation apparatus 1 can be easily replaced.
[0019] For example, even if a portion of the evaluation substrate 10 fails, unlike evaluation apparatuses that use a single large evaluation substrate (hereinafter also referred to as "large evaluation substrate 100") illustrated in FIG6, the evaluation substrate can be easily replaced. Moreover, since the alignment pins 40 are used to align each evaluation substrate 10 and the reinforcing member 20, the same alignment accuracy as in the case of the large evaluation substrate 100 can be ensured.
[0020] Figure 7 shows an example of the configuration of the evaluation substrate 10. In the evaluation substrate 10 shown in Figure 7, screw holes 31 for inserting fixing screws 30 are formed at two locations in the outer peripheral region 11 and at two locations in the vertex region 12. In addition, guide holes 41 for inserting alignment pins 40 are formed at one location in the outer peripheral region 11 and one location in the vertex region 12. Furthermore, a plurality of connectors 15 and electronic components 16 are disposed in the mounting region 13 between the outer peripheral region 11 and the vertex region 12 of the evaluation substrate 10.
[0021] The number of connectors 15 and the types and numbers of electronic components 16 to be disposed on the evaluation substrate 10 are determined according to the inspection path configuration of the semiconductor inspection apparatus 2 and the purposes of evaluation, calibration, and measurement. As mentioned above, the evaluation substrate 10 in the evaluation apparatus 1 can be easily replaced, so the evaluation substrate 10 to be disposed on the reinforcing member 20 can be arbitrarily selected. In other words, an appropriate evaluation substrate 10 can be selected and disposed on the reinforcing member 20 according to the inspection path configuration of the semiconductor inspection apparatus 2 and the purpose of use of the evaluation apparatus 1.
[0022] For example, an evaluation substrate 10 may be optionally equipped with electronic components 16 required for verifying the performance and function of the semiconductor inspection apparatus 2 before shipment. Alternatively, an evaluation substrate 10 may be optionally equipped with electronic components 16 required for calibrating the semiconductor inspection apparatus 2 before the characteristic inspection test of the semiconductor device. Furthermore, an evaluation substrate 10 may be optionally equipped with electronic components 16 required for implementing self-diagnosis in the semiconductor inspection apparatus 2 with self-diagnosis function.
[0023] As explained above, in the evaluation apparatus 1 of the embodiment, a plurality of evaluation substrates 10 are detachably arranged on the reinforcing member 20 to replace the large evaluation substrate 100. Therefore, according to the evaluation apparatus 1, it is easier to manufacture the small evaluation substrate 10 than to manufacture the large evaluation substrate 100, thereby increasing the number of manufacturers capable of manufacturing substrates and reducing manufacturing costs and shortening the manufacturing period.
[0024] Furthermore, according to the evaluation apparatus 1, the evaluation substrate 10 can be selected and combined flexibly according to the inspection path configuration of the semiconductor inspection apparatus 2 and the purpose of use of the evaluation apparatus 1. In other words, it is not necessary to modify or remanufacture the large evaluation substrate 100 according to the inspection path configuration of the semiconductor inspection apparatus 2 and the purpose of use of the evaluation apparatus 1.
[0025] <First Modification> Figure 1 shows an evaluation apparatus 1 with evaluation substrates 10 arranged with relatively small differences in the area of their main surfaces 101. However, as shown in Figure 8, the evaluation apparatus 1 may also include evaluation substrates 10 with significantly different areas of their main surfaces 101. For example, in the evaluation of a semiconductor inspection apparatus 2, when the number of electrodes of the semiconductor inspection apparatus 2 connected to one evaluation substrate 10 is large, more evaluation substrates 10 with connectors 15 are arranged. On the other hand, when the number of electrodes of the semiconductor inspection apparatus 2 is small, fewer evaluation substrates 10 with connectors 15 can be arranged.
[0026] <Second Modification> Figure 1 shows an example where the evaluation substrate 10 is disposed on the entire surface of the reinforcing member 20 with virtually no gaps when viewed from above. However, when the number of evaluation substrates 10 required for the evaluation or correction of the semiconductor inspection apparatus 2 is small, for example, as shown in Figure 9, the evaluation substrates 10 can be disposed on the reinforcing member 20 with gaps between them. Alternatively, as shown in Figure 10, the evaluation substrates 10 can also be disposed on the reinforcing member 20 such that dummy substrates 10M without electronic components and connectors 15 are sandwiched between them.
[0027] (Other Embodiments) As described above, the present invention has been illustrated by way of embodiments; however, the descriptions and drawings that form part of this disclosure should not be construed as limiting the invention. Based on this disclosure, those skilled in the art will understand various alternative embodiments, examples, and applications.
[0028] For example, the above description illustrates the case where the overall shape of the evaluation substrates 10 arranged when viewed from above is circular. However, the overall shape of the evaluation substrates 10 arranged when viewed from above can also be a shape other than circular. For example, as shown in FIG11, the shape of the evaluation substrates 10 when viewed from above can also be rectangular. Furthermore, the overall shape of a plurality of evaluation substrates 10 arranged as shown in FIG11 can also be rectangular when viewed from above. For example, when the DUT unit is a probe card, the evaluation substrates 10 can be used in a circular shape, while when the DUT unit is a sorter, the evaluation substrates 10 can be used in a rectangular shape.
[0029] As described above, it goes without saying that the present invention also includes various embodiments not described above. Therefore, the technical scope of the present invention is defined solely by the specific matters of the invention within the appropriate scope of the patent application, based on the above description. [Simplified Explanation of the Diagram]
[0009] Figure 1 is a schematic diagram showing the configuration of the evaluation apparatus of the embodiment. Figure 2 is a cross-sectional view along direction II-II of Figure 1. Figure 3 is a cross-sectional view along direction III-III of Figure 1. Figure 4 is a schematic diagram showing an example of the structure of the reinforcing member of the evaluation apparatus of the embodiment. Figure 5 is a schematic diagram showing an example of mounting the evaluation apparatus of the embodiment to a semiconductor inspection apparatus. Figure 6 is a schematic diagram showing an example of a large evaluation substrate. Figure 7 is a schematic diagram showing an example of the configuration of the evaluation substrate of the evaluation apparatus of the embodiment. Figure 8 is a schematic diagram showing the configuration of the evaluation apparatus of the first modified embodiment. Figure 9 is a schematic diagram showing the configuration of the evaluation apparatus of the second modified embodiment. Figure 10 is a schematic diagram showing another configuration of the evaluation apparatus of the second modified embodiment. Figure 11 is a schematic diagram showing the configuration of another embodiment of the evaluation apparatus.
Claims
1. An evaluation apparatus for a semiconductor inspection apparatus, comprising: a plurality of evaluation substrates, each mounted with electronic components used for evaluation and calibration of the semiconductor inspection apparatus, and electrically connecting the electrodes of the semiconductor inspection apparatus and the electronic components; and a reinforcing member, wherein the plurality of independent evaluation substrates are arranged on a plane such that the main surfaces of the evaluation substrates face the same direction, and each of the plurality of evaluation substrates is detachably disposed on the reinforcing member; and the evaluation substrates disposed on the reinforcing member are arbitrarily selectable.
2. The evaluation apparatus as described in claim 1, wherein, When viewed from the normal direction of the aforementioned main surface of the aforementioned evaluation substrate, it includes the aforementioned evaluation substrates with different areas.
3. The evaluation apparatus as described in claim 1 or 2, wherein, When viewed from the normal direction of the aforementioned main surface, the aforementioned evaluation substrate is fan-shaped, and the vertices of each of the aforementioned evaluation substrates point to the same location of the aforementioned reinforcement. When viewed from the normal direction of the aforementioned main surface, the overall shape of the plurality of the aforementioned evaluation substrates arranged is circular.
4. The evaluation apparatus as described in claim 1 or 2, wherein, When viewed from the normal direction of the aforementioned main surface, the aforementioned evaluation substrate is rectangular in shape. When viewed from the normal direction of the aforementioned main surface, the overall shape of the plurality of the aforementioned evaluation substrates arranged together is rectangular.
Citation Information
Patent Citations
Tester calibration device and tester calibration method
JP2019163943A
Electric connection device
JP2024017497A
Handler for testing electronic components
TW202026068A