Test equipment, method and computer readable storage medium

Abstract

A testing method includes receiving multiple wafer acceptance test (WAT) sample data from multiple sample wafers during a training period; performing a wafer probe (CP) test on the sample wafers to generate multiple CP sample data; and inputting the WAT sample data and CP sample data into a machine learning model. The machine learning model calculates a correlation between the WAT sample data and the CP sample data. During a testing period, product information and WAT measurement data of a wafer under test are input into the machine learning model, causing the machine learning model to identify at least one key parameter from the WAT measurement data based on the correlation. The machine learning model adjusts the order of multiple test items based on the key parameter. The wafer under test is then tested according to the adjusted order of the test items.

Description

Technical Field

[0001] This invention relates to a testing method, and more particularly to a testing method for testing wafers according to an optimal testing sequence. Prior Technology

[0002] During wafer manufacturing, defects can easily occur due to various factors (such as insufficient doping concentration or short circuits in the metal layer). Therefore, the packaging equipment must first test the dies on the wafer. However, each wafer has a large number of dies, and there are numerous testing items. As a result, each wafer requires a significant amount of testing time. Summary of the Invention

[0003] One embodiment of the present invention provides a test apparatus, including a storage circuit, an input / output interface, and a processing circuit. The storage circuit stores a machine learning model. The input / output interface receives complex wafer acceptance test (WAT) sample data and complex wafer probing (CP) sample data. The processing circuit reads from the storage circuit to retrieve the machine learning model. During a training period, the processing circuit provides WAT sample data and CP sample data to the machine learning model. The machine learning model calculates the WAT sample data and CP sample data to generate a correlation. During a testing period, the input / output interface receives product information and WAT measurement data. The processing circuit inputs the product information and WAT measurement data to the machine learning model. Based on the correlation, the machine learning model adjusts the test order of complex test items in a CP operation.

[0004] The present invention also provides a testing method, comprising: during a training period, receiving multiple wafer acceptance test (WAT) sample data from multiple sample wafers; performing a wafer probe (CP) test on the sample wafers to generate multiple CP sample data; inputting the WAT sample data and CP sample data into a machine learning model. The machine learning model calculates the WAT sample data and CP sample data to generate a correlation. During a testing period, product information and WAT measurement data of a wafer under test are input into the machine learning model, such that the machine learning model identifies at least one key parameter from the WAT measurement data based on the correlation; the machine learning model adjusts the order of multiple test items based on the key parameter; and testing the wafer under test according to the adjusted order of test items.

[0005] The testing method of this invention can be implemented using the testing equipment of this invention, which is hardware or firmware capable of performing specific functions, or it can be implemented by recording code in a recording medium and combined with specific hardware. When the code is loaded and executed by an electronic device, processor, computer, or machine, the electronic device, processor, computer, or machine becomes a testing equipment for implementing this invention. Simple Explanation of the Diagram

[0006] Figure 1 is a flowchart illustrating the testing method of the present invention. Figure 2A is a schematic diagram of a test item for the CP operation. Figure 2B is another schematic diagram of the test items for the CP operation. Figure 2C is another schematic diagram of the test items for the CP operation. Figure 3 is a schematic diagram of the testing equipment of the present invention. Implementation

[0007] To make the objectives, features, and advantages of this invention more apparent and understandable, embodiments are provided below, along with detailed descriptions in conjunction with the accompanying drawings. This specification provides different embodiments to illustrate the technical features of different implementations of the invention. The configuration of elements in the embodiments is for illustrative purposes only and is not intended to limit the invention. Furthermore, the repetition of some reference numerals in the embodiments is for simplification and does not imply any correlation between different embodiments.

[0008] Figure 1 is a schematic flowchart of the testing method of the present invention. The testing method of the present invention adjusts the order of test items in a chip probing (CP) operation based on the wafer acceptance test (WAT) data of each wafer under test, and performs the CP operation on each wafer under test according to the adjusted test order. In one possible embodiment, the most sensitive test item is tested first. Once any die of the wafer under test fails the sensitive test item arranged earlier, the testing machine will not spend time performing the remaining tests on that die, thus saving testing manpower and time. The testing method of the present invention can exist through program code. The program code may be stored in a computer-readable storage medium. When the program code on the computer-readable storage medium is loaded and executed by a machine, the machine becomes a testing machine for implementing the present invention.

[0009] During a training period 110, WAT data of a plurality of sample wafers is received (step S111). In one possible embodiment, the WAT data is provided by the wafer foundry. The wafer foundry performs multiple tests on each sample wafer and uses the results of the multiple tests as WAT data. For ease of explanation, the WAT data of the sample wafers is referred to as WAT sample data.

[0010] Next, a CP operation is performed on each sample wafer to generate multiple CP data (step S112). In one possible embodiment, if step S111 receives WAT sample data from 25 sample wafers, step S112 performs a CP operation on all dies of each of the 25 sample wafers to obtain 25 CP sample data (raw data). Each CP data records all test results for each die of the corresponding sample wafer. For example, suppose each wafer has 10,000 dies, and the CP operation includes 100 test items. In this example, each CP data includes 1 million (10,000 * 100) test results. For ease of explanation, the CP data of the sample wafer is referred to as CP sample data. In one possible embodiment, each CP sample data includes at least one of a map and a data log.

[0011] Input WAT sample data and CP sample data to a machine learning model (step S113). The machine learning model calculates the WAT sample data and CP sample data to generate a correlation. In one possible embodiment, the machine learning model establishes a correlation through failed test results in the WAT sample data and CP sample data. For example, when a specific parameter in the WAT sample data (such as the saturation current Isat of a transistor) is not within a normal range, the test result of a specific test item (such as on-resistance R) in the CP sample data is abnormal. In this example, since the specific test item (such as on-resistance R) is easily affected by the specific parameter (such as Isat), the machine learning model establishes a correlation between the specific test item (such as on-resistance R) and the specific parameter (such as Isat). Through the correlation established by the machine learning model, the key parameters most likely to cause test item failures can be identified in the WAT sample data.

[0012] During a test period 120, product information and WAT data of a wafer under test are input to a trained machine learning model to adjust the order of multiple test items (step S121). In one possible embodiment, the trained machine learning model determines the multiple test items required for the wafer under test based on the product information. Then, based on the relevance determined in step S113, the machine learning model identifies the most critical parameters from the WAT data of the wafer under test and identifies at least one test item (or sensitive test item) corresponding to the critical parameter from the multiple test items. The machine learning model adjusts the execution time of the sensitive test item.

[0013] Figure 2A is a schematic diagram of the test items for the CP operation. For ease of explanation, Figure 2A shows test items A to F, but it is not intended to limit the invention. In other embodiments, the CP operation has a different number of test items. Furthermore, the CP operation in Figure 2A is for a specific product. For different products, the CP operation has different test items. For example, for a first product, the CP operation has 100 test items, while for a second product, the CP operation has 150 test items. In this example, at least one of the 100 test items for the first product may be the same as the 150 test items for the second product.

[0014] Please refer to Figure 2A. Assume that during training (110), the machine learning model, based on the WAT and CP sample data of the complex sample wafers, learns that when parameter M is not within a normal range, the test result for test item C is usually a failure, and when parameter N is not within a normal range, the test result for test item E is usually a failure. Therefore, the machine learning model establishes a connection between parameter M and test item C, and a connection between parameter N and test item E.

[0015] Please refer to Figure 2B. During testing, the machine learning model determines whether parameters M and N of the WAT data of the first wafer under test are within the normal range. Assume that parameter M of the WAT data of the first wafer under test is not within the normal range. In this example, since test item C is most easily affected by parameter M, the machine learning model moves test item C before test item A. As shown in Figure 2B, the order of test items for the CP operation of the first wafer under test is C, A, B, D~F.

[0016] In another possible embodiment, it is assumed that parameter N of the WAT data of a second wafer under test is not within the normal range. In this example, since test item E is most susceptible to the influence of parameter N, the machine learning model moves test item E before test item A. As shown in Figure 2C, the order of test items for the CP operation of the second wafer under test is E, A~D, F. For ease of explanation, the WAT data of the wafer under test is referred to as WAT measurement data.

[0017] Next, each die of the wafer under test is tested according to the adjusted test sequence (step S122). In one possible embodiment, step S122 converts the adjusted test sequence into code. In this example, a processing circuit (such as a CPU) executes the code to perform a CP operation on the wafer under test.

[0018] Taking Figure 2B as an example, the machine learning model adjusts the order of test items in the CP operation based on the different WAT measurement data of different wafers under test, placing the most sensitive test items first. Therefore, during the CP operation, the most sensitive test items are performed on each die first. If a die fails the most sensitive test item, no further tests are performed on the abnormal die. This reduces test time and improves test efficiency.

[0019] In some embodiments, when any die of a wafer under test fails any test item of the CP operation, a testing machine highlights that die. Therefore, after completing the CP operation, the tester can determine the location of the abnormal die and the yield of the wafer under test based on the testing machine's report. In another possible embodiment, when a die of the wafer under test passes all tests of the CP operation, the CP operation continues for the next die.

[0020] Figure 3 is a schematic diagram of the test apparatus of the present invention. As shown in the figure, the test apparatus 300 includes an input / output interface 310, an arithmetic circuit 320, and a storage circuit 330. The storage circuit 330 stores a machine learning model ML. In one possible embodiment, the storage circuit 330 has a non-volatile memory for storing the machine learning model ML.

[0021] The processing circuit 320 reads from the storage circuit 330 to load the machine learning model ML. During training, the input / output interface 310 receives training data DTR. The processing circuit 320 receives the training data DTR through the input / output interface 310 and inputs the training data DTR to the machine learning model ML to train the machine learning model ML to arrange the order of test items in the CP operation. In one possible embodiment, the machine learning model ML calculates the training data DTR to establish a correlation. In some embodiments, the processing circuit 320 writes the trained machine learning model ML back to the storage circuit 330.

[0022] In one possible embodiment, the training data DTR includes WAT sample data SD_W1~SD_Wn of a plurality of sample wafers and CP sample data SD_C1~SD_Cn of each sample wafer. In other embodiments, the test equipment 300 further includes a storage circuit 340, a processing circuit 350, and a test platform 360. The storage circuit 340 is used to store code 341. The test platform 360 is used to place the wafer WT. During a training period, the wafer WT serves as a sample wafer WTS. During a test period, the wafer WT serves as a wafer under test WTT.

[0023] Processing circuit 350 executes code 341 to perform a CP operation on each die of wafer WT on test platform 360. The CP operation includes multiple test items. During testing, processing circuit 350 performs multiple tests on each die of sample wafer WTS and records the multiple test results for each die. Processing circuit 350 uses all test results for all dies of each sample wafer WTS as CP sample data. In some embodiments, CP sample data includes at least one of map data and document data.

[0024] In one possible embodiment, processing circuit 350 outputs CP sample data to an external device. During training, the external device provides CP sample data to input / output interface 310. In another possible embodiment, processing circuit 350 stores CP sample data to storage circuit 330 or 340. In this example, during training, arithmetic circuit 320 reads CP sample data from storage circuit 330 or 340.

[0025] In some embodiments, processing circuit 350 performs CP operations on a complex number of sample wafers (WTS) to generate complex CP sample data. During training, machine learning model ML identifies failed test items based on the complex CP sample data and then identifies key parameters related to the failed test items from the WAT sample data of the sample wafers (WTS). Machine learning model ML establishes a correlation between failed test items and key parameters. Using the key parameters, machine learning model ML determines the most sensitive test items and rearranges the order of the test items. In one possible embodiment, machine learning model ML converts the order of the test items into code and uses this code to replace code 341 in storage circuit 340.

[0026] During a test, the input / output interface 310 receives product information Pnum and WAT measurement data TD_W from a wafer under test (WTT). The processing circuit 320 reads from the storage circuit 330 to load the trained machine learning model ML. The processing circuit 320 inputs the product information Pnum and WAT measurement data TD_W to the trained machine learning model ML. Based on the product information Pnum, the machine learning model ML determines which tests need to be performed on the wafer under test during the CP operation. For example, when the wafer under test WTT is a first product, the machine learning model ML plans 100 test items; when the wafer under test WTT is a second product, the machine learning model ML plans 150 test items. In one embodiment, the product information Pnum is a company product model code. In another embodiment, the product information Pnum includes a company product model code and a lot number, which corresponds to the WAT data and CP data of each batch of wafers.

[0027] Next, the machine learning model ML determines whether the WAT measurement data TD_W has a critical parameter (the parameter most likely to cause test item failure) based on the correlation generated during previous training, and adjusts the order of the test items accordingly. For example, when the WAT measurement data TD_W does not have a critical parameter, the machine learning model ML adjusts the order of the test items according to a preset order. However, when the WAT measurement data TD_W has a critical parameter (such as parameter M in Figure 2B), the machine learning model ML no longer adjusts the order of the test items according to a preset order. In this case, the machine learning model ML identifies the sensitive test item corresponding to the critical parameter from the complex test items (such as test item C in Figure 2B), moves the sensitive test item (C) to the front, and arranges the other test items (such as test items A, B, D~F in Figure 2B) after the sensitive test item (C).

[0028] In one possible embodiment, the arithmetic circuit 320 converts the test sequence adjusted by the machine learning model ML into code and updates the code 341 using this code. In this example, the processing circuit 350 performs a CP operation on the wafer under test (WTT) according to the updated code 341. At this time, the processing circuit 350 tests each die of the wafer under test (WTT) according to the test sequence arranged by the machine learning model ML (such as C, A, B, D~F in Figure 2B).

[0029] By leveraging the pre-established correlations from the machine learning model (ML), the ML can determine which test items the wafer under test (WTT) is most sensitive to, based on the product information Pnum and WAT measurement data TD_W. The ML then prioritizes the most sensitive tests. The processing circuit 350 performs each test on the wafer under test (WTT) according to the test order determined by the ML.

[0030] When a first die of the wafer under test (WTT) fails one of the tests, the processing circuit 350 stops performing the remaining tests on the first die and marks the first die. In some embodiments, the first die may be marked as a defective product. In other embodiments, the tester determines the yield of the WTT based on the number of marked dies.

[0031] In another possible embodiment, when a second die of the wafer under test (WTT) passes all test items (including the most sensitive ones), the processing circuit 350 continues to perform CP operation on another die (or third die) of the wafer under test (WTT) until all dies have been tested.

[0032] By using the optimized test sequence of CP operations generated by the machine learning model ML, when the processing circuit 350 performs CP operations on each die, since the most sensitive items are placed first, the processing circuit 350 can immediately detect abnormal dies, greatly shorten the test time, improve the production efficiency of the test production line, and provide better price competitiveness.

[0033] The testing method, or a specific form or part thereof, of this invention can exist in the form of program code. The program code can be stored on physical media, such as floppy disks, optical discs, hard disks, or any other machine-readable (e.g., computer-readable) storage media, or, not limited to, computer program products in an external form. When the program code is loaded and executed by a machine, such as a computer, this machine becomes a testing instrument for this invention. The program code can also be transmitted via some transmission medium, such as wires or cables, optical fibers, or any transmission method. When the program code is received, loaded, and executed by a machine, such as a computer, this machine becomes a testing instrument for this invention. When implemented in a general-purpose processing unit, the program code, combined with the processing unit, provides a unique device that operates similarly to an application-specific logic circuit.

[0034] Unless otherwise defined, all terms herein (including technical and scientific terms) are as commonly understood by one of ordinary skill in the art to which this invention pertains. Furthermore, unless expressly stated otherwise, the definitions of terms in a general dictionary should be interpreted as consistent with their meaning in writings of the relevant technical field, and not as idealized or overly formal expressions. While terms such as “first” and “second” can be used to describe various elements, these elements should not be limited by these terms. These terms are merely used to distinguish one element from another. Within the claims, terms such as “first” and “second” are used as designations and are not intended to impose numerical requirements on their objects.

[0035] While the present invention has been disclosed above with reference to preferred embodiments, it is not intended to limit the invention. Those skilled in the art can make modifications and refinements without departing from the spirit and scope of the invention. For example, the systems, apparatus, or methods described in the embodiments of the present invention can be implemented in physical embodiments using hardware, software, or a combination of hardware and software. Therefore, the scope of protection of the present invention should be determined by the appended claims.

[0036] 110: During training 120: During the test S111~S113, S121, S122: Steps A~F: Test Items M, N: Parameters 300: Testing equipment 310: Input / Output Interface 320: Operational circuit 330: Storage circuit 340: Storage circuit 341: Code 350: Processing Circuit 360: Testing Platform ML: Machine Learning Model DTR: Training Data SD_W1~SD_Wn: WAT sample data SD_C1~SD_Cn: CP sample data WT: Wafer WTS: Sample Wafer WTT: Wafer to be tested Pnum: Product Information TD_W: WAT measurement data

Claims

1. A testing machine, comprising: A first storage circuit stores a machine learning model; An input / output interface for receiving complex wafer acceptance test (WAT) sample data and complex wafer probing (CP) sample data; a computing circuit for reading the first storage circuit for reading the machine learning model; and a processing circuit for performing a CP operation on each die of a wafer under test during a test, wherein: During a training period: the computing circuit provides the WAT sample data and the CP sample data to the machine learning model, and the machine learning model calculates the WAT sample data and the CP sample data to generate a correlation; During the test: the input / output interface receives product information and WAT measurement data, the computing circuit inputs the product information and WAT measurement data to the machine learning model, the machine learning model finds at least one key parameter from the WAT measurement data based on the correlation, and the machine learning model adjusts the test order of complex test items in the CP operation based on the key parameter. After the machine learning model adjusts the test order of the complex test items in the CP operation, the processing circuit performs the CP operation on each die of the wafer under test according to the test order. In the CP operation, each die of the wafer under test performs the same test items.

2. The testing equipment as described in claim 1 further includes: A second storage circuit stores a program code, wherein: during the test, the processing circuit executes the program code to perform the CP operation on each die of the wafer under test; during the training, the machine learning model converts the test sequence into the program code and writes the program code into the second storage circuit.

3. The test equipment as described in claim 2, wherein when a first die of the wafer under test fails to pass one of the specific items of the test items, the processing circuit stops performing all tests on the first die after the specific item and marks the first die.

4. The test equipment as described in claim 3, wherein when a second die of the wafer under test passes the test items, the processing circuit performs the CP operation on a third die of the wafer under test.

5. A testing method, comprising: During a training period: Receive complex wafer acceptance test (WAT) sample data from complex sample wafers; A first wafer probing (CP) test is performed on the sample wafers to generate multiple CP sample data. The WAT sample data and the CP sample data are input to a machine learning model, which calculates a correlation between the WAT sample data and the CP sample data. During a test: Product information and WAT measurement data of a wafer under test are input to the machine learning model, causing the model to identify at least one key parameter from the WAT measurement data based on the correlation. The model then adjusts the order of multiple test items based on the key parameter. A second wafer probing test is performed on each die of the wafer under test according to the adjusted order of the test items, wherein the same test items are performed on each die in the second wafer probing test.

6. The test method as described in claim 5, wherein each CP sample data is the test result of all the grains of each sample wafer.

7. The testing method as described in claim 5, wherein each CP sample data includes at least one of a map data and a document data.

8. The test method as described in Request 5 further includes: During the test: If one of the multiple grains of the wafer under test fails one of the test items, the remaining test items for the first grain are stopped and the first grain is marked.

9. The test method as described in Request 8 further includes: During the test: When one of the second grains passes the test items of the CP operation, one of the third grains is tested.

10. A computer-readable storage medium for storing code that, when executed, performs the following steps: During a training period: receiving multiple Wafer Acceptance Test (WAT) sample data of multiple sample wafers; performing a first wafer probing (CP) operation on the sample wafers to generate multiple CP sample data; inputting the WAT sample data and the CP sample data to a machine learning model, wherein the machine learning model calculates the WAT sample data and the CP sample data to generate a correlation; During a testing period: inputting product information and WAT measurement data of a wafer under test to the machine learning model, such that the machine learning model finds at least one key parameter from the WAT measurement data based on the correlation, and adjusts the order of multiple test items based on the key parameter; performing a second wafer probing test on each die of the wafer under test according to the adjusted order of the test items, wherein the test items performed on each die in the second wafer probing test are the same.

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