Wiring board

TWI937653BActive Publication Date: 2026-09-01KYOCERA CORP
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Patent Information

Application Number
TW113150211
Authority / Receiving Office
TW · TW
Patent Type
Patents
Current Assignee / Owner
Priority Date
2023-12-26
Filing Date
2024-12-23
Publication Date
2026-09-01
Estimated Expiration
2044-12-22

AI Technical Summary

Technical Problem

Existing wiring substrates face challenges in efficiently transmitting high-frequency signals due to the obstruction caused by the distribution of glass particles, which leads to increased conductor loss and reduced signal transmission characteristics.

Method used

The internal wiring is designed with a specific distribution of glass particles, where the central region has a higher concentration, the intermediate region has an intermediate concentration, and the outer peripheral region has a lower concentration, thereby minimizing the obstruction of high-frequency signal current and improving transmission characteristics.

Benefits of technology

The proposed design enhances signal transmission by reducing conductor loss and improving frequency characteristics in higher frequency bands, specifically showing improvements of approximately 0.1 dB in the 8 GHz to 15 GHz band and 0.1 to 0.25 dB in the 20 GHz to 70 GHz band.

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Abstract

The wiring substrate of the present invention comprises an insulating substrate as ceramic and an internal wiring located inside the insulating substrate. The internal wiring includes a sintered body of a plurality of grains with copper as the main component and a plurality of glass particles. In a cross-section orthogonal to the length direction of the internal wiring, the internal wiring has a central region, an intermediate region surrounding the central region and having more glass particles distributed in the intermediate region than in the central region, and an outer peripheral region between the intermediate region and the outer periphery of the internal wiring and having fewer glass particles distributed in the intermediate region. Regarding the area density of the glass particles, the outer peripheral region is lower than the central region and lower than the intermediate region.
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Description

[Technical Field]

[0001] This invention relates to a wiring board. [Previous Technology]

[0002] Japanese Patent Application Publication No. 2021-011411 discloses a wiring substrate using a ceramic sintered body. Internal wiring is provided in the wiring substrate. [Summary of the Invention]

[0003] [Technical Means for Solving the Problem] The wiring substrate of the present invention includes an insulating substrate as ceramic and an internal wiring located inside the insulating substrate. The internal wiring includes a sintered body of a plurality of grains with copper as the main component and a plurality of glass particles. In a cross-section orthogonal to the length direction of the internal wiring, the internal wiring has a central region, an intermediate region surrounding the central region and having more glass particles distributed therein than the central region, and an outer peripheral region between the intermediate region and the outer periphery of the internal wiring, where the distribution of glass particles is less than that of the intermediate region. Regarding the area density of the glass particles, the outer peripheral region is lower than the central region and lower than the intermediate region.

Implementation Method

[0005] Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. In this embodiment, the cross-section that intersects the internal wiring 21 and is perpendicular to the length direction (i.e., the direction of extension) of the internal wiring 21 will be simply referred to as the cross-section of the internal wiring 21.

[0006] FIG1 is a perspective view of a wiring substrate 1 according to an embodiment of the present invention. The wiring substrate 1 of this embodiment includes an insulating substrate 10 which is ceramic and wiring 20 located on the insulating substrate 10.

[0007] The insulating substrate 10 is a fired product such as ceramic that has insulating properties. The insulating substrate 10 may be a glass ceramic containing glass particles in the powder material before sintering. The insulating substrate 10 may be plate-shaped. The insulating substrate may be formed by stacking and firing multiple blanks that are ceramic materials.

[0008] Wiring 20 may include surface wiring 22 located on the surface of the insulating substrate 10 and internal wiring 21 located inside the insulating substrate 10. Internal wiring 21 may include a film conductor extending in the direction along the plate surface of the insulating substrate 10 and a through-hole conductor extending in the direction perpendicular to the plate surface of the insulating substrate 10. Hereinafter, the constituent elements of internal wiring 21 will be described using a film conductor as an example, but the constituent elements not explicitly described as film conductors are also present in the through-hole conductors. The main difference between the film conductor and the through-hole conductor lies in the cross-sectional shape of the internal wiring 21. The film conductor has a flat shape, while the through-hole conductor may be circular. Circularity is a concept that includes not only a strictly circular shape but also shapes formed by additional deformations of a strictly circular shape.

[0009] Figure 2 is a cross-sectional view of the internal wiring 21. In the cross-sectional view of the internal wiring 21, the shadow lines of the grains 33 constituting the internal wiring 21 are omitted. The same applies to Figures 3 to 8.

[0010] The internal wiring 21 may include a sintered body of a plurality of grains 33 serving as conductors. The sintered body of the plurality of grains 33 is located in the portion shown in white within the internal wiring 21 of FIG. 2. The plurality of grains 33 may be primarily composed of copper. Primarily composed means accounting for 70% or more by volume. In addition to copper as the primary component, the grains 33 may also contain metallic materials such as silver, palladium, gold, platinum-tungsten, molybdenum, or manganese, or alloys or mixtures of such metallic materials. Furthermore, the volume percentage of copper in the grains 33 may be 80% or more, or 90% or more. The upper limit of the volume percentage of copper in the grains 33 may be 99%.

[0011] The internal wiring 21 may further include a plurality of glass particles 35. The main component of the glass particles 35 may be silicon dioxide. The inclusion of glass particles 35 may be present in the material of the internal wiring 21 before firing. Due to the material of the internal wiring 21, when the material of the insulating substrate 10 and the material of the internal wiring 21 are fired simultaneously, the nano-sized silicon dioxide attached to the glass particles 35 moves to the boundary between the insulating substrate 10 and the internal wiring 21, thereby improving the adhesion between the insulating substrate 10 and the internal wiring 21. This improvement in adhesion is particularly useful when the glass-ceramic of the insulating substrate 10 is fired at a low temperature.

[0012] Next, a cross-section of the internal wiring 21 will be described in detail. This cross-section can be mirror-polished and observed in a photograph taken using a scanning electron microscope (hereinafter referred to as a SEM photograph). The cross-section of the internal wiring 21 includes a plurality of copper-based grains 33, grain boundaries 34 located at the boundaries of adjacent pairs of grains 33, and glass particles 35. The grain boundaries 34 are linear in the cross-section. The grain boundaries 34 may contain silicon dioxide.

[0013] There are instances where multiple grains 33 are so tightly packed with adjacent grains 33 due to densification during sintering that the boundaries cannot be observed in SEM images. Similarly, in glass particles 35, there are instances where the boundaries cannot be observed due to their close contact with adjacent glass particles 35. Even in these cases, each grain 33, grain boundary 34, and glass particle 35 can be distinguished in the following manner.

[0014] <An Example of a Method for Identifying Individual Grains, Grain Boundaries, and Individual Glass Particles> Figure 3 is a diagram illustrating the constituent elements of the internal wiring 21. Figure 3 shows the boundaries of a portion of the identified grains 33 and a portion of the boundaries of glass particles 35. The boundaries are identified by the following method and are represented by a two-point chain line in Figure 3. The cross-section of Figure 3 shows the boundaries of the seven grains 33 located on the upper center of the internal wiring 21 and the boundaries of the two glass particles 35 located at the upper left position C1.

[0015] Each grain 33 is formed by densifying grains in the material before firing. Each grain 33, through densification with an adjacent grain 33, has a shape that crushes an oblate spheroid (specifically, a rotating ellipsoid) from multiple directions with flat or curved surfaces. On the other hand, in the outer periphery of the internal wiring 21, the grains 33 are adjacent to the particles of the insulating substrate 10, so the outer shape of the grains 33 retains a large amount of curvature. Furthermore, in the outer periphery of the internal wiring 21, convex curved portions A, which are the belly portions of each of the plurality of grains 33 arranged along the periphery, and concave portions B, which are the contact portions of an adjacent pair of grains 33, are easily formed. Furthermore, grain boundaries 34 appear at the boundaries of an adjacent pair of grains 33, and glass particles 35 are located between the plurality of grains 33.

[0016] Therefore, based on the convex curves A and concave curves B of the external profile of the internal wiring 21, the grain boundaries 34 that can be observed at various locations, and the positions of the glass particles 35, the boundaries of each grain 33, i.e., the size and shape of each grain 33, can be deduced. In Figure 3, the boundaries of the seven grains 33 deduced in the above manner are shown on the upper center of the internal wiring 21.

[0017] In the SEM image of the cross-section of the internal wiring 21, the grain boundary 34 and the glass particles 35 are represented with a contrast different from that of the plurality of grains 33. Therefore, by dividing each pixel of the SEM image into two types based on the contrast threshold, it can be determined that one type of pixel is contained in the plurality of grains 33 and the other type of pixel is contained in the grain boundary 34 or the glass particles 35.

[0018] Grain boundaries 34 and glass particles 35 can be distinguished by their shapes. Grain boundaries 34 are linear, and glass particles 35 have a width in a two-dimensional direction that can be distinguished from grain boundaries 34. Furthermore, each glass particle 35 can be distinguished by its curved outline. As shown in the upper left part C1 of Figure 3, if a continuous arc is taken as one arc, the outline contains a plurality of arcs, and there are concave portions between each arc, then it can be determined that there are two glass particles 35 combined at the concave portion. Between the two glass particles 35 in part C1 of Figure 3, the boundary line estimated by the above distinction is shown.

[0019] By means of the method described above, each grain 33, grain boundary 34 and each glass particle 35 can be identified in the cross section of the internal wiring 21.

[0020] (Internal Wiring of Embodiment 1) FIG4 is a cross-sectional view showing the internal wiring 21 of Embodiment 1 of the present invention. In the cross-section of the internal wiring 21, the internal wiring 21 of Embodiment 1 may include a central region 25, an intermediate region 26, and an outer peripheral region 27. In FIG4, the outer periphery of the central region 25 and the outer periphery of the intermediate region 26 are represented by single-dot chain lines. The intermediate region 26 is the region surrounding the central region 25 and having more glass particles 35 distributed therein than the central region 25. The outer peripheral region 27 is the region between the intermediate region 26 and the outer periphery of the internal wiring 21, and is the region where the distribution of glass particles 35 is less than that of the intermediate region 26. Regarding the area ratio occupied by glass particles 35, the outer peripheral region 27 may be lower than the intermediate region 26, and the outer peripheral region 27 may be lower than the central region 25.

[0021] The radial widths of the central region 25, the intermediate region 26, and the peripheral region 27 can be derived from the distribution of the glass particles 35. That is, in the cross-section of the internal wiring 21, if the distribution of the glass particles 35 is measured from the center to the outer edge of the internal wiring 21, it is arranged as a region with fewer particles, a region with more particles, and a region with fewer particles. Therefore, the intermediate region with more particles can be designated as the intermediate region 26, and its inner and outer sides can be designated as the central region 25 and the peripheral region 27, respectively.

[0022] The distribution of glass particles 35 in the outer peripheral region 27 can be zero.

[0023] When transmitting signals via the internal wiring 21, the higher the frequency band of the signal, the more pronounced the skin effect will be in the signal current. The skin effect refers to the phenomenon that the current density of a high-frequency signal is greater closer to the conductor surface and smaller further away from the conductor surface. According to the internal wiring 21 of Embodiment 1, the distribution of glass particles 35 in the outer peripheral region 27 is less, thus reducing the obstruction of the high-frequency signal current caused by the skin effect by the glass particles 35 and improving the transmission characteristics.

[0024] <Example> Next, specifically, a wiring board 1 is fabricated, and the results of evaluating the transmission characteristics of high-frequency signals for the wiring board 1 are explained.

[0025] First, as the material for the insulating matrix 10, a mixture of 40 wt% alumina particles and 60 wt% borosilicate glass is prepared. This mixture is a glass-ceramic raw material with a firing temperature of 900°C to 1000°C. Furthermore, as an organic binder, isobutyl methacrylate resin and dibutyl phthalate are used in a ratio of 20 parts by mass to 100 parts by mass of the glass-ceramic raw material. Multiple blanks with a width of 90 mm × 80 mm and a thickness of 50 μm and 75 μm are formed by scraping.

[0026] Furthermore, as raw materials for the internal wiring 21, copper powder with a particle size of 1 μm to 5 μm and an average particle size of 2 μm, and silicon dioxide particles with a particle size of 20 nm to 50 nm and an average particle size of 30 nm are prepared. The amount of silicon dioxide particles added is set to 1 part by mass relative to 100 parts by mass of copper powder. Furthermore, isobutyl methacrylate resin, butyl carbitol acetate, and dibutyl phthalate are used as the organic binder. Isobutyl methacrylate resin is added at a ratio of 5 parts by mass relative to 100 parts by mass of copper powder, and then the mixed solvent of butyl carbitol acetate and dibutyl phthalate is added to prepare a conductive paste containing copper powder and silicon dioxide particles.

[0027] The conductive paste is printed on both surfaces of the prepared blank in a prescribed layout, and through holes are formed between the two surfaces at prescribed positions on the blank, and the through holes are filled with conductive paste. The conductive paste printed on the surface of the blank is the pre-firing configuration of the film conductor of the internal wiring 21, and the conductive paste filling the through holes is the pre-firing configuration of the through-hole conductor of the internal wiring 21. Furthermore, multiple blanks containing conductive paste are stacked to prepare a pre-firing material. The thickness of the pre-firing material is set to 2 mm.

[0028] The pre-firing material was obtained by firing in a reducing atmosphere using a mixture of hydrogen and nitrogen, with the maximum temperature set at 930°C and the holding time set at 2 hours.

[0029] When observing SEM images of the cross-section of the internal wiring 21 at several locations on the wiring substrate 1 fired in the manner described above, it can be confirmed that there are differences in the distribution of glass particles 35 between the central region 25, the intermediate region 26, and the peripheral region 27. Furthermore, it can be confirmed that the glass particles 35 are not located in the peripheral region 27.

[0030] The frequency characteristics of the wiring contained in the fabricated wiring substrate 1 were measured and compared with those of a wiring substrate containing glass particles in the outer peripheral region and otherwise substantially the same. As a result, it was confirmed that the insertion loss of high-frequency signals was improved by about 0.1 dB in the 8 GHz to 15 GHz band and by 0.1 to 0.25 dB in the 20 GHz to 70 GHz band.

[0031] Furthermore, the above-described manufacturing method is merely one example of a method for manufacturing the wiring board 1 of this embodiment, and the manufacturing parameters for manufacturing the wiring board 1 of this embodiment can be selected from a relatively wide range. The manufacturing parameters in which the distribution of glass particles 35 contained in the internal wiring 21 is more in the middle region 26 and almost zero in the outer peripheral region 27 can be easily discovered through a relatively small number of attempts.

[0032] (Embodiment 2) FIG5 shows a cross-sectional view of the wiring substrate 1A according to Embodiment 2 of the present invention. Embodiment 2 may differ from Embodiment 1 in that the outer peripheral region 27 is defined by the grain 33, but other constituent elements may be the same as those in Embodiment 1.

[0033] As shown in Figure 5, the outer peripheral region 27 can be a region in which a plurality of grains 33 connected to the outer periphery of the internal wiring 21 are connected in the circumferential direction. The grain size of the grains 33 can be 1 μm to 5 μm. Grain size refers to the average value of the major axis and the minor axis. This grain size can be achieved by adjusting the grain size of the grains in the material stage. In the outer peripheral region 27, the distribution of glass particles 35 can be zero.

[0034] This configuration means that the ratio of glass particles 35 present at the boundary between each of the plurality of grains 33 located on the outermost periphery of the internal wiring 21 and another adjacent grain 33 in the circumferential direction is low or zero. Furthermore, the radial width of the outer peripheral region 27 corresponds to the grain size of the grains 33.

[0035] According to the wiring substrate 1A of Embodiment 2, by increasing the density between the plurality of grains 33 located on the outermost periphery of the internal wiring 21, the area ratio occupied by the glass particles 35 in the outer peripheral region 27 can be easily reduced or made zero. Furthermore, by utilizing the grain size of the grains 33, the radial width of the outer peripheral region 27 where the area ratio occupied by the glass particles 35 is reduced or made zero can be controlled during the material selection stage. Moreover, the outer peripheral region 27 can achieve the following effects: reducing the obstruction of high-frequency signal current caused by the skin effect by the glass particles 35, and improving transmission characteristics in higher frequency bands.

[0036] Furthermore, since the grain size of the crystal 33 is 1 μm to 5 μm, a peripheral region 27 with a low or zero area ratio of glass particles 35 is formed within a width of 1 μm to 5 μm along the outer periphery of the internal wiring 21. Therefore, the transmission characteristics can be improved because the width of the surface layer with a current density of about 1 μm to 5 μm is in a frequency band of about 8 GHz.

[0037] The wiring board 1A having the configuration of Embodiment 2 can be manufactured by the manufacturing method shown in the embodiment of Embodiment 1.

[0038] (Embodiment 3) FIG6 shows a cross-sectional view of the wiring substrate 1B according to Embodiment 3 of the present invention. The distribution pattern of the glass particles 35 contained in the specific internal wiring 21 in Embodiment 3 may differ from that in either Embodiment 1 or 2, while other constituent elements may be the same as those in either Embodiment 1 or 2.

[0039] As shown in Figure 6, in the cross-section of the internal wiring 21, the plurality of glass particles 35 may include a first glass particle 35A with a particle size of 2 μm to 4 μm and a second glass particle 35B with a particle size of less than 2 μm. This configuration can be achieved by adjusting the particle size of the glass particles in the material stage. The first glass particle 35A can be referred to as a larger glass particle. The second glass particle 35B can be referred to as a smaller glass particle.

[0040] Furthermore, in the cross-section of the internal wiring 21, the second glass particle 35B can be dispersed around the first glass particle 35A. Furthermore, the plurality of glass particles 35 can include individually existing particles 35C. Furthermore, the plurality of glass particles 35 can include composite particles 35D connected in a manner that does not form a circle. Depending on the distribution pattern of the glass particles 35, the glass particles 35 are dispersed in the central region 25 and the intermediate region 26, thus reducing or eliminating the possibility of them agglomerating in one place, connecting in a manner that forms a circle, or connecting in a lattice pattern.

[0041] Furthermore, in the cross-section of the internal wiring 21, the first glass particles 35A can be distributed more extensively in the intermediate region 26 than in the central region 25. Based on this distribution of the first glass particles 35A, a larger number of the first glass particles 35A are distributed in the intermediate region 26 than in the central region 25, thus making it easier to disperse the first glass particles 35A. Therefore, the situation where glass particles 35 aggregate in one place and become larger can be reduced.

[0042] The large concentration of glass particles 35 in one area increases the conductor loss in the internal wiring 21. Furthermore, the glass particles 35 connected in a loop or in a lattice further increase the conductor loss in the internal wiring 21. Therefore, according to the wiring board 1B of Embodiment 3, an internal wiring 21 with lower conductor loss can be provided.

[0043] The wiring board 1B having the configuration of Embodiment 3 can be manufactured by the manufacturing method shown in the embodiment of Embodiment 1.

[0044] (Embodiment 4) FIG7 shows a cross-sectional view of the wiring substrate 1C according to Embodiment 4 of the present invention. The distribution pattern of the grain boundaries 34 contained in the specific internal wiring 21 in Embodiment 4 may differ from any of Embodiments 1 to 3, while other constituent elements may be the same as any of Embodiments 1 to 3.

[0045] As shown in Figure 7, in the cross-section of the internal wiring 21, the total length of the grain boundaries 34 in the intermediate region 26 may be longer than that in the outer peripheral region 27. The distribution of grain boundaries 34 in the outer peripheral region 27 may be zero. Furthermore, in the cross-section of the internal wiring 21, a plurality of glass particles 35 include connecting particles 35E connected to the grain boundaries 34, while the outer peripheral region 27 may not contain connecting particles 35E.

[0046] The grain boundary 34 is configured to extend planarly in three-dimensional space, and may extend in an inclined direction along the length direction of the internal wiring 21. Furthermore, the grain boundary 34 is a major factor in current obstruction. Therefore, if there are more grain boundaries 34 in the peripheral region 27, the conductor loss in the portion where the current density is high due to the skin effect will increase. Also, the connecting particles 35E obstruct the internal wiring 21 over a relatively large width. Therefore, if the connecting particles 35E are located in the peripheral region 27, the conductor loss in the portion where the current density is high due to the skin effect will increase. On the other hand, based on the above-described distribution pattern of the grain boundary 34 and the distribution pattern of the connecting particles 35E of the wiring substrate 1C according to Embodiment 4, the conductor loss in the portion of the internal wiring 21 where the current density is high due to the skin effect can be reduced. Therefore, the signal transmission characteristics of the wiring substrate 1C at higher frequencies can be further improved.

[0047] The wiring board 1C having the configuration of Embodiment 4 can be manufactured by the manufacturing method shown in the embodiment of Embodiment 1.

[0048] (Embodiment 5) FIG8 shows a cross-sectional view of the wiring substrate 1D of Embodiment 5 of the present invention. Embodiment 5 may differ from any of Embodiments 1 to 4 in that a portion of the cross-sectional shape of the internal wiring 21, which is a film conductor, may be the same as any of Embodiments 1 to 4.

[0049] In the cross-section of the internal wiring 21, the internal wiring 21, which is a film conductor, is formed in a shape where the transverse dimension is longer than the longitudinal dimension, and the outline of the transverse end E21 can be a convex curve. That is, it can be an end without sharp corners but with an arc. Specifically, a grain 33D can occupy one end in the transverse direction.

[0050] According to this configuration, when transmitting signals via the internal wiring 21, which is a film conductor, the concentration of the electric field generated by the signal at the transverse end can be reduced. Therefore, the conductor loss of the internal wiring 21 can be reduced.

[0051] The wiring board 1D having the configuration of Embodiment 5 can be manufactured by the manufacturing method shown in the embodiment of Embodiment 1.

[0052] The various embodiments of the present invention have been described above. However, the wiring board of the present invention is not limited to the above embodiments, and the details shown in the embodiments may be appropriately modified without departing from the spirit of the invention.

[0053] The following illustrates one embodiment of the present invention. In one embodiment, (1) the wiring substrate includes an insulating substrate that is ceramic and an internal wiring located inside the insulating substrate. The internal wiring includes a sintered body of a plurality of grains with copper as the main component and a plurality of glass particles. In a cross-section orthogonal to the length direction of the internal wiring, the internal wiring has a central region, an intermediate region surrounding the central region and having more glass particles distributed therein than the central region, and an outer peripheral region between the intermediate region and the outer periphery of the internal wiring, where the distribution of glass particles is less than that of the intermediate region. Regarding the area density of the glass particles, the outer peripheral region is lower than the central region and lower than the intermediate region.

[0054] (2) In the wiring substrate of (1) above, the glass particles are not distributed in the outer peripheral area.

[0055] (3) In the wiring substrate of (1) or (2) above, in a cross section orthogonal to the length direction of the internal wiring, the outer peripheral region is a region formed by a plurality of the above-mentioned grains connected in the circumferential direction to the outer periphery of the internal wiring.

[0056] (4) In the wiring substrate of any one of (1) to (3) above, the grain size of the above-mentioned grain is 1 μm to 5 μm.

[0057] (5) The plurality of glass particles in the wiring substrate of any one of (1) to (4) above include a first glass particle with a particle size of 2 μm to 4 μm and a second glass particle with a particle size of less than 2 μm.

[0058] (6) In the wiring substrate of (5) above, the second glass particles are dispersed around the first glass particles.

[0059] (7) In the wiring substrate of (5) or (6) above, the first glass particles are more distributed in the middle region than in the central region.

[0060] (8) In any of the above (1) to (7) wiring substrates, the above plurality of glass particles include individually existing individual particles.

[0061] (9) In any of the above (1) to (8) wiring substrates, the plurality of glass particles include composite particles formed by connecting two or more of the above glass particles in a manner that does not form a loop.

[0062] (10) In any of the above (1) to (9) wiring substrate, the above internal wiring includes grain boundaries containing silicon dioxide located between a plurality of the above grains, and in a cross section orthogonal to the length direction of the above internal wiring, the total length of the above grain boundaries is longer in the above intermediate region than in the above peripheral region.

[0063] (11) In the wiring substrate of (10) above, the outer peripheral region does not contain the grain boundary mentioned above.

[0064] (12) In the wiring substrate of (10) or (11) above, the plurality of glass particles include connecting particles connected to the grain boundaries above, and the outer peripheral region does not contain the connecting particles above.

[0065] (13) In any of the above (1) to (12) wiring substrates, in a cross section orthogonal to the length direction of the above internal wiring, the above internal wiring is formed in a shape where the lateral dimension is longer than the longitudinal dimension, and the outline of the end in the lateral direction is a convex curve.

[0066] (14) In the wiring substrate of (13) above, one of the above-mentioned grains occupies one end of the above-mentioned transverse direction. [Simplified Explanation of the Diagram]

[0004] FIG1 is a perspective view of a wiring substrate according to an embodiment of the present invention. FIG2 is a cross-sectional view of the wiring substrate including the cross-section of the internal wiring of FIG1. ​​FIG3 is a diagram illustrating the constituent elements of the internal wiring. FIG4 is a cross-sectional view illustrating the internal wiring of Embodiment 1. FIG5 is a cross-sectional view illustrating the internal wiring of Embodiment 2. FIG6 is a cross-sectional view illustrating the internal wiring of Embodiment 3. FIG7 is a cross-sectional view illustrating the internal wiring of Embodiment 4. FIG8 is a cross-sectional view illustrating the internal wiring of Embodiment 5.

Claims

1. A wiring substrate comprising an insulating substrate as ceramic and an internal wiring located within the insulating substrate, the internal wiring comprising a sintered body of a plurality of grains mainly composed of copper and a plurality of glass particles, wherein in a cross-section orthogonal to the length direction of the internal wiring, the internal wiring has a central region, an intermediate region surrounding the central region and having more of the glass particles distributed therein than the central region, and an outer peripheral region between the intermediate region and the outer periphery of the internal wiring, wherein the distribution of the glass particles is less in the outer peripheral region than in the intermediate region, and the area density of the glass particles is lower in the outer peripheral region than in the central region and lower in the intermediate region.

2. The wiring substrate of claim 1, wherein the glass particles are not distributed in the aforementioned outer peripheral region.

3. The wiring substrate of claim 1 or 2, wherein in a cross-section orthogonal to the length direction of the internal wiring, the outer peripheral region is a region formed by a plurality of the aforementioned grains connected in the circumferential direction to the outer periphery of the internal wiring.

4. The wiring substrate of claim 1 or 2, wherein the grain size of the aforementioned grains is 1 μm to 5 μm.

5. The wiring substrate of claim 1 or 2, wherein the plurality of glass particles comprises a first glass particle with a particle size of 2 μm to 4 μm and a second glass particle with a particle size of less than 2 μm.

6. The wiring board of claim 5, wherein the second glass particles are dispersed around the first glass particles.

7. The wiring substrate of claim 5, wherein the first glass particles are more distributed in the middle region than in the central region.

8. The wiring substrate of claim 1 or 2, wherein the plurality of glass particles comprises individually existing individual particles.

9. The wiring substrate of claim 1 or 2, wherein the plurality of glass particles comprises a composite particle consisting of two or more of the glass particles connected in a manner that does not form a loop.

10. The wiring substrate of claim 1 or 2, wherein the internal wiring includes grain boundaries containing silicon dioxide located between a plurality of the aforementioned grains, and in a cross-section orthogonal to the length direction of the internal wiring, the total length of the grain boundaries is longer in the intermediate region than in the peripheral region.

11. The wiring substrate of claim 10, wherein the aforementioned peripheral region does not contain the aforementioned grain boundaries.

12. The wiring substrate of claim 10, wherein the plurality of glass particles include connecting particles connected to the grain boundaries, and the peripheral region does not contain the connecting particles.

13. The wiring board of claim 1 or 2, wherein in a cross-section orthogonal to the length direction of the internal wiring, the internal wiring is formed in a shape in which the lateral dimension is longer than the longitudinal dimension, and the outline of the end in the lateral direction is a convex curve.

14. The wiring board of claim 13, wherein one of the aforementioned chips occupies one end of the aforementioned transverse direction.

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