Non-volatile memory
Patent Information
- Application Number
- TW114118589
- Authority / Receiving Office
- TW · TW
- Patent Type
- Patents
- Current Assignee / Owner
- Filing Date
- 2025-05-19
- Publication Date
- 2026-09-01
- Estimated Expiration
- 2045-05-18
Smart Images

Figure TWG2TB001908835_001 
Figure TWG2TB001908835_002 
Figure TWG2TB001908835_003
Abstract
Claims
1. A non-volatile memory, comprising: An array of memory cells includes multiple memory cells, each of which includes multiple string select cells and multiple memory cells. Each of the multiple string select lines is coupled to a control terminal of a corresponding string select cell in each of the memory cells. Each of the multiple character lines is coupled to a control terminal of a corresponding memory cell in each of the memory cells. Each of the multiple bit lines is coupled to an upper end of each of the memory cells in a corresponding row of the array. A first common source line of the multiple common source lines is coupled to a lower end of each of the memory cells in a first column of the array. The memory cells in the first column... Each of the string select cells in the memory cell string array has a first critical voltage configuration. A second common source line of the common source lines is coupled to the lower end of each of the memory cell strings in a second column of the memory cell string array. Each of the string select cells in the second column of the memory cell strings has a second critical voltage configuration. A third common source line of the common source lines is coupled to the lower end of each of the memory cell strings in a third column of the memory cell string array. Each of the string select cells in the third column of the memory cell strings has a third critical voltage configuration. A fourth common source line of the common source lines is coupled to a fourth column of the memory cell string array. At the lower end of each of the memory cell strings in the fourth column, the string select cells of each of the memory cell strings in the fourth column have a fourth critical voltage configuration, and the first critical voltage configuration, the second critical voltage configuration, the third critical voltage configuration, and the fourth critical voltage configuration are different from each other; and a control circuit coupled to the string select lines to control the string select cells of the memory cell strings in the memory cell string array, wherein in response to the string select lines having a control voltage configuration being turned on in the string select cells of each of the memory cell strings in the first column, the second column, the third column, and the fourth column, in the first column, the second column, the third column, the fourth column, the fifth column, the sixth column, the seventh column, the ninth column, the tenth ... At least one of the string selection cells in each of the memory cell strings in the third column and the others in the fourth column is cut off; and the string selection cells in each of the memory cell strings are divided into multiple cell groups, the string selection cells belonging to the same cell group have different critical voltages, the critical voltage composition of the cell groups includes a first critical voltage composition and a second critical voltage composition that are different from each other, the string selection lines are divided into multiple line groups, the string selection lines belonging to the same line group are coupled to different string selection cells in the same cell group, and the control voltage configuration of the line groups includes a first control voltage configuration and a second control voltage configuration that are different from each other.
2. The non-volatile memory as claimed in claim 1, wherein the first threshold voltage comprises a first threshold voltage and a second threshold voltage higher than the first threshold voltage, the second threshold voltage comprises the second threshold voltage and the first threshold voltage, the control voltages of the line groups include a first voltage level between the first threshold voltage and the second threshold voltage or a second voltage level higher than the second threshold voltage, the first control voltage is configured to the first voltage level and the second voltage level, and the second control voltage is configured to the second voltage level and the first voltage level.
3. The non-volatile memory as described in claim 2, wherein, Each of the memory cell strings comprises a first cell group and a second cell group, the threshold voltage composition of the first cell group and the second cell group in the first column is the first threshold voltage composition, the threshold voltage composition of the first cell group and the second cell group in the second column is the second threshold voltage composition and the first threshold voltage composition respectively, the threshold voltage composition of the first cell group and the second cell group in the third column is the second threshold voltage composition, and the threshold voltage composition of the first cell group and the second cell group in the fourth column is the first threshold voltage composition and the second threshold voltage composition respectively; the line groups of the string select lines comprise a first line group coupled to the first cell group and a second line group coupled to the second cell group; in response to the control voltage configuration of the first line group and the second line group being the first control voltage configuration, the first cell group and the second cell group in the first column are turned on, while at least one of the first cell group and the second cell group in other columns is turned off; In response to the control voltage configurations of the first line group and the second line group being the second control voltage configuration and the first control voltage configuration respectively, the first cell group and the second cell group of the second column are turned on, while at least one of the first cell group and the second cell group of other columns is turned off; In response to the control voltage configurations of the first line group and the second line group being the second control voltage configuration, the first cell group and the second cell group of the third column are turned on, while at least one of the first cell group and the second cell group of other columns is turned off; and In response to the control voltage configurations of the first line group and the second line group being the first control voltage configuration and the second control voltage configuration respectively, the first cell group and the second cell group of the fourth column are turned on, while at least one of the first cell group and the second cell group of other columns is turned off.
4. The non-volatile memory as described in claim 2, wherein, A fifth common source line of these common source lines is coupled to the lower end of each of the memory strings in a fifth column of the memory string array; a sixth common source line of these common source lines is coupled to the lower end of each of the memory strings in a sixth column of the memory string array; a seventh common source line of these common source lines is coupled to the lower end of each of the memory strings in a seventh column of the memory string array; and an eighth common source line of these common source lines is coupled to the lower end of each of the memory strings in an eighth column of the memory string array; and the cell groups of each of the memory strings include a first cell group, a second cell group, and a third cell group, the critical voltage composition of the first cell group, the second cell group, and the third cell group in the first column is all the first critical voltage composition, the critical voltage composition of the first cell group, the second cell group, and the third cell group in the second column are respectively the second critical voltage composition, the first critical voltage composition, and the first critical voltage composition, and the first cell group in the third column... The critical voltage compositions of the second cell group and the third cell group are respectively the second critical voltage composition, the second critical voltage composition and the first critical voltage composition; the critical voltage compositions of the first cell group, the second cell group and the third cell group in the fourth column are respectively the second critical voltage composition, the first critical voltage composition and the second critical voltage composition; the critical voltage compositions of the first cell group, the second cell group and the third cell group in the fifth column are respectively the first critical voltage composition, the second critical voltage composition and the second critical voltage composition; the critical voltage compositions of the first cell group, the second cell group and the third cell group in the sixth column are respectively the first critical voltage composition, the second critical voltage composition and the first critical voltage composition; the critical voltage compositions of the first cell group, the second cell group and the third cell group in the seventh column are respectively the first critical voltage composition, the first critical voltage composition and the second critical voltage composition; and the critical voltage compositions of the first cell group, the second cell group and the third cell group in the eighth column are all the second critical voltage composition.
5. The non-volatile memory as described in claim 4, wherein, The series select lines include a first group of lines coupled to the first cell group, a second group of lines coupled to the second cell group, and a third group of lines coupled to the third cell group; in response to the control voltage configuration of the first group of lines, the second group of lines, and the third group of lines all being the first control voltage configuration, the first group of lines, the second group of lines, and the third group of lines in the first column are turned on, while at least one of the first group of lines, the second group of lines, and the third group of lines in other columns is turned off; in response to the control voltage configuration of the first group of lines, the second group of lines, and the third group of lines being the second control voltage configuration, the first control voltage configuration, and the first control voltage configuration respectively, the first group of lines, the second group of lines, and the third group of lines in the second column are turned on, while at least one of the first group of lines, the second group of lines, and the third group of lines in other columns is turned off; In response to the control voltage configurations of the first line group, the second line group, and the third line group being the second control voltage configuration, the second control voltage configuration, and the first control voltage configuration, respectively, the first cell group, the second cell group, and the third cell group in the third column are turned on, while at least one of the first cell group, the second cell group, and the third cell group in other columns is turned off; In response to the control voltage configurations of the first line group, the second line group, and the third line group being the second control voltage configuration, the first control voltage configuration, and the second control voltage configuration, respectively, the first cell group, the second cell group, and the third cell group in the fourth column are turned on, while at least one of the first cell group, the second cell group, and the third cell group in other columns is turned off; In response to the control voltage configurations of the first line group, the second line group, and the third line group being the first control voltage configuration, the second control voltage configuration, and the second control voltage configuration respectively, the first cell group, the second cell group, and the third cell group in the fifth column are turned on, while at least one of the first cell group, the second cell group, and the third cell group in other columns is turned off; In response to the control voltage configurations of the first line group, the second line group, and the third line group being the first control voltage configuration, the second control voltage configuration, and the first control voltage configuration respectively, the first cell group, the second cell group, and the third cell group in the sixth column are turned on, while at least one of the first cell group, the second cell group, and the third cell group in other columns is turned off; In response to the control voltage configurations of the first line group, the second line group, and the third line group being the first control voltage configuration, the first control voltage configuration, and the second control voltage configuration, respectively, the first cell group, the second cell group, and the third cell group of the seventh column are turned on, while at least one of the first cell group, the second cell group, and the third cell group of the other columns is turned off; and in response to the control voltage configurations of the first line group, the second line group, and the third line group all being the second control voltage configuration, the first cell group, the second cell group, and the third cell group of the eighth column are turned on, while at least one of the first cell group, the second cell group, and the third cell group of the other columns is turned off.
6. A non-volatile memory, comprising: An array of memory cells includes multiple memory cells, each of which includes multiple string select cells and multiple memory cells. Each of multiple string select lines is coupled to a control terminal of a corresponding string select cell in each of the memory cells. Each of multiple word lines is coupled to a control terminal of a corresponding memory cell in each of the memory cells. Each of multiple bit lines is coupled to an upper end of each of the memory cells in a corresponding row of the array. A first common source line of multiple common source lines is coupled to a lower end of each of the memory cells in a first column of the array. The string select cells of each of the memory cells in the first column have a first threshold voltage configuration. A second common source line of some common source lines is coupled to the lower end of each of the memory cell strings in a second column of the memory cell string array. The string select cells of each of the memory cell strings in the second column have a second threshold voltage configuration. A third common source line of some common source lines is coupled to the lower end of each of the memory cell strings in a third column of the memory cell string array. The string select cells of each of the memory cell strings in the third column have a third threshold voltage configuration. A fourth common source line of some common source lines is coupled to the lower end of each of the memory cell strings in a fourth column of the memory cell string array. The string select cells of each of the memory cell strings in the fourth column have a fourth threshold voltage configuration. The first critical voltage configuration, the second critical voltage configuration, the third critical voltage configuration, and the fourth critical voltage configuration are different from each other; and a control circuit coupled to the string select lines to control the string select cells of the memory cell strings of the memory cell string array, wherein in response to the string select lines having a control voltage configuration being turned on in the string select cells of each of the memory cell strings in the first column, the second column, the third column, and the fourth column, at least one of the string select cells of each of the memory cell strings in the other three columns is turned off; and one of the string select cells of each of the memory cell strings is configured as a first critical voltage configuration. A threshold voltage, wherein the other strings of select cells in each of the memory cell strings are configured to be higher than the first threshold voltage, the position of the string select cell configured to be the first threshold voltage in the memory cell string of the first column is different from the position of the string select cell configured to be the first threshold voltage in the memory cell string of the second column, the position of the string select cell configured to be the first threshold voltage in the memory cell string of the second column is different from the position of the string select cell configured to be the first threshold voltage in the memory cell string of the third column, and the position of the string select cell configured to be the first threshold voltage in the memory cell string of the third column is different from the position of the string select cell configured to be the first threshold voltage in the memory cell string of the fourth column.
7. The non-volatile memory as described in claim 6, wherein, The string select lines include a first string select line coupled to a first string select cell in each of the memory cell strings, a second string select line coupled to a second string select cell in each of the memory cell strings, a third string select line coupled to a third string select cell in each of the memory cell strings, and a fourth string select line coupled to a fourth string select cell in each of the memory cell strings; and the first string select cell in the memory cell string in the first column is configured as the first threshold voltage, the second string select cell in the memory cell string in the second column is configured as the first threshold voltage, the third string select cell in the memory cell string in the third column is configured as the first threshold voltage, and the fourth string select cell in the memory cell string in the fourth column is configured as the first threshold voltage.
8. The non-volatile memory as described in claim 7, wherein, In response to the control voltage of the first string select line being at a first voltage level between the first threshold voltage and the second threshold voltage, and the control voltage of the other string select lines being at a second voltage level greater than the second threshold voltage, the string select cells in each of the memory cell strings in the first column are turned on, while at least one of the string select cells in each of the memory cell strings in the other columns is turned off; In response to the control voltage of the second string select line being at the first voltage level and the control voltage of the other string select lines being at the second voltage level, the string select cells in each of the memory cell strings in the second column are turned on, while at least one of the string select cells in each of the memory cell strings in the other columns is turned off; In response to the control voltage of the third string select line being at the first voltage level and the control voltage of the other string select lines being at the second voltage level, the string select cells in each of the memory cell strings in the third column are turned on, while at least one of the string select cells in each of the memory cell strings in the other columns is turned off; and in response to the control voltage of the fourth string select line being at the first voltage level and the control voltage of the other string select lines being at the second voltage level, the string select cells in each of the memory cell strings in the fourth column are turned on, while at least one of the string select cells in each of the memory cell strings in the other columns is turned off.
9. A non-volatile memory, comprising: A memory cell array includes multiple memory cells, each of which includes multiple string select cells and multiple memory cells. Each of the multiple string select lines is coupled to a control terminal of a corresponding string select cell in each of the memory cells. Each of the multiple character lines is coupled to a control terminal of a corresponding memory cell in each of the memory cells. Each of the multiple bit lines is coupled to an upper end of each of the memory cells in a corresponding row of the memory cell array. A first common source line of the multiple common source lines is coupled to a lower end of each of the memory cells in a first column of the memory cell array. Each of the memory cell strings has string select cells with a first critical voltage configuration. A second common source line of the common source lines is coupled to the lower end of each of the memory cell strings in a second column of the memory cell string array. Each of the string select cells of the memory cell strings in the second column has a second critical voltage configuration. A third common source line of the common source lines is coupled to the lower end of each of the memory cell strings in a third column of the memory cell string array. Each of the string select cells of the memory cell strings in the third column has a third critical voltage configuration. A fourth common source line of the common source lines is coupled to the memory cell string. At the lower end of each of the memory cell strings in a fourth column of the array, the string select cells of each of the memory cell strings in the fourth column have a fourth critical voltage configuration, and the first critical voltage configuration, the second critical voltage configuration, the third critical voltage configuration, and the fourth critical voltage configuration are different from each other; and a control circuit coupled to the string select lines to control the string select cells of the memory cell strings in the memory cell string array, wherein in response to the string select lines having a control voltage configuration being turned on, the string select cells in each of the memory cell strings in the first, second, third, and fourth columns are... At least one of the string selection cells in each of the memory cell strings in the first, second, third, and fourth columns is cut off; and the string selection cells are adjusted to a plurality of mutually different critical voltages, which are divided into a plurality of critical voltage pairs, wherein an upper critical voltage and a lower critical voltage of a first critical voltage pair are both located between an upper critical voltage and a lower critical voltage of a second critical voltage pair, and the string selection cells in each of the memory cell strings belonging to the same column are adjusted to different critical voltages of the same corresponding pair of critical voltages.
10. The non-volatile memory as claimed in claim 9, wherein the threshold voltages of the string select cells include a first threshold voltage, a second threshold voltage, a third threshold voltage, and a fourth threshold voltage, the second threshold voltage and the third threshold voltage being the lower threshold voltage and the upper threshold voltage of the first threshold voltage pair, the first threshold voltage and the fourth threshold voltage being the lower threshold voltage and the upper threshold voltage of the second threshold voltage pair, the string select cells of each of the memory cell strings including a first string select cell and a second string select cell, and the first column of the memory cell strings... The critical voltages of the first and second select cells are the fourth and first critical voltages, respectively. The critical voltages of the first and second select cells of the memory cell strings in the second column are the second and third critical voltages, respectively. The critical voltages of the first and second select cells of the memory cell strings in the third column are the third and second critical voltages, respectively. The critical voltages of the first and second select cells of the memory cell strings in the fourth column are the first and fourth critical voltages, respectively.
11. The non-volatile memory as described in claim 10, wherein, The string select lines include a first string select line coupled to a first string select cell of the memory cell strings and a second string select line coupled to a second string select cell of the memory cell strings; in response to a control voltage of the first string select line being a fourth voltage level greater than the fourth threshold voltage and a control voltage of the second string select line being a first voltage level between the first threshold voltage and the second threshold voltage, the first string select cell and the second string select cell of the memory cell strings in the first column are turned on, while at least one of the first string select cell and the second string select cell of the memory cell strings in other columns is turned off; In response to the control voltage of the first string select line being a second voltage level between the second and third threshold voltages and the control voltage of the second string select line being a third voltage level between the third and fourth voltage levels, the first string select cells and the second string select cells of the memory cell strings in the second column are turned on, while at least one of the first string select cells and the second string select cells of the memory cell strings in other columns is turned off. In response to the control voltage of the first select line being at the third voltage level and the control voltage of the second select line being at the second voltage level, the first select cell and the second select cell of the memory cell strings in the third column are turned on, while at least one of the first select cell and the second select cell of the memory cell strings in other columns is turned off; and in response to the control voltage of the first select line being at the first voltage level and the control voltage of the second select line being at the fourth voltage level, the first select cell and the second select cell of the memory cell strings in the fourth column are turned on, while at least one of the first select cell and the second select cell of the memory cell strings in other columns is turned off.
12. The non-volatile memory as described in claim 9, wherein, A fifth common source line of these common source lines is coupled to the lower end of each of the memory cells in a fifth column of the memory cell array, and a sixth common source line of these common source lines is coupled to the lower end of each of the memory cells in a sixth column of the memory cell array. The threshold voltages of these string select cells include a first threshold voltage, a second threshold voltage, a third threshold voltage, a fourth threshold voltage, a fifth threshold voltage, and a sixth threshold voltage. The third and fourth threshold voltages are the lower and upper threshold voltages of the first threshold voltage pair, respectively. The second and fifth threshold voltages are the lower and upper threshold voltages of the second threshold voltage pair, respectively. The first and sixth threshold voltages are the lower and upper threshold voltages of a third threshold voltage pair among these threshold voltage pairs. The upper and lower threshold voltages of the second threshold voltage pair are both located between the upper and lower threshold voltages of the third threshold voltage pair. Each of the memory cell strings includes a first string select cell and a second string select cell. The first string of the memory cell strings in the first column... The critical voltages of the select cell and the second string of select cells are the sixth critical voltage and the first critical voltage, respectively. The critical voltages of the first string of select cells and the second string of select cells in the second column of memory cells are the fifth critical voltage and the second critical voltage, respectively. The critical voltages of the first string of select cells and the second string of select cells in the third column of memory cells are the fourth critical voltage and the third critical voltage, respectively. The critical voltages of the first string of select cells and the second string of select cells in the fourth column of memory cells are the third critical voltage and the fourth critical voltage, respectively. The critical voltages of the first string of select cells and the second string of select cells in the fifth column of memory cells are the second critical voltage and the fifth critical voltage, respectively. And the critical voltages of the first string of select cells and the second string of select cells in the sixth column of memory cells are the first critical voltage and the sixth critical voltage, respectively.
13. The non-volatile memory as described in claim 12, wherein, The string select lines include a first string select line coupled to a first string select cell of the memory cell strings and a second string select line coupled to a second string select cell of the memory cell strings; in response to a control voltage of the first string select line being a sixth voltage level greater than the sixth threshold voltage and a control voltage of the second string select line being a first voltage level between the first threshold voltage and the second threshold voltage, the first string select cell and the second string select cell of the memory cell strings in the first column are turned on, while at least one of the first string select cell and the second string select cell of the memory cell strings in other columns is turned off; In response to the control voltage of the first select line being at a fifth voltage level between the fifth and sixth critical voltages and the control voltage of the second select line being at a second voltage level between the second and third critical voltages, the first and second select cells of the memory cell strings in the second column are turned on, while at least one of the first and second select cells of the memory cell strings in other columns is turned off; In response to the control voltage of the first select line being at a fourth voltage level between the fourth and fifth critical voltages and the control voltage of the second select line being at a third voltage level between the third and fourth critical voltages, the first and second select cells of the memory cell strings in the third column are turned on, while at least one of the first and second select cells of the memory cell strings in other columns is turned off; In response to the control voltage of the first select line being at the third voltage level and the control voltage of the second select line being at the fourth voltage level, the first select cell and the second select cell of the memory cell strings in the fourth column are turned on, while at least one of the first select cell and the second select cell of the memory cell strings in other columns is turned off. In response to the control voltage of the first select line being at the second voltage level and the control voltage of the second select line being at the fifth voltage level, the first select cell and the second select cell of the memory cell strings in the fifth column are turned on, while at least one of the first select cell and the second select cell of the memory cell strings in other columns is turned off; and in response to the control voltage of the first select line being at the sixth voltage level and the control voltage of the second select line being at the first voltage level, the first select cell and the second select cell of the memory cell strings in the sixth column are turned on, while at least one of the first select cell and the second select cell of the memory cell strings in other columns is turned off.
14. A non-volatile memory, comprising: A memory cell array includes multiple memory cells, each of which includes multiple string select cells and multiple memory cells. Each of the multiple string select lines is coupled to a control terminal of a corresponding string select cell in each of the memory cells. Each of the multiple word lines is coupled to a control terminal of a corresponding memory cell in each of the memory cells. Each of the multiple bit lines is coupled to an upper end of each of the memory cells in a corresponding row of the memory cell array. A first common source line of the multiple common source lines is coupled to a lower end of each of the memory cells in a first column of the memory cell array. The string select cells of each of the memory cells in the first column have a first threshold voltage configuration. A second common source line of the common source lines is coupled to a lower end of each of the memory cells in a second column of the memory cell array. The string select cells of each of the memory cells in the second column have a second threshold voltage configuration. A third common source line of the common source lines is coupled to the memory cell array. The lower end of each of the memory cell strings in a third column of the array, the string select cells of each of the memory cell strings in the third column having a third critical voltage configuration, a fourth common source line of the common source lines coupled to the lower end of each of the memory cell strings in a fourth column of the array, the string select cells of each of the memory cell strings in the fourth column having a fourth critical voltage configuration, and the first critical voltage configuration, the second critical voltage configuration, the third critical voltage configuration and the fourth critical voltage configuration being different from each other; and a control circuit coupled to the string select lines to control the string select cells of the memory cell strings in the array, wherein in response to the string select lines having a control voltage configuration being turned on in the string select cells of each of the memory cell strings in the first column, the second column, the third column and the fourth column, at least one of the string select cells of each of the memory cell strings in the other three columns is turned off; The threshold voltages of the string select cells include a first threshold voltage, a second threshold voltage, and a third threshold voltage; the string select cells of each of the memory cell strings include a first string select cell, a second string select cell, and a third string select cell; a fifth common source line of the common source lines is coupled to a lower end of each of the memory cell strings in a fifth column of the memory cell string array, and a sixth common source line of the common source lines is coupled to a lower end of each of the memory cell strings in a sixth column of the memory cell string array;The critical voltages of the first, second, and third select cells in the first column are respectively the first critical voltage, the second critical voltage, and the second critical voltage; the critical voltages of the first, second, and third select cells in the second column are respectively the second critical voltage, the first critical voltage, and the second critical voltage; the critical voltages of the first, second, and third select cells in the third column are respectively the second critical voltage, the second critical voltage, and the first critical voltage; the critical voltages of the first, second, and third select cells in the fourth column are respectively the first critical voltage, the first critical voltage, and the third critical voltage; the critical voltages of the first, second, and third select cells in the fifth column are respectively the first critical voltage, the third critical voltage, and the first critical voltage; and the critical voltages of the first, second, and third select cells in the sixth column are respectively the third critical voltage, the first critical voltage, and the first critical voltage.
15. The non-volatile memory as described in claim 14, wherein, The string select lines include a first string select line coupled to a first string select cell of the memory cell strings, a second string select line coupled to a second string select cell of the memory cell strings, and a third string select line coupled to a third string select cell of the memory cell strings. In response to the control voltage of the first string select line being a first voltage level between a first threshold voltage and a second threshold voltage, and the control voltage of the second string select line being a second voltage level between the second threshold voltage and a third threshold voltage, and the control voltage of the third string select line being the second voltage level, the first string select cell, the second string select cell, and the third string select cell of the memory cell strings in the first column are turned on, while at least one of the first string select cell, the second string select cell, and the third string select cell of the memory cell strings in other columns is turned off. In response to the control voltage of the first select line being at the second voltage level, and the control voltage of the second select line being at the first voltage level, and the control voltage of the third select line being at the second voltage level, the first select cell, the second select cell, and the third select cell of the memory cell strings in the second column are turned on, while at least one of the first select cell, the second select cell, and the third select cell of the memory cell strings in other columns is turned off; In response to the control voltage of the first select line being at the second voltage level, and the control voltage of the second select line being at the second voltage level, and the control voltage of the third select line being at the first voltage level, the first select cell, the second select cell, and the third select cell of the memory cell strings in the third column are turned on, while at least one of the first select cell, the second select cell, and the third select cell of the memory cell strings in other columns is turned off; In response to the control voltage of the first select line being at the first voltage level, the control voltage of the second select line being at the first voltage level, and the control voltage of the third select line being at a third voltage level greater than the third threshold voltage, the first, second, and third select cells of the memory cell strings in the fourth column are turned on, while at least one of the first, second, and third select cells of the memory cell strings in other columns is turned off; In response to the control voltage of the first select line being at the first voltage level, the control voltage of the second select line being at the third voltage level, and the control voltage of the third select line being at the first voltage level, the first, second, and third select cells of the memory cell strings in the fifth column are turned on, while at least one of the first, second, and third select cells of the memory cell strings in other columns is turned off;In response to the control voltage of the first select line being at the third voltage level, and the control voltage of the second select line being at the first voltage level, and the control voltage of the third select line being at the first voltage level, the first select cell, the second select cell, and the third select cell of the memory cell strings in the sixth column are turned on, while at least one of the first select cell, the second select cell, and the third select cell of the memory cell strings in other columns is turned off.
Citation Information
Patent Citations
Memory device and method of operating the same
US20190252023A1