Packaging structure, package-on-package structure, and packaging method

TWI937934BActive Publication Date: 2026-09-01WISTRON NEWEB CORP
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Patent Information

Application Number
TW114125367
Authority / Receiving Office
TW · TW
Patent Type
Patents
Current Assignee / Owner
Filing Date
2025-07-04
Publication Date
2026-09-01
Estimated Expiration
2045-07-03

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    Figure TWG2TB001908922_003
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Abstract

A packaging structure, a stacked packaging structure, and a packaging method are disclosed. The packaging structure includes a substrate, a semiconductor wafer, a plurality of solder balls, and a first colloid. The semiconductor wafer has an upper surface, a lower surface opposite to the upper surface, and a side surface connecting the upper and lower surfaces. The plurality of solder balls are connected between the substrate and the lower surface of the semiconductor wafer. The first colloid covers a corner region of the upper surface of the semiconductor wafer and extends from the corner region of the upper surface onto the substrate.
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Claims

1. A packaging structure, comprising: A substrate having a filler region including a corner region and a side edge region; a semiconductor wafer having an upper surface, a lower surface opposite the upper surface, and a side surface connecting the upper surface and the lower surface; a plurality of solder balls connecting the substrate and the lower surface of the semiconductor wafer; a first adhesive located in the corner region and extending from the upper surface of the semiconductor wafer to the substrate; and a second adhesive located in the side edge region and extending from the side surface of the semiconductor wafer to the substrate, wherein the second adhesive does not exceed the upper surface of the semiconductor wafer.

2. The packaging structure as claimed in claim 1, wherein the first colloid further extends between the substrate and the lower surface of the semiconductor wafer.

3. The encapsulation structure as described in claim 2, wherein the first colloid completely covers at least one of the plurality of solder balls.

4. The packaging structure as described in claim 3, wherein the plurality of solder balls are arranged in a solder ball array, and the at least one solder ball that is completely covered is located in a corner region of the solder ball array.

5. The encapsulation structure as described in claim 1, wherein a corner region of the upper surface covered by the first colloid presents a fan shape.

6. The packaging structure as claimed in claim 2, wherein a region of the substrate covered by the first colloid between the substrate and the lower surface of the semiconductor wafer has a fan-shaped form.

7. The encapsulation structure as described in claim 1, wherein the first colloid and the second colloid system are made of the same material.

8. The packaging structure as claimed in claim 1, wherein the second colloid further extends between the substrate and the lower surface of the semiconductor wafer and touches at least one of the plurality of solder balls.

9. The packaging structure as described in claim 8 further includes a venting space located between the substrate and the lower surface of the semiconductor wafer, and the venting space is not occupied by the first colloid or the second colloid.

10. The encapsulation structure as described in claim 1, wherein the first colloid has a cross-section that is wider at the bottom and narrower at the top.

11. A package-on-package (POP) structure, comprising: A main substrate has a filler area, the filler area including a corner area and a side edge area; A first packaging module is located on the main substrate. The first packaging module has an upper surface, a lower surface opposite to the upper surface, and a side surface connecting the upper surface and the lower surface. The first packaging module includes a first substrate, a first semiconductor wafer, and a first molding layer. The first semiconductor wafer is located on the first substrate, and the first molding layer covers the first substrate and the first semiconductor wafer. A first colloid is located in the corner region and extends from the upper surface of the first molding layer to the main substrate. A second colloid is located in the side region and extends from the side surface of the first packaging module to the main substrate. The second colloid does not exceed the upper surface of the first packaging module.

12. The stacked package structure as described in claim 11, further comprising: A second packaging module is stacked on top of the first packaging module. The second packaging module has an upper surface, a lower surface opposite to the upper surface, and a side surface connecting the upper surface and the lower surface. The second packaging module includes a second substrate, a second semiconductor wafer, and a second molding layer. The second semiconductor wafer is located on the second substrate, and the second molding layer covers the second substrate and the second semiconductor wafer. The first colloid further extends from the upper surface of the second molding layer onto the main substrate.

13. The stacked package structure as described in claim 11 further includes a plurality of solder balls connected between the main substrate and the first substrate of the first package module, wherein the first colloid extends further between the main substrate and the first substrate of the first package module, and the first colloid completely covers at least one of the plurality of solder balls.

14. A packaging method, comprising: A plurality of solder balls are disposed on a substrate having a filler region, the filler region including a corner region and a side region; a semiconductor wafer is disposed on the plurality of solder balls, the semiconductor wafer having an upper surface, a lower surface opposite to the upper surface, and a side surface connecting the upper surface and the lower surface, and the plurality of solder balls connecting the lower surface of the semiconductor wafer and the substrate; a first round of filler is performed, such that a first adhesive is located in the corner region and extends from the upper surface of the semiconductor wafer to the substrate; and a second round of filler is performed, such that a second adhesive extends from the side surface of the semiconductor wafer to the substrate, and the second adhesive does not exceed the upper surface of the semiconductor wafer.

15. The encapsulation method as described in claim 14, wherein the first colloid and the second colloid system are made of the same material.

16. The packaging method as claimed in claim 14, wherein the first round of filler step causes the first adhesive to extend between the substrate and the lower surface of the semiconductor wafer, and causes the first adhesive to completely cover at least one of the plurality of solder balls.

17. The encapsulation method as described in claim 16, wherein the plurality of solder balls are arranged in a solder ball array, and the at least one solder ball that is completely encapsulated is located in a corner region of the solder ball array.

18. The encapsulation method as described in claim 14, wherein a filling path of the first round of filling partially overlaps with a filling path of the second round of filling.

Citation Information

Patent Citations

  • Package structure and method for fabricating the same

    TW202407820A

  • Semiconductor device and manufacturing method thereof, and liquid crystal module and semiconductor module having the same

    US20050206016A1