Non-volatile memory employing one or more current sources to provide constant write current

Abstract

A non-volatile memory includes a plurality of bit lines, a plurality of source lines, a plurality of word lines, a plurality of memory cells, bit line driving circuits, source line driving circuits, and a first current source. The plurality of memory cells are used to store data, and each memory cell is coupled to a corresponding bit line, a corresponding word line, and a corresponding source line. The first current source provides a first write current when the non-volatile memory performs a first write operation. During the first write operation, the bit line driving circuit or the source line driving circuit causes the first write current to flow through the first bit line, the first source line, and the first memory cell to write data into the first memory cell.

Claims

1. A non-volatile memory comprising: a plurality of bit lines; a plurality of source lines; a plurality of word lines; a plurality of memory cells for storing data, each memory cell being coupled to a corresponding bit line, a corresponding word line, and a corresponding source line; a bit line driving circuit; a source line driving circuit; and a first current source for providing a first write current when the non-volatile memory performs a first write operation, the first current source including a reference circuit, and a reference current flowing through the reference circuit; During the first write operation, the bit line driving circuit or the source line driving circuit causes the first write current to flow through a first bit line among the bit lines, a first source line among the source lines, and a first memory cell among the memory cells to write data into the first memory cell; and after the first write operation, if the non-volatile memory performs a read verification procedure and finds that the resistance state of the first memory cell has not successfully flipped, the non-volatile memory further uses: by fine-tuning the reference current or by increasing the number of selected parallel output transistors, to make the first current source provide a boosted write current greater than the first write current; and with the boosted write current, to perform another write operation on the first memory cell.

2. The non-volatile memory as claimed in claim 1, wherein the first current source is further configured to: provide a second write current when the non-volatile memory performs a second write operation, wherein the second write current is equal to the first write current.

3. The non-volatile memory as claimed in claim 2, wherein during the second write operation, the second write current flows through a second bit line of the bit lines, a second source line of the source lines, and a second memory cell of the memory cells to write data into the second memory cell, wherein the location of the second memory cell in the non-volatile memory is different from the location of the first memory cell in the non-volatile memory.

4. The non-volatile memory as claimed in claim 1, wherein the first current source is coupled to the bit line drive circuit or the source line drive circuit, and the first write current flows sequentially through the first bit line, the first memory cell and the first source line.

5. The non-volatile memory as claimed in claim 1, wherein the first current source is coupled to the source line drive circuit or the bit line drive circuit, and the first write current flows sequentially through the first source line, the first memory cell and the first bit line.

6. The non-volatile memory as claimed in claim 1, further comprising a second current source for providing a second write current during a second write operation; wherein the direction of the second write current through the first memory cell is opposite to the direction of the first write current through the first memory cell.

7. The non-volatile memory as claimed in claim 6, wherein the first write current passes through the first memory cell to write a first logic state into the first memory cell; and wherein the second write current passes through the first memory cell to write a second logic state into the first memory cell, the second logic state being different from the first logic state.

8. The non-volatile memory as claimed in claim 6, wherein the memory cells comprise resistive random access memory (RRAM) cells or magnetoresistive random access memory (MRAM) cells.

9. The non-volatile memory as claimed in claim 1, wherein the memory cells comprise flash memory cells, resistive random access memory (RRAM) cells, or magnetoresistive random access memory (MRAM) cells.

10. The non-volatile memory as claimed in claim 1, wherein the first current source includes a current mirror.

11. A non-volatile memory, comprising: M bit lines; M source lines; N word lines; a memory array comprising memory cells arranged in M ​​rows × N columns, each memory cell being used to store data and coupled to a corresponding bit line, a corresponding word line and a corresponding source line, wherein M and N are both greater than 1; a bit line driving circuit; a source line driving circuit; and a first current source for providing a first write current when the non-volatile memory performs a first write operation, the first current source comprising a reference circuit and a reference current flowing through the reference circuit; During the first write operation, the bit line driving circuit or the source line driving circuit causes the first write current to flow through a first bit line among the M bit lines, a first source line among the M source lines, and a first memory cell in the memory array to write data into the first memory cell; and after the first write operation, if the non-volatile memory performs a read verification procedure and finds that the resistance state of the first memory cell has not successfully flipped, the non-volatile memory is further used to: by fine-tuning the reference current or by increasing the number of selected parallel output transistors, so that the first current source provides a boosted write current greater than the first write current; and with the boosted write current, perform another write operation on the first memory cell.

12. The non-volatile memory as claimed in claim 11, wherein the first current source is further configured to: provide a second write current when the non-volatile memory performs a second write operation, wherein the second write current is equal to the first write current.

13. The non-volatile memory as claimed in claim 12, wherein during the second write operation, the second write current flows through a second bit line of the bit lines, a second source line of the source lines, and a second memory cell of the memory cells to write data to the second memory cell, wherein the location of the second memory cell in the memory array is different from the location of the first memory cell in the memory array.

14. The non-volatile memory as claimed in claim 11, wherein the first current source is coupled to the bit line drive circuit or the source line drive circuit, and the first write current flows sequentially through the first bit line, the first memory cell and the first source line.

15. The non-volatile memory as claimed in claim 11, wherein the first current source is coupled to the source line drive circuit or the bit line drive circuit, and the first write current flows sequentially through the first source line, the first memory cell, and the first bit line.

16. The non-volatile memory as claimed in claim 11, further comprising a second current source for providing a second write current during a second write operation of the non-volatile memory; wherein the direction of the second write current through the first memory cell is opposite to the direction of the first write current through the first memory cell.

17. The non-volatile memory as claimed in claim 16, wherein the first write current passes through the first memory cell to write a first logic state into the first memory cell; and wherein the second write current passes through the first memory cell to write a second logic state into the first memory cell, the second logic state being different from the first logic state.

18. The non-volatile memory as claimed in claim 16, wherein the memory cells comprise resistive random access memory (RRAM) cells or magnetoresistive random access memory (MRAM) cells.

19. The non-volatile memory as claimed in claim 11, wherein the memory cells comprise flash memory cells, resistive random access memory (RRAM) cells, or magnetoresistive random access memory (MRAM) cells.

20. The non-volatile memory as claimed in claim 11, wherein the first current source includes a current mirror.

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