Method for fabricating semiconductor device

Abstract

A method of fabricating a semiconductor device includes providing a first wafer, comprising the following steps: providing a first dielectric layer on a substrate, wherein an edge of the first dielectric layer is located inside an edge of the substrate and the first dielectric layer includes a first bevel. Providing a second dielectric layer on the first dielectric layer, wherein the second dielectric layer includes a second bevel corresponding to the first bevel. Removing a portion of the second dielectric layer to form a groove on the top surface of the second dielectric layer. Planarizing the second dielectric layer to remove the groove.

Claims

1. A method of fabricating a semiconductor device, comprising: providing a first wafer, comprising: providing a first dielectric layer on a substrate, wherein an edge of the first dielectric layer is located inside an edge of the substrate and the first dielectric layer includes a first bevel; providing a second dielectric layer on the first dielectric layer, wherein the second dielectric layer includes a second bevel corresponding to the first bevel; removing a portion of the second dielectric layer to form a groove on a top surface of the second dielectric layer, wherein the groove is an annular groove; and planarizing the second dielectric layer to remove the groove.

2. The method described in claim 1 further comprises: trimming the first dielectric layer such that the edge of the first dielectric layer is located inside the edge of the substrate.

3. The method described in claim 2, wherein the first dielectric layer is trimmed by machining.

4. The method as described in claim 1, wherein the top of the first inclined surface and the edge of the base have a first spacing distance in a horizontal direction.

5. The method as described in claim 4, wherein the edge of the first dielectric layer includes a vertical side surface connected to the bottom end of the first slope.

6. The method as described in claim 5, wherein the vertical side and the edge of the substrate have a second spacing distance in the horizontal direction, and the ratio of the second spacing distance to the first spacing distance is 0.5 to 0.

7.

7. The method as described in claim 4, wherein the groove and the top of the first inclined surface have a third spacing distance in the horizontal direction, and the ratio of the third spacing distance to the first spacing distance is 1.5 to 2.

5.

8. The method as described in claim 4, wherein the groove has a width in the horizontal direction, and the ratio of the width to the first spacing distance is 1.5 to 2.

5.

9. The method as described in claim 4, wherein the groove has a depth in a vertical direction perpendicular to the horizontal direction, and the ratio of the depth to the first interval distance is 0.1 to 1.

10. The method as described in claim 1, wherein the groove and the edge of the substrate have a fourth spacing distance in a horizontal direction, the groove and the center point of the substrate have a fifth spacing distance in the horizontal direction, and the fourth spacing distance is less than the fifth spacing distance.

11. The method as described in claim 1, wherein the edge of the second dielectric layer is aligned with the edge of the substrate.

12. The method as described in claim 1, wherein the center point of the annular groove coincides with the center point of the substrate.

13. The method as described in claim 1, wherein the groove includes a vertical sidewall.

14. The method described in claim 1, wherein the groove is formed by machining.

15. The method as described in claim 1, wherein the groove does not expose the first dielectric layer.

16. The method as described in claim 1, wherein planarizing the second dielectric layer is performed using a chemical mechanical polishing process.

17. The method described in claim 1 further comprises: forming a wire in the first dielectric layer.

18. The method as described in claim 1, wherein the depth of the groove in a vertical direction is less than or equal to the height of the second inclined surface in the vertical direction.

19. The method of claim 1 further comprises: providing a second wafer, wherein the second wafer includes a third dielectric layer; and bonding the first wafer and the second wafer through the second dielectric layer and the third dielectric layer.

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