Apparatus, method, and computer-readable medium for dynamic variable rate shading

Abstract

The various embodiments presented herein relate to methods and apparatuses for graphics processing, including devices such as GPUs. The apparatus can perform color analysis on at least one first frame among a plurality of frames, the color analysis being based on at least one image within the at least one first frame. The apparatus can also generate a frequency map for at least one second frame among the plurality of frames based on the performed color analysis. Furthermore, the apparatus can render at least one second frame based on the frequency map for the at least one second frame, the at least one second frame being rendered after the at least one first frame.

Description

[Technical Field]

[0001] This patent application claims the benefit of U.S. non-provisional patent application No. 17 / 482,296 entitled “Dynamic Variable Rate Shading”, filed on September 22, 2021, the entire contents of which are incorporated herein by reference.

[0002] This case generally relates to processing systems, and more specifically to one or more techniques for graphics processing. [Previous Technology]

[0003] Computing devices typically perform graphics and / or display processing (e.g., using a graphics processing unit (GPU), a central processing unit (CPU), a display processor, etc.) to render and display visual content. Such computing devices may include, for example, computer workstations, mobile phones such as smartphones, embedded systems, personal computers, tablet computers, and video game consoles. A GPU is configured to execute a graphics processing pipeline comprising one or more processing stages that operate together to execute graphics processing commands and output frames. A CPU can control the operation of a GPU by issuing one or more graphics processing commands to the GPU. Modern CPUs are typically capable of executing multiple applications simultaneously, each of which may require the use of a GPU during execution. A display processor is configured to convert digital information received from the CPU into analog values ​​and can issue commands to a display panel for displaying visual content. Devices providing content for visual presentation on a display may utilize a GPU and / or a display processor.

[0004] The device's GPU can be configured to perform processing in the graphics processing pipeline. Furthermore, a display processor or display processing unit (DPU) can be configured to perform display processing. However, with the advent of wireless communication and smaller handheld devices, the demand for improved graphics or display processing is increasing. [Summary of the Invention]

[0005] The following provides a simplified overview of one or more patterns to provide a basic understanding of such patterns. This overview is not a comprehensive overview of all conceived patterns, and is not intended to illustrate the key or essential elements of all patterns, nor to illustrate the scope of any or all patterns. Its sole purpose is to present some concepts of one or more patterns in a simplified form as an introduction to the more detailed descriptions that follow.

[0006] In one aspect of this case, a method, a computer-readable medium, and an apparatus are provided. The apparatus may be a graphics processing unit (GPU) or any apparatus capable of performing graphics processing. The apparatus may generate at least one first frame or one or more of at least one second frame based on application data. The apparatus may also select at least one image in at least one first frame based on application data, wherein color analysis is performed based on the selected at least one image. Additionally, the apparatus may compress one or more tiles in at least one first frame, wherein color analysis is performed based on the compressed one or more tiles. The apparatus may also perform color analysis on at least one first frame in a plurality of frames, wherein the color analysis is performed based on at least one image in at least one first frame. The apparatus may also generate a frequency map for at least one second frame in a plurality of frames based on the performed color analysis. Furthermore, the apparatus may select frequency data for at least one second frame based on the frequency map for at least one second frame. The apparatus may also render at least one second frame based on the frequency map for at least one second frame, wherein at least one second frame is rendered after at least one first frame. The device can also transmit at least one second frame to a display or buffer, wherein the at least one second frame is transmitted after rendering the at least one second frame based on a frequency map.

[0007] Details of one or more embodiments of this invention are set forth in the accompanying drawings and the detailed description herein. Other features, objects, and advantages of this invention will be apparent from the detailed description, the accompanying drawings, and the claims.

Implementation Method

[0017] Some graphics processing methods can utilize different types of shading, such as variable rate shading (VRS). Variable rate shading is a way of allocating rendering performance or power at a variable rate. For example, a graphics processing unit (GPU) can use variable rate shading to allocate rendering performance / power at a variable rate across the rendered image. That is, variable rate shading is a feature that improves rendering performance and quality by changing the shading rate of different areas of an image or frame. In some instances, variable rate shading can significantly improve the performance of certain applications by reducing the amount of work done or performed on the GPU. Because variable rate shading can provide enhanced performance benefits, it can be beneficial to apply variable rate shading, including automatically or dynamically (such as via application or game profiles). However, applying variable rate shading across the entire frame can result in a large number of significantly substandard renderings or renderings with varying content quality. Such varying rendering quality may cause applications to set a specific rate for their corresponding content. Furthermore, some applications may not utilize variable rate shading features because widespread application of this could introduce degradation. The various samples in this invention can automatically or dynamically enable variable-rate shading. For example, the various samples in this invention can automatically or dynamically enable variable-rate shading for rendering applications at the GPU without introducing any disruption to the output content. Furthermore, the various samples in this invention can utilize dynamic variable-rate shading to increase GPU performance. For example, due to the reduction in fragment shader calls, the dynamic variable-rate shading in this invention can also result in power or heat savings at the GPU.

[0018] Various forms of systems, apparatuses, computer program products, and methods are described more fully below with reference to the accompanying drawings. However, this application may be embodied in many different forms and should not be construed as limited to any particular structure or function presented throughout this application. Rather, these forms are provided to make this application thorough and complete, and to fully convey the scope of this application to those skilled in the art. Based on the teachings herein, those skilled in the art should understand that the scope of this application is intended to cover any form of system, apparatus, computer program product, and method disclosed herein, whether implemented independently of or in combination with other forms of this application. For example, any number of forms set forth herein may be used to implement an apparatus or practice a method. Furthermore, the scope of this application is intended to cover such apparatus or methods practiced using structures, functions, or structures and functions other than those set forth herein. Any form disclosed herein may be implemented by one or more elements of the claim.

[0019] Although various forms are described herein, many variations and arrangements of these forms fall within the scope of this application. While some potential benefits and advantages of the various forms of this application are mentioned, the scope of this application is not intended to be limited to any particular benefit, use, or objective. Rather, the various forms of this application are intended to be broadly applicable to different wireless technologies, system configurations, networks, and transport protocols, some of which are illustrated exemplary in the figures and the following description. The detailed description and figures are illustrative only and not limiting, and the scope of this application is defined by the appended claims and their equivalents.

[0020] Various apparatuses and methods are presented. These apparatuses and methods will be described in detail below and illustrated in the accompanying drawings by various blocks, components, circuits, processes, algorithms, etc. (collectively referred to as "elements"). These elements can be implemented using electronic hardware, computer software, or any combination thereof. Whether these elements are implemented as hardware or software depends on the specific application and the design constraints imposed on the entire system.

[0021] For example, an element, any part of an element, or any combination of elements can be implemented as a "processing system" comprising one or more processors (which may also be referred to as processing units). Examples of processors include microprocessors, microcontrollers, graphics processing units (GPUs), general-purpose GPUs (GPGPUs), central processing units (CPUs), application processors, digital signal processors (DSPs), reduced instruction set computing (RISC) processors, system-on-a-chip (SoCs), baseband processors, application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), programmable logic devices (PLDs), state machines, gate control logic, individual hardware circuits, and other suitable hardware configured to perform the various functions described throughout this document. One or more processors in a processing system can execute software. Software can be broadly interpreted as instructions, instruction sets, code, code fragments, program, subprogram, software component, application, software application, packaged software, common, sub-common, object, executable file, thread, process, function, etc., whether or not it is referred to as software, firmware, middleware, microcode, hardware description language, or others. The term application can refer to software. As described herein, one or more technologies can refer to an application, i.e., software, configured to perform one or more functions. In such instances, the application can be stored in memory, such as on-chip memory of the processor, system memory, or any other memory. The hardware described herein (such as a processor) can be configured to execute the application. For example, an application can be described as including code that, when executed by the hardware, causes the hardware to perform one or more technologies described herein. As an example, the hardware can access code from memory and execute the code accessed from memory to perform one or more technologies described herein. In some instances, components are identified in this document. In this instance, a component can be hardware, software, or a combination thereof. A component can be a single component or a sub-component of a single component.

[0022] Therefore, in one or more of the examples described herein, the described functions can be implemented in hardware, software, or any combination thereof. If implemented in software, the functions can be stored on or encoded as one or more instructions or codes on a computer-readable medium. Computer-readable media includes computer storage media. Storage media can be any available medium accessible by a computer. By way of example, and not limitation, such computer-readable media can include random access memory (RAM), read-only memory (ROM), electronically erasable programmable ROM (EEPROM), optical disk memory, magnetic disk memory, other magnetic storage devices, combinations of computer-readable media of the above types, or any other medium that can be used to store computer-executable code in the form of instructions or data structures accessible by a computer.

[0023] Generally, this document describes techniques for having a graphics processing pipeline in a single device or multiple devices, improving the rendering of graphics content, and / or reducing the load on processing units (i.e., any processing unit, such as a GPU, configured to perform one or more of the techniques described herein). For example, this document describes techniques for graphics processing in any device that utilizes graphics processing. Other exemplary benefits are described throughout this document.

[0024] As used herein, instances of the term "content" may refer to "graphic content," "image," or vice versa. This applies whether such terms are used as adjectives, nouns, or other parts of speech. In some instances, as used herein, the term "graphic content" may refer to content produced by one or more processes in a graphics processing pipeline. In some instances, as used herein, the term "graphic content" may refer to content produced by a processing unit configured to perform graphics processing. In some instances, as used herein, the term "graphic content" may refer to content produced by a graphics processing unit.

[0025] In some instances, as used herein, the term "display content" may refer to content generated by a processing unit configured to perform display processing. Graphical content can be processed into display content. For example, a graphics processing unit may output graphical content (such as a frame) to a buffer (which may be referred to as a frame buffer). A display processing unit may read graphical content (such as one or more frames) from the buffer and perform one or more display processing techniques thereon to generate display content. For example, a display processing unit may be configured to composite on one or more rendered layers to generate frames. As another example, a display processing unit may be configured to compose, blend, or otherwise combine two or more layers into a single frame. A display processing unit may be configured to perform scaling (e.g., zooming in or out) on the frames. In some instances, a frame may represent a layer. In other instances, a frame may represent two or more layers that have been blended together to form the frame; that is, the frame includes two or more layers, and a frame including two or more layers may subsequently be blended.

[0026] Figure 1 is a block diagram illustrating an example content generation system 100 configured to implement one or more technologies of this invention. The content generation system 100 includes a device 104. Device 104 may include one or more components or circuits for performing the various functions described herein. In some instances, one or more components of device 104 may be components of a System-on-a-Chip (SOC). Device 104 may include one or more components configured to perform one or more technologies of this invention. In the illustrated example, device 104 may include a processing unit 120, a content encoder / decoder 122, and system memory 124. In some cases, device 104 may include multiple optional components, such as a communication interface 126, a transceiver 132, a receiver 128, a transmitter 130, a display processor 127, and one or more displays 131. A reference to display 131 may represent one or more displays 131. For example, display 131 may include a single display or multiple displays. Display 131 may include a first display and a second display. The first display can be a left-eye display, and the second display can be a right-eye display. In some instances, the first and second displays can receive different frames for rendering on them. In other instances, the first and second displays can receive the same frames for rendering on them. In further instances, the results of graphics processing may not be displayed on the device; for example, the first and second displays may not receive any frames for rendering on them. Instead, the frames or graphics processing results can be passed to another device. In some cases, this can be referred to as split-rendering.

[0027] Processing unit 120 may include internal memory 121. Processing unit 120 may be configured to perform graphics processing, such as in graphics processing pipeline 107. Content encoder / decoder 122 may include internal memory 123. In some instances, device 104 may include a display processor, such as display processor 127, to perform one or more display processing techniques on one or more frames generated by processing unit 120 before they are presented by one or more displays 131. Display processor 127 may be configured to perform display processing. For example, display processor 127 may be configured to perform one or more display processing techniques on one or more frames generated by processing unit 120. One or more displays 131 may be configured to display or otherwise present frames processed by display processor 127. In some instances, one or more displays 131 may include one or more of the following: liquid crystal display (LCD), plasma display, organic light-emitting diode (OLED) display, projection display device, augmented reality display device, virtual reality display device, head-mounted display, or any other type of display device.

[0028] External memory, such as system memory 124, can be accessed by processing unit 120 and content encoder / decoder 122. For example, processing unit 120 and content encoder / decoder 122 can be configured to read from and / or write to external memory (such as system memory 124). Processing unit 120 and content encoder / decoder 122 can be communicatively coupled to system memory 124 via a bus. In some instances, processing unit 120 and content encoder / decoder 122 can be communicatively coupled to each other via a bus or different connections.

[0029] The content encoder / decoder 122 can be configured to receive graphical content from any source, such as system memory 124 and / or communication interface 126. System memory 124 can be configured to store the received encoded or decoded graphical content. The content encoder / decoder 122 can be configured to receive, for example, encoded or decoded graphical content in the form of encoded primitive data from system memory 124 and / or communication interface 126. The content encoder / decoder 122 can be configured to encode or decode any graphical content.

[0030] Internal memory 121 or system memory 124 may include one or more volatile or non-volatile memory or storage devices. In some instances, internal memory 121 or system memory 124 may include RAM, SRAM, DRAM, erasable programmable ROM (EPROM), electronically erasable programmable ROM (EEPROM), flash memory, magnetic data media or optical storage media, or any other type of memory.

[0031] According to some examples, internal memory 121 or system memory 124 may be a non-transitory storage medium. The term "non-transitory" may indicate that the storage medium is not embodied in a carrier wave or propagation signal. However, the term "non-transitory" should not be construed as meaning that internal memory 121 or system memory 124 is immovable or that its contents are static. As one example, system memory 124 may be removed from device 104 and moved to another device. As another example, system memory 124 may not be removable from device 104.

[0032] The processing unit 120 may be a central processing unit (CPU), a graphics processing unit (GPU), a general-purpose GPU (GPGPU), or any other processing unit that can be configured to perform graphics processing. In some instances, the processing unit 120 may be integrated into the motherboard of the device 104. In some instances, the processing unit 120 may reside on a graphics card mounted in a port on the motherboard of the device 104, or may otherwise be incorporated into a peripheral device configured to interact with the device 104. The processing unit 120 may include one or more processors, such as one or more microprocessors, GPUs, application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), arithmetic logic units (ALUs), digital signal processors (DSPs), discrete logic, software, hardware, firmware, other equivalent integrated or discrete logic circuits, or any combination thereof. If the technology is implemented in part in software, the processing unit 120 may store instructions for the software in a suitable non-transitory computer-readable storage medium (e.g., internal memory 121), and may use one or more processors to execute the instructions in hardware to perform the technology of this invention. Any of the foregoing, including hardware, software, combinations of hardware and software, etc., may be considered as one or more processors.

[0033] The content encoder / decoder 122 can be any processing unit configured to perform content decoding. In some instances, the content encoder / decoder 122 can be integrated into the motherboard of device 104. The content encoder / decoder 122 may include one or more processors, such as one or more microprocessors, application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), arithmetic logic units (ALUs), digital signal processors (DSPs), video processors, discrete logic, software, hardware, firmware, other equivalent integrated or discrete logic circuits, or any combination thereof. If the technology is implemented in part in software, the content encoder / decoder 122 may store instructions for the software in a suitable non-transitory computer-readable storage medium (e.g., internal memory 123), and may use one or more processors to execute instructions in the hardware to perform the technology of this invention. Any of the foregoing, including hardware, software, combinations of hardware and software, etc., can be considered as one or more processors.

[0034] In some embodiments, the content generation system 100 may include an optional communication interface 126. The communication interface 126 may include a receiver 128 and a transmitter 130. The receiver 128 may be configured to perform any of the receiving functions described herein with respect to device 104. Additionally, the receiver 128 may be configured to receive information from another device, such as eye or head position information, rendering commands, or location information. The transmitter 130 may be configured to perform any of the transmission functions described herein with respect to device 104. For example, the transmitter 130 may be configured to transmit information to another device, which may include a request for content. The receiver 128 and the transmitter 130 may be combined to form a transceiver 132. In such instances, the transceiver 132 may be configured to perform any of the receiving and / or transmitting functions described herein with respect to device 104.

[0035] Referring again to Figure 1, in some configurations, processing unit 120 may include a determining component 198 configured to generate one or more of at least one first frame or at least one second frame based on application data. The determining component 198 may also be configured to select at least one image in the at least one first frame based on application data, wherein color analysis is performed based on the selected at least one image. The determining component 198 may also be configured to compress one or more tiles in the at least one first frame, wherein color analysis is performed based on the compressed one or more tiles. The determining component 198 may also be configured to perform color analysis on at least one first frame in a plurality of frames, the color analysis being performed based on at least one image in the at least one first frame. The determining component 198 may also be configured to generate a frequency map for at least one second frame in the plurality of frames based on the performed color analysis. The determining component 198 may also be configured to select frequency data for the at least one second frame based on the frequency map for the at least one second frame. The determining component 198 can also be configured to render the at least one second frame based on the frequency map used for the at least one second frame, the at least one second frame being rendered after the at least one first frame. The determining component 198 can also be configured to transmit the at least one second frame to a display or buffer, wherein the at least one second frame is transmitted after rendering the at least one second frame based on the frequency map. Although the following description may focus on graphics processing, the concepts described herein can be applied to other similar processing techniques.

[0036] As described herein, an apparatus such as device 104 can refer to any device, apparatus, or system configured to perform one or more of the technologies described herein. For example, an apparatus can be a server, base station, user equipment, client equipment, station, access point, computer (e.g., personal computer, desktop computer, laptop computer, tablet computer, computer workstation, or mainframe computer), terminal product, device, telephone, smartphone, server, video game platform or console, handheld device (e.g., portable video game device or personal digital assistant (PDA)), wearable computing device (e.g., smartwatch), augmented reality device, or virtual reality device, non-wearable device, display or display device, television set, set-top box, intermediate network device, digital media player, video streaming device, content streaming device, in-vehicle computer, any mobile device, any device configured to generate graphical content, or any device configured to perform one or more of the technologies described herein. The processing described herein can be described as being performed by a specific component (e.g., GPU); however, in other embodiments, it may be performed using other components (e.g., CPU) consistent with the disclosed embodiments.

[0037] A GPU can process multiple types of data or data packets in the GPU pipeline. For example, in some states, a GPU can process two types of data or data packets, such as context register packets and draw call data. A context register packet can be a set of global state information, such as information about global registers, shaders, or constant data, which can regulate how the graphics context will be handled. For example, a context register packet may include information about color formats. In some states of a context register packet, there may be bits indicating which workload belongs to the context register. Furthermore, multiple functions or programs can be executed simultaneously and / or in parallel. For example, a function or program can describe an operation, such as a color mode or color format. Therefore, a context register can define multiple states of the GPU.

[0038] Context states can be used to determine how individual processing units (e.g., vertex extractors (VFDs), vertex shaders (VSs), shader processors, or geometry processors) operate and / or in what modes they operate. To do this, the GPU can use context registers and programming data. In some cases, the GPU can generate workloads in the pipeline based on the context register definition of a mode or state, such as vertex or primitive workloads. Some processing units, such as VFDs, can use these states to determine certain functions, such as how to assemble vertices. Because these modes or states may change, the GPU may need to modify the corresponding context. Furthermore, the workload corresponding to a mode or state may follow the changing mode or state.

[0039] Figure 2 illustrates an example GPU 200 according to one or more technologies of this invention. As shown in Figure 2, GPU 200 includes a command processor (CP) 210, a draw call packet 212, a VFD 220, a VS 222, a vertex cache (VPC) 224, a triangle setup engine (TSE) 226, a rasterizer (RAS) 228, a Z-processing engine (ZPE) 230, a primitive interpolator (PI) 232, a fragment shader (FS) 234, a rendering backend (RB) 236, a level 2 (L2) cache (UCHE) 238, and system memory 240. Although Figure 2 shows GPU 200 including processing units 220 to 238, GPU 200 may include a plurality of additional processing units. Furthermore, processing units 220 to 238 are merely examples, and any combination or order of processing units may be used by the GPU according to this invention. GPU 200 also includes command buffer 250, context register packet 260, and context state 261.

[0040] As shown in Figure 2, the GPU can utilize a CP (e.g., CP 210) or a hardware accelerator to resolve the command buffer into a context register packet (e.g., context register packet 260) and / or a draw call data packet (e.g., draw call packet 212). CP 210 can then send the context register packet 260 or the draw call data packet 212 to a processing unit or block in the GPU via a separate path. Furthermore, the command buffer 250 can allow different states of the context register and the draw call to alternate. For example, the command buffer can be constructed as follows: a context register of context N, multiple draw calls of context N, a context register of context N+1, and multiple draw calls of context N+1.

[0041] GPUs can perform image rendering in various different ways. In some instances, GPUs can render images using rendering and / or tiled rendering. In a tiled rendering GPU, an image can be divided or segmented into different segments or tiles. After the image is divided, each segment or tile can be rendered separately. A tiled rendering GPU can divide a computer graphics image into a grid format, so that each part of the grid (i.e., a tile) is rendered individually. In some cases, the image can be divided into different bins or tiles during the binning pass. In some cases, a visibility stream can be built during the binning pass, in which visible primitives or draw calls can be identified. In contrast to tiled rendering, direct rendering does not divide the frame into smaller bins or tiles. Instead, in direct rendering, the entire frame is rendered in a single time. Additionally, some types of GPUs allow both tiled rendering and direct rendering.

[0042] In some states, the GPU can apply drawing or rendering processing to different grids or tiles. For example, the GPU can render to a grid and perform all drawing of primitives or tiles in that grid. During the rendering to a grid process, the render target can reside in GMEM. In some cases, after rendering to a grid, the contents of the render target can be moved to system memory, and GMEM can be released for rendering the next grid. Alternatively, the GPU can render to another grid and perform drawing of primitives or tiles in that grid. Therefore, in some states, there may be a small number of grids, for example, four grids, which cover all drawing on a surface. Furthermore, the GPU can loop through all drawing in a grid but perform drawing for visible drawing calls, i.e., drawing calls that include visible geometry. In some states, a visibility stream can be generated (e.g., during grid processing) to determine visibility information for each primitive in the image or scene. For example, the visibility stream can identify whether a primitive is visible. In some states, this information can be used to remove primitives that are not visible during rendering, for example. In addition, at least some primitives identified as visible can be rendered during the rendering process.

[0043] In some states of tile rendering, there may be multiple processing stages or procedures. For example, rendering may be performed in two processes, such as a visibility or grid visibility process and a rendering or grid rendering process. In the visibility process, the GPU may input a rendering workload, record the position of primitives or triangles, and then determine which primitives or triangles fall into which grid or region. In some states of the visibility process, the GPU may also identify or mark the visibility of each primitive or triangle in the visibility stream. In the rendering process, the GPU may input a visibility stream and process one grid or region at a time. In some states, the visibility stream may be analyzed to determine which primitives or primitive vertices are visible or invisible. Thus, visible primitives or primitive vertices can be processed. By doing so, the GPU can reduce the unnecessary workload of processing or rendering invisible primitives or triangles.

[0044] In some cases, certain types of primitive geometry, such as location-only geometry, can be processed during the visibility process. Additionally, primitives can be classified into different cells or regions based on their position or location. In some cases, primitives or triangles can be classified into different cells by determining their visibility information. For example, the GPU can determine or write visibility information for each primitive in each cell or region, for example, into system memory. This visibility information can be used to determine or generate a visibility stream. In the rendering stream, primitives in each cell can be rendered individually. In these cases, the visibility stream can be retrieved from memory to discard primitives that are not visible to that cell.

[0045] Certain states of GPUs or GPU architectures can provide many different options for rendering, such as software rendering and hardware rendering. In software rendering, the driver or CPU can copy the geometry of the entire frame by processing each view at a time. Additionally, different states can be changed depending on the view. Thus, in software rendering, the software can copy the entire workload by changing some states that can be used to render for each viewpoint of the image. In some states, there may be an increased management burden because the GPU can submit the same workload multiple times for each viewpoint of the image. In hardware rendering, the hardware or GPU can be responsible for copying or processing the geometry of each viewpoint in the image. Therefore, the hardware can manage the copying or processing of primitives or triangles for each viewpoint in the image.

[0046] Figure 3 illustrates an image or surface 300, comprising multiple primitives divided into multiple grids. As shown in Figure 3, the image or surface 300 includes a region 302, which includes primitives 321, 322, 323, and 324. Primitives 321, 322, 323, and 324 are divided or placed into different grids, such as grids 310, 311, 312, 313, 314, and 315. Figure 3 illustrates an example of tile rendering using multiple viewpoints of primitives 321 to 324. For example, primitives 321 to 324 are in a first viewpoint 350 and a second viewpoint 351. Therefore, a GPU processing or rendering the image or surface 300 including region 302 can utilize multi-view or multi-view rendering.

[0047] As indicated herein, a GPU or graphics processing unit can use a tiled rendering architecture to reduce power consumption or save memory bandwidth. As described above, this rendering method can divide a scene into multiple grids and includes a process for identifying the visibility of triangles visible in each grid. Therefore, in tiled rendering, the entire screen can be divided into multiple grids or tiles. The scene can then be rendered multiple times, for example, once or multiple times for each grid.

[0048] In various forms of graphics rendering, some graphics applications may render a single target (i.e., the rendering target) once or multiple times. For example, in graphics rendering, a frame buffer on system memory may be updated multiple times. The frame buffer may be, for example, a portion of memory or random access memory (RAM) containing bitmaps or storage to store display data for the GPU. The frame buffer may also be a memory buffer containing complete data frames. Additionally, the frame buffer may be a logical buffer. In some forms, updating the frame buffer may be performed in grid or tile rendering, where, as described above, the surface is divided into multiple grids or tiles, and each grid or tile may then be rendered individually. Furthermore, in tile rendering, the frame buffer may be divided into multiple grids or tiles.

[0049] Some graphics processing techniques can utilize different types of shading, such as Variable Rate Shading (VRS). Variable Rate Shading is a method of allocating rendering performance or power at a variable rate. For example, a graphics processing unit (GPU) can use variable rate shading to allocate rendering performance / power across the rendered image at a variable rate. That is, variable rate shading is a feature that improves rendering performance and quality by changing the shading rate of different areas of an image or frame. In addition, variable rate shading can also be called coarse pixel shading.

[0050] In some instances, variable-rate shading can significantly increase the performance of certain applications by reducing the amount of work performed or done at the graphics processing unit (GPU). For example, variable-rate shading can reduce the number of instructions that the fragment shader executes at the GPU. Variable-rate shading can also result in a reduced shading rate with a small, perceptible visual difference. For example, variable-rate shading can result in a reduced shading rate with little or no reduction in visual quality at the output image.

[0051] Figure 4 illustrates a graph 400 of an example of GPU rendering performance utilizing the VRS rate. More specifically, graph 400 in Figure 4 illustrates rendering performance in frames per second (fps) utilizing the VRS rate with a forced draw state. As shown in Figure 4, the amount of fps for different applications (e.g., applications 410 and 420) can increase with the increase in the forced draw state VRS rate. For example, for 1×1 variable rate shading, the fps for applications 410 and 420 can be 69 and 71, respectively. For 2×2 variable rate shading, the fps for applications 410 and 420 can be 83 and 82, respectively. For 4×4 variable rate shading, the fps for applications 410 and 420 can be 88 and 89, respectively. As illustrated in Figure 4, variable rate shading can significantly increase the performance of certain applications by reducing the amount of work performed or carried out at the GPU.

[0052] In some cases, variable-rate shading can preserve edge content of the output image, which can mitigate degradation in the displayed content. However, it is possible to render content that exhibits significant degradation near the edges of the displayed content. For example, if an entire meadow is rendered as a single cell, edge aliasing may occur because each patch of grass does not include a primitive mesh. This is one of the reasons why some applications choose their own variable shading rates to suit their respective content.

[0053] Since variable rate shading can provide enhanced performance benefits, it may be beneficial to apply variable rate shading automatically or dynamically (such as via application or game profiles). However, applying variable rate shading across the entire frame can result in a significant amount of sub-quality rendering or rendering with varying content quality. Such varying rendering quality may cause applications to set a specific rate for their corresponding content. Furthermore, some applications may not utilize variable rate shading features because widespread application of this could introduce corruption. Therefore, enabling variable rate shading automatically or dynamically may be beneficial. For example, it may be beneficial to automatically or dynamically enable variable rate shading for rendering applications at the GPU without introducing any corruption into the output content. In addition, utilizing dynamic variable rate shading to increase GPU performance may be beneficial.

[0054] The various forms of this invention can automatically or dynamically enable variable-rate shading. For example, the various forms of this invention can automatically or dynamically enable variable-rate shading for rendering applications at the GPU without introducing any corruption into the output content. Furthermore, the various forms of this invention can utilize dynamic variable-rate shading to increase GPU performance. The dynamic variable-rate shading of this invention can also result in power or heat savings at the GPU, such as due to a reduction in fragment shader calls.

[0055] Furthermore, the various samples in this case can utilize dynamic variable rate shading to perform color analysis on the frame data during the computation process. For example, the GPU's computation process can be used to perform color analysis on the frame data to construct a VRS image for subsequent frames. Color analysis can be used to identify areas with high contrast, and therefore may require a higher quality VRS rate. This can greatly reduce the amount of corruption and make quality differences in the displayed content imperceptible.

[0056] In some cases, the various forms of this invention can utilize frame relay data to enable conversion to VRS rates. For example, analyzing frame data can take a significant amount of time, depending on the size of the frame and / or geometry buffer. The various forms of this invention can instead read the frame relay data (e.g., bandwidth-compressed relay data) and perform a simple conversion to VRS rates (e.g., lookup table (LUT) conversion). For example, this can work because the hardware has already specified that color analysis should be performed when compressing UBWC tiles (i.e., tiles with minimal detail).

[0057] The various forms of this invention can automatically achieve a specific increase in frames per second (fps) without introducing corruption and maintaining the same level of performance to produce images during computation. For example, the various forms of this invention can increase overall performance by a certain amount of fps (e.g., about 10 fps) without introducing corruption and utilize similar performance to produce images during computation. In some instances, to avoid corruption based on frame-to-frame increments, the various forms of this invention can introduce filter cores, such as minimum filter cores. By introducing minimum filter cores, the various forms of this invention can transform data in the VRS image during computation.

[0058] Furthermore, the various forms of this invention can utilize GPU hardware to eliminate or reduce computational processes. For example, computational processes can be eliminated by adding a graphics memory (GMEM) system to resolve the conversion of bandwidth-compressed relay data into VRS images. This conversion from bandwidth-compressed relay data to VRS images can be a lookup table (LUT) conversion. Additionally, the various forms of this invention can allow GPU hardware to dynamically generate buffer data. For example, low-resolution z-process (LRZ) quality buffer data can be dynamically generated by GPU hardware during the visibility process for use in the rendering of the same frame.

[0059] In some instances, the various forms of this invention can utilize previous frame data to construct a variable-rate shading image for subsequent frames. The various forms of this invention can also perform color analysis during the calculation process of selecting the rate based on the details within the frame. Furthermore, the various forms of this invention can, for example, determine which rendering processes are applied to the VRS image based on heuristics. For example, the GPU driver can use heuristics to determine which rendering processes are applied to the VRS image. This determination by the GPU driver can be for the main geometry buffer (Gbuffer) process. This determination by the GPU driver can also be enabled for user game profiles or for application detection.

[0060] Figure 5 illustrates an example of dynamic variable rate shading processing according to the present invention. As shown in Figure 5, Figure 500 is an example dynamic variable rate shading processing including a first frame 510, a second frame 520, and a VRS image 530. More specifically, Figure 5 illustrates that color analysis can be performed on the first frame 510, wherein color analysis is performed based on the image in the first frame 510. Similarly, a VRS image 530 or a frequency map can be generated for the second frame 520 based on the color analysis. Furthermore, the second frame 520 can be rendered based on the VRS image 530 or the frequency map for the second frame, wherein the second frame 520 is rendered after the first frame 510.

[0061] As shown in Figure 5, the various forms of this invention can utilize previous frame data (e.g., data for the first frame 510) to construct a VRS image (e.g., VRS image 530) for subsequent frames (e.g., the second frame 520). Additionally, as shown in Figure 5, the various forms of this invention can perform color analysis during the calculation process, which selects the VRS rate based on the details in the first frame 510. As further illustrated in Figure 5, the various forms of this invention can utilize a GPU driver to determine which rendering processes should be applied to the VRS image 530. The various forms of this invention can utilize heuristics to determine which rendering processes should be applied to the VRS image 530.

[0062] In some forms, the computation process at the GPU can read the data of the entire frame to perform color analysis, such as for large frames including 20 MB or more. Various forms of this invention can utilize GPU hardware to perform this color analysis on the frame when compressing the tiles (e.g., UBWC tiles). For example, the computation process can read the bandwidth compression relay data of the tiles and convert the compressed tile size to a VRS rate. This can result in a significant bandwidth reduction in applications or games, for example, a 96% bandwidth reduction. Furthermore, the computation process can read the bandwidth compression relay data, which can result in a reduction of complex work at the GPU's Arithmetic Logic Unit (ALU). The computation process can also perform bandwidth compression relay data on another application unit (e.g., a less privileged application container (LPAC)).

[0063] Furthermore, in some embodiments of this case, dynamic variable rate coloring associated with bandwidth compression relay data hardware can eliminate significant corruption in the output content. This can result in a significant gain in the frame rate (fps) of the output content, for example, a gain of 10 fps in some applications. In some instances, applying the VRS image to subsequent frames may not cause any new significant corruption in the output content. For example, applying the VRS image to subsequent frames can mitigate significant corruption in the output content by using a minimum filter on the VRS image generation to account for any differences between previous and subsequent frames.

[0064] Figure 6 illustrates an example of dynamic variable rate shading processing according to the present invention. As shown in Figure 6, Figure 600 is an example dynamic variable rate shading processing including a visibility process 610, a low-resolution z-process (LRZ) quality buffer 620, a rendering process 630, and a frame 640. More specifically, Figure 6 illustrates that color analysis can be performed after the visibility process 610, wherein color analysis is performed on the LRZ quality buffer 620. Furthermore, the LRZ quality buffer 620 can be enabled before the rendering process 630 in the present invention.

[0065] As shown in Figure 6, the various forms in this case can be mapped to certain VRS rates. For example, the mapping to VRS rates can be simple enough that the GPU hardware can directly generate VRS images using a resolution from Graphics Memory (GMEM) to System Memory (SMEM). This GMEM-to-SMEM resolution eliminates the need for computational processes. Furthermore, as illustrated in Figure 6, the GPU hardware can perform analysis during the visibility process 610 and apply the VRS rates to the rendering process 630.

[0066] In some instances, the various forms of this invention may utilize a compression format that does not have certain types of compression (e.g., bandwidth compression or any compression that includes relay data). Furthermore, the various forms of this invention may utilize relay data from certain compression formats (e.g., bandwidth compression) to generate frequency maps for other applications (i.e., applications other than VRS).

[0067] The various forms of this invention can include many different benefits or advantages. For example, the various forms of this invention can increase GPU performance by utilizing dynamic variable rate shading, while slightly increasing GPU hardware utilization. For example, the various forms of this invention can result in a 15% to 35% performance increase at the GPU. In addition, due to the reduction in fragment shader calls, the various forms of this invention can provide power or thermal savings at the GPU. The various forms of this invention can be automatically initiated for applications that cause minimal disruption to the output content. Furthermore, the various forms of this invention can result in improvements for certain applications and increase the user's control over applications (e.g., profile applications). The various forms of this invention can also allow users to control the degree of VRS rate and the corresponding amount of output content disruption. For example, in cases resulting in higher FPS, some users can choose a larger amount of disruption, while other users can choose a smaller amount of disruption for clearer output content.

[0068] Figure 7 is a communication flowchart 700 of graphics processing according to one or more technologies of the present invention. As shown in Figure 7, Figure 700 includes example communication between GPU component 702 (e.g., a component in the GPU pipeline), GPU component 704 (e.g., another component in the GPU pipeline), and display or buffer 706 according to one or more technologies of the present invention.

[0069] At 710, GPU component 702 may generate at least one first frame or at least one or more second frames based on application data. For example, the at least one first frame and / or the at least one second frame may be generated at GPU component 702 based on application data 712 received from GPU component 704.

[0070] At 720, GPU component 702 can select at least one image in the at least one first frame based on application data, wherein color analysis is performed based on the selected at least one image. In some cases, the at least one image may be associated with a geometry buffer of the at least one first frame. Furthermore, the application data may correspond to a heuristic of the at least one first frame.

[0071] At 730, GPU component 702 may compress one or more tiles of the at least one first frame, wherein color analysis is performed based on the compressed one or more tiles. The compressed one or more tiles may correspond to compressed relay data of the at least one first frame.

[0072] At 740, the GPU component 702 can perform color analysis on at least one first frame among a plurality of frames, the color analysis being performed based on at least one image in the at least one first frame. The color analysis can be performed via a computation process at the graphics processing unit (GPU) or via hardware at the GPU.

[0073] At 750, GPU component 702 may generate a frequency map for at least one second frame among the plurality of frames based on the performed color analysis. In some cases, the frequency map may be a lookup table (LUT). For example, generating the frequency map may include generating a lookup table (LUT) based on color analysis.

[0074] In some cases, filtering can be performed on the frequency map to resolve differences between at least one first frame and at least one second frame. The difference between the at least one first frame and the at least one second frame may correspond to frame increments. Furthermore, filtering can be performed on the frequency map based on the core. The frequency map may also correspond to a variable rate shading (VRS) image.

[0075] At 760, GPU component 702 can select frequency data for the at least one second frame based on the frequency map used for the at least one second frame. The frequency data for the at least one second frame can correspond to one or more variable rate shading (VRS) rates.

[0076] At 770, GPU component 702 may render the at least one second frame based on the frequency map used for the at least one second frame, the at least one second frame being rendered after the at least one first frame.

[0077] At 780, GPU component 702 may transmit the at least one second frame (e.g., frame 782) to a display or buffer, wherein the at least one second frame is transmitted after rendering the at least one second frame based on the frequency map. For example, GPU component 702 may transmit frame 782 to a display or buffer 706.

[0078] Figure 8 is a flowchart 800 of an example method of graphics processing according to one or more technologies of this case. The method can be executed by a GPU, such as a device for graphics processing, another graphics processor, a GPU pipeline, a wireless communication device, and / or any device that can perform graphics processing in conjunction with the examples used in Figures 1 through 7.

[0079] At 808, the GPU can perform color analysis on at least one first frame among a plurality of frames, the color analysis being performed based on at least one image in the at least one first frame, as described in conjunction with the examples in Figures 1 through 7. For example, as described in 740 of Figure 7, GPU component 702 can perform color analysis on at least one first frame among a plurality of frames, the color analysis being performed based on at least one image in the at least one first frame. Furthermore, step 808 can be performed by processing unit 120 in Figure 1. The color analysis can be performed via computational processes at the graphics processing unit (GPU) or via hardware at the GPU.

[0080] At 810, the GPU may generate a frequency map for at least one second frame among the plurality of frames based on the performed color analysis, as described in conjunction with the examples in Figures 1 through 7. For example, as described at 750 in Figure 7, GPU component 702 may generate a frequency map for at least one second frame among the plurality of frames based on the performed color analysis. Furthermore, step 810 may be performed by processing unit 120 in Figure 1. In some cases, the frequency map may be a lookup table (LUT). For example, generating a frequency map may include generating a lookup table (LUT) based on color analysis.

[0081] In some cases, filtering can be performed on the frequency map to resolve differences between at least one first frame and at least one second frame. The difference between the at least one first frame and the at least one second frame may correspond to frame increments. Furthermore, filtering can be performed on the frequency map based on the core. The frequency map may also correspond to a variable rate shading (VRS) image.

[0082] At 814, the GPU may render the at least one second frame based on the frequency map used for the at least one second frame, which is rendered after the at least one first frame, as described in conjunction with the examples in Figures 1 through 7. For example, as described at 770 in Figure 7, GPU component 702 may render the at least one second frame based on the frequency map used for the at least one second frame, which is rendered after the at least one first frame. Furthermore, step 814 may be performed by the processing unit 120 in Figure 1.

[0083] Figure 9 is a flowchart 900 of an example method of graphics processing according to one or more technologies of this case. The method can be executed by a GPU, such as a device for graphics processing, another graphics processor, a GPU pipeline, a wireless communication device, and / or any device that can perform graphics processing in conjunction with the examples used in Figures 1 through 7.

[0084] At 902, the GPU may generate at least one first frame or at least one or more second frames based on application data, as described in conjunction with the examples in Figures 1 through 7. For example, as described in 710 of Figure 7, GPU component 702 may generate at least one first frame or at least one or more second frames based on application data. Furthermore, step 902 may be performed by processing unit 120 in Figure 1.

[0085] At 904, the GPU may select at least one image in the at least one first frame based on application data, wherein color analysis is performed based on the selected at least one image, as described in conjunction with the examples in Figures 1-7. For example, as described at 720 in Figure 7, GPU component 702 may select at least one image in the at least one first frame based on application data, wherein color analysis is performed based on the selected at least one image. Furthermore, step 904 may be performed by processing unit 120 in Figure 1. In some cases, the at least one image may be associated with a geometry buffer of the at least one first frame. Furthermore, the application data may correspond to a heuristic of the at least one first frame.

[0086] At 906, the GPU may compress one or more tiles of the at least one first frame, wherein color analysis is performed based on the compressed one or more tiles, as described in conjunction with the examples in Figures 1 through 7. For example, as described at 730 in Figure 7, GPU component 702 may compress one or more tiles of the at least one first frame, wherein color analysis is performed based on the compressed one or more tiles. Furthermore, step 906 may be performed by processing unit 120 in Figure 1. The compressed one or more tiles may correspond to compressed relay data of the at least one first frame.

[0087] At 908, the GPU can perform color analysis on at least one first frame among a plurality of frames, the color analysis being performed based on at least one image in the at least one first frame, as described in conjunction with the examples in Figures 1 through 7. For example, as described in 740 of Figure 7, GPU component 702 can perform color analysis on at least one first frame among a plurality of frames, the color analysis being performed based on at least one image in the at least one first frame. Furthermore, step 908 can be performed by processing unit 120 in Figure 1. The color analysis can be performed via computational processes at the graphics processing unit (GPU) or via hardware at the GPU.

[0088] At 910, the GPU may generate a frequency map for at least one second frame among the plurality of frames based on the performed color analysis, as described in conjunction with the examples in Figures 1 through 7. For example, as described at 750 in Figure 7, GPU component 702 may generate a frequency map for at least one second frame among the plurality of frames based on the performed color analysis. Furthermore, step 910 may be performed by processing unit 120 in Figure 1. In some cases, the frequency map may be a lookup table (LUT). For example, generating a frequency map may include generating a lookup table (LUT) based on color analysis.

[0089] In some cases, filtering can be performed on the frequency map to resolve differences between at least one first frame and at least one second frame. The difference between the at least one first frame and the at least one second frame may correspond to frame increments. Furthermore, filtering can be performed on the frequency map based on the core. The frequency map may also correspond to a variable rate shading (VRS) image.

[0090] At 912, the GPU may select frequency data for the at least one second frame based on the frequency map used for the at least one second frame, as described in conjunction with the examples in Figures 1 through 7. For example, as described at 760 in Figure 7, GPU component 702 may select frequency data for the at least one second frame based on the frequency map used for the at least one second frame. Furthermore, step 912 may be performed by processing unit 120 in Figure 1. The frequency data for the at least one second frame may correspond to one or more variable rate shading (VRS) rates.

[0091] At 914, the GPU may render the at least one second frame based on the frequency map used for the at least one second frame, which is rendered after the at least one first frame, as described in conjunction with the examples in Figures 1 through 7. For example, as described at 770 in Figure 7, GPU component 702 may render the at least one second frame based on the frequency map used for the at least one second frame, which is rendered after the at least one first frame. Furthermore, step 914 may be performed by processing unit 120 in Figure 1.

[0092] At 916, the GPU may transmit the at least one second frame to a display or buffer, wherein the at least one second frame is transmitted after rendering the at least one second frame based on the frequency map, as described in conjunction with the examples in Figures 1 through 7. For example, as described at 780 in Figure 7, GPU component 702 may transmit the at least one second frame to a display or buffer, wherein the at least one second frame is transmitted after rendering the at least one second frame based on the frequency map. Furthermore, step 916 may be performed by processing unit 120 in Figure 1.

[0093] In one configuration, a method or apparatus for graphics processing is provided. The apparatus may be a GPU, a graphics processing unit, or another processor capable of performing graphics processing. In various embodiments, the apparatus may be a processing unit 120 within device 104, or other hardware within device 104 or another device. The apparatus, such as processing unit 120, may include: means for performing color analysis on at least one first frame among a plurality of frames, the color analysis being performed based on at least one image in the at least one first frame; means for generating a frequency map for at least one second frame among the plurality of frames based on the performed color analysis; means for rendering the at least one second frame based on the frequency map for the at least one second frame, the at least one second frame being rendered after the at least one first frame; and means for selecting the at least one image in the at least one first frame based on application data, wherein... The components include: color analysis performed based on the selected at least one image; a component for compressing one or more tiles of the at least one first frame, wherein color analysis is performed based on the compressed one or more tiles; a component for selecting frequency data for the at least one second frame based on the frequency map for the at least one second frame; a component for generating one or more of the at least one first frame or at least one second frame based on application data; and a component for transmitting the at least one second frame to a display or buffer, wherein the at least one second frame is transmitted after rendering the at least one second frame based on the frequency map.

[0094] The subject matter described herein can be implemented to achieve one or more benefits or advantages. For example, the described graphics processing technology can be used by a GPU, a graphics processing unit, or another processor capable of performing graphics processing to implement the dynamic variable rate shading technology described herein. This can also be implemented at a lower cost compared to other graphics processing technologies. Furthermore, the graphics processing technology of this invention can improve or accelerate data processing or execution. In addition, the graphics processing technology of this invention can improve resource or data utilization and / or resource efficiency. Furthermore, various embodiments of this invention can utilize dynamic variable rate shading technology to improve memory bandwidth efficiency and / or increase processing speed at the GPU.

[0095] It should be understood that the specific order or hierarchy of blocks in the disclosed process / flowchart is an illustration of the example method. It should be understood that the specific order or hierarchy of blocks in the process / flowchart can be rearranged based on design preferences. Furthermore, some blocks can be combined or omitted. The appended method request presents the elements of each block in the example order and is not intended to be limited to the specific order or hierarchy presented.

[0096] The foregoing description is provided to enable those skilled in the art to practice the various forms described herein. Those skilled in the art will readily understand various modifications to such forms, and the general principles defined herein may be applied to other forms. Therefore, the claims are not intended to be limited to the forms shown herein, but rather to conform to the full scope consistent with the language of the claims, wherein, unless expressly stated otherwise, reference to an element in the singular does not mean "one and only one," but rather "one or more." The word "exemplary" is used herein to mean "serving as an example, instance, or illustration." Any form described herein as "exemplary" is not necessarily to be construed as preferred or advantageous over other forms.

[0097] Unless otherwise specified, the term "some" means one or more, and the term "or" may be interpreted as "and / or" unless otherwise specified in the context. Combinations such as "at least one of A, B, or C", "one or more of A, B, or C", "at least one of A, B, and C", "one or more of A, B, and C", and "A, B, C, or any combination thereof" include any combination of A, B, and / or C, and may include multiples of A, multiples of B, or multiples of C. In particular, combinations such as "at least one of A, B, or C", "one or more of A, B, or C", "at least one of A, B, and C", "one or more of A, B, and C", and "A, B, C, or any combination thereof" may be only A, only B, only C, A and B, A and C, B and C, or A and B and C, wherein any such combination may contain one or more members of A, B, or C. All structural and functional equivalents of the elements throughout the various forms described herein, known or to be known by those skilled in the art, are expressly incorporated herein by reference and are intended to be included within the scope of the claim. Furthermore, nothing disclosed herein is intended for public use, whether or not such disclosure is expressly stated in the claims. Terms such as “module,” “mechanism,” “element,” and “device” may not be substitutes for the term “component.” Therefore, unless the component is explicitly stated using the phrase “means for,” the component in the claim should not be construed as means plus function.

[0098] In one or more instances, the functions described herein may be implemented in hardware, software, firmware, or any combination thereof. For example, although the term "processing unit" is used herein, such processing units may be implemented in hardware, software, firmware, or any combination thereof. If any function, processing unit, technology, or other module described herein is implemented in software, then the function, processing unit, technology, or other module described herein may be stored on or transmitted on a computer-readable medium as one or more instructions or codes on a computer-readable medium.

[0099] According to this case, the term "or" may be interpreted as "and / or" unless otherwise specified in the context. Furthermore, although phrases such as "one or more" or "at least one" may be used for some features disclosed herein but not others, features not using such language may be interpreted as having this implied meaning unless otherwise specified in the context.

[0100] In one or more instances, the functionality described herein may be implemented in hardware, software, firmware, or any combination thereof. For example, although the term "processing unit" is used herein, such processing units may be implemented in hardware, software, firmware, or any combination thereof. If any functionality, processing unit, technology, or other module described herein is implemented in software, the functionality, processing unit, technology, or other module described herein may be stored on or transmitted on a computer-readable medium as one or more instructions or codes on a computer-readable medium. A computer-readable medium may include computer data storage media or communication media, including any media that facilitates the transfer of computer programs from one place to another. In this way, a computer-readable medium may generally correspond to (1) a tangible computer-readable storage medium that is non-transitory, or (2) a communication medium, such as a signal or carrier wave. A data storage medium may be any available medium that can be accessed by one or more computers or one or more processors to retrieve instructions, code, and / or data structures for implementing the technology described herein. For example, and not as a limitation, such computer-readable media may include RAM, ROM, EEPROM, CD-ROM, or other optical disk storage, magnetic disk storage, or other magnetic storage devices. The terms "magnetic disk" and "optical disk" as used herein include compact discs (CDs), laser discs, optical discs, digital versatile discs (DVDs), floppy disks, and Blu-ray discs, wherein magnetic disks typically reproduce data magnetically, while optical discs reproduce data optically using lasers. Combinations of the above should also be included within the scope of computer-readable media. Computer program products may include computer-readable media.

[0101] The code can be executed by one or more processors, such as one or more digital signal processors (DSPs), general-purpose microprocessors, application-specific integrated circuits (ASICs), arithmetic logic units (ALUs), field-programmable logic arrays (FPGAs), or other equivalent integrated or discrete logic circuits. Therefore, the term "processor" as used herein can refer to any of the above-described structures or any other structure suitable for implementing the techniques described herein. Furthermore, the techniques can be implemented entirely within one or more circuit or logic elements.

[0102] The technology of this application can be implemented in a wide variety of devices or apparatuses, including wireless handheld devices, integrated circuits (ICs), or a set of ICs (e.g., chipsets). Various components, modules, or units are described herein to emphasize the functional characteristics of devices configured to perform the disclosed technology, but they do not necessarily need to be implemented by different hardware units. Rather, as described above, various units can be combined in any hardware unit, or provided by a collection of interactive operating hardware units including one or more processors as described above, along with appropriate software and / or firmware. Therefore, the term "processor" as used herein can represent any of the above-described structures or any other structure suitable for implementing the technology described herein. Furthermore, the technology can be fully implemented in one or more circuit or logic elements.

[0103] The following forms are merely illustrative and may be combined with other forms or teachings described herein without limitation.

[0104] The sample 1 is a graphics processing apparatus, including at least one processor coupled to memory and configured to: perform color analysis on at least one first frame of a plurality of frames, the color analysis being performed based on at least one image in the at least one first frame; generate a frequency map for at least one second frame of the plurality of frames based on the performed color analysis; and render the at least one second frame based on the frequency map for the at least one second frame, the at least one second frame being rendered after the at least one first frame.

[0105] State 2 is an apparatus as in State 1, wherein the at least one processor is also configured to: select at least one image in the at least one first frame based on application data, wherein the color analysis is performed based on the selected at least one image.

[0106] State 3 is an apparatus as in any one of states 1 and 2, wherein the at least one image is associated with a geometric buffer of the at least one first frame.

[0107] State 4 is an apparatus as in any one of states 1 to 3, wherein the application data corresponds to the heuristic of the at least one first frame.

[0108] State 5 is an apparatus as described in any one of states 1 to 4, wherein the at least one processor is also configured to: compress one or more tiles of the at least one first frame, wherein the color analysis is performed based on the compressed one or more tiles.

[0109] Session 6 is an apparatus as described in any one of modes 1 to 5, wherein the compressed one or more blocks correspond to the compressed relay data of the at least one first frame.

[0110] Sample 7 is an apparatus as described in any one of Samples 1 to 6, wherein generating the frequency diagram includes generating a lookup table (LUT) based on the color analysis.

[0111] Speed ​​8 is an apparatus as described in any one of Speed ​​1 to 7, wherein the frequency spectrum is filtered to resolve the difference between the at least one first frame and the at least one second frame.

[0112] State 9 is an apparatus as in any one of states 1 to 8, wherein the difference between the at least one first frame and the at least one second frame corresponds to a frame increment.

[0113] State 10 is a device as in any of states 1 to 9, wherein the frequency spectrum is filtered based on the core.

[0114] State 11 is an apparatus as described in any one of states 1 to 10, wherein the frequency diagram corresponds to a variable rate shading (VRS) image.

[0115] State 12 is an apparatus as described in any one of states 1 to 11, wherein the at least one processor is also configured to select frequency data for the at least one second frame based on the frequency map for the at least one second frame.

[0116] Sampling 13 is an apparatus as described in any one of sampling 1 to 12, wherein the frequency data for the at least one second frame corresponds to one or more variable rate coloring (VRS) rates.

[0117] State 14 is an apparatus as described in any one of states 1 to 13, wherein the at least one processor is also configured to generate one or more of the at least one first frame or the at least one second frame based on application data.

[0118] Sample 15 is an apparatus as described in any of Samples 1 to 14, wherein the color analysis is performed via a computation process at a graphics processing unit (GPU) or via hardware at the GPU.

[0119] Session 16 is an apparatus as described in any one of scenarios 1 to 15, wherein the at least one processor is also configured to transmit the at least one second frame to a display or buffer, wherein the at least one second frame is transmitted after rendering the at least one second frame based on the frequency map.

[0120] Style 17 is a device as described in any one of styles 1 to 16, and also includes at least one of an antenna or transceiver coupled to the at least one processor.

[0121] State 18 is a method for performing graphic processing of any one of States 1 to 17.

[0122] State 19 is a device for graphics processing, which includes components for implementing any one of states 1 to 17.

[0123] Format 20 is a computer-readable medium storing computer-executable code that, when executed by a processor, causes the at least one processor to implement any one of Formats 1 to 17. [Simplified Explanation of the Diagram]

[0008] Figure 1 is a block diagram illustrating a system for generating an example content of one or more technologies according to this case.

[0009] Figure 2 illustrates an example GPU based on one or more technologies in this case.

[0010] Figure 3 illustrates an example image or surface of one or more technologies according to this case.

[0011] Figure 4 is a graph illustrating an example of GPU rendering performance.

[0012] Figure 5 is an illustration of dynamic variable rate coloring processing.

[0013] Figure 6 is an illustration of dynamic variable rate coloring processing.

[0014] Figure 7 is a communication flowchart illustrating an example communication between a GPU component, another GPU component, and a display / buffer.

[0015] Figure 8 is a flowchart of an example method for graphics processing.

[0016] Figure 9 is a flowchart of an example method for graphics processing. [Biomaterial Storage]

[0125] Domestic storage information (please note in order of storage institution, date, and number): None. International storage information (please note in order of storage country, institution, date, and number): None.

Claims

1. An apparatus for graphics processing, comprising: One memory; and at least one processor, coupled to the memory and configured to: select at least one image in at least one first frame of a plurality of frames based on application data, wherein the at least one image is associated with a geometric buffer of the at least one first frame; perform a color analysis on the at least one first frame of the plurality of frames, wherein the at least one processor is configured to: further perform the color analysis based on the at least one image selected in the at least one first frame; generate a frequency map of at least one second frame of the plurality of frames based on the color analysis performed; and render the at least one second frame based on the frequency map of the at least one second frame, wherein the at least one processor is configured to: render the at least one second frame after the at least one first frame.

2. The apparatus as described in claim 1, wherein the application data corresponds to the heuristic of the at least one first frame.

3. The apparatus as claimed in claim 1, wherein the at least one processor is further configured to: compress one or more tiles of the at least one first frame, wherein the at least one processor is configured to: perform the color analysis based on the compressed one or more tiles.

4. The apparatus as claimed in claim 3, wherein the compressed one or more blocks correspond to the compressed relay data of the at least one first frame.

5. The apparatus as claimed in claim 1, wherein, in order to generate the frequency map, the at least one processor is configured to generate a lookup table (LUT) based on the color analysis.

6. The apparatus as claimed in claim 1, wherein the at least one processor is configured to: filter the frequency diagram to resolve a difference between the at least one first frame and the at least one second frame.

7. The apparatus as claimed in claim 6, wherein the difference between the at least one first frame and the at least one second frame corresponds to a frame increment.

8. The apparatus as claimed in claim 6, wherein the at least one processor is configured to filter the frequency map based on a core.

9. The apparatus as claimed in claim 1, wherein the frequency map corresponds to a variable rate shading (VRS) image.

10. The apparatus of claim 1, wherein the at least one processor is further configured to: select frequency data of the at least one second frame based on the frequency map of the at least one second frame.

11. The apparatus as claimed in claim 10, wherein the frequency data of the at least one second frame corresponds to one or more variable rate shading (VRS) rates.

12. The apparatus as claimed in claim 1, wherein the at least one processor is further configured to: generate the at least one second frame based on application data.

13. The apparatus as claimed in claim 1, wherein the at least one processor is configured to perform the color analysis via a computational process at a graphics processing unit (GPU).

14. The apparatus of claim 1, further comprising a transceiver coupled to the at least one processor, wherein the at least one processor is further configured to: transmit the at least one second frame to a display, wherein the at least one processor is configured to: transmit the at least one second frame after being configured to render the at least one second frame based on the frequency map.

15. A method of graphics processing, comprising the steps of: selecting at least one image in at least one first frame of a plurality of frames based on application data, wherein the at least one image is associated with a geometric buffer of the at least one first frame; performing a color analysis on the at least one first frame of the plurality of frames, the color analysis being further based on the at least one image in the selected at least one first frame; generating a frequency map of at least one second frame of the plurality of frames based on the performed color analysis; and rendering the at least one second frame based on the frequency map of the at least one second frame, the at least one second frame being rendered after the at least one first frame.

16. The method as described in claim 15, wherein the application data corresponds to the heuristic of the at least one first frame.

17. The method of claim 15 further includes the step of: compressing one or more tiles of the at least one first frame, wherein the color analysis is performed based on the compressed one or more tiles.

18. The method as described in claim 17, wherein the compressed one or more tiles correspond to the compressed relay data of the at least one first frame.

19. The method as described in claim 15, wherein the step of generating the frequency map includes the step of generating a lookup table (LUT) based on the color analysis.

20. The method as described in claim 15, wherein the frequency map is filtered to resolve a difference between the at least one first frame and the at least one second frame.

21. The method as described in claim 20, wherein the difference between the at least one first frame and the at least one second frame corresponds to a frame increment.

22. The method as described in claim 20, wherein the frequency map is filtered based on a core.

23. The method as described in claim 15, wherein the frequency map corresponds to a variable rate shading (VRS) image.

24. The method as described in claim 15 further includes the step of: selecting frequency data of the at least one second frame based on the frequency map of the at least one second frame.

25. The method as described in claim 24, wherein the frequency data of the at least one second frame corresponds to one or more variable rate shading (VRS) rates.

26. The method as described in claim 15 further includes the step of: generating the at least one second frame based on application data.

27. The method as described in claim 15, wherein the color analysis is performed via a computation pass at a graphics processing unit (GPU).

28. The method as described in claim 15, further comprising the step of: transmitting the at least one second frame to a display, wherein the at least one second frame is transmitted after rendering the at least one second frame based on the frequency map.

29. An apparatus for graphics processing, comprising: A means for selecting at least one image in at least one first frame among a plurality of frames based on application data, wherein the at least one image is associated with a geometric buffer of the at least one first frame; a means for performing a color analysis on the at least one first frame among the plurality of frames, the color analysis being further based on the at least one image selected in the at least one first frame; a means for generating a frequency map of at least one second frame among the plurality of frames based on the color analysis performed; and a means for rendering the at least one second frame based on the frequency map of the at least one second frame, the at least one second frame being rendered after the at least one first frame.

30. A computer-readable medium storing computer-executable code for graphics processing, the code, when executed by a processor, causing the processor to: select at least one image in at least one first frame of a plurality of frames based on application data, wherein the at least one image is associated with a geometric buffer of the at least one first frame; perform a color analysis on the at least one first frame of the plurality of frames, the color analysis being further based on the at least one image selected in the at least one first frame; generate a frequency map of at least one second frame of the plurality of frames based on the color analysis performed; and render the at least one second frame based on the frequency map of the at least one second frame, the at least one second frame being rendered after the at least one first frame.

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