Low-dropout regulator having high power supply rejection ratio

Abstract

The low-dropout regulator includes a reference voltage generation circuit and an output stage circuit. The reference voltage generation circuit includes a first loop. The reference voltage generation circuit generates a first control voltage based on a reference voltage and a first output voltage, and generates the first output voltage via the first loop based on the first control voltage. The output stage circuit includes a second loop. The output stage circuit generates a second output voltage via the second loop based on the first control voltage.

Claims

1. A low dropout regulator, comprising: a reference voltage generation circuit including a first loop, wherein the reference voltage generation circuit is configured to generate a first control voltage based on a reference voltage and a first output voltage, and to generate the first output voltage via the first loop based on the first control voltage; and an output stage circuit including a second loop, wherein the output stage circuit is configured to generate a second output voltage via the second loop based on the first control voltage, wherein each of the first loop and the second loop operates as a flip-flop voltage follower.

2. The low-dropout regulator of claim 1, wherein the reference voltage generation circuit includes an amplifier circuit for generating the first control voltage based on the reference voltage and the first output voltage, and the first circuit includes: a first P-type transistor receiving a power supply voltage and biased via a first bias voltage to generate the first voltage; a second P-type transistor receiving the power supply voltage and biased via the first voltage; a third P-type transistor biased via the first control voltage and coupled to the second P-type transistor to generate the first output voltage; a first N-type transistor coupled between the first P-type transistor and the third P-type transistor and biased via a second bias voltage; and a second N-type transistor coupled between the first N-type transistor and ground and biased via a third bias voltage.

3. The low-dropout regulator as claimed in claim 2, wherein the first N-type transistor operates as a common-gate amplifier.

4. The low-dropout regulator of claim 2, wherein the reference voltage generating circuit further includes: a voltage divider circuit for dividing the first output voltage to generate a feedback voltage, wherein the amplifier circuit is used to generate the first control voltage based on the reference voltage and the feedback voltage.

5. The low-dropout regulator of claim 1, wherein the output stage circuit further includes a first low-pass filter circuit for generating a second control voltage based on the first control voltage, and the second circuit includes: a first P-type transistor receiving a power supply voltage and biased via a first bias voltage to generate a first voltage; a second P-type transistor receiving the power supply voltage and biased via the first voltage; a third P-type transistor biased via the second control voltage and coupled to the second P-type transistor to generate the second output voltage; a first N-type transistor coupled between the first P-type transistor and the third P-type transistor and biased via a second bias voltage; and a second N-type transistor coupled between the first N-type transistor and ground and biased via a third bias voltage.

6. The low-dropout regulator as claimed in claim 5, wherein the first N-type transistor operates as a common-gate amplifier.

7. The low dropout regulator of claim 5, wherein the output stage circuit further includes at least one second low-pass filter circuit, and the first P-type transistor, the first N-type transistor and the second N-type transistor receive a corresponding voltage of the first bias voltage, the second bias voltage and the third bias voltage via the at least one second low-pass filter circuit.

8. A low dropout regulator, comprising: a reference voltage generation circuit including a first loop, wherein the reference voltage generation circuit is configured to generate a first control voltage based on a reference voltage and a first output voltage, and to generate a first output voltage via the first loop based on the first control voltage; and an output stage circuit including a second loop, wherein the output stage circuit is configured to generate a second output voltage via the second loop based on the first control voltage, and each of the first loop and the second loop includes a transistor that operates as a common-gate amplifier to increase the one-loop bandwidth of a corresponding loop in the first loop and the second loop.

Images