Apparatus for heat transfer, data center and method for thermal assembly

Abstract

This invention describes an apparatus. The apparatus includes a top plate component and a bottom plate component of a thermally conductive assembly, the thermally conductive assembly being placed on a semiconductor wafer package integrated thermal diffuser to remove heat from at least one semiconductor wafer within the semiconductor wafer package. Individual inner surfaces of the bottom plate component and the top plate component face each other, and a space is provided between the inner surfaces such that one or more cavities exist within the thermally conductive assembly between the individual inner surfaces. The apparatus includes a frame assembly to abut against at least one of the top plate component and the bottom plate component to prevent deformation of at least one of the top plate component and the bottom plate component when a load force is applied to a thermal assembly including the thermally conductive assembly and the semiconductor wafer package.

Description

[Technical Field]

[0001] Related Cases

[0002] This application claims the benefit of U.S. Provisional Application No. 63 / 217,058, filed on June 30, 2021, entitled “LOADING ASSEMBLY FOR TWO PHASE COOLING VAPOR CHAMBER”, the entire contents of which are incorporated herein by reference.

[0003] The present invention relates to a thermally conductive chamber with a reinforced structure for a thermal cooling assembly of a semiconductor wafer package under high load. [Previous Technology]

[0004] Background of the Invention

[0005] System design engineers face challenges, especially in high-performance data center computing, as computers and networks continuously pack ever-increasing levels of performance into ever-smaller packages. Therefore, innovative packaging and cooling systems are designed to meet the thermal requirements of such aggressively designed systems. [Summary of the Invention]

[0006] According to one embodiment of the present invention, an apparatus is specifically provided comprising: a top plate component and a bottom plate component of a thermally conductive component, the thermally conductive component being placed on a semiconductor wafer package integrated heat sink to remove heat from at least one semiconductor wafer within the semiconductor wafer package, wherein individual inner surfaces of the bottom plate component and the top plate component are facing each other and have a space between them such that one or more cavities exist within the thermally conductive component between the individual inner surfaces; and a frame component being adjacent to at least one of the top plate component and the bottom plate component to prevent deformation of at least one of the top plate component and the bottom plate component when a load force is applied to a thermal assembly including the thermally conductive component and the semiconductor wafer package.

Implementation Method

[0008] Detailed Description of Preferred Embodiments

[0009] Figure 1 illustrates a prior art air cooling assembly 100 using a two-phase heat transfer cooling mechanism. As observed in Figure 1, the assembly 100 includes a wafer package 101 comprising one or more semiconductor wafers 102 (for ease of drawing, only one semiconductor wafer is shown in Figure 1). The bottom surface of the wafer package 101 includes an input / output (I / O) array 103, such as a ball array or array pads / pads. The I / O array 103 is in electrical and mechanical contact with corresponding I / O arrays on an electronic circuit board 104.

[0010] The chip package 101 includes a cover or integrated heat sink (IHS) 105. The bottom surface of the cover 105 is in thermal contact with the top surface of the semiconductor chip 102 (a thermal interface material (TIM) may be present therebetween).

[0011] The base assembly 106 is assembled onto the package IHS 105. The two-phase vapor chamber 107 is embedded in the base assembly 106. As observed in FIG1, the vapor chamber 107 is formed by a top plate member 108 and a bottom plate member 109 embedded in the base assembly 106. The individual inner surfaces of the top plate member 108 and the bottom plate member 109 facing each other are recessed, sunken, thinned, hollowed out, etc., to achieve the shape of the chamber 107 when the top plate member 108 and the bottom plate member 109 are pressed together.

[0012] The top plate component 108 and the bottom plate component 109 are made of materials with high thermal conductivity (such as metals such as copper (Cu) or aluminum (Al), or metal alloys such as steel) and are carefully made thin (e.g., 0.8 to 1.0 mm) to improve the thermal efficiency of the chamber (the smaller the temperature difference between the package IHS and the heat sink fins and the less time it takes to heat the vapor chamber 107 to full temperature, the higher the thermal conductivity and the smaller the mass of the top plate component 108 and the bottom component 109).

[0013] The top plate component 108 also includes a hollow guide post 110, which is typically a heat pipe rising from the top surface of the top plate component 108 (the top surface of the top plate component 108 is exposed along the upper surface of the base 106). The opening in the top plate component 108 of the chamber 107 is fluidly coupled to the hollow interior region of the guide post 110, such that the chamber 107 is fluidly coupled to the hollow region within the guide post 110.

[0014] During operation, the liquid is within chamber 107. Heat from the operating semiconductor wafer 102 is absorbed by the top plate component 108 and the bottom plate component 109 of chamber 107, heating the liquid in chamber 107 (the bottom of the bottom plate component 108 is positioned to be in direct thermal contact with the IHS 105). If the semiconductor wafer 102 operates at a higher efficiency level and dissipates more heat, the liquid in chamber 107 changes to a vapor phase. The vapor from the boiling liquid in chamber 107 rises into the hollow area of ​​the guide pillar 110 (therefore chamber 107 is called a vapor chamber) and introduces heat from the packaged electronic device into the horizontal fins, where the airflow between the fins removes heat.

[0015] The guide post 110 is inserted into and in thermal contact with a larger heat sink (such as structure 111). The upright position of the guide post 110 is supported by a bracket 113. Cool air flows through the fins of the heat sink, which transfer heat from the vapor in the guide post 110 to the ambient air. The removal of heat from the vapor causes the vapor to condense back into liquid, which then returns to chamber 107. This process is then repeated.

[0016] Therefore, the heat dissipated by the semiconductor wafer 102 is absorbed away from the semiconductor wafer 102 and transferred to the flowing air via convection through the heat sink fins 111, thereby allowing the semiconductor wafer 102 to operate continuously at a high-efficiency level.

[0017] The problem is that future generations of silicon wafer manufacturing technology will drive higher-performance semiconductor wafers, characterized by increased transistor density and correspondingly increased heat dissipation and I / O count. Unfortunately, the increased heat dissipation combined with the increased number of I / O count creates packaging challenges that are best addressed by applying increased loads to the packaged semiconductor wafer and its cooling assembly.

[0018] The load force is the force applied to the assembly to securely mount it to the printed circuit board. In this situation, referring to FIG1, one or more of the fasteners 112 (fasteners, bolts, latches, control levers, etc.) are typically used to secure the chip package 101, base assembly 106, and bracket 113 to the electronic circuit board 104. Tightening the fasteners 112 into the printed circuit 104 compresses and secures the assembly assemblies 111, 113, 106, 108, and 109 to the printed circuit board 104.

[0019] Unfortunately, increasing the number of chip and package I / O 103 increases the tendency for the chip package 101 to "pop out" of the printed circuit board 104. In addition, increasing the heat dissipation of the chip translates to a larger and heavier heat sink structure 111. These two challenges (the threat of larger pop-out and the heavier heat sink 111) can be addressed by increasing the load applied by the fastener 112.

[0020] However, a secondary problem is that if the load increases to the load of the next-generation assembly, the top plate component 108 and / or the bottom plate component 109 may structurally bend. Deformation may ultimately cause the top plate component 108 and the bottom plate component 109 to lose their seal (the vapor chamber loses its "airtightness") or otherwise lose their structural integrity, which in turn leads to an inability to increase sufficient internal pressure to induce boiling in the chamber or otherwise reduce the cooling efficiency of the overall design, and ultimately causes the silicon wafer in the package to fail or lose functionality due to overheating.

[0021] Here, according to the mechanical design of the assembly in Figure 1, the load dynamics are such that the force applied by the fastener 112 is received by the top plate component 108 and the bottom plate component 109. Due to the thinness of the top plate component 108 and the bottom plate component 109, which are designed to meet high thermal efficiency requirements, they may / will bend or lose structural integrity under the load forces of next-generation technology. Therefore, the prior art method of Figure 1 can achieve a total stiffness of approximately 1000 lbs / mm at most, while the assembly intended for future technology is expected to have a stiffness of approximately 2000 lbs / mm.

[0022] Figures 2a, 2b, 2c and 2d illustrate different improved designs, characterized in that one or more support structures (e.g., frames, back plates, flanges, etc.) are adjacent to or at least sufficiently close to thin areas of one or more thin vapor chamber materials. These support structures are positioned to receive load forces in place of the thin vapor chamber material, thereby preserving the structural integrity of the vapor chamber.

[0023] It is worth noting that the support structure has sufficient thickness and / or stiffness, and / or is positioned to receive and withstand load forces without significant bending. Because the support structure does not significantly bend during the application of load forces, the thin vapor chamber material area designed to protect the support structure maintains structural integrity when load forces are applied.

[0024] Figure 2a illustrates the first embodiment 200, in which, similar to the method of Figure 1, a vapor chamber composed of a thin top plate component 208 and a thin bottom plate component 209 is embedded in the base 206. However, unlike the method of Figure 1, the bracket 213 not only holds the guide post 210 in place but also protects the structural integrity of the top plate component 208 of the vapor chamber 207. Here, the prior art bracket 113 of Figure 1 is made of a material with low hardness (e.g., aluminum) and / or has a thickness that can withstand the load forces of the current or prior art without bending but cannot withstand the load forces of future technologies without bending. As described above, with respect to Figure 1, providing structural support for the top plate component 108 under load forces was not a consideration in the design of the bracket 113.

[0025] In contrast, in the improved design 200 of Figure 2a, the bracket 213 is made of a sufficiently strong material (e.g., tungsten alloy (e.g., tungsten rhenium), hard stainless steel, hard composite material, etc.) and / or has sufficient thickness to ensure that the overall stiffness of the bracket 213 can withstand the load forces of future technologies. Because the improved bracket 213 does not bend significantly under higher dynamic load forces, it effectively protects the top plate component 208 from receiving higher dynamic load forces, thus preserving the structural integrity of the top plate component 208.

[0026] Another feature of the improved design in Figure 2a is the introduction of a support ring or frame 214 (hereinafter referred to as frame 214) below the base plate component 209. Here, again, since the base plate component 209 (similar to the top plate component 208) is made of a thin, highly thermally conductive metal (e.g., copper), both the base plate component 209 and the top plate component 208 can bend or lose structural integrity under high loads. The frame 214 is used to structurally reinforce or support the periphery of the bottom surface 215 of the base plate component 209, which is in direct thermal contact with the package IHS.

[0027] Similar to bracket 213, frame 214 is constructed of a sufficiently mechanically rigid material and / or has sufficient thickness to ensure that the overall rigidity of frame 214 can withstand the load forces of future technologies. Because frame 214 does not bend significantly under higher load forces, it effectively protects base plate component 209 and top plate component 208 (components 209 and 208 are mechanically joined and sealed together by hard welding or other procedures) from receiving higher load forces, thus preserving the structural integrity of base plate component 209 and top plate component 208. The opening in frame 214 through which the bottom surface of base plate component 209 is inserted can have different shapes, depending on the shape of the bottom surface of base plate component 209 (circular, square, etc.).

[0028] Based on the prototype sample, the assembly constructed according to the improved configuration included in Figure 2a exhibits an overall stiffness exceeding 2000 lbs / mm (2004 lbs / mm, 2047 lbs / mm, 2088 lbs / mm). In contrast, as mentioned above, the assembly constructed according to the prior art method of Figure 1 can only achieve a stiffness of approximately 1000 lbs / mm. An overall assembly stiffness of 2000 lbs / mm should be suitable for the dynamic load force expected of at least 600 lbs (e.g., 800 lbs) in next-generation technology.

[0029] Figure 2b illustrates an alternative embodiment 220, in which the base plate component 209 includes a flange 221 that extends outward away from the vapor chamber 207 and is mechanically compressed together with the mounting hardware 217 when a load force is applied by the fastener 212. A frame 224 is located above the flange 221 and is also mechanically compressed together with the mounting hardware 217 when a load force is applied by the fastener 212. Similar to the bracket 213 and frame 214 of the method in Figure 2a, the frame 224 is made of a rigid material.

[0030] The flange 221 receives load forces, thereby protecting the thin internal area of ​​the base plate component 215 that forms the bottom plate of the steam chamber. The flange 221 is mechanically protected from bending because it is positioned between the frame 214 and the mounting hardware 217, both of which are made of sufficiently rigid materials and / or have sufficient thickness so that the overall stiffness of the frame / flange / hardware structure can withstand the higher load forces of future technologies without significant bending.

[0031] The frame 224 also provides at least some structural support for the bracket 213. Thus, depending on the implementation, the bracket 213 may be made of a sufficiently rigid material and / or have a thickness that can withstand the full weight of the load force itself, or have relatively less rigidity and / or thickness, and rely on the frame 224 to achieve at least some structural support to avoid bending.

[0032] FIG2c shows another embodiment 240, which works similarly to the method of FIG2b, except that the top plate component 208 includes a flange 222 and the frame 234 is located below the flange 222 instead of above the flange 222 as in embodiment 220 of FIG2b.

[0033] For both methods in Figures 2b and 2c, compared to the method in Figure 2a which can reduce thermal efficiency, flanges 221 and 222 increase the total mass of the base plate component (Figure 2b) or the top plate component (Figure 2c). However, due to their wide surface area for receiving load forces, these flanges 221 and 222 do not need to be thick and can be thin components that are close to the thickness of the base / top plate of the vapor chamber, thereby reducing the reduction in thermal efficiency.

[0034] Figure 2d illustrates another embodiment 260, wherein the periphery 243 of the top component 208 is thickened to withstand load forces and forms the upper (e.g., half) portion of the inner sidewall of the vapor chamber 207. A frame 244 resides below the thickened periphery 234 of the top component 208 and forms the lower (e.g., half) portion of the inner sidewall of the vapor chamber 207. The frame 244 also forms the peripheral portion of the bottom plate of the vapor chamber 207. The bottom component 209 forms the inner portion of the bottom plate of the vapor chamber 207. In one embodiment, the bottom component 209 is welded or brazed to the frame 244 such that the two components form a single integral piece before integration into the cooling assembly.

[0035] In an alternative embodiment, the bottom component has a thickened periphery, and a frame is positioned above the thickened periphery of the bottom component. In this configuration, the frame helps form the upper inner wall of the vapor chamber and the periphery of the vapor chamber top plate. The top component forms the inner portion of the top plate. The top component and the frame are welded / hard-welded together before integration into the cooling assembly.

[0036] Although the above discussion has been directed at two-phase vapor solutions that also use air cooling, the teachings above can also be applied to channels and / or chambers associated with conventional liquid cooling.

[0037] In conventional liquid cooling, liquid flows through one or more structures (the top and bottom plates are collectively referred to as "cold plates") similar to the vapor chamber described above. Here, for example, both the top and bottom plates have grooves / channels / walls such that when the top and bottom plates are pressed together, one or more fluid channels are formed between the inner surfaces of the two components facing each other. In addition, the grooves / channels / walls in the top and / or bottom plates are shaped to form at least one fluid inlet and at least one fluid outlet.

[0038] During operation, liquid coolant enters the fluid inlet and flows through a channel formed between the top plate component and the bottom plate component. As it flows through the channel, the liquid coolant absorbs heat from the semiconductor wafer. The heated fluid then exits the fluid outlet.

[0039] Importantly, the top and bottom plate components of the liquid-cooled cold plate (or even a liquid-cooled cold plate consisting of a single material plate with holes drilled through it) share characteristics with the top and bottom plate components of the two-phase vapor chamber. Applying the teachings above to these top and bottom plate components can help improve them. Most notably, like the top and bottom plate components of the two-phase vapor chamber, conventional fluid-cooled cold plates are structured to have internal open spaces and are typically made very thin to improve thermal cooling efficiency. Therefore, when subjected to next-generation loads, conventional cold plates can similarly suffer from bending problems.

[0040] Therefore, the design of the liquid cooling plate can similarly include any of the structural elements 213, 214, and 224 discussed above to avoid deformation. Here, the top plate component 208 and the bottom plate component 209 of Figures 2a, 2b, and 2c should be understood as being replaced by a top plate and bottom plate component or a single piece having one or more fluid channels therein and having at least one fluid inlet port and at least one fluid outlet port.

[0041] Furthermore, although the improvement described in Figures 2a, 2b and 2c is for two-phase solutions in which the fluid coolant itself is contained in the wafer package cooling hardware, other two-phase cooling solutions are designed to transport vapor from the vapor chamber assembly to external cooling equipment and then transport the condensed and cooled liquid back to the vapor chamber.

[0042] Therefore, at least in relation to the conventional fluid cooling implementation and two-phase cooling system described above, the teachings above can be applied to the cooling device 300 of FIG3. FIG3 depicts a general cooling device 300 that can be found in many different types of semiconductor wafer cooling systems. As observed in FIG3, one or more semiconductor wafers are mounted to an electronic circuit board 301 within a package 302. A cold plate 303 is thermally coupled to the package 302 (e.g., by being placed on the package 302, with a thermally conductive material ("thermal interface material") therebetween) so that the cold plate 303 receives heat generated by one or more semiconductor wafers (in the case of a two-phase cooling system, the cold plate 303 may also be referred to as a vapor chamber).

[0043] The liquid coolant is located within the cold plate 303. If the system also uses air cooling (optional), the heat sink 304 can be thermally coupled to the cold plate 303. The heated fluid coolant and / or vapor 305 exits the cold plate 303 to be cooled by one or more cooling devices (e.g., heat exchangers, radiators, condensers, refrigeration units, etc.) and pumped by one or more pumping devices (e.g., dynamic (e.g., centrifugal), positive displacement (e.g., rotary, reciprocating, etc.)) 306. The cooled liquid 307 then enters the cold plate 303, and the process is repeated.

[0044] Regarding the cooling equipment and pumping equipment 306, the cooling activity may precede the pumping activity, the pumping activity may precede the cooling activity, or one or more stages of pumping and cooling may be mixed (e.g., in the order of flow: first cooling stage, first pumping stage, second cooling stage, second pumping stage, etc.) and / or other combinations of cooling and pumping activities may occur.

[0045] In addition, the air intake of any of the cooling equipment and pumping equipment 306 may be supplied by a cold plate of a semiconductor wafer package or individual cold plates of multiple semiconductor wafer packages.

[0046] In the latter case (air intake received from the cold plates of multiple semiconductor wafer packages), the semiconductor wafer package can be a component on the same electronic circuit board or multiple electronic circuit boards. In the latter case (multiple electronic circuit boards), these multiple electronic circuit boards can be components of the same electronic system (e.g., different boards on the same server computer) or components of different electronic systems (e.g., electronic circuit boards from different servers). Essentially, the general depiction in Figure 3 describes a compact cooling system (e.g., a cooling system contained within a single electronic system), an extended cooling system (e.g., a cooling system cooling components of any of a rack, multiple racks, a data center, etc.), and a cooling system between the two.

[0047] Figure 3 also illustrates the immersion cooling system, wherein it should be understood that the heated fluid and / or steam flow 305 originates from the immersion bath chamber (not shown for simplicity of illustration) and the cooled fluid flow 307 enters the immersion bath chamber. Here, the various steam chambers described above can be used in the immersion cooling system, wherein, for example, boiling in the steam chamber is used to enhance heat transfer to the immersion bath.

[0048] In various embodiments of the above mechanical design, the heat sink 211 is not present. In at least some of these embodiments, the heat sink 211 is replaced by another heat transfer structure (such as a boiling plate for an immersion cooling system having a rough and / or porous surface).

[0049] It should be noted that one or both of the top plate component and the bottom plate component do not need to have a planar surface. For example, the top plate and / or bottom plate component may have a curved surface (e.g., dome-shaped). Such a non-planar surface may face another surface (non-flat, flat, or otherwise). That is, the surface does not need to be flat to face another surface.

[0050] The following discussion of Figures 4, 5 and 6 is generally directed at system, data center and rack implementations. It should be noted that any packaged electronic components and / or electro-optical components on any electronic circuit board of any of the systems, data centers and rack implementations described below may be installed with hardware in accordance with the teachings just discussed in detail above.

[0051] Figure 4 depicts an example system. System 400 includes a processor 410 that provides processing, operation management, and execution of instructions for system 400. Processor 410 may include any type of microprocessor, central processing unit (CPU), graphics processing unit (GPU), processing core, or other processing hardware or processor used to provide processing for system 400. Processor 410 controls the overall operation of system 400 and may be or include one or more programmable general-purpose or special-purpose microprocessors, digital signal processors (DSPs), programmable controllers, application-specific integrated circuits (ASICs), programmable logic devices (PLDs), or similar or combinations of such devices.

[0052] Some systems also perform network connectivity functions (such as packet header processing functions, such as (to name a few) next-node hop lookup, priority / flow lookup with corresponding queue entries, etc.) as secondary functions or as a focus (e.g., network connectivity switches or routers). Such systems may include one or more network processors for performing such network connectivity functions (e.g., in a piped manner or otherwise).

[0053] In one example, system 400 includes an interface 412 coupled to processor 410. This interface may represent a higher-speed interface or high-throughput interface for system components requiring higher bandwidth connectivity, such as memory subsystem 420, graphics interface component 440, or accelerator 442. Interface 412 represents interface circuitry, which may be a standalone component or integrated onto the processor die. Where present, graphics interface 440 interfaces to a graphics component for providing a visual display to a user of system 400. In one example, graphics interface 440 may drive a high-definition (HD) display that provides output to a user. High-definition may refer to a display with a pixel density of approximately 100 pixels per inch (PPI) or greater, and may include formats such as Full HD (e.g., 1080p), Retina display, 4K (Ultra-High Definition or UHD), or others. In one example, the display may include a touchscreen display. In one instance, the graphical interface 440 generates a display based on data stored in memory 430 or based on an operation performed by processor 410, or both.

[0054] Accelerator 442 may be a fixed-function offloading engine accessible or usable by processor 410. For example, the accelerator in accelerator 442 may provide compression (DC) capabilities, cryptographic services such as public key encryption (PKE), encryption, hash / authentication capabilities, decryption, or other capabilities or services. In some embodiments, additionally or alternatively, the accelerator in accelerator 442 may provide field selection controller capabilities as described herein. In some cases, accelerator 442 may be integrated into a CPU socket (e.g., to a connector for a motherboard or circuit board that includes the CPU and provides an electrical interface with the CPU). For example, accelerator 442 may include a single-core or multi-core processor, a graphics processing unit, a logic execution unit, single-level or multi-level cache memory, functional units that can be used to independently execute programs or threads, application-specific integrated circuits (ASICs), neural network processors (NNPs), "X" processing units (XPUs), programmable control logic, and programmable processing elements such as field programmable gate arrays (FPGAs). Accelerator 442 can provide multiple neural networks, processor cores, or graphics processing units for use by artificial intelligence (AI) or machine learning (ML) models. For example, the AI ​​model can use or include any or a combination of the following: reinforcement learning schemes, Q-learning schemes, deep Q-learning, or asynchronous advantage behavior evaluation (A3C), ensemble neural networks, recursive ensemble neural networks, or other AI or ML models. Multiple neural networks, processor cores, or graphics processing units can be made available for use by the AI ​​or ML model.

[0055] Memory subsystem 420 represents the main memory of system 400 and provides storage for program code to be executed by processor 410 or data values ​​to be used during execution of routines. Memory subsystem 420 may include one or more memory devices 430, such as read-only memory (ROM), flash memory, electrically independent memory, or combinations of such devices. Memory 430 stores and manages operating system (OS) 432 and others to provide a software platform for executing instructions in system 400. In addition, application program 434 may be executed from memory 430 on the software platform of OS 432. Application program 434 represents a program with its own operating logic to perform one or more functions. Processor 436 represents an agent or routine that provides auxiliary functions to OS 432 or one or more applications 434 or combinations thereof. OS 432, application 434, and processor 436 provide software logic to provide the functionality of system 400. In one example, memory subsystem 420 includes memory controller 422, which is a memory controller used to generate commands and issue commands to memory 430. It should be understood that memory controller 422 may be a physical part of processor 410 or a physical part of interface 412. For example, memory controller 422 may be an integrated memory controller integrated into circuitry having processor 410. In some instances, system-on-a-chip (SOC or SoC) combines one or more of the following into a single SoC package: processor, graphics, memory, memory controller, and input / output (I / O) control logic.

[0056] Electrical-dependent memory is a memory whose status (and thus the data stored therein) is uncertain in the case of interrupted power supply to the device. Dynamic electrodependent memory requires renewed data stored in the device to maintain state. One example of dynamic dependent memory includes Dynamic Random Access Memory (DRAM), or some variants such as synchronous DRAM (SDRAM). Memory subsystems as described herein can be compatible with a variety of memory technologies, such as Double Data Rate version 3 (DDR3, initially released by the Joint Electronic Device Engineering Council (JEDEC) on June 27, 2007), DDR version 4 (DDR version 4; DDR4, the initial version of the 2012 version of DRD released by JEDEC in 2012) 4;DDR4E), Low Power DDR version 3 (LPDDR3, JESD209-3B released by JEDEC in August 2013), LPDDR Version 4 (LPDDR version 4; LPDDR4, Input W version 209-4put 209-output initially announced by JEDEC in August 2014 Input / output) 2;WIO2, JESD229-2 initially announced by JEDEC in August 2014), High Bandwidth Memory (HBM, JESD235 initially announced by JEDEC in October 2013), LPDDR5, HBM version 2 (HBM version 2; HBM2), or other derivatives or combinations of extended or extended memory technologies based on such technology.

[0057] In various implementations, memory resources can be "pooled". For example, the memory resources of a memory module installed on multiple cards, blades, systems, etc. (e.g., inserted into one or more racks) may be used as additional main memory capacity to the CPU and / or server that requires and / or requests it. In such embodiments, the primary purpose of the card / blade / system is to provide this additional main memory capacity. Cards / blades / systems can reach CPUs / servers using memory resources through several network infrastructures such as CXL, CAPI, etc.

[0058] Although not specifically shown, it should be understood that system 400 may include one or more buses or bus systems between devices, such as memory buses, graphics buses, interface buses, or other buses. Buses or other signal lines may couple components together communicatively or electrically, or both communicatively and electrically. Buses may include physical communication lines, point-to-point connections, bridges, adapters, controllers, or other circuit systems or combinations thereof. Buses may include one or more of the following: system bus, peripheral component high-speed interconnect (PCIe) bus, HyperTransport or Industry Standard Architecture (ISA) bus, small computer system interface (SCSI) bus, remote direct memory access (RDMA), Internet small computer system interface (iSCSI), NVM high speed (NVMe), coherent accelerator interface (CXL), coherent accelerator processor interface (CAPI), cache coherent interconnect for accelerators (CCIX), open coherent accelerator processor (open CAPI) or other specifications developed by the Gen-z Alliance, universal serial bus (USB) or IEEE standard 1394 bus.

[0059] In one example, system 400 includes interface 414, which can be coupled to interface 412. In one example, interface 414 represents interface circuitry, which may include individual components and integrated circuit systems. In one example, multiple user interface components or peripheral components, or both, are coupled to interface 414. Network interface 450 provides system 400 with the ability to communicate with remote devices (e.g., servers or other computing devices) via one or more networks. Network interface 450 may include Ethernet adapters, wireless interconnect components, cellular interconnect components, universal serial buses (USB), or other wired or wireless standard-based or proprietary interfaces. Network interface 450 may transmit data to remote devices, which may include sending data stored in memory. Network interface 450 may receive data from remote devices, which may include storing the received data in memory. Various embodiments can be used in conjunction with network interface 450, processor 410 and memory subsystem 420.

[0060] In one example, system 400 includes one or more input / output (I / O) interfaces 460. I / O interfaces 460 may include one or more interface components (e.g., audio, alphanumeric, haptic / touch, or other interfaces) through which a user interacts with system 400. Peripheral interfaces 470 may include any hardware interfaces not specifically mentioned above. Peripheral devices generally refer to devices that are dependently connected to system 400. Dependent connections provide system 400 with a connection to a software platform or hardware platform, or both, where operation is performed and interaction with the user is conducted.

[0061] In one example, system 400 includes a storage subsystem 480 that stores data in a non-electrical manner. In one example, in certain system implementations, at least some components of storage 480 may overlap with components of memory subsystem 420. Storage subsystem 480 includes one or more storage devices 484, which may be or include any conventional medium for storing large amounts of data in a non-electrical manner, such as one or more magnetic, solid-state, or optical-based disks, or combinations thereof. Storage 484 retains code or instructions and data in a persistent state (e.g., values ​​are retained even if power to system 400 is interrupted). Storage 484 may generally be considered "memory," but memory 430 is typically execution or operational memory that provides instructions to processor 410. Storage 484 is non-electrical, while memory 430 may include electrically oriented memory (e.g., the value or state of data is indeterminate if power to system 400 is interrupted). In one example, storage subsystem 480 includes a controller 482 for interfacing with storage 484. In one example, controller 482 is a physical part of interface 414 or processor 410, or may include circuitry or logic from both processor 410 and interface 414.

[0062] Non-electrically dependent memory (NVM) devices are memory whose state can be determined even if the device power supply is interrupted. In one embodiment, an NVM device may include block-addressable memory devices, such as NAND technology, or more specifically, multi-proximal limit quasi-NAND flash memory (such as single-level cell ("SLC"), multi-level cell ("MLC"), four-level cell ("QLC"), three-level cell ("TLC"), or some other NAND). NVM devices may also include byte-addressable, in-situ write-in three-dimensional cross-point memory devices or other byte-addressable, in-situ write-in NVM devices (also known as persistent memory), such as single-level or multi-level phase-change memory (PCM) or phase-change memory (PCMS) with switches, NVM devices using chalcogenide phase-change materials (e.g., chalcogenide glass), resistive memory including metal oxide-based, oxygen-vacant-based, and conductive-bridged random access memory (CB-RAM), nanowire memory, ferroelectric random access memory (FeRAM, FRAM), magnetoresistive random access memory (MRAM) with memristor technology, spin-transfer torque (STT)-MRAM, devices based on spin-electron magnetic junction memory, devices based on magnetic tunneling junction (MTJ), and devices based on domain walls (DW) and spin orbit transfer (SOT). Transfer (SOT) devices, thyristor-based memory devices, or combinations thereof or other memory.

[0063] A power source (not depicted) provides power to the components of system 400. More specifically, the power source typically interfaces with one or more power supplies in system 400 to provide power to the components of system 400. In one example, the power supply includes an alternating current to direct current (AC to DC) adapter for plugging into a wall outlet. This AC power may be renewable energy (e.g., solar power). In one example, the power source includes a DC power source, such as an external AC to DC converter. In one example, the power source or power supply includes wireless charging hardware for charging via proximity charging. In one example, the power source may include an internal battery, an AC power supply, a motion-based power supply, a solar power supply, or a fuel cell source.

[0064] In one example, system 400 may be implemented as a distributed computing system. For example, system 700 may be implemented using an interconnected computing spooler of processors, memory, storage, network interfaces, and other components. High-speed interconnects, such as PCIe, Ethernet, or optical interconnects (or combinations thereof), may be used. For example, the spooler may be designed according to any specification published by the Open Computing Project (OCP) or other distributed computing work that aims to modularize major architectural computer components into rack-mountable components (e.g., rack-mountable processing components, rack-mountable memory components, rack-mountable storage components, rack-mountable accelerator components, etc.).

[0065] Figure 5 depicts an example of a data center. Various embodiments can be used in or with the data center of Figure 5. As shown in Figure 5, data center 500 may include an optical mesh architecture 512. The optical mesh architecture 512 typically includes a combination of optical communication media (such as optical cables) and optical switching infrastructure, via which any particular skateboard in data center 500 can transmit signals to (and receive signals from) other skateboards in data center 500. However, the mesh architecture 512 can be used to transmit optical, wireless, and / or electrical signals. The communication connectivity provided by the optical mesh architecture 512 to any given skateboard may include connectivity to other skateboards in the same rack and skateboards in other racks.

[0066] Data center 500 includes four racks 502A to 502D, and racks 502A to 502D accommodate individual skateboard pairs 504A-1 and 504A-2, 504B-1 and 504B-2, 504C-1 and 504C-2, and 504D-1 and 504D-2. Therefore, in this example, data center 500 includes a total of eight skateboards. Optical mesh architecture 512 provides skateboard communication connectivity with one or more of the other seven skateboards. For example, via the optical mesh architecture 512, slide 504A-1 in rack 502A can have communication connectivity with slide 504A-2 in rack 502A and six other slides 504B-1, 504B-2, 504C-1, 504C-2, 504D-1, and 504D-2 in other racks 502B, 502C, and 502D distributed in data center 500. The embodiment is not limited to this example. For example, the mesh architecture 512 can provide optical and / or electrical communication.

[0067] Figure 6 depicts an environment 600 including multiple computer racks 602, each computer rack including a top-of-rack (ToR) switch 604, a cabinet manager 606, and a plurality of centralized system drawers. Typically, centralized system drawers may include centralized compute drawers and centralized storage drawers to implement, for example, a distributed computing system. Alternatively, centralized system drawers may also include centralized memory drawers and centralized input / output (I / O) drawers. In the illustrated embodiment, the centralized system drawers include an Intel® XEON® centralized computer drawer 608 and an Intel® ATOM™ centralized compute drawer 610, a centralized storage drawer 612, a centralized memory drawer 614, and a centralized I / O drawer 616. Each component in the aggregation system drawer is connected to the ToR switch 604 via a high-speed link 618, such as a 40 gigabits per second (Gb / s) Ethernet link or a 100 Gb / s silicon photonics (SiPh) optical link. In one embodiment, the high-speed link 618 comprises a 600 Gb / s SiPh optical link.

[0068] Similarly, the drawer can be designed according to any specification published by the Open Computing Project (OCP) or other distributed computing work that aims to modularize the main architecture computer components into rack-mountable components (e.g., rack-mountable processing components, rack-mountable memory components, rack-mountable storage components, rack-mountable accelerator components, etc.).

[0069] Multiple computer racks 600 may be interconnected via their ToR switches 604 (e.g., interconnected to a cassette-level switch or a data center switch), as shown by the connection to network 620. In some embodiments, a group of computer racks 602 is managed as individual cassettes via a cassette manager 606. In one embodiment, a single cassette manager is used to manage all racks within a cassette. Alternatively, distributed cassette managers may be used for cassette management operations. The RSD environment 600 further includes a management interface 622 for managing various aspects of the RSD environment. This includes managing rack configurations, wherein corresponding parameters are stored as rack configuration data 624.

[0070] Any of the systems, data centers or racks discussed above can be implemented in other environments besides being integrated into a typical data center, such as in a rack or other micro data center, for example at the edge of a network.

[0071] The embodiments described herein can be implemented in various types of computing, smartphones, tablets, personal computers, and network connectivity equipment, such as switches, routers, racks, and blade servers used in environments such as data centers and / or server clusters. Servers used in data centers and server clusters include array-based server configurations, such as rack-based servers or blade servers. These servers are interconnected via various network deployments, such as segmenting a collection of servers into local area networks (LANs), where appropriate switching and routing facilities are provided between LANs to form a private corporate intranet. For example, cloud hosting facilities may typically employ a larger data center with multiple servers. A blade includes an independent computing platform configured to perform server-type functions, i.e., an "on-card server." Therefore, each blade includes components commonly shared by conventional servers, including a main printed circuit board (motherboard) that provides internal wiring (e.g., buses) for coupling appropriate integrated circuits (ICs) and other components mounted to the board.

[0072] Various embodiments may be implemented using hardware components, software components, or a combination of both. In some embodiments, hardware components may include devices, components, processors, microprocessors, circuits, circuit elements (e.g., transistors, resistors, capacitors, inductors, etc.), integrated circuits, ASICs, PLDs, DSPs, FPGAs, memory cells, logic gates, registers, semiconductor devices, chipsets, microchips, chipsets, etc. In some embodiments, software components may include software components, programs, applications, computer programs, application programs, system programs, machine programs, operating system software, middleware, firmware, software modules, routines, subroutines, functions, methods, programs, software interfaces, APIs, instruction sets, computer code, code segments, computer code segments, words, values, symbols, or any combination thereof. The determination of whether to use hardware and / or software components in an implementation example can vary based on any number of factors, such as the required computing speed, power level, thermal tolerance, processing cycle budget, input data rate, output data rate, memory resources, data bus speed, and other design or performance constraints as required by a given implementation.

[0073] Some examples may be implemented or embodied as an article of art or at least a computer-readable medium. The computer-readable medium may include non-transitory storage media for storing logic. In some examples, the non-transitory storage medium may include computer-readable storage media capable of storing one or more types of electronic data, including electrically-dependent or non-electrically-dependent memory, removable or non-removable memory, erasable or non-erasable memory, writable or rewritable memory, etc. In some examples, the logic may include various software elements, such as software components, programs, applications, computer programs, application programs, system programs, machine programs, operating system software, middleware, firmware, software modules, norms, subnorms, functions, methods, procedures, software interfaces, APIs, instruction sets, computer code, code segments, computer code segments, words, values, symbols, or any combination thereof.

[0074] According to some examples, computer-readable media may include non-transitory storage media for storing or maintaining instructions that, when executed by a machine, computing device, or system, cause the machine, computing device, or system to perform methods and / or operations according to the described examples. These instructions may include any suitable type of code, such as source code, compiled code, interpreted code, executable code, static code, dynamic code, and the like. These instructions may be implemented according to a predefined computer language, mode, or syntax to instruct a machine, computing device, or system to perform a function. The instructions may be implemented using any suitable high-level, low-level, object-oriented, visual, compiled, and / or interpreted programming languages.

[0075] Where any of the foregoing teachings can be embodied in a semiconductor wafer, the description of the circuit design for the semiconductor wafer used in the final targeted semiconductor manufacturing process can take various forms, such as (e.g., VHDL or Verilog) register transfer level (RTL) circuit descriptions, gate level circuit descriptions, transistor level circuit descriptions, or masking descriptions, or various combinations thereof. Such circuit descriptions (sometimes referred to as "IP cores") are typically embodied on one or more computer-readable storage media (such as one or more CD-ROMs or other types of storage technologies) and provided to and / or masking tools and / or otherwise processed by and / or used by circuit design synthesis tools and / or masking tools. Such circuit descriptions may also contain embedded code for processing by a computer implementing the circuit design synthesis tools and / or masking tools.

[0076] The phrase "an instance" or "an example" does not necessarily refer to the same instance or embodiment. Any pattern described herein may be combined with any other pattern or similar pattern described herein, whether or not such patterns are described with respect to the same figure or element. The division, omission, or inclusion of functional blocks depicted in the accompanying drawings does not imply that hardware components, circuits, software, and / or elements for implementing such functions must be divided, omitted, or included in the embodiments.

[0077] The terms “coupled” and “connected” together with their derivatives may be used to describe some instances. These terms are not necessarily intended to be synonyms for each other. For example, the use of the terms “connected” and / or “coupled” may indicate that two or more components are in direct physical or electrical contact with each other. However, “coupled” may also mean that two or more components are not in direct contact with each other, but still cooperate or interact with each other.

[0078] In this document, the terms "first," "second," and the like do not indicate any order, quantity, or importance, but are used to distinguish one element from another. The term "a (a and an)" in this document does not indicate a limitation on quantity, but indicates the presence of at least one of the mentioned items. The term "verified" as used for reference signals in this document indicates a state in which the signal is active and can be achieved by applying any logic level—logo 0 or logic 1 to the signal. The terms "after" or "following" may refer to immediately following or after one or more other events. Other sequences may also be performed according to alternative embodiments. Furthermore, additional sequences may be added or removed depending on the specific application. Those skilled in the art who can use any combination of variations and benefit from this disclosure will understand its many variations, modifications, and alternative embodiments.

[0079] Unless otherwise specifically stated, separating language (such as the phrase "at least one of X, Y, or Z") should be understood in the context to generally represent that an object, term, etc., may be X, Y, or Z, or any combination thereof (e.g., X, Y, and / or Z). Therefore, this separating language is generally not intended and should not imply that certain embodiments require the presence of at least one of X, at least one of Y, or at least one of Z. Additionally, unless otherwise specifically stated, connecting language such as the phrase "at least one of X, Y, and Z" should also be understood to mean X, Y, Z, or any combination thereof, including "X, Y, and / or Z". [Simplified Explanation of the Diagram]

[0007] A better understanding of the invention can be obtained from the following detailed description in conjunction with the following figures, in which: Figure 1 shows a prior art thermal assembly; Figures 2a, 2b, 2c and 2d show an improved steam chamber mechanical integration design for the thermal assembly; Figure 3 shows a cooling system; Figure 4 shows the system; Figure 5 shows the data center; Figure 6 shows the rack.

Claims

1. An apparatus for heat transfer, comprising: a top plate member and a bottom plate member of a thermally conductive assembly, the thermally conductive assembly being disposed on an integrated heat diffuser to remove heat from at least one semiconductor wafer within a semiconductor wafer package associated with the integrated heat diffuser, the bottom plate member and the top plate member being pressed against each other to form the thermally conductive assembly, wherein one or more cavities exist within the thermally conductive assembly between individual inner surfaces of the bottom plate member and the top plate member facing each other when the bottom plate member and the top plate member are pressed against each other; and a frame assembly being adjacently abutted against at least one of the top plate member or the bottom plate member to impede deformation of at least one of the top plate member or the bottom plate member when a load force is applied to a thermal assembly including the thermally conductive assembly and the semiconductor wafer package, the frame assembly being disposed between the bottom plate member and the integrated heat diffuser.

2. The device of claim 1, wherein the thermally conductive component includes a vapor chamber for a two-phase cooling system.

3. The device as claimed in claim 1, wherein the thermally conductive component includes a cold plate for a liquid cooling system.

4. The device of claim 1, wherein the top plate component includes a flange and the frame assembly is to be adjacent to and abut against the flange.

5. The device as claimed in claim 1 or 2, wherein the base plate component includes a flange and the frame assembly is to be adjacent to and abut against the flange.

6. The device of claim 1, wherein the thickest portion of one of the frame components is thicker than the thinnest individual portions of the top plate component and the bottom plate component.

7. A data center comprising: a plurality of computing systems housed in racks communicatively coupled to each other via at least one network; a liquid cooling system including pumping equipment and cooling equipment; and a thermal assembly on a semiconductor wafer package within one of the plurality of computing systems for removing heat from at least one semiconductor wafer within the semiconductor wafer package, the thermal assembly comprising: a thermally conductive component in direct thermal contact with an integrated heat diffuser of the semiconductor wafer package, the thermally conductive component having a base plate member and a top plate member, the base plate member and the top plate member abutting against each other and structured to define one or more cavities within the thermally conductive component between individual inner surfaces of the top plate member and the base plate member, the thermally conductive component being fluidly coupled to the liquid cooling system, having an outlet for discharging heated vapor and / or liquid coolant and an inlet for receiving cooled liquid coolant; and, A frame assembly is adjacent to and abuts against at least one of the top plate member or the bottom plate member, the frame assembly being used to prevent deformation of at least one of the top plate member or the bottom plate member when a load force is applied to the thermal assembly, the frame assembly being used to reside between the bottom plate member and the integrated heat diffuser.

8. The data center as claimed in claim 7, wherein the thermally conductive component includes a vapor chamber for a two-phase cooling system.

9. The data center as claimed in claim 7, wherein the thermally conductive component includes a cold plate for a liquid cooling system.

10. The data center as claimed in claim 7, wherein the top plate component includes a flange and the frame assembly is to be adjacent to and abut against the flange.

11. The data center as claimed in claim 7, wherein the base plate component includes a flange and the frame assembly is to be adjacent to and abut against the flange.

12. As in the data center of claim 7, wherein the thickest portion of one of the frame components is thicker than the thinnest individual portions of the top plate component and the bottom plate component.

13. A method for a thermal assembly, comprising: mechanically integrating a top plate component and a bottom plate component of a thermally conductive assembly onto an integrated thermal diffuser of a semiconductor wafer package, wherein individual inner surfaces of the top plate component and the bottom plate component are used to form at least one cavity within the thermally conductive assembly; adjacently abutting against at least one of the top plate component or the bottom plate component, the frame assembly being disposed between the bottom plate component and the integrated thermal diffuser; and applying a load force to secure the thermal assembly including the thermally conductive assembly and the frame assembly to an electronic circuit board, wherein the top plate component and the bottom plate component maintain their structural integrity during the application of the load force.

14. The method of claim 13, wherein the top plate component includes a flange and the frame assembly presses against the flange during the application of the load forces.

15. The method of claim 13, wherein the base plate component includes a flange and the frame assembly presses against the flange during the application of the load forces.

16. The method of claim 13, wherein the thermally conductive component includes a vapor chamber for a two-phase cooling system.

17. The method of claim 13, wherein the thermally conductive component includes a cold plate for a liquid cooling system.

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