Camera devices and electronic equipment

Abstract

The purpose of this disclosure is to reduce the number of signals transmitted and received between multiple substrates or multiple layers in a multilayered structure. The imaging device disclosed herein includes: a plurality of pixels, each having a photoelectric conversion unit; an analog-to-digital converter (ADC) configured in regions comprising two or more pixels within each of the plurality of pixels, converting a signal corresponding to the charge converted by the photoelectric conversion of the two or more pixels into a digital signal; a floating diffusion region that outputs the charge converted by the photoelectric conversion units within the pixels; a plurality of regions, equally stacked, for arranging the plurality of photoelectric conversion units, the plurality of analog-to-digital converters, and the plurality of floating diffusion regions within the plurality of pixels; and a signal transmission unit that transmits and receives signals between the plurality of regions. The regions where the plurality of photoelectric conversion units within a region pixel are arranged, and the regions where the analog-to-digital converters are arranged, transmit and receive the charge of the plurality of floating diffusion regions via the same signal transmission unit.

Description

[Technical Field]

[0001] This disclosure relates to a camera device and an electronic machine. [Previous Technology]

[0002] Previous image sensors performed analog-to-digital (AD) conversion on a row-by-row basis on the image signal obtained from the photoelectric conversion unit of each pixel. Therefore, there is a problem of time consumption when reading all pixels within the pixel array. Therefore, a pixel-based AD imaging device is proposed, which provides an AD converter for each pixel and performs AD conversion on a pixel-by-pixel basis (see Patent Document 1). [Prior Art Documents] [Patent Documents]

[0003] Patent Document 1: Japanese Patent Application Publication No. 2018-148528 [Summary of the Invention]

[0004] [The problem the invention aims to solve]

[0005] However, since the camera device using the pixel-AD method has an AD conversion unit set for each pixel, the number of wirings increases and the power consumption also increases, making it difficult to manufacture a high-resolution camera device.

[0006] Therefore, by separating the substrate for the photoelectric conversion unit from the substrate for the AD conversion unit, an imaging device with these substrates laminated is made practical. Various signals are transmitted and received between the two laminated substrates using bumps or vias. However, if the number of signals transmitted and received between the two substrates is large, the wiring area on each substrate may become larger, the area ratio of the photoelectric conversion unit may decrease, and the aperture ratio may decrease.

[0007] Therefore, this disclosure provides a camera device and electronic device that can reduce the number of signals transmitted and received between multiple substrates or multiple layers in a multilayered structure. [Technical Means for Solving the Problem]

[0008] To solve the above problems, according to this disclosure, a camera device is provided, comprising: a plurality of pixels, each having a photoelectric conversion unit; an analog-to-digital conversion unit, which is arranged in a region pixel that includes two or more of the aforementioned pixels in each of the plurality of pixels, and converts a signal corresponding to the charge photoelectrically converted by the two or more pixels into a digital signal; a floating diffusion region that outputs the charge photoelectrically converted by the aforementioned photoelectric conversion units in the aforementioned pixels; a plurality of regions, which are stacked on top of each other and are arranged for the plurality of photoelectric conversion units, the plurality of aforementioned analog-to-digital conversion units, and the plurality of aforementioned floating diffusion regions in the plurality of pixels; and a signal transmission unit that performs signal transmission and reception between the plurality of regions; and in the plurality of regions, the region arranged for the plurality of photoelectric conversion units and the region arranged for the aforementioned analog-to-digital conversion units are separately provided; The regions where the plurality of photoelectric conversion units are arranged within the aforementioned pixels and the regions where the aforementioned analog-to-digital conversion units are arranged transmit and receive charges from the plurality of floating diffusion regions via the same signal transmission unit.

[0009] Alternatively, the photoelectric conversion unit may have a silicon semiconductor layer or a semiconductor layer other than silicon.

[0010] Alternatively, the semiconductor layer other than silicon mentioned above may be a semiconductor layer containing organic semiconductor materials.

[0011] Alternatively, it may include: a memory unit, which is configured according to the above-mentioned pixels and accumulates the charge converted by the above-mentioned photoelectric conversion unit; a first transmission transistor, which is configured according to the above-mentioned pixels and switches whether to accumulate the charge converted by the above-mentioned photoelectric conversion unit in the memory unit; and a second transmission transistor, which is configured according to the above-mentioned pixels and switches whether to transfer the charge accumulated in the above-mentioned memory unit to the above-mentioned floating diffusion region.

[0012] Alternatively, the memory unit may be disposed in the plurality of regions, which are the regions where the photoelectric conversion unit is disposed.

[0013] Alternatively, the memory unit may be disposed on the same layer as the photoelectric conversion unit, or disposed on a layer on which the photoelectric conversion unit is disposed.

[0014] Alternatively, the memory unit may be located in a region different from the region where the analog-to-digital converter unit is located.

[0015] Alternatively, the different regions mentioned above may have wiring layers electrically connected to the floating diffusion region mentioned above; the memory unit may be disposed on the same layer as the wiring layer mentioned above.

[0016] Alternatively, the analog-to-digital conversion unit may include: a comparator that compares an analog signal corresponding to the charge with a reference signal; a comparison output processing unit that outputs the comparison result of the comparator; and a waveform shaping unit that shapes the waveform of the output signal of the comparison output processing unit; and the comparator, the comparison output processing unit, and the waveform shaping unit are disposed in the same region among the plurality of regions.

[0017] Alternatively, the analog-to-digital conversion unit may include: a comparator that compares an analog signal corresponding to the charge with a reference signal; a comparison output processing unit that outputs the comparison result of the comparator; and a waveform shaping unit that shapes the waveform of the output signal of the comparison output processing unit; and the comparator, the comparison output processing unit, and the waveform shaping unit are disposed in different regions of the plurality of regions.

[0018] Alternatively, the analog-to-digital conversion unit may include: a comparator that compares an analog signal corresponding to the charge with a reference signal; a comparison output processing unit that outputs the comparison result of the comparator; and a waveform shaping unit that shapes the waveform of the output signal of the comparison output processing unit; and the comparator, the comparison output processing unit, and the waveform shaping unit are disposed in different regions among the plurality of regions.

[0019] Alternatively, it may have: a first region for which the photoelectric conversion unit is disposed; and a second region for which at least a portion of the analog-to-digital conversion unit is disposed; and the signal transmission unit transmits and receives the charge of the floating diffusion region between the first region and the second region.

[0020] Alternatively, the photoelectric conversion unit may have: a first photoelectric conversion unit; and a second photoelectric conversion unit; and the floating diffusion region may have: a first floating diffusion region that accumulates the charge photoelectrically converted by the first photoelectric conversion unit; and a second floating diffusion region that accumulates the charge photoelectrically converted by the second photoelectric conversion unit; and the plurality of regions may have: a first region that is configured with the first photoelectric conversion unit; a second region that is configured with the second photoelectric conversion unit; and a third region that is configured with at least a portion of the analog-to-digital conversion unit; and the signal transmission unit may have: a first signal transmission unit that transmits and receives the charge of the first floating diffusion region between the first region and the third region; and a second signal transmission unit that transmits and receives the charge of the second floating diffusion region between the second region and the third region.

[0021] Alternatively, one of the first photoelectric conversion unit and the second photoelectric conversion unit may have a silicon semiconductor layer, and the other of the first photoelectric conversion unit and the second photoelectric conversion unit may have a semiconductor layer other than silicon.

[0022] Alternatively, it may include: a first memory unit, which is configured according to the aforementioned pixels and accumulates the charge converted by the aforementioned first photoelectric conversion unit; and a second memory unit, which is configured according to the aforementioned pixels and accumulates the charge converted by the aforementioned second photoelectric conversion unit; wherein the aforementioned first memory unit is disposed in the aforementioned first region; the aforementioned second memory unit is disposed in the aforementioned second region; the aforementioned first floating diffusion region accumulates the charge corresponding to the charge stored in the aforementioned first memory unit; and the aforementioned second floating diffusion region accumulates the charge corresponding to the charge stored in the aforementioned second memory unit.

[0023] Alternatively, a memory unit may be provided, which is configured according to the above-mentioned pixels, and accumulates the charge converted by either the first photoelectric conversion unit or the second photoelectric conversion unit; the memory unit is disposed in the second region; either the first floating diffusion region or the second floating diffusion region accumulates the charge corresponding to the charge stored in the memory unit, and the other of the first floating diffusion region and the second floating diffusion region accumulates the charge not stored in the memory unit but converted by either the first photoelectric conversion unit or the second photoelectric conversion unit.

[0024] Alternatively, both the first photoelectric conversion unit and the second photoelectric conversion unit may have a silicon semiconductor layer or a semiconductor layer other than silicon.

[0025] Alternatively, it may include: a first memory unit, which is configured according to the above-mentioned pixels and accumulates the charge converted by the first photoelectric conversion unit; and a second memory unit, which is configured according to the above-mentioned pixels and accumulates the charge converted by the second photoelectric conversion unit.

[0026] Alternatively, at least one of the first memory unit and the second memory unit may be disposed across the first region and the second region.

[0027] According to this disclosure, an electronic machine is provided, comprising: an imaging device that outputs digital signals of each pixel after photoelectric conversion; and a signal processing unit that performs signal processing on the digital signals; and the imaging device comprising: a plurality of pixels, each having a photoelectric conversion unit; an analog-to-digital conversion unit that is provided in a region pixel that includes two or more of the aforementioned pixels, and converts a signal corresponding to the charge photoelectrically converted by the aforementioned two or more pixels into the aforementioned digital signal; a floating diffusion region that outputs the charge photoelectrically converted by the aforementioned photoelectric conversion unit within the aforementioned pixels; a plurality of regions that are equally stacked and configured for the plurality of pixels, the plurality of aforementioned analog-to-digital conversion units, and the plurality of aforementioned floating diffusion regions; and a signal transmission unit that performs signal transmission and reception between the plurality of regions; and the region configured for the aforementioned photoelectric conversion unit is separately configured from the region configured for the aforementioned analog-to-digital conversion unit among the plurality of regions; The aforementioned signal transmission unit transmits and receives charges from the aforementioned floating diffusion region between the region where the aforementioned photoelectric conversion unit is disposed and the region where the aforementioned analog-to-digital conversion unit is disposed.

Implementation Method

[0029] Hereinafter, embodiments of the camera device and electronic machine will be described with reference to the drawings. The description will focus on the main components of the camera device and electronic machine; however, there may be components or functions not shown or described in the camera device and electronic machine. The following description does not exclude components or functions not shown or described.

[0030] [Configuration of the camera device] FIG1 is a diagram showing an example of the configuration of a camera device 1 according to one embodiment of the present technology. The camera device 1 includes a pixel array unit 10, a time code generation unit 20, a reference signal generation unit 30, a vertical drive unit 40, and a horizontal control unit 50.

[0031] The pixel array unit 10 includes a plurality of region pixels 100, and performs analog-to-digital conversion (hereinafter referred to as AD conversion) on pixel signals for each region pixel 100. Each region pixel 100 has a plurality of pixels. Each pixel has a photoelectric conversion unit. As described later, each region pixel 100 has one analog-to-digital conversion unit (hereinafter referred to as AD conversion unit). The AD conversion unit sequentially performs AD conversion on the analog pixel signals captured by each pixel within the region pixel 100, and outputs the corresponding digital signals. Alternatively, the region pixel 100 may be referred to as a pixel, and each photoelectric conversion unit within a pixel may be referred to as a sub-pixel or color pixel.

[0032] The pixel array unit 10 includes: region pixels 100 arranged in a 2D matrix to generate pixel signals; and a plurality of time code transmission units 200 equally arranged among the plurality of region pixels 100 arranged in the row direction. Each region pixel 100 outputs a time code, which is the result of performing an analog-to-digital conversion (AD conversion) on the analog pixel signals of each pixel. The time code transmission units 200 sequentially transmit the time code in the row direction. The transmitted time code is input to the horizontal control unit 50. Signal line 101 connects the region pixels 100 and the time code transmission units 200. Details regarding the configuration of the region pixels 100 and the time code transmission units 200 will be described below.

[0033] The time code generation unit 20 generates a time code and outputs it to the time code transmission unit 200. Here, the time code refers to the code representing the elapsed time since the start of AD conversion in the display area pixel 100. This time code has a size equal to the number of bits of the converted digital pixel signal, and Gray code can be used for example. The time code is output to the time code transmission unit 200 via signal line 21.

[0034] The reference signal generation unit 30 generates a reference signal and outputs it to the area pixel 100. This reference signal serves as the reference signal for the AD conversion in the area pixel 100; for example, a signal whose voltage decreases linearly with time (a ramp signal) can be used. This reference signal is output via signal line 31. Furthermore, the generation and output of the time code by the time code generation unit 20 are synchronized with the generation and output of the reference signal by the reference signal generation unit 30. In this way, the time code and reference signal output from the time code generation unit 20 and the reference signal generation unit 30 are in a one-to-one correspondence, and the voltage of the reference signal can be obtained from the time code. The time code decoding unit 52, described later, performs decoding by obtaining the voltage of the reference signal from the time code.

[0035] The vertical drive unit 40 generates and outputs control signals for the region pixel 100. These control signals are output to the region pixel 100 via signal line 41. Details of the configuration of the vertical drive unit 40 will be described below.

[0036] The level control unit 50 processes the time code transmitted by the time code transmission unit 200. The time code is input to the level control unit 50 via signal line 11. Details of the configuration of the level control unit 50 will be described below. Furthermore, the level control unit 50 is one example of the processing circuit described in the claims.

[0037] [Structure of Vertical Control Unit] FIG2 is a diagram showing an example of the configuration of a vertical drive unit 40 according to one embodiment of the present technology. The vertical drive unit 40 includes a control signal generation unit 42 and a power supply unit 43.

[0038] The control signal generation unit 42 generates and outputs control signals for the area pixel 100. The power supply unit 43 supplies power to the area pixel 100 for its operation. These control signals and power supplies are transmitted via signal lines 41. As shown in the figure, the signal lines 41 consist of a plurality of signal lines (OFG, OFD, TX, SEL1, SEL2, SEL3, SEL4, Vb, INI, WORD) and a plurality of power lines (VDDH, VBIAS). The signal lines (OFG, OFD, TX, SEL1, SEL2, SEL3, SEL4, Vb, INI, WORD) are connected to the control signal generation unit 42 to transmit the control signals for the area pixel 100. On the other hand, the power lines (VDDH, VBIAS) are connected to the power supply unit 43 and are used for power supply. Details of these signal lines are described below.

[0039] [Structure of Horizontal Control Unit] Figure 3 is a diagram showing an example of the structure of a horizontal control unit 50 according to one embodiment of the present technology. The horizontal control unit 50 includes a time code decoding unit 52, a line signal processing unit 53, and a clock signal generation unit 54.

[0040] The time code decoding unit 52 decodes the time code. This decoding generates the result of the AD conversion, i.e., a digital pixel signal. Multiple time code decoding units 52 are arranged in the horizontal control unit 50, corresponding one-to-one with the time code transmission units 200 arranged in the pixel array unit 10. Time codes are simultaneously input to these time code decoding units 52 from the corresponding time code transmission units 200. The decoding of the input time codes is performed simultaneously and in parallel by these time code decoding units 52. Subsequently, the decoded multiple digital pixel signals are input to the line signal processing unit 53.

[0041] The horizontal signal processing unit 53 processes the digital pixel signal output from the time code decoding unit 52. This processing may include Correlated Double Sampling (CDS), described later. Furthermore, the horizontal signal processing unit 53 horizontally transmits the processed digital pixel signal. It sequentially transmits and outputs processed pixel signals corresponding to the plurality of digital pixel signals simultaneously input by the plurality of time code decoding units 52. The pixel signal output by the horizontal signal processing unit 53 is the output signal of the imaging device 1, equivalent to a digital pixel signal.

[0042] [Pixel Composition] Figure 4A shows an example of the composition of a region pixel 100 according to one embodiment of the present technology. This region pixel 100 includes four photoelectric conversion units 110 (110a, 110b, 110c, 110d) corresponding to four pixels, and an AD conversion unit 190. The outputs of the four photoelectric conversion units 110, i.e., each floating diffusion region FD, are connected to a common input node of the AD conversion unit 190. This reduces the number of signal transmission units 91 in the four photoelectric conversion units 110 and AD conversion units 190.

[0043] The photoelectric conversion unit 110 performs photoelectric conversion on a pixel-by-pixel basis, generating and maintaining an analog pixel signal corresponding to the incident light. Furthermore, the photoelectric conversion unit 110 is controlled by the vertical drive unit 40 to maintain the maintained analog pixel signal in a charged state in the floating diffusion region FD. This charge is supplied to the comparator unit 150 of the AD conversion unit 190 via the signal transmission unit 91. Details regarding the configuration of the photoelectric conversion unit 110, etc., will be described below. Since the floating diffusion regions FD of the four photoelectric conversion units 110 are concentrated in one location, charge transmission and reception between them and the AD conversion unit 190 can be performed, thereby reducing the number of signal transmission units 91.

[0044] The AD conversion unit 190 performs AD conversion on the analog pixel signal generated by the photoelectric conversion unit 110, etc. The AD conversion unit 190 includes a comparison unit 150, a comparison output processing unit 160, and a conversion result holding unit 170.

[0045] The comparison unit 150 compares the reference signal generated by the reference signal generation unit 30 with the analog pixel signal output by the photoelectric conversion unit 110, etc. The comparison result is output to the comparison output processing unit 160 via the signal line 106. The comparison unit 150 compares one of the plurality of analog pixel signals output from the photoelectric conversion unit 110, etc., with the reference signal. That is, it compares the voltage of the analog pixel signal transmitted by one of the signal lines 102 to 105 with the voltage of the reference signal. The comparison result is output as an electrical signal. For example, a signal with a time value "1" when the voltage of the analog pixel signal is less than the voltage of the reference signal and a time value "0" when the voltage of the analog pixel signal is greater than the voltage of the reference signal can be output. Details of the configuration of the comparison unit 150 will be described below.

[0046] The comparison output processing unit 160 processes the comparison result output by the comparison unit 150 and outputs the processed comparison result to the conversion result holding unit 170. The processed comparison result is output to the conversion result holding unit 170 via the signal line 107. As such processing, level conversion or waveform shaping may be performed, for example.

[0047] The conversion result holding unit 170 holds the time code output from the time code transmission unit 200 based on the processed comparison result output by the comparison output processing unit 160, as the result of the AD conversion. The conversion result holding unit 170 holds the time code output from the time code transmission unit 200 when the value of the comparison result changes from, for example, "1" to "0". This time code is generated by the time code generation unit 20 and transmitted by the time code transmission unit 200 to the time code of the region pixel 100. Subsequently, the conversion result holding unit 170 outputs the held time code to the time code transmission unit 200 under the control of the vertical drive unit 40. The time code transmission unit 200 transmits the output time code to the time code decoding unit 52 of the horizontal control unit 50.

[0048] As described above, a signal that slopes from high voltage to low voltage can be used as a reference signal, and the time code at which the voltage of the reference signal transitions from a state higher than the voltage of the analog pixel signal to a lower state is held in the conversion result holding unit 170. That is, the time code at which the analog pixel signal and the reference signal become approximately equal is held in the conversion result holding unit 170. The held time code is converted into a digital signal of the voltage of the reference signal at the corresponding time in the display time code decoding unit 52. In this way, AD conversion of the analog pixel signal generated by the photoelectric conversion unit 110 can be performed.

[0049] The area pixel 100 in FIG4A corresponds to the rolling shutter mode, but it can also be configured to correspond to the global shutter mode. In the global shutter mode, the pixel signals of all pixels are stored in the memory unit 113 and then sequentially transmitted to the AD conversion unit 190 for AD conversion. FIG4B is a block diagram showing the schematic configuration of the area pixel 100 corresponding to the global shutter mode. The difference between the area pixel 100 in FIG4B and the area pixel 100 in FIG4A lies in the internal configuration of the photoelectric conversion unit 110. The photoelectric conversion unit 110 in FIG4B has charge generation units 111 (111a, 111b, 111c, 111d), memory units 113 (113a, 113b, 113c, 113d), and transmission transistors 504 (504a, 504b, 504c, 504d).

[0050] The pixel signals converted by the four photoelectric conversion units 110 within the region pixel 100 are simultaneously stored in the memory unit 113. Subsequently, the transmission transistors 504 of each pixel are sequentially turned on, and the charges corresponding to the pixel signals stored in the memory unit 113 are input to the AD conversion unit 190 via the floating diffusion region FD and the signal transmission unit 91. The internal structure of the AD conversion unit 190 is the same as that in FIG4A.

[0051] [Structure of Photoelectric Conversion Unit] Figure 5A shows an example of the structure of a photoelectric conversion unit 110 according to one embodiment of the present technology. The photoelectric conversion unit 110 includes a charge generation unit 111. The charge generation unit 111 includes MOS (Metal Oxide Semiconductor) transistors 502 and 504, and a photodiode 501. Here, N-channel MOS transistors can be used for MOS transistors 502 and 504. Furthermore, a plurality of signal lines (OFD, OFG, TX) are connected to the photoelectric conversion unit 110. The overflow drain signal line OFFD is the signal line that supplies the reset voltage VOFG to the photodiode 501. The overflow gate signal line OFG is the signal line that transmits control signals to the MOS transistor 502. The transmission signal line TX is the signal line that transmits control signals to the MOS transistor 504. As shown in the figure, the overflow gate signal line OFG and the transmission signal line TX are connected to the gates of MOS transistors 502 and 504, respectively. If a voltage above the threshold voltage between the gate and source is input through these signal lines (hereinafter referred to as the turn-on signal), the MOS transistor becomes in the turn-on state.

[0052] The drain and gate of MOS transistor 502 are connected to the overflow drain signal line OFD and the overflow gate signal line OFG, respectively. The source of MOS transistor 502 is connected to the cathode of photodiode 501 and the source of MOS transistor 503. The anode of photodiode 501 is grounded. The gate of MOS transistor 504 is connected to the transmission signal line TX, and the drain is connected to the cathode of photodiode 501 and the floating diffusion region FD.

[0053] The photodiode 501 generates a charge corresponding to the amount of irradiated light and retains the generated charge. The MOS transistor 502 discharges the excessive charge generated by the photodiode 501. Furthermore, the MOS transistor 502 further discharges the charge accumulated in the photodiode 501 by making the connection between the photodiode 501 and the overflow drain signal line OFD. That is, the photodiode 501 is reset. The MOS transistor 504 transfers the charge generated by the photodiode 501 to the floating diffusion region FD.

[0054] Since the structure of photodiodes 110b, 110c and 110d is the same as that of photoelectric conversion unit 110a, the description is omitted. The charge corresponding to the pixel signal generated by the photoelectric conversion unit 110 (110a to 110d) is supplied to the floating diffusion area FD common to the four pixels.

[0055] Figure 5B is a circuit diagram of the photoelectric conversion unit 110 of the global shutter mode. In addition to the circuit configuration shown in Figure 5A, the photoelectric conversion unit 110 of Figure 5B includes a transistor (first transmission transistor) 503 and a memory unit 113. The transistor 503 is disposed inside the charge generation unit 111. The transistor (second transmission transistor) 504 is connected between the floating diffusion region FD and the transistor 503. The pixel signals after photoelectric conversion by the photodiodes 501 of each pixel are simultaneously transmitted through the transistor 503 and stored in the memory unit 113. Subsequently, the charges stored in the memory unit 113 are transmitted sequentially from pixel to pixel via the transistor 504 and the floating diffusion region FD to the AD conversion unit 190.

[0056] [Composition of the Comparator Unit] FIG6 is a diagram showing an example of the configuration of a comparator unit 150 according to one embodiment of the present technology. The comparator unit 150 includes a signal input transistor 12, a reference input transistor 157, and MOS transistors 13, 151, and 152. Here, P-channel MOS transistors can be used for MOS transistors 151 and 152. N-channel MOS transistors can be used for MOS transistors 12 and 157.

[0057] Furthermore, in the comparator section 150, in addition to the aforementioned signal lines 102, a plurality of signal lines (Vb, REF) are connected to the power supply line VDDH. The bias signal line Vb (Bias) is a signal line that supplies bias voltage to the MOS transistor 158. The reference signal line REF (Reference) is a signal line that transmits a reference signal to the reference input transistor 157. The power supply line VDDH is a power supply line that supplies power to the comparator section 150.

[0058] The sources of MOS transistors 151 and 152 are commonly connected to the power supply line VDDH. The gate of MOS transistor 151 is connected to the gate and drain of MOS transistor 152, and the drain of reference input transistor 157. The drain of MOS transistor 151 is connected to the drain of signal input transistor 12 and signal line 106. The source of signal input transistor 12 and the source of reference input transistor 157 are commonly connected to the drain of MOS transistor 158. The gate of MOS transistor 158 is connected to the bias signal line Vb, and its source is grounded. The gate of MOS transistor 12 is connected to signal line 102. When the reset signal RST is high, MOS transistor 13 short-circuits the gate and drain of MOS transistor 12. The gate of reference input transistor 157 is connected to the reference signal line REF.

[0059] The signal input transistor 12 is a MOS transistor that inputs the input signal to the control terminal, i.e., the gate. The analog pixel signal is input to the signal input transistor 12 as the input signal.

[0060] The reference input transistor 157 is a MOS transistor that inputs a reference signal to the control terminal, i.e., the gate. The reference input transistor 157 and the signal input transistor 12 form a differential pair. This differential pair is used to compare the input signal and the reference signal. Specifically, when the input signal is less than the reference signal, the current flowing through the reference input transistor 157 is greater than the current flowing through the signal input transistor 12. Conversely, when the input signal is greater than the reference signal, the current flowing through the reference input transistor 157 is less than the current flowing through the signal input transistor 12. Thus, the current corresponding to the difference between the input signal and the reference signal flows through the signal input transistor 12 and the reference input transistor 157, which form the differential pair.

[0061] When the current flowing through either the signal input transistor 12 or the reference input transistor 157 changes according to the difference between the input signal and the reference signal, the MOS transistor 151 converts the change in current flowing through the reference input transistor 157 into a change in voltage. Furthermore, the MOS transistor 152 converts the change in current flowing through the reference input transistor 157 into a change in voltage. These MOS transistors 151 and 152 constitute a current mirror circuit. This current mirror circuit operates such that a current equal to the current flowing through the reference input transistor 157 flows through the signal input transistor 12. This allows for high-speed comparison of the input signal and the reference signal.

[0062] The MOS transistor 158 controls the current flowing through the signal input transistor 12 and the reference input transistor 157 that constitute the differential pair. A specific bias voltage is supplied to the gate of the MOS transistor 158 via the bias signal line Vb. In this way, the MOS transistor 158 operates as a constant current power supply.

[0063] Thus, the comparison unit 150 in the same figure can perform a comparison operation between the pixel signal input to the gate of the signal input transistor 12 and the reference signal input to the gate of the reference input transistor 157.

[0064] [Selection Method] First, the voltage of the reference signal line REF is set to 0 V. This deactivates the reference input transistor 157. Consequently, the drain of the signal input transistor 12 becomes near 0 V due to the differential amplifier circuit formed by the signal input transistor 12, the reference input transistor 157, and the MOS transistor 158. Next, the reset signal RST is set to a high level, turning on the MOS transistor 13. This forms a feedback circuit, and the drain of the signal input transistor 12 becomes approximately 0 V. Consequently, the floating diffusion region FD connected to the photoelectric conversion section of the signal line 102 discharges, and the voltage of the signal line 102 becomes 0 V.

[0065] The current mirror circuit including MOS transistors 151 and 152 further improves the effect of setting the drain of signal input transistor 12 to 0 V. That is, when the voltage of the reference signal line REF is set to 0 V, the current flowing through MOS transistor 152 becomes approximately 0 A. Since MOS transistor 151 constitutes the MOS transistor 152 and the current mirror circuit, the current flowing through MOS transistor 151 also becomes approximately 0 A. Therefore, the voltage of the drain of signal input transistor 12 can be set to 0 V more accurately.

[0066] Furthermore, the MOS transistor 13 also has the function of resetting the floating diffusion region FD. This reset can be performed as follows: First, a voltage equivalent to the reset voltage of the floating diffusion region FD is applied to the reference signal line REF. This turns on the reference input transistor 157. Through the operation of the differential amplifier circuit and the current mirror circuit described above, the voltage at the drain of the MOS transistor 13 also becomes approximately equal to the reset voltage. Next, the reset signal RST is set to a high level, and the MOS transistor 13 is turned on. This allows a reset voltage to be applied to the floating diffusion region FD of the photoelectric conversion section, thus resetting it.

[0067] Thus, in one embodiment of this technology, the floating diffusion region FD is reset by means of the MOS transistor 13. This simplifies the configuration of the AD converter 190. Furthermore, by using a current mirror circuit, the gain of the differential amplifier circuit can be improved, and the reset of the floating diffusion region FD can be performed more accurately.

[0068] Furthermore, the configuration of the comparator 150 is not limited to this example. For example, a resistive load or a constant current power supply may be used instead of the MOS transistors 151 and 152 constituting the current mirror circuit. In this case, the resistive load, etc., may be connected to either or both of the signal input transistor 12 and the reference input transistor 157 in the differential pair.

[0069] [Structure of Comparison Output Processing Unit] FIG7 is a diagram showing an example of the configuration of a comparison output processing unit 160 according to one embodiment of the present invention. The comparison output processing unit 160 includes MOS transistors 511 to 517. Here, MOS transistors 511, 513, and 515 can be composed of P-channel MOS transistors. Furthermore, MOS transistors 512, 514, 516, and 517 can be composed of N-channel MOS transistors. Additionally, MOS transistor 511 constitutes a preamplifier unit 161. MOS transistor 512 constitutes a level conversion unit 162. MOS transistors 513 to 517 constitute a waveform shaping unit 163. Furthermore, in the comparison output processing unit 160, in addition to the aforementioned signal lines 106 and 107, an initialization signal line INI (Initialize) and power supply lines (VDDH and VBIAS) are connected. The initialization signal line INI is a signal line that transmits control signals to MOS transistors 513 and 516. The power cables VDDH and VBIAS are power cables that supply power to the comparator output processing unit 160.

[0070] The source and gate of MOS transistor 511 are connected to power line VDDH and signal line 106, respectively. The drain of MOS transistor 511 is connected to the drain of MOS transistor 512. The gate of MOS transistor 512 is connected to power line VBIAS, and its source is connected to the drains of MOS transistors 514 and 516, and the gates of MOS transistors 515 and 517. The gates of MOS transistors 513 and 516 are commonly connected to the initialization signal line INI. The source and drain of MOS transistor 513 are connected to power line VBIAS and the source of MOS transistor 514, respectively. The source of MOS transistor 516 is grounded. The gate of MOS transistor 514 is connected to the drains of MOS transistors 515 and 517, and signal line 107. The source of MOS transistor 515 is connected to power line VBIAS, and the source of MOS transistor 517 is grounded.

[0071] The preamplifier 161 amplifies the signal corresponding to the comparison result output by the comparator 150. The preamplifier 161 outputs the amplified signal to the level conversion unit 162. This amplification is performed by the MOS transistor 511.

[0072] The level conversion unit 162 performs level conversion on the signal output from the preamplifier unit 161. The comparator unit 150 and the preamplifier unit 161, as illustrated in FIG. 6, are connected to a power supply line VDDH. To obtain high gain, the power supplied by the power supply line VDDH in the comparator unit 150 and the preamplifier unit 161 needs to be set to a higher voltage. On the other hand, a lower voltage power supply can be supplied for the subsequent conversion result holding unit 170 and other components to process digital signals. This lower voltage power supply is supplied by the power supply line VBIAS. This reduces the power consumption of the conversion result holding unit 170 and other components, and allows the use of low-voltage transistors in the conversion result holding unit 170 and other components. Thus, the level conversion unit 162 is configured to transmit signals between circuits supplying power at different voltages. This allows the waveform shaping unit 163 to output a level-converted signal. The level conversion unit 162 in the same figure can limit the signal level to the voltage obtained by subtracting the threshold voltage of the MOS transistor 512 from the power supply voltage supplied by the power supply line VBIAS.

[0073] The waveform shaping unit 163 shapes the signal output from the level conversion unit 162 into a rapidly changing signal. The operation of the waveform shaping unit 163 will be explained. In the initial state, the output value of the level conversion unit 162 is "0". In this state, when the initialization signal line INI inputs a signal with a value of "1", MOS transistor 516 becomes on. Consequently, MOS transistor 517 becomes off, and MOS transistor 515 becomes on, outputting a value of "1" to signal line 107. At this time, MOS transistors 513 and 514 become off. Subsequently, when the initialization signal line INI inputs a signal with a value of "0", MOS transistor 513 becomes on, and MOS transistor 516 becomes off. Since MOS transistor 514 is in a non-conducting state, the output signal value of level switching unit 162 is "0", so the states of MOS transistors 515 and 517 do not change.

[0074] Next, if the value of the output signal of the level switching unit 162 changes from "0" to "1", then MOS transistor 517 switches to the on state, and MOS transistor 515 switches to the off state. This causes the voltage of signal line 107 to decrease. Consequently, MOS transistor 514 switches to the on state, and the gate voltages of MOS transistors 515 and 517 increase. Through this positive feedback, the voltage of signal line 107 decreases sharply. This allows for waveform shaping.

[0075] [Structure of Conversion Result Holding Unit] Figure 8 shows an example of the configuration of a conversion result holding unit 170 according to one embodiment of the present technology. The conversion result holding unit 170 includes a memory control unit 171 and memory units 172 to 179. Here, for convenience, it is assumed that 8-bit data is used as the digital pixel signal after AD conversion. Therefore, the size of the time code also becomes 8 bits. Furthermore, the size of the converted digital pixel signal and the time code can be changed according to system requirements. For example, it can also be set to a 15-bit size.

[0076] Furthermore, in the conversion result holding section 170, in addition to signal line 107, a plurality of signal lines (WORD, CODE1 to 8) are connected. The WORD signal line is a signal line that transmits control signals to the memory sections 172 to 179. The CODE signal lines 1 to 8 are signal lines that transmit time codes bidirectionally. These plurality of barcode signal lines CODE1 to 8 constitute signal line 101.

[0077] Memory units 172 to 179 store time codes input from the time code transmission unit 200. Each of the memory units 172 to 179 stores a 1-bit time code. The configuration of the memory units 172 to 179 will be explained using memory unit 172 as an example. This memory unit 172 includes a bit memory unit 522 and a bidirectional switch 523.

[0078] The bidirectional switch 523 is connected between the signal line 526 and the code signal line CODE1, enabling bidirectional data transmission. Furthermore, the bidirectional switch 523 has a control input terminal. The signal line 524 is connected to this control input terminal. If a value "1" is input to the control input terminal via the signal line 524, the bidirectional switch 523 becomes active, enabling bidirectional data transmission between the signal line 526 and the code signal line CODE1. Conversely, if a value "0" is input to the control input terminal, the bidirectional switch 523 becomes inactive.

[0079] The bit memory unit 522 is a memory device that stores 1 bit of data. The bit memory unit 522 has input / output terminals and a control input terminal, which are connected to signal lines 526 and 107 respectively. If a signal with a value of "1" is input to the control input terminal via signal line 107, the bit memory unit 522 stores the 1-bit time code transmitted from the bidirectional switch 523 via signal line 526. When the 1-bit time code changes, the data stored in the bit memory unit 522 is overwritten. Subsequently, if the value of the signal input to the control input terminal changes from "1" to "0", the data stored in the bit memory unit 522 remains unchanged. That is, the aforementioned data overwriting does not occur until the value of the subsequent signal input to the control input terminal becomes "1". Furthermore, when the value of the signal input to the control input terminal is "0", the bit memory unit 522 outputs the retained data to signal line 526.

[0080] The memory control unit 171 outputs a control signal via signal line 524 to control memory units 172 to 179. For example, the memory control unit 171 can generate and output a signal obtained by the logical sum of two signals input via character signal line WORD and signal line 107, as a control signal for the bidirectional switch 523. This can be achieved via the OR gate 521.

[0081] [Composition of Time Code Transmission Unit] FIG9 is a diagram showing an example of the configuration of a time code transmission unit 200 according to one embodiment of the present technology. The time code transmission unit 200 includes code holding units 210 and 230, and clock buffers 220 and 240. The time code transmission unit 200 has the same number of code holding units and clock buffers as the number of columns of the region pixels 100 of the pixel array unit 10 described in FIG1. ​​For convenience, code holding units 210 and 230, and clock buffers 220 and 240 are listed as examples for description.

[0082] The code holding unit 210 holds the time code. This code holding unit 210 is composed of flip-flops 211 to 218. The flip-flops 211, etc., hold 1 bit of the time code based on the clock signal output from the clock buffer 220. Specifically, when the clock signal value is "0", the time code output from the time code generation unit 20 and input to the D input terminal (as shown in the figure) is held in an internal node, and the Q output terminal is set to a high-impedance state. Then, if the clock signal value becomes "1", the time code held in the internal node is output from the Q output terminal. This output time code is input to the code holding unit 230 via signal line 101. Thus, the time code transmission unit 200 operates the plurality of time code holding units as shift registers to transmit the time code.

[0083] The clock buffer 220 outputs a clock signal generated by the clock signal generation unit 54 shown in FIG3 to the code holding unit 210 and the clock buffer of the next stage. The clock buffer 220 is composed of a plurality of inverting gates 221 to 224 and operates as a repeater for shaping the degraded clock signal. Furthermore, the clock buffer 220 transmits clock signals sequentially in the time code transmission unit 200 in the opposite direction to the time code. That is, the clock buffer 240 outputs a clock signal to the code holding unit 230 and outputs a clock signal to the clock buffer 220. In this way, the clock signal input to the code holding unit 210 has a propagation delay time equivalent to two inverting gates and a time delay caused by the wiring up to the inverting gate 224, compared to the clock signal input to the code holding unit 230. Thus, the clock buffer 220 further has the function of delaying the clock signal. As described above, when the flip-flop 211 equals a clock signal value of "0", the input time code is held in the internal node. During this holding, the specific time of the so-called setting time must be ensured. Due to the delay of the clock signal generated by the clock buffer 220, when the clock signal value in the code holding unit 230 changes to "0", the clock signal value input to the code holding unit 210 remains unchanged at "1". That is, it remains in the state of the time code held by the output internal node. In this way, the setting time can be ensured in the code holding unit 230, and the time code can be transmitted.

[0084] The output of the code holding unit 210 and the input of the code holding unit 230 are respectively connected to code signal lines CODE1 to 8. Thereby, the time code generated by the time code generation unit 20 and held in the code holding unit 210 is output to the conversion result holding unit 170 via the corresponding code signal lines CODE1 to 8. Furthermore, after AD conversion, the time code held in the conversion result holding unit 170 is output to the code holding unit 230 via the corresponding code signal lines CODE1 to 8. Thus, the time code transmission unit 200 transmits the time code. Next, the internal structure of the area pixel 100 will be explained. Since there are various candidates for the internal structure of the area pixel 100, representative internal structures will be described in sequence below.

[0085] (Imaging Timing of the Camera Apparatus) Figure 10 is a timing diagram of the first frame period of the camera apparatus disclosed herein. Figure 10 is a timing diagram showing the camera apparatus 1 in global shutter mode (the camera apparatus 1 equipped with the area pixel 100 of Figure 4B and the photoelectric conversion unit 110 of Figure 5B). The upper half of Figure 10 shows the timing of the first frame period (times T1 to T6) after the exposure begins at time T1. The lower half of Figure 10 is a timing diagram showing in detail the operation at times T3 to T4.

[0086] Times T1 to T2 constitute the exposure period. Before time T1, the OFG signal becomes high, transistor 502 is turned on, and the charge in photodiode 501 is discharged through the overflow drain signal line OFD. During the exposure period T1 to T2, photodiode 501 continues to perform photoelectric conversion, accumulating charge. At time T2, the transmission signal TXG becomes high, transistor 503 is turned on, and the charge converted by photoelectric conversion in photodiode 501 is retained in memory unit 113. All pixels simultaneously perform the retention operation of memory unit 113.

[0087] Subsequently, the four pixels within the region pixel are read sequentially. At times T2-T3 in Figure 10, pixel A within the region pixel is read; at times T3-T4, pixel B within the region pixel is read; at times T4-T5, pixel C within the region pixel is read; and at times T5-T6, pixel D within the region pixel is read. Signals TX_A, TX_B, TX_C, and TX_D are the gate signals of the transistors 504 for pixels A, B, C, and D within the region pixel, respectively. If the gate signal becomes high, the transistor 504 is turned on, and the charge corresponding to the pixel signal stored in the memory unit 113 is transferred to the floating diffusion region FD.

[0088] The reading operation of pixel B will be described in detail below. In the timing diagram in the lower half of Figure 10, the signal RST is the reset signal RST input to the gate of transistor 13 of pixel B.

[0089] If at time t1, the reset signal RST becomes a high level, then the transistor 13 in the AD converter 190 becomes conductive, resetting the voltage of the floating diffusion region FD. The period from time t1 to t6 is the period during which the P-phase signal is compared with the reference signal and the P-phase signal is converted into a digital signal.

[0090] During the period from time t2 to t4, a reference signal REF containing a linear change in signal level is input to the gate of transistor 157. If the signal level of the P-phase signal exceeds the signal level of the reference signal REF, the drain voltage of transistor 12 of the differential pair decreases, the drain voltage of transistor 511 increases, and the output signal VCO of the AD converter 190 becomes low (time t3).

[0091] Times t7 to t11 are the period during which the D-phase signal is compared with the reference signal and converted into a digital signal. If at time t7, the transmission signal TX_B becomes a high level, then transistor 504 is turned on, and the charge held in memory unit 113 is transferred to the floating diffusion region FD. The charge in the floating diffusion region FD is supplied as a D-phase signal to the gate of transistor 12 in AD converter unit 190 via signal transmission unit 91.

[0092] During this period, a reference signal REF containing a ramp wave with a linearly changing signal level is input to the gate of transistor 157. If the signal level of the D-phase signal exceeds the signal level of the reference signal REF, the drain voltage of transistor 12 of the differential pair decreases, the drain voltage of transistor 151 increases, and the output signal VCO of the AD converter 190 becomes a low level (time t8).

[0093] Thus, in the AD conversion unit 190, the P-phase signal or D-phase signal stored in the memory unit 113 is compared with the reference signal, and a timing signal VCO that displays the timing is consistent with the reference signal is output. The VCO signal is input to the conversion result holding unit 170 shown in FIG8 to generate a time code.

[0094] (First Example of Region Pixel 100) Figure 11 is a circuit diagram of the first example of region pixel 100, Figure 12 is a cross-sectional view of the first example of region pixel 100, Figure 13A is a top view along line AA of Figure 12, and Figure 13B is a top view along line BB of Figure 12. Figures 11, 12, 13A and 13B show an example where region pixel 100 has 4 pixels.

[0095] The first example's area pixel 100 has 4 pixels, and each pixel does not have a memory unit. Therefore, the imaging device 1 with the first example's area pixel 100 takes pictures using a rolling shutter mode. As shown in FIG11, the photoelectric conversion unit 110 has transistors 502 and 504 and a photodiode 501.

[0096] As shown in FIG11, the imaging device 1 having the area pixel 100 of the first example includes a first area AR1 and a second area AR2. In the first area AR1, a photoelectric conversion unit 110 using silicon as a material is disposed. Four photoelectric conversion units 110, corresponding to four pixels, are provided within the area pixel 100, all disposed in the first area AR1. In the second area AR2, an AD conversion unit 190 using silicon as a material is disposed.

[0097] The camera device 1 having the first example of the area pixel 100 stacks the first area AR1 and the second area AR2, and minimizes the number of signal lines transmitted and received between the first area AR1 and the second area AR2.

[0098] In the first example of the region pixel 100, the charge of the floating diffusion region FD of all photoelectric conversion units 110 within the region pixel 100 is supplied to the AD conversion unit 190 via the same signal transmission unit 91. Therefore, only one transistor 12 is needed to receive the charge differential pair. A transistor 13 for setting the gate voltage to a reset voltage is connected to the gate of the transistor 12. When the reset signal RST is high, the transistor 13 short-circuits the drain and gate of the transistor 12. The drain of the transistor 12 is connected to the power supply voltage VDDH via the transistor 151. When the reset signal RST is high, the gate voltage of the transistor 12 is set to a specific reset voltage.

[0099] On the first substrate SUB1, a wiring layer 71, a photoelectric conversion unit 110, a color filter 72, and a crystal lens 73 are laminated. A component separation layer 74 is disposed between pixels. On the second substrate SUB2, a wiring layer 75, an AD conversion unit 190, and a protective layer 76 are laminated. The layer configuration of the first substrate SUB1 and the second substrate SUB2 shown in FIG12 is an example; various variations are considered.

[0100] As shown in FIG12, a first region AR1 is disposed on a first substrate SUB1. A second region AR2 is disposed on a second substrate SUB2. The first region AR1 and the second region AR2 receive and transmit charges in the floating diffusion regions FD of the photoelectric conversion unit 110 via a signal transmission unit 91 including a Cu-Cu connection 91a. The four photoelectric conversion units 110 within the region pixel 100 receive and transmit charges in the floating diffusion regions FD of each photoelectric conversion unit 110 via the same signal transmission unit 91. The first region AR1 has the entire area of ​​the substrate surface of the first substrate SUB1, and the second region AR2 has the entire area of ​​the substrate surface of the second substrate SUB2. The first region AR1 and the second region AR2 have the same area.

[0101] As shown in Figures 13A and 13B, a photoelectric conversion unit 110 is arranged throughout the first region AR1, and an AD conversion unit 190 is arranged throughout the second region AR2. As described above, since the first region AR1 and the second region AR2 transmit and receive the charge of the floating diffusion region FD of each photoelectric conversion unit 110 within the pixel 100 of the receiving region via the signal transmission unit 91 extending in the stacking direction, the number of signal transmission units 91 can be reduced. This allows for an increase in the arrangement area of ​​the photoelectric conversion unit 110 and the AD conversion unit 190, improves the aperture ratio of the photoelectric conversion unit 110, makes the pixel 100 of the region more compact, and increases the number of pixels in the imaging device 1.

[0102] (Second Example of Region Pixel 100) Figure 14 is a circuit diagram of the second example of region pixel 100, Figure 15 is a cross-sectional view of the second example of region pixel 100, Figure 16A is a top view along line AA of Figure 15, Figure 16B is a top view along line BB of Figure 15, and Figure 16C is a top view along line CC of Figure 15. The following explanation focuses on the differences from the first example of region pixel 100.

[0103] The camera device 1 having the second example of the area pixel 100 includes a first area AR1, a second area AR2 and a third area AR3. The difference between the second example of the area pixel 100 and the first example is that the AD conversion unit 190 is divided and arranged in the second area AR2 and the third area AR3.

[0104] A photoelectric conversion unit 110 is disposed in the first region AR1. An AD conversion unit 190 is disposed separately in the second region AR2 and the third region AR3. Hereinafter, a portion of the AD conversion unit 190 disposed in the second region AR2 will be referred to as the first segmented AD conversion unit 190a, and a portion of the AD conversion unit 190 disposed in the third region AR3 will be referred to as the second segmented AD conversion unit 190b.

[0105] The first segment AD converter 190a includes transistors 12, 13, 157, and 158 within the AD converter 190. The second segment AD converter 190b includes the remaining portion within the AD converter 190, specifically transistors 151, 152, and 511-517. The first segment AD converter 190a and the second segment AD converter 190b transmit and receive differential pairs, namely the two drain signals of transistors 12 and 157.

[0106] Region 1 AR1 and Region 2 AR2, using the same signal transmission unit 91 including channel 91b, sequentially transmit and receive charges of the four floating diffusion regions FD within 4 pixels. Region 2 AR2 and Region 3 AR3, using the signal transmission unit 91 including Cu-Cu connection 91a, transmit and receive the drain signal of the differential pair within the AD conversion unit 190. Region 1 AR1 is disposed on the first substrate SUB1, Region 2 AR2 is disposed on the second substrate SUB2, and Region 3 AR3 is disposed on the third substrate SUB3.

[0107] As shown in Figures 16B and 16C, since the AD conversion unit 190 is separately arranged in the second region AR2 and the third region AR3, sufficient area can be ensured for arranging the AD conversion unit 190.

[0108] (Example 3 of Region Pixel 100) Figure 17 is the circuit diagram of Region Pixel 100 of Example 3, Figure 18 is a cross-sectional view of Region Pixel 100 of Example 3, Figure 19A is a top view in the direction of line AA in Figure 18, Figure 19B is a top view in the direction of line BB in Figure 18, and Figure 19C is a top view in the direction of line CC in Figure 18. The following explanation will focus on the differences from Region Pixel 100 of Example 2.

[0109] The difference between the region pixel 100 in the third example and the second example is that the segmentation method of the AD conversion unit 190 includes the portion of the AD conversion unit 190 up to the transistor 512 that outputs the comparison result signal in the first segmented AD conversion unit 190a and is disposed in the second region AR2, while the second segmented AD conversion unit 190b on the rear side of the transistor 512 is disposed in the third region AR3. Otherwise, it is the same as the second example, with the first segmented AD conversion unit 190a disposed in the second region AR2 and the second segmented AD conversion unit 190b disposed in the third region AR3. Therefore, the cross-sectional view of the third example shown in FIG18 is the same as the cross-sectional view of the second example shown in FIG15, and the top view of the third example shown in FIG19 is the same as the top view of the second example shown in FIG16.

[0110] As will be described later, the method of dividing the AD converter 190 into two is not limited to those shown in Figures 14 and 17. It is desirable that the number of signals transmitted and received by the first divided AD converter 190a and the second divided AD converter 190b be as small as possible.

[0111] (Summary of Examples 1 to 3 of Region Pixel 100) Figure 20 is a diagram summarizing the features of Region Pixel 100 in Examples 1 to 3. The back side of Examples 1 to 3 is a light-illuminating surface. In Examples 1 to 3, the photoelectric conversion unit 110 is formed of silicon and is disposed in Region 1 AR1. In Example 1, the AD conversion unit 190 is disposed in Region 2 AR2. In Examples 2 and 3, the AD conversion unit 190 is disposed separately in Region 2 AR2 and Region 3 AR3. In Example 1, Region 1 AR1 and Region 2 AR2 receive the charge of the floating diffusion region FD of the photoelectric conversion unit 110 via the signal transmission unit 91 including Cu-Cu connection 91a. In Examples 2 and 3, Region 1 AR1 and Region 2 AR2 receive the charge of the floating diffusion region FD of the photoelectric conversion unit 110 via the signal transmission unit 91 including through hole 91b. In the second example, in regions AR2 and AR3, the differential pair drain signal within the AD converter 190 is transmitted and received via the signal transmission unit 91, which includes the Cu-Cu connection 91a. In the third example, in regions AR2 and AR3, the comparison result signal within the AD converter 190 is transmitted and received via the signal transmission unit 91, which includes the Cu-Cu connection 91a.

[0112] (Example 4 of Region Pixel 100) Figure 21 is a circuit diagram of Region Pixel 100 of Example 4, Figure 22 is a cross-sectional view of Region Pixel 100 of Example 4, Figure 23A is a top view along line AA of Figure 22, and Figure 23B is a top view along line BB of Figure 22. Figures 21, 22, 23A and 23B show an example of Region Pixel 100 having 4 pixels.

[0113] The area pixel 100 in the fourth example is the same as that in the first to third examples, where the photoelectric conversion unit 110 is not connected to the memory unit, and is used in the camera device 1 of the rolling shutter mode.

[0114] The fourth example's region pixel 100 has a photoelectric conversion unit 110 made of a material other than silicon. The material other than silicon is, for example, an organic semiconductor material. Thus, the fourth example's photoelectric conversion unit 110 has a semiconductor layer containing a material other than silicon (hereinafter, sometimes referred to as non-silicon). More specifically, the fourth example's photoelectric conversion unit 110 has a structure in which an upper electrode layer 11a, a photoelectric conversion layer 11b, an insulating layer 11d, and a lower electrode layer 11e are stacked.

[0115] As shown in Figures 21 and 22, the imaging device 1 having the fourth type of area pixel 100 includes a first area AR1 and a second area AR2 stacked together. The first area AR1 and the second area AR2 are disposed on different layers of the same substrate. A photoelectric conversion unit 110 is disposed in the first area AR1. The layer on which the photoelectric conversion unit 110 is disposed is a semiconductor layer using a material other than silicon. More specifically, in the first area AR1, the stack includes an upper electrode layer 11a, a photoelectric conversion layer 11b, an insulating layer 11d, and a lower electrode layer 11e, all using a material other than silicon. The materials of the upper electrode layer 11a and the lower electrode layer 11e are, for example, ITO (Indium Tin Oxide) or IZO (Indium Zinc Oxide).

[0116] In the second region AR2, the wiring layer 71 and the AD conversion unit 190 are disposed on different layers. The layer on which the AD conversion unit 190 is disposed is a semiconductor layer using silicon as the material. In the second region AR2, the AD conversion unit 190 and the wiring layer 71 are disposed.

[0117] Region 1 AR1 and Region 2 AR2 transmit and receive charges in the floating diffusion region FD via the signal transmission unit 91 containing the through hole 91b.

[0118] In the previous step, the camera device 1 having the fourth example of the area pixel 100 disposed on the support substrate a semiconductor layer with silicon as the material, and sequentially formed an AD conversion unit 190 and a wiring layer 71. In the subsequent step, a non-silicon semiconductor layer was formed, and a photoelectric conversion unit 110 was formed.

[0119] Thus, the fourth example of the region pixel 100 has a structure in which an AD conversion unit 190 containing silicon and a photoelectric conversion unit 110 using materials other than silicon are laminated on the same substrate. The four photoelectric conversion units 110 and AD conversion units 190 in the region pixel 100 sequentially transmit and receive charges of the floating diffusion region FD through the same signal transmission unit 91 containing vias 91b. Therefore, the number of vias 91b can be reduced, and the area of ​​the photoelectric conversion unit 110 or AD conversion unit 190 can be increased accordingly, and the region pixel 100 can be miniaturized.

[0120] (Example 5 of Area Pixel 100) Figure 24 is a circuit diagram of Area Pixel 100 of Example 5, Figure 25 is a cross-sectional view of Area Pixel 100 of Example 5, Figure 26A is a top view along line AA of Figure 25, Figure 26B is a top view along line BB of Figure 25, and Figure 26C is a top view along line CC of Figure 25. Figures 24, 25, 26A, and 26B show examples of Area Pixel 100 having 4 pixels. The following explanation focuses on the differences from Area Pixel 100 of Example 4.

[0121] The area pixel 100 in the fifth example is the same as that in the third example, where the photoelectric conversion unit 110 is not connected to the memory unit, and is used in the camera device 1 of the rolling shutter mode.

[0122] As shown in Figures 24 and 25, the imaging device 1 having the area pixel 100 of the fifth example includes a first region AR1, a second region AR2, and a third region AR3, which are stacked. In the first region AR1, a photoelectric conversion unit 110 using a material other than silicon is disposed. The AD conversion unit 190 is divided into a first segment AD conversion unit 190a and a second segment AD conversion unit 190b. The first segment AD conversion unit 190a and the photoelectric conversion unit 110 transmit and receive charges from the floating diffusion region FD. The first segment AD conversion unit 190a has differential pairs of transistors 12, 157 and 13, 158 within the AD conversion unit 190. The second segment AD conversion unit 190b has the remaining portion within the AD conversion unit 190, specifically transistors 151, 152, 511 to 517. A first segmented AD conversion unit 190a is disposed in the second region AR2, and a second segmented AD conversion unit 190b is disposed in the third region AR3. The first region AR1 and the second region AR2 are laminated on the first substrate SUB1. The third region AR3 is disposed on the second substrate SUB2.

[0123] Region 1 AR1 and Region 2 AR2 transmit and receive charges in the floating diffusion region FD via a signal transmission unit 91 containing a through-hole 91b. Region 2 AR2 and Region 3 AR3 transmit and receive drain signals from the differential pair transistors 12 and 157 via a signal transmission unit 91 containing a Cu-Cu connection 91a.

[0124] As shown in Figures 26B and 26C, since the first segmented AD conversion unit 190a and the second segmented AD conversion unit 190b are respectively arranged in the entire area of ​​each region, it can ensure that there is sufficient area required for the AD conversion unit 190, and it can be finely processed.

[0125] (Example 6 of Region Pixel 100) Figure 27 is a circuit diagram of Region Pixel 100 of Example 6, Figure 28 is a cross-sectional view of Region Pixel 100 of Example 6, Figure 29A is a top view along line AA of Figure 28, Figure 29B is a top view along line BB of Figure 28, and Figure 29C is a top view along line CC of Figure 28. Figures 27, 28, 29A, and 29B show examples of Region Pixel 100 having 4 pixels. The following explanation focuses on the differences from Region Pixel 100 of Example 4.

[0126] The area pixel 100 in the sixth example is the same as that in the third example, where the photoelectric conversion unit 110 is not connected to the memory unit, and is used in the camera device 1 of the rolling shutter mode.

[0127] In the sixth example, the first segmented AD converter 190a includes transistors 12, 13, 151, 152, 157, 158, 511, and 512 within the AD converter 190. The second segmented AD converter 190b includes transistors 513 to 517 within the AD converter 190. That is, the AD converter 190 is segmented by the source node of the transistor 512 that outputs a comparison result signal between the pixel signal and the reference signal. The first segmented AD converter 190a and the second segmented AD converter 190b transmit and receive the comparison result output signal via a signal transmission unit 91 including a Cu-Cu connection 91a. The transistor 512 that outputs the comparison result output signal constitutes a level conversion unit.

[0128] (Summary of Examples 4 to 6 of Region Pixel 100) Figure 30 is a diagram summarizing the features of Region Pixel 100 in Examples 4 to 6. In Examples 4 to 6, the photoelectric conversion unit 110 is formed with a semiconductor layer other than silicon, and the AD conversion unit 190 is formed with a silicon semiconductor layer. In Examples 4 to 6, the photoelectric conversion unit 110 is disposed in Region 1 AR1. The AD conversion unit 190 in Example 4 is disposed in Region 2 AR2. The AD conversion units 190 in Examples 5 and 6 are disposed separately in Region 2 AR2 and Region 3 AR3. In Examples 4 to 6, Region 1 AR1 and Region 2 AR2 transmit and receive charges in the floating diffusion region FD via a signal transmission unit 91 including a via 91b. In Example 5, Region 2 AR2 and Region 3 AR3 transmit and receive the differential pair drain signal within the AD converter 190 via the signal transmission unit 91, which includes the Cu-Cu connection 91a. In Example 6, Region 2 AR2 and Region 3 AR3 transmit and receive the comparison result signal within the AD converter 190 via the signal transmission unit 91, which includes the Cu-Cu connection 91a.

[0129] (Example 7 of Region Pixel 100) Figure 31 is a circuit diagram of Region Pixel 100 of Example 7, Figure 32 is a cross-sectional view of Region Pixel 100 of Example 7, Figure 33A is a top view along line AA of Figure 32, Figure 33B is a top view along line BB of Figure 32, and Figure 33C is a top view along line CC of Figure 32. Figures 31, 32, 33A, and 33B show an example where Region Pixel 100 has 4 pixels.

[0130] The area pixel 100 in the 7th example is the same as that in the 4th example, where the photoelectric conversion unit 110 is not connected to the memory unit, and is used in the camera device 1 of the rolling shutter mode.

[0131] The area pixel 100 of the seventh example has a photoelectric conversion unit 110 (first photoelectric conversion unit 110a) that uses a material other than silicon, and a photoelectric conversion unit 110 (second photoelectric conversion unit 110b) that uses silicon as a material. Materials other than silicon include, for example, organic semiconductor materials. The first photoelectric conversion unit 110a performs photoelectric conversion for example, green, and the second photoelectric conversion unit 110b performs photoelectric conversion for example, red and blue.

[0132] As shown in FIG31, the gate of transistor 12 and the source of transistor 13 in the AD conversion section 190 are connected to the floating diffusion region FD of the first photoelectric conversion section 110a and the floating diffusion region FD of the second photoelectric conversion section 110b.

[0133] As shown in Figures 31 and 32, the imaging device 1 having the area pixel 100 of the seventh example includes a first area AR1, a second area AR2, and a third area AR3, which are laminated. The first area AR1 and the second area AR2 are laminated on a first substrate SUB1. The third area AR3 is disposed on a second substrate SUB2. In the first area AR1, a first photoelectric conversion unit 110a is disposed using a material other than silicon. In the second area AR2, a second photoelectric conversion unit 110b using silicon as the material is disposed. In the third area AR3, an AD conversion unit 190 using silicon as the material is disposed.

[0134] Region 1 AR1 and Region 3 AR3 transmit and receive charges in the floating diffusion region FD of the first photoelectric conversion unit 110a via a signal transmission unit 91 including a through hole 91b and a Cu-Cu connection 91a. Region 2 AR2 and Region 3 AR3 transmit and receive charges in the floating diffusion region FD of the second photoelectric conversion unit 110b via a signal transmission unit 91 including a Cu-Cu connection 91a.

[0135] As shown in Figures 33A and 33B, since the first photoelectric conversion unit 110a and the second photoelectric conversion unit 110b are arranged throughout the entire area of ​​each region, the aperture ratio can be improved, and the area pixels 100 can also be made smaller.

[0136] Thus, the area pixel 100 in the seventh example has two types of photoelectric conversion units 110 (110a, 110b), and the charge of the floating diffusion region FD of each photoelectric conversion unit 110 (110a, 110b) is transferred to the AD conversion unit 190 through the through hole 91b and the Cu-Cu connection 91a. Since each photoelectric conversion unit 110 (110a, 110b) is arranged in the entire area of ​​different layers, even if two types of photoelectric conversion units 110 (110a, 110b) are provided, sufficient arrangement area of ​​each photoelectric conversion unit 110 can be ensured.

[0137] (Example 8 of Region Pixel 100) Figure 34 is a circuit diagram of Region Pixel 100 of Example 8, Figure 35 is a cross-sectional view of Region Pixel 100 of Example 8, Figure 36A is a top view along line AA of Figure 35, Figure 36B is a top view along line BB of Figure 35, and Figure 36C is a top view along line CC of Figure 35. Figures 34, 35, 36A, and 36B show an example where Region Pixel 100 has 4 pixels.

[0138] The area pixel 100 in the 8th example is the same as that in the 7th example, where the photoelectric conversion unit 110 is not connected to the memory unit, and is used in the camera device 1 of the rolling shutter mode.

[0139] The area pixel 100 in the eighth example differs from that in the seventh example, having a first AD conversion unit 190a that receives the charge of the floating diffusion region FD of the first photoelectric conversion unit 110a, and a second AD conversion unit 190b that receives the charge of the floating diffusion region FD of the second photoelectric conversion unit 110b. Thus, the area pixel 100 in the eighth example has more AD conversion units 190 than that in the seventh example.

[0140] As shown in Figures 34 and 35, a first photoelectric conversion unit 110a, using a material other than silicon, is disposed in the first region AR1. A second photoelectric conversion unit 110b, using silicon as a material, is disposed in the second region AR2. In the third region AR3, the first AD conversion unit 190a and the second AD conversion unit 190b, both using silicon as a material, are disposed on the same layer. The first region AR1 and the second region AR2 are laminated on the first substrate SUB1, and the third region AR3 is disposed on the second substrate SUB2. The first region AR1 and the third region AR3 transmit and receive the charge of the floating diffusion region FD of the first photoelectric conversion unit 110a via a signal transmission unit 91 including a through-hole 91b and a Cu-Cu connection 91a. The second region AR2 and the third region AR3 transmit and receive the charge of the floating diffusion region FD of the second photoelectric conversion unit 110b via the signal transmission unit 91 including a Cu-Cu connection 91a.

[0141] As shown in FIG36A, the first photoelectric conversion unit 110a is disposed over the entire area of ​​the first region AR1. As shown in FIG36B, the second photoelectric conversion unit 110b is disposed over the entire area of ​​the second region AR2. Furthermore, as shown in FIG36C, the first AD conversion unit 190a and the second AD conversion unit 190b are disposed in the third region AR3, with the first AD conversion unit 190a arranged to surround the second AD conversion unit 190b.

[0142] In the region pixel 100 of the 8th example, since it has a first AD conversion unit 190a for the first photoelectric conversion unit 110a and a second AD conversion unit 190b for the second photoelectric conversion unit 110b, the first AD conversion unit 190a and the second AD conversion unit 190b can perform AD conversion in parallel at the same time, and the AD conversion processing time can be shortened.

[0143] (Summary of Examples 7 and 8 of Region Pixel 100) Figure 37 is a diagram summarizing the features of the region pixel 100 in Examples 7 and 8 above. In Examples 7 and 8, the back side is the light-illuminating surface, the first photoelectric conversion unit 110a is formed of a semiconductor layer other than silicon, and the second photoelectric conversion unit 110b is formed of a silicon semiconductor layer. The first photoelectric conversion unit 110a is disposed in the first region AR1, and the second photoelectric conversion unit 110b is disposed in the second region AR2. The AD conversion unit 190 in Example 7 is disposed in the third region AR3. Example 8 has two AD conversion units 190 (the first AD conversion unit 190a and the second AD conversion unit 190b). The first AD conversion unit 190a and the second AD conversion unit 190b are disposed in the third region AR3. In examples 7 and 8, regions AR1 (first region) and AR3 (third region) transmit and receive charges in the floating diffusion region FD of the first photoelectric conversion unit 110a via a signal transmission unit 91 containing a through-hole 91b and a Cu-Cu connection 91a. Similarly, regions AR2 (second region) and AR3 (third region) transmit and receive charges in the floating diffusion region FD of the second photoelectric conversion unit 110b via a signal transmission unit 91 containing a Cu-Cu connection 91a.

[0144] (Example 9 of Region Pixel 100) Figure 38 is a circuit diagram of Region Pixel 100 of Example 9, Figure 39 is a cross-sectional view of Region Pixel 100 of Example 9, Figure 40A is a top view in the direction of line AA in Figure 39, Figure 40B is a top view in the direction of line BB in Figure 39, and Figure 40C is a top view in the direction of line CC in Figure 39. Figures 38, 39, 40A, and 40B show an example where Region Pixel 100 has 4 pixels.

[0145] Since the area pixel 100 of the 9th example is not connected to the memory unit in the photoelectric conversion unit 110 of each pixel, the camera device 1 having the area pixel 100 of the 9th example takes pictures in the rolling shutter mode.

[0146] As shown in FIG38, the area pixel 100 of the 9th example has a first photoelectric conversion unit 110a and a second photoelectric conversion unit 110b in each pixel. Both the first photoelectric conversion unit 110a and the second photoelectric conversion unit 110b have a semiconductor layer using silicon as the material.

[0147] The camera device 1 having the area pixel 100 of the 9th example includes a first area AR1, a second area AR2, and a third area AR3. A first photoelectric conversion unit 110a is disposed in the first area AR1. A second photoelectric conversion unit 110b is disposed in the second area AR2. An AD conversion unit 190 is disposed in the third area AR3.

[0148] Region 1 AR1 and Region 2 AR2 are laminated on the first substrate SUB1. Region 3 AR3 is disposed on the second substrate SUB2.

[0149] The first substrate SUB1 and the second substrate SUB2 transmit and receive the charge of the floating diffusion region FD of the first photoelectric conversion unit 110a and the charge of the floating diffusion region FD of the second photoelectric conversion unit 110b via the signal transmission unit 91 including the Cu-Cu connection 91a.

[0150] (Example 10 of Region Pixel 100) Figure 41 is a circuit diagram of Region Pixel 100 in Example 10, Figure 42 is a cross-sectional view of Region Pixel 100 in Example 10, Figure 43A is a top view in the direction of line AA in Figure 42, Figure 43B is a top view in the direction of line BB in Figure 42, and Figure 43C is a top view in the direction of line CC in Figure 42. The following explanation focuses on the differences from Example 9.

[0151] The commonality between the area pixel 100 in Example 10 and that in Example 9 is that each pixel has a first photoelectric conversion unit 110a and a second photoelectric conversion unit 110b. However, in Example 10, both the first photoelectric conversion unit 110a and the second photoelectric conversion unit 110b have a semiconductor layer made of a material other than silicon, such as an organic semiconductor material. The first photoelectric conversion unit 110a and the second photoelectric conversion unit 110b, for example, perform photoelectric conversion of different color wavelengths.

[0152] As shown in FIG41, a first photoelectric conversion unit 110a is disposed in the first region AR1. A second photoelectric conversion unit 110b is disposed in the second region AR2. Both the first region AR1 and the second region AR2 have a semiconductor layer using a material other than silicon.

[0153] An AD conversion unit 190 made of silicon is disposed in the third region AR3. The first region AR1, the second region AR2, and the third region AR3 are deposited on the same substrate. The first region AR1 and the third region AR3 transmit and receive the charge of the floating diffusion region FD of the first photoelectric conversion unit 110a via a signal transmission unit 91 including a through-hole 91b. Similarly, the second region AR2 and the third region AR3 transmit and receive the charge of the floating diffusion region FD of the second photoelectric conversion unit 110b via a signal transmission unit 91 including a through-hole 91b.

[0154] As shown in Figures 43A, 43B and 43C, since the first photoelectric conversion unit 110a is disposed in the entire area of ​​the first region AR1, the second photoelectric conversion unit 110b is disposed in the entire area of ​​the second region AR2, and the AD conversion unit 190 is disposed in the entire area of ​​the third region AR3, even if there are two types of photoelectric conversion units 110a and 110b, the arrangement area of ​​each photoelectric conversion unit can be ensured to be sufficient.

[0155] (Example 11 of Region Pixel 100) Figure 44 is the circuit diagram of Region Pixel 100 in Example 11, Figure 45 is a cross-sectional view of Region Pixel 100 in Example 11, Figure 46A is a top view in the direction of line AA in Figure 45, Figure 46B is a top view in the direction of line BB in Figure 45, Figure 46C is a top view in the direction of line CC in Figure 45, and Figure 46D is a top view in the direction of line DD in Figure 45. The following explanation focuses on the differences from Example 10.

[0156] Since each pixel of the area pixel 100 in the 11th example does not have a memory unit, the camera device 1 having the area pixel 100 in the 11th example takes pictures in the rolling shutter mode.

[0157] A first photoelectric conversion unit 110a, which uses a material other than silicon, is disposed in the first region AR1. A second photoelectric conversion unit 110b, which uses a material other than silicon, is disposed in the second region AR2.

[0158] The difference between the region pixel 100 in Example 11 and Example 10 is that the AD conversion unit 190 is divided into two. The AD conversion unit 190 in Example 11 is divided into a first segment AD conversion unit 190a and a second segment AD conversion unit 190b. The first segment AD conversion unit 190a and the second segment AD conversion unit 190b transmit and receive the drain signals of the differential pair transistors 12 and 157 within the AD conversion unit 190. The first segment AD conversion unit 190a is located in the third region AR3, and the second segment AD conversion unit 190b is located in the fourth region AR4.

[0159] Region 1 AR1, Region 2 AR2 and Region 3 AR3 are deposited on the first substrate SUB1. Region 4 AR4 is disposed on the second substrate SUB2.

[0160] The first photoelectric conversion unit 110a and the first segmented AD conversion unit 190a in the first region AR1 transmit and receive the charge of the floating diffusion region FD of the first photoelectric conversion unit 110a via the signal transmission unit 91 including the through hole 91b. Furthermore, the second photoelectric conversion unit 110b and the first segmented AD conversion unit 190a in the second region AR2 transmit and receive the charge of the floating diffusion region FD of the second photoelectric conversion unit 110b via the signal transmission unit 91 including the through hole 91b. The third region AR3 and the fourth region AR4 transmit and receive the drain signal of the differential pair in the AD conversion unit 190 via the signal transmission unit 91 including the Cu-Cu connection 91a.

[0161] (Summary of Examples 9 to 11 of Region Pixel 100) Figure 47 is a diagram summarizing the features of the region pixels 100 in Examples 9 to 11 described above. The back side of Examples 9 and 11 is a light-illuminating surface, while the front side of Example 10 is a light-illuminating surface. Both the first photoelectric conversion unit 110 and the second photoelectric conversion unit 110 in Example 9 have a semiconductor layer using silicon as the material, while both the first photoelectric conversion unit 110 and the second photoelectric conversion unit 110 in Examples 10 and 11 have a semiconductor layer using a material other than silicon. In Examples 9 to 11, the first photoelectric conversion unit 110 and the second photoelectric conversion unit 110 are disposed on the first substrate SUB1. In Examples 9 and 10, the AD conversion unit 190 is disposed in the second region AR2. In Example 11, the first segment AD conversion unit 190a is disposed in the first region AR1, and the second segment AD conversion unit 190b is disposed in the second region AR2.

[0162] In example 9, region AR1 and region AR2 transmit and receive charges in the floating diffusion regions FD of the first photoelectric conversion unit 110 and the second photoelectric conversion unit 110 via a signal transmission unit 91 including a Cu-Cu connection 91a. In example 10, region AR1 and region AR2 transmit and receive charges in the floating diffusion regions FD of the first photoelectric conversion unit 110 and the second photoelectric conversion unit 110 via a signal transmission unit 91 including a through hole 91b. In example 11, region AR3 and region AR4 transmit and receive the drain signal of the differential pair within the AD conversion unit 190 via a signal transmission unit 91 including a Cu-Cu connection 91a.

[0163] Thus, the imaging device 1 having the area pixels 100 of Examples 9 to 11 includes, for each area pixel 100: a plurality of pixels, each having a plurality of photoelectric conversion units 110; a floating diffusion region FD; and an AD conversion unit 190. The AD conversion unit 190 is provided for each area pixel 100 containing two or more pixels within the plurality of pixels, and converts the signal corresponding to the charge photoelectrically converted by the two or more pixels into a digital signal. The floating diffusion region FD outputs the charge photoelectrically converted by the photoelectric conversion unit 110 within the pixel.

[0164] A plurality of photoelectric conversion units 110, a plurality of AD conversion units 190, and a plurality of floating diffusion regions FD within a plurality of pixels are disposed in a plurality of regions of the stack. The signal transmission unit 91 performs signal transmission and reception between the plurality of regions. Among the plurality of regions, the region where the plurality of photoelectric conversion units 110 are disposed is separate from the region where the AD conversion units 190 are disposed. The region where the plurality of photoelectric conversion units 110 are disposed within the region pixel 100 and the region where the AD conversion units 190 are disposed transmit and receive the charge of the plurality of floating diffusion regions FD via the same signal transmission unit 91.

[0165] (Example 12 of Area Pixel 100) Figure 48 is a circuit diagram of the area pixel 100 of Example 12, Figure 49 is a cross-sectional view of the area pixel 100 of Example 12, Figure 50A is a top view along line AA in Figure 49, and Figure 50B is a top view along line BB in Figure 49. Figures 48, 49, 50A, and 50B show examples of area pixel 100 having 4 pixels. The imaging device 1 with area pixel 100 of Example 12 adopts a global shutter mode, and a memory unit 113 is connected to the photoelectric conversion unit 110 in each pixel. In addition, in part of this specification and drawings, the photoelectric conversion unit 110 and the memory unit 113 are described separately, but as shown in Figure 48, the memory unit 113 can also be regarded as a part constituting part of the photoelectric conversion unit 110. Hereinafter, the description will focus on the differences from the area pixel 100 of Example 1.

[0166] As shown in FIG. 48, the photoelectric conversion unit 110, in addition to the configuration of the photoelectric conversion unit 110 in FIG. 11, includes a memory unit 113 and a transistor 503. The pixel signal after photoelectric conversion by the photodiode 501 is simultaneously turned on by the transistor 503 of all pixels and stored in the corresponding memory unit 113 in the same timing sequence. The charge corresponding to the pixel signal stored in the memory unit 113 is sequentially turned on by the corresponding transistor 504 according to the reading timing of each pixel, and transmitted to the AD conversion unit 190 via the floating diffusion region FD for conversion into time code.

[0167] The 12th example's region pixel 100 includes a first region AR1 and a second region AR2. A plurality of photoelectric conversion units 110 and a plurality of memory units 113, made of silicon, are disposed in the first region AR1. An AD conversion unit 190, also made of silicon, is disposed in the second region AR2. The first region AR1 is disposed on a first substrate SUB1, and the second region AR2 is disposed on a second substrate SUB2. The first substrate SUB1 and the second substrate SUB2, for example, receive charge from the floating diffusion region FD of the photoelectric conversion unit 110 via a signal transmission unit 91 including a Cu-Cu connection 91a.

[0168] As shown in FIG48, the floating diffusion regions FD of the plurality of photoelectric conversion units 110 within a region pixel 100 are connected to the same signal transmission unit 91. Thereby, the first region AR1 and the second region AR2 transmit and receive the charge of the floating diffusion regions FD of the plurality of photoelectric conversion units 110 within each region pixel 100 of the first region AR1 via a single signal transmission unit 91. More specifically, the signal transmission unit 91 sequentially transmits the charge of the four floating diffusion regions FD of the four pixels within the region pixel 100 to the AD conversion unit 190.

[0169] As shown in FIG49, the imaging device 1 includes a first substrate SUB1 and a second substrate SUB2 laminated together. The first substrate SUB1 and the second substrate SUB2 transmit and receive charges in the floating diffusion region FD via a signal transmission unit 91 including a Cu-Cu connection 91a. The first substrate SUB1 is laminated with a wiring layer 71, a photoelectric conversion unit 110, a memory unit 113, a color filter 72, and a crystal lens 73. A component separation layer 74 is disposed between pixels. The second substrate SUB2 is laminated with a wiring layer 75, an AD conversion unit 190, and a protective layer 76.

[0170] In the example of Figure 49, the photoelectric conversion unit 110 and the memory unit 113 are disposed on the same layer of the first substrate SUB1, and a wiring layer 71 is disposed on the layer below it. In the second substrate SUB2, an AD conversion unit 190 is disposed below the wiring layer 75. The wiring layer 71 of the first substrate SUB1 and the wiring layer 75 of the second substrate SUB2 are arranged facing each other, and various signals are transmitted and received by the signal transmission unit 91 including the Cu-Cu connection 91a.

[0171] Figures 50A and 50B show the planar layout of a region pixel 100. As shown in Figure 50A, four photoelectric conversion units 110 and four memory units 113 are disposed in four pixels within the region pixel 100 on the first substrate SUB1. The four photoelectric conversion units 110 are disposed along the four corners of the region pixel 100, and the four memory units 113 are disposed in the portion sandwiched between the four photoelectric conversion units 110.

[0172] As shown in FIG50B, an AD conversion unit 190 is disposed over the entire area of ​​the region pixel 100 on the second substrate SUB2.

[0173] Thus, in the area pixel 100 of the 12th example, since the photoelectric conversion unit 110 and the memory unit 113 are disposed on the first substrate SUB1, and the AD conversion unit 190 is disposed on the second substrate SUB2, the area of ​​the photoelectric conversion unit 110 can be increased, thereby improving the aperture ratio or resolution. Furthermore, since the first substrate SUB1 transmits the charge of the floating diffusion regions FD of the plurality of photoelectric conversion units 110 to the second substrate SUB2 via the same signal transmission unit 91, the number of signal transmission units 91 on the first substrate SUB1 and the second substrate SUB2 can be reduced, and correspondingly, the number of wiring on the first substrate SUB1 and the second substrate SUB2 can be reduced. Also, since Cu-Cu connection 91a is used as the signal transmission unit 91, signal propagation loss can be suppressed.

[0174] (Example 13 of Region Pixel 100) Figure 51 is a circuit diagram of Region Pixel 100 of Example 13, Figure 52 is a cross-sectional view of Region Pixel 100 of Example 13, Figure 53A is a top view along line AA of Figure 52, Figure 53B is a top view along line BB of Figure 52, and Figure 53C is a top view along line CC of Figure 52. The following explanation focuses on the differences from Region Pixel 100 of Example 12.

[0175] As shown in FIG52, the imaging device 1 having the area pixel 100 of the 13th example includes a first area AR1, a second area AR2, and a third area AR3 stacked together. A photoelectric conversion unit 110 and a memory unit 113 are disposed in the first area AR1. In the second area AR2 and the third area AR3, the AD conversion unit 190 is divided into two parts: a first segmented AD conversion unit 190a and a second segmented AD conversion unit 190b.

[0176] The first segment AD converter 190a includes transistors 12, 13, 157, and 158 within the AD converter 190. The second segment AD converter 190b includes the remaining portion within the AD converter 190, specifically transistors 151, 152, and 511-517. The first segment AD converter 190a and the second segment AD converter 190b transmit and receive differential pairs, namely the two drain signals of transistors 12 and 157.

[0177] Region 1 AR1 and Region 2 AR2 sequentially transmit and receive charges of four floating diffusion regions FD within four pixels via a signal transmission unit 91 including a through-hole 91b. Region 2 AR2 and Region 3 AR3 transmit and receive drain signals of the differential pair within the AD conversion unit 190 via a signal transmission unit 91 including a Cu-Cu connection 91a. Region 1 AR1 is disposed on a first substrate SUB1, Region 2 AR2 is disposed on a second substrate SUB2, and Region 3 AR3 is disposed on a third substrate SUB3.

[0178] The planar layout of the first region AR1 shown in Figure 53A is the same as that in Figure 50A. A first segmented AD conversion unit 190a is disposed over the entire area of ​​the second region AR2 shown in Figure 53B. A through-hole for receiving and transmitting charges in the floating diffusion region FD is disposed approximately at the center of the second region AR2, between the first region AR1 and the second region AR2. A second segmented AD conversion unit 190b is disposed over the entire area of ​​the third region AR3 shown in Figure 53C.

[0179] Thus, since the AD conversion unit 190 is separately arranged in the second region AR2 and the third region AR3 in the area pixel 100 of the 13th example, the arrangement area of ​​the AD conversion unit 190 can be increased. Since the second region AR2 and the third region AR3 transmit and receive signals through Cu-Cu connection 91a, high-speed signal transmission and reception are possible. Furthermore, the first region AR1 is arranged on the first substrate SUB1, and the second region AR2 is arranged on the second substrate SUB2, and signal transmission and reception are performed through the signal transmission unit 91 including through hole 91b. In this way, the arrangement area of ​​photoelectric conversion unit 110 and AD conversion unit 190 (190a, 190b) can be increased.

[0180] (Example 14 of Region Pixel 100) Figure 54 is a circuit diagram of Region Pixel 100 of Example 14, Figure 55 is a cross-sectional view of Region Pixel 100 of Example 14, Figure 56A is a top view along line AA of Figure 55, Figure 56B is a top view along line BB of Figure 55, and Figure 56C is a top view along line CC of Figure 55. The following explanation focuses on the differences from Region Pixel 100 of Example 14.

[0181] As shown in FIG55, the camera device 1 having the 14th example of region pixel 100 includes a first region AR1, a second region AR2, and a third region AR3 stacked together. The difference between the 14th example of region pixel 100 and the 13th example lies in the segmentation method of the AD conversion unit 190 disposed in the second region AR2 and the third region AR3.

[0182] In Example 14, the first segmented AD converter 190a includes transistors 12, 13, 151, 152, 157, 158, 511, and 512 within the AD converter 190. The second segmented AD converter 190b includes transistors 513 to 517 within the AD converter 190. That is, the AD converter 190 is segmented by the source node of transistor 512, which outputs a comparison result signal between the pixel signal and the reference signal. The first segmented AD converter 190a and the second segmented AD converter 190b transmit and receive the comparison result output signal via a signal transmission unit 91 including a Cu-Cu connection 91a. The transistor 512 that outputs the comparison result output signal constitutes a level conversion unit.

[0183] The cross-sectional view shown in FIG55, the top view shown in FIG56A and FIG56B of the region pixel 100 in the 14th example are the same as the region pixel 100 in the 13th example.

[0184] (Summary of Examples 12 to 14 of Region Pixel 100) Figure 57 is a diagram summarizing the features of Region Pixel 100 in Examples 12 to 14 described above. The back side of Examples 12 to 14 is a light-illuminated surface. The photoelectric conversion unit 110 and the memory unit 113 in Region Pixel 100 of Examples 12 to 14 are disposed in the first region AR1, which is made of silicon. The AD conversion unit 190 in Region Pixel 100 of Example 12 is disposed in the second region AR2, which is made of silicon. The AD conversion units 190 in Region Pixel 100 of Examples 13 and 14 are disposed separately in the second region AR2 and the third region AR3, which are made of silicon. Region AR1 and Region AR2 in Region Pixel 100 of Examples 12 to 14 receive and transmit the charge of the floating diffusion region FD via the signal transmission unit 91. In Example 12, the signal transmission unit 91 within pixel 100 is a Cu-Cu connection 91a. In Examples 13 and 14, the first region AR1 and the second region AR2 within the imaging device 1 transmit and receive charges of the four floating diffusion regions FD within the four pixels via the signal transmission unit 91, which includes a through-hole 91b, for each pixel 100. In Example 13, the second region AR2 and the third region AR3 within the imaging device 1 transmit and receive the differential pair drain signal within the AD converter 190 via the signal transmission unit 91, which includes a Cu-Cu connection 91a, for each pixel 100. In Example 14, the second region AR2 and the third region AR3 within the imaging device 1 transmit and receive the comparison result output signal within the AD converter 190 via the signal transmission unit 91, which includes a Cu-Cu connection 91a, for each pixel 100.

[0185] (Example 15 of Region Pixel 100) Figure 58 is a circuit diagram of Region Pixel 100 of Example 15, Figure 59 is a cross-sectional view of Region Pixel 100 of Example 15, Figure 60A is a top view in the direction of line AA in Figure 59, Figure 60B is a top view in the direction of line BB in Figure 59, and Figure 60C is a top view in the direction of line CC in Figure 59. Figures 58, 59, 60A, 60B and 60C show an example of Region Pixel 100 having 4 pixels.

[0186] As shown in Figures 58 and 59, the imaging device 1 having the area pixel 100 of the 15th example includes a first area AR1 and a second area AR2 laminated together. The first area AR1 is a first substrate SUB1 made of silicon, and the second area AR2 is a second substrate SUB2 made of silicon. In the first area AR1, a photoelectric conversion unit 110, a memory unit 113, and a wiring layer are laminated together. In the second area AR2, a wiring layer and an AD conversion unit 190 are laminated together.

[0187] As shown in Figures 60A and 60B, the photoelectric conversion unit 110 and the memory unit 113 are disposed over the entire area of ​​different layers in the first region AR1. This increases the placement area of ​​the photoelectric conversion unit 110 and the memory unit 113 compared to Examples 12 to 14. Furthermore, the AD conversion unit 190 is disposed over the entire area of ​​a layer different from the wiring layer in the second region AR2.

[0188] The first region AR1 and the second region AR2 transmit and receive charges in the floating diffusion region FD via the signal transmission unit 91 containing the Cu-Cu connection 91a.

[0189] Thus, in the region pixel 100 of the 15th example, since the memory unit 113 is arranged on a different layer than the photoelectric conversion unit 110, the area of ​​the memory unit 113 and the photoelectric conversion unit 110 can be increased, the aperture ratio of the photoelectric conversion unit 110 can be improved, and the memory capacity of the memory unit 113 can be increased. Furthermore, it can also be miniaturized.

[0190] (Example 16 of Region Pixel 100) Figure 61 is a circuit diagram of Region Pixel 100 of Example 16, Figure 62 is a cross-sectional view of Region Pixel 100 of Example 16, Figure 63A is a top view along line AA of Figure 62, Figure 63B is a top view along line BB of Figure 62, Figure 63C is a top view along line CC of Figure 62, and Figure 63D is a top view along line DD of Figure 62. The following explanation focuses on the differences between Region Pixel 100 and Examples 13 and 15.

[0191] As shown in Figures 61 and 62, the imaging device 1 having the area pixel 100 of the 16th example includes a first area AR1, a second area AR2, and a third area AR3, which are stacked. In the first area AR1, a photoelectric conversion unit 110 and a memory unit 113 are stacked. The AD conversion unit 190, similar to that in Figure 51, is divided into a first segment AD conversion unit 190a and a second segment AD conversion unit 190b. The first segment AD conversion unit 190a is disposed in the second area AR2, and the second segment AD conversion unit 190b is disposed in the third area AR3.

[0192] Except for the layer composition of the first region AR1, the region pixel 100 in the 16th example is the same as the region pixel 100 in the 13th example, so the description of the common parts is omitted.

[0193] (Example 17 of Region Pixel 100) Figure 64 is a circuit diagram of Region Pixel 100 of Example 17, Figure 65 is a cross-sectional view of Region Pixel 100 of Example 17, Figure 66A is a top view in the direction of line AA of Figure 65, Figure 66B is a top view in the direction of line BB of Figure 65, Figure 66C is a top view in the direction of line CC of Figure 65, and Figure 66D is a top view in the direction of line DD of Figure 65. The following explanation focuses on the differences between Region Pixel 100 and Examples 14 and 16.

[0194] As shown in Figures 64 and 65, the imaging device 1 having the area pixel 100 of the 17th example includes a first area AR1, a second area AR2, and a third area AR3, which are stacked. In the first area AR1, a photoelectric conversion unit 110 and a memory unit 113 are stacked. The AD conversion unit 190, similar to that in Figure 56, is divided into a first segment AD conversion unit 190a and a second segment AD conversion unit 190b. The first segment AD conversion unit 190a is disposed in the second area AR2, and the second segment AD conversion unit 190b is disposed in the third area AR3.

[0195] Except for the layer composition of the first region AR1, the region pixel 100 in the 17th example is the same as the region pixel 100 in the 14th example, so the description of the common parts is omitted.

[0196] (Summary of Examples 15 to 17 of Region Pixel 100) Figure 67 is a diagram summarizing the features of Region Pixel 100 in Examples 15 to 17. The back side of Examples 15 to 17 is a light-illuminated surface. The photoelectric conversion unit 110 and the memory unit 113 in Region Pixel 100 of Examples 15 to 17 are stacked in Region 1 AR1, which is made of silicon. The AD conversion unit 190 in Region Pixel 100 of Example 15 is disposed in Region 2 AR2, which is made of silicon. The AD conversion units 190 in Region Pixel 100 of Examples 16 and 17 are separately disposed in Region 2 AR2 and Region 3 AR3, which are made of silicon. Region 1 AR1 and Region 2 AR2 in Region Pixel 100 of Examples 15 to 17 transmit and receive the charge of the floating diffusion region FD via the signal transmission unit 91. In Example 15, the signal transmission unit 91 within region pixel 100 is a Cu-Cu connection 91a. In Examples 16 and 17, regions AR1 and AR2 within region pixel 100 transmit and receive charges in the floating diffusion region FD via the signal transmission unit 91, which includes a via 91b. In Example 16, regions AR2 and AR3 within region pixel 100 transmit and receive differential pair drain signals within the AD converter 190 via the signal transmission unit 91, which includes a Cu-Cu connection 91a. In Example 17, regions AR2 and AR3 within region pixel 100 transmit and receive comparison result output signals within the AD converter 190 via the signal transmission unit 91, which includes a Cu-Cu connection 91a.

[0197] (Example 18 of Region Pixel 100) Figure 68 is a circuit diagram of Region Pixel 100 of Example 18, Figure 69 is a cross-sectional view of Region Pixel 100 of Example 18, Figure 70A is a top view in the direction of line AA in Figure 69, and Figure 70B is a top view in the direction of line BB in Figure 69. Figures 68, 69, 70A and 70B show an example of Region Pixel 100 having 4 pixels.

[0198] The region pixel 100 of the 18th example has a photoelectric conversion unit 110 made of a material other than silicon. The material other than silicon is, for example, an organic semiconductor material. Thus, the photoelectric conversion unit 110 of the 18th example has a semiconductor layer containing a material other than silicon. More specifically, the photoelectric conversion unit 110 of the 18th example has a structure comprising an upper electrode layer 11a, a photoelectric conversion layer 11b, a charge accumulation layer 11c, an insulating layer 11d, and a lower electrode layer 11e. The charge accumulation layer 11c functions as a memory unit 113.

[0199] As shown in Figures 68 and 69, the imaging device 1 having the area pixel 100 of the 18th example includes a first area AR1 and a second area AR2 stacked together. The first area AR1 and the second area AR2 are disposed on different layers on the same substrate. In the first area AR1, the photoelectric conversion unit 110 and the memory unit 113 are disposed on different layers. Each layer on which the photoelectric conversion unit 110 and the memory unit 113 are disposed is a semiconductor layer using a material other than silicon. More specifically, in the first area AR1, the stacked layer includes a photoelectric conversion layer 11b using a material other than silicon, a charge accumulation layer 11c, and an insulating layer 11d.

[0200] In region AR2, wiring layer 75 and AD conversion unit 190 are respectively disposed on different layers. The layer on which AD conversion unit 190 is disposed is a semiconductor layer using silicon as the material.

[0201] Figure 70A is a top view near the boundary between the photoelectric conversion unit 110 and the memory unit 113. As described above, the photoelectric conversion unit 110 and the memory unit 113 are respectively disposed on different layers, but at least one part of the photoelectric conversion unit 110 and the memory unit 113 may also be disposed across the two layers.

[0202] The first region AR1 and the second region AR2 transmit and receive the charge of the floating diffusion region FD via the signal transmission unit 91 containing the through hole 91b.

[0203] In the previous step, the camera device 1 having the area pixel 100 of the 18th example disposed a semiconductor layer with silicon as the material on the support substrate, and sequentially formed an AD conversion unit 190 and a wiring layer. In the subsequent step, a non-silicon semiconductor layer was formed, and sequentially formed a memory unit 113 and a photoelectric conversion unit 110.

[0204] Thus, the region pixel 100 of the 18th example has a structure on which an AD conversion unit 190 containing silicon, a memory unit 113 using materials other than silicon, and a photoelectric conversion unit 110 are laminated on the same substrate. Since the photoelectric conversion unit 110 and the AD conversion unit 190 transmit and receive charges of the floating diffusion region FD through the signal transmission unit 91 containing vias 91b, the number of vias can be reduced, and the area of ​​the photoelectric conversion unit 110 or the AD conversion unit 190 can be increased accordingly.

[0205] (Example 19 of Region Pixel 100) Figure 71 is a circuit diagram of Region Pixel 100 in Example 19, Figure 72 is a cross-sectional view of Region Pixel 100 in Example 19, Figure 73A is a top view along line AA in Figure 72, Figure 73B is a top view along line BB in Figure 72, and Figure 73C is a top view along line CC in Figure 72. The following explanation focuses on the differences between Region Pixel 100 and Examples 13 and 15.

[0206] As shown in Figures 71 and 72, the imaging device 1 having the area pixel 100 of the 19th example includes a first region AR1, a second region AR2, and a third region AR3, which are stacked. In the first region AR1, the stack includes a photoelectric conversion unit 110 and a memory unit 113, which use materials other than silicon as the material. The AD conversion unit 190 is divided into a first segment AD conversion unit 190a and a second segment AD conversion unit 190b. The first segment AD conversion unit 190a and the photoelectric conversion unit 110 transmit and receive charges in the floating diffusion region FD. The first segment AD conversion unit 190a has differential pairs of transistors 12, 157 and transistors 13, 158 within the AD conversion unit 190. The second segment AD conversion unit 190b has the remaining portion within the AD conversion unit 190, specifically transistors 151, 152, 511 to 517. A first segmented AD conversion unit 190a is disposed in the second region AR2, and a second segmented AD conversion unit 190b is disposed in the third region AR3. The first region AR1 and the second region AR2 are laminated on the first substrate SUB1. The third region AR3 is disposed on the second substrate SUB2.

[0207] Region 1 AR1 and Region 2 AR2 transmit and receive charges in the floating diffusion region FD via a signal transmission unit 91 containing a through-hole 91b. Region 2 AR2 and Region 3 AR3 transmit and receive drain signals from the differential pair transistors 12 and 157 via a signal transmission unit 91 containing a Cu-Cu connection 91a.

[0208] As shown in Figures 73B and 73C, since the first segmented AD conversion unit 190a and the second segmented AD conversion unit 190b are respectively arranged in the entire area of ​​each region, the arrangement area of ​​the AD conversion unit 190 can be expanded.

[0209] (Example 20 of Region Pixel 100) Figure 74 is the circuit diagram of Region Pixel 100 in Example 20, Figure 75 is a cross-sectional view of Region Pixel 100 in Example 20, Figure 76A is a top view along line AA in Figure 75, Figure 76B is a top view along line BB in Figure 75, and Figure 76C is a top view along line CC in Figure 75. The following explanation focuses on the differences from Region Pixel 100 in Example 19.

[0210] The difference between region pixel 100 in Example 20 and Example 19 lies in the segmentation location within AD conversion unit 190. In Example 20, AD conversion unit 190 is divided into a first segment AD conversion unit 190a and a second segment AD conversion unit 190b, similar to those in Figure 64. Other aspects are the same as in Example 19; the cross-sectional view in Figure 75 and the top views in Figures 76A-76C are the same as the cross-sectional view in Figure 72 and the top views in Figures 73A-73C.

[0211] (Summary of Examples 18 to 20 of Region Pixel 100) Figure 77 is a diagram summarizing the features of Region Pixel 100 in Examples 18 to 20. The front side of Example 18 is the light-illuminating surface, while the back side of Examples 19 and 20 is the light-illuminating surface. The photoelectric conversion unit 110 and the memory unit 113 in Region Pixel 100 of Examples 18 to 20 are stacked in Region 1 AR1, which uses materials other than silicon. The AD conversion unit 190 in Region Pixel 100 of Example 18 is disposed in Region 2 AR2, which uses silicon as the material. The AD conversion units 190 in Region Pixel 100 of Examples 19 and 20 are separately disposed in Region 2 AR2 and Region 3 AR3, which use silicon as the material. In examples 18 to 20, regions AR1 and AR2 within pixel 100 transmit and receive charges in the floating diffusion region FD via signal transmission unit 91 including via pore 91b. In example 19, regions AR2 and AR3 within pixel 100 transmit and receive differential pair drain signals within AD converter 190 via signal transmission unit 91 including Cu-Cu connection 91a. In example 20, regions AR2 and AR3 within pixel 100 transmit and receive comparison result output signals within AD converter 190 via signal transmission unit 91 including Cu-Cu connection 91a.

[0212] (Example 21 of Area Pixel 100) Figure 78 is a circuit diagram of Area Pixel 100 of Example 21, Figure 79 is a cross-sectional view of Area Pixel 100 of Example 21, Figure 80A is a top view along line AA of Figure 79, Figure 80B is a top view along line BB of Figure 79, and Figure 80C is a top view along line CC of Figure 79. Figures 78, 79, 80A, 80B, and 80C show examples of Area Pixel 100 having 4 pixels. Area Pixel 100 of Example 21 has a photoelectric conversion unit 110 (first photoelectric conversion unit 110a) using a material other than silicon, and a photoelectric conversion unit 110 (second photoelectric conversion unit 110b) using silicon as a material. Materials other than silicon include, for example, organic semiconductor materials. The first photoelectric conversion unit 110a performs photoelectric conversion of green, for example, and the second photoelectric conversion unit 110b performs photoelectric conversion of red and blue, for example.

[0213] As shown in FIG78, the gate of transistor 12 and the source of transistor 13 within AD conversion unit 190 are connected to the floating diffusion region FD of first photoelectric conversion unit 110a and the floating diffusion region FD of second photoelectric conversion unit 110b. The imaging device 1 having the area pixel 100 of the 21st example, as shown in FIGS78 and 79, includes a first region AR1, a second region AR2, and a third region AR3 stacked together. The first region AR1 and the second region AR2 are stacked on a first substrate SUB1. The third region AR3 is disposed on a second substrate SUB2. In the first region AR1, the first photoelectric conversion unit 110a and the memory unit 113 are stacked using a material other than silicon. In the second region AR2, a second photoelectric conversion unit 110b using silicon as the material is disposed. In the third region AR3, an AD conversion unit 190 using silicon as the material is disposed.

[0214] Region 1 AR1 and Region 3 AR3 transmit and receive charges in the floating diffusion region FD of the first photoelectric conversion unit 110a via a signal transmission unit 91 including a through hole 91b and a Cu-Cu connection 91a. Region 2 AR2 and Region 3 AR3 transmit and receive charges in the floating diffusion region FD of the second photoelectric conversion unit 110b via a signal transmission unit 91 including a Cu-Cu connection 91a.

[0215] As shown in Figures 80A and 80B, since the first photoelectric conversion unit 110a and the second photoelectric conversion unit 110b are disposed throughout the entire area of ​​each region, the aperture ratio can be improved. Thus, the region pixel 100 of the 21st example has two types of photoelectric conversion units 110 (110a, 110b), and the charge of the floating diffusion region FD of each photoelectric conversion unit 110 is transferred to the AD conversion unit 190 through the via 91b and the Cu-Cu connection 91a. Since each photoelectric conversion unit 110 is disposed throughout the entire area of ​​different layers, the placement area of ​​each photoelectric conversion unit 110 can be ensured to be sufficient.

[0216] (Example 22 of Region Pixel 100) Figure 81 is a circuit diagram of Region Pixel 100 in Example 22, Figure 82 is a cross-sectional view of Region Pixel 100 in Example 22, Figure 83A is a top view along line AA in Figure 82, Figure 83B is a top view along line BB in Figure 82, and Figure 83C is a top view along line CC in Figure 82. The following explanation focuses on the differences between Region Pixel 100 and Region Pixel 100 in Examples 13 and 15.

[0217] As shown in Figures 81 and 82, the imaging device 1 having the area pixel 100 of the 22nd example includes a first area AR1, a second area AR2, and a third area AR3 stacked together. The area pixel 100 of the 22nd example is similar to that of the 21st example, having a first photoelectric conversion unit 110a made of a material other than silicon, and a second photoelectric conversion unit 110b made of silicon. In the 21st example, the second photoelectric conversion unit 110b is not connected to a memory unit, but in the 22nd example, the second photoelectric conversion unit 110b is connected to a second memory unit 113b. Here, the memory unit 113 connected to the first photoelectric conversion unit 110a is referred to as the first memory unit 113a, and the memory unit 113 connected to the second photoelectric conversion unit 110b is referred to as the second memory unit 113b.

[0218] In region AR1, a first photoelectric conversion unit 110a and a first memory unit 113a, using materials other than silicon, are laminated. In region AR2, a second photoelectric conversion unit 110b and a second memory unit 113b, using silicon as the material, are disposed on the same layer. In region AR3, an AD conversion unit 190, using silicon as the material, is disposed. Region AR1 and region AR2 are laminated on a first substrate SUB1, and region AR3 is disposed on a second substrate SUB2.

[0219] Region 1 AR1 and Region 3 AR3 transmit and receive charges in the floating diffusion region FD of the first photoelectric conversion unit 110a via a signal transmission unit 91 including a through hole 91b and a Cu-Cu connection 91a. Region 2 AR2 and Region 3 AR3 transmit and receive charges in the floating diffusion region FD of the second photoelectric conversion unit 110b via a signal transmission unit 91 including a Cu-Cu connection 91a.

[0220] Thus, since the area pixel 100 of the 22nd example is connected to the first memory unit 113a in the first photoelectric conversion unit 110a and to the second memory unit 113b in the second photoelectric conversion unit 110b, it can be photographed in the global shutter mode.

[0221] (Example 23 of Area Pixel 100) Figure 84 is a circuit diagram of Area Pixel 100 of Example 23, Figure 85 is a cross-sectional view of Area Pixel 100 of Example 23, Figure 86A is a top view along line AA of Figure 85, Figure 86B is a top view along line BB of Figure 85, and Figure 86C is a top view along line CC of Figure 85. The following explanation focuses on the differences from Area Pixel 100 of Example 23.

[0222] As shown in Figure 85, the region pixel 100 of Example 23 differs from Example 22 in that a second photoelectric conversion unit 110b and a second memory unit 113b are stacked in the second region AR2. The top view of Figure 86B is a top view near the boundary of the second photoelectric conversion unit 110b and the second memory unit 113b, which are respectively disposed throughout the entire area of ​​each region. The configuration of Example 23 outside the second region AR2 is the same as that of Example 22.

[0223] (Summary of Examples 21 to 23 of Region Pixel 100) Figure 87 is a diagram summarizing the features of Region Pixel 100 in Examples 21 to 23. The back side of Examples 21 to 23 is a light-illuminating surface. In Examples 21 to 23, the first photoelectric conversion unit 110a and the first memory unit 113a are disposed in the first region AR1, which uses a material other than silicon. In Examples 22 and 23, the second photoelectric conversion unit 110b and the second memory unit 113b are disposed in the second region AR2, which uses silicon as a material. The AD conversion unit 190 in Examples 21 to 23 is disposed in the third region AR3, which uses silicon as a material. In examples 21 to 23, region AR1 (first region) and region AR3 (third region) transmit and receive charges in the floating diffusion region FD of the first photoelectric conversion unit 110a via a signal transmission unit 91 containing a through-hole 91b and a Cu-Cu connection 91a. In examples 21 to 23, region AR2 (second region) and region AR3 (third region) transmit and receive charges in the floating diffusion region FD of the second photoelectric conversion unit 110b via a signal transmission unit 91 containing a Cu-Cu connection 91a.

[0224] (Example 24 of Region Pixel 100) Figure 88 is a circuit diagram of Region Pixel 100 of Example 24, Figure 89 is a cross-sectional view of Region Pixel 100 of Example 24, Figure 90A is a top view in the direction of line AA in Figure 89, Figure 90B is a top view in the direction of line BB in Figure 89, and Figure 90C is a top view in the direction of line CC in Figure 89. Figures 88, 89, 90A, 90B and 90C show examples of Region Pixel 100 having 4 pixels. The area pixel 100 in Example 24 is the same as that in Example 23, and includes: a first photoelectric conversion unit 110a, which uses a material other than silicon as a material; a second photoelectric conversion unit 110b, which uses silicon as a material; a first memory unit 113a, which is connected to the first photoelectric conversion unit 110a and uses a material other than silicon as a material; and a second memory unit 113b, which is connected to the second photoelectric conversion unit 110b and uses silicon as a material.

[0225] The area pixel 100 in the 24th example differs from that in the 23rd example, having a first AD conversion unit 190a that receives the charge of the floating diffusion region FD of the first photoelectric conversion unit 110a, and a second AD conversion unit 190b that receives the charge of the floating diffusion region FD of the second photoelectric conversion unit 110b. Thus, the area pixel 100 in the 24th example has a larger number of AD conversion units 190 compared to the 23rd example.

[0226] As shown in Figures 88 and 89, in region AR1, a first photoelectric conversion unit 110a and a first memory unit 113a, using materials other than silicon, are laminated. In region AR2, a second photoelectric conversion unit 110b and a second memory unit 113b, using silicon as the material, are disposed on the same layer. In region AR3, a first AD conversion unit 190a and a second AD conversion unit 190b, using silicon as the material, are disposed on the same layer. Regions AR1 and AR2 are laminated on a first substrate SUB1, and region AR3 is disposed on a second substrate SUB2. Regions AR1 and AR3 receive and transmit charges in the floating diffusion region FD of the first photoelectric conversion unit 110a via a signal transmission unit 91 including a through-hole 91b and a Cu-Cu connection 91a. Region 2 AR2 and Region 3 AR3 transmit and receive charges in the floating diffusion region FD of the second photoelectric conversion unit 110b via the signal transmission unit 91 containing Cu-Cu connection 91a.

[0227] As shown in FIG90A, the first photoelectric conversion unit 110a and the first memory unit 113a are disposed over the entire area of ​​each region. As shown in FIG90B, since the second photoelectric conversion unit 110b and the second memory unit 113b are disposed on the same layer, the disposal area of ​​the second photoelectric conversion unit 110b is smaller than that of the first photoelectric conversion unit 110a, and the disposal area of ​​the second memory unit 113b is smaller than that of the second memory unit 113b. As shown in FIG90C, the first AD conversion unit 190a is disposed in a manner that surrounds the second AD conversion unit 190b.

[0228] In the area pixel 100 of the 24th example, since it has a first AD conversion unit 190a for the first photoelectric conversion unit 110a and a second AD conversion unit 190b for the second photoelectric conversion unit 110b, the first AD conversion unit 190a and the second AD conversion unit 190b can perform AD conversion in parallel at the same time, which can shorten the AD conversion processing time.

[0229] (Example 25 of Region Pixel 100) Figure 91 is a circuit diagram of Region Pixel 100 in Example 25, Figure 92 is a cross-sectional view of Region Pixel 100 in Example 25, Figure 93A is a top view along line AA in Figure 92, Figure 93B is a top view along line BB in Figure 92, and Figure 93C is a top view along line CC in Figure 92. The following explanation focuses on the differences from Example 24.

[0230] The difference between the 25th example and the 24th example lies in the composition of the second region AR2. As shown in FIG92, the second region AR2 in the 25th example has a second photoelectric conversion unit 110b and a second memory unit 113b stacked together. Therefore, as shown in FIG93B, the second photoelectric conversion unit 110b and the second memory unit 113b are disposed throughout the entire area of ​​each region.

[0231] (Summary of Examples 24 and 25 of Region Pixel 100) Figure 94 is a diagram summarizing the features of Region Pixel 100 in Examples 24 and 25. The back side of Examples 24 and 25 is a light-illuminating surface. In Examples 24 and 25, the first photoelectric conversion unit 110a and the first memory unit 113a are formed of a material other than silicon, and the second photoelectric conversion unit 110b and the second memory unit 113b are formed of silicon. In Examples 24 and 25, the first photoelectric conversion unit 110a and the first memory unit 113a are disposed in the first region AR1, and the second photoelectric conversion unit 110b and the second memory unit 113b are disposed in the second region AR2. In Example 24, the first photoelectric conversion unit 110a and the first memory unit 113a are disposed on the same layer of the first region AR1, and in Example 25, they are laminated in the first region AR1. In examples 24 and 25, region AR1 and region AR2 transmit and receive charges in the floating diffusion region FD of the first photoelectric conversion unit 110a via a signal transmission unit 91 containing a through-hole 91b and a Cu-Cu connection 91a. Region AR2 and region AR3 transmit and receive charges in the floating diffusion region FD of the second photoelectric conversion unit 110b via a signal transmission unit 91 containing a Cu-Cu connection 91a.

[0232] (Example 23 of Region Pixel 100) Figure 95 is a circuit diagram of Region Pixel 100 in Example 23, Figure 96 is a cross-sectional view of Region Pixel 100 in Example 23, Figure 97A is a top view along line AA in Figure 96, Figure 97B is a top view along line BB in Figure 96, and Figure 97C is a top view along line CC in Figure 96. Figures 95, 96, 97A, and 97B show an example where Region Pixel 100 has 4 pixels.

[0233] As shown in FIG95, the area pixel 100 of the 23rd example has a first photoelectric conversion unit 110a and a second photoelectric conversion unit 110b. Both the first photoelectric conversion unit 110a and the second photoelectric conversion unit 110b have a semiconductor layer made of silicon. Furthermore, a first memory unit 113a is connected to the first photoelectric conversion unit 110a, and a second memory unit 113b is connected to the second photoelectric conversion unit 110b. In this way, the imaging device 1 having the area pixel 100 of the 23rd example takes pictures in a global shutter mode.

[0234] The imaging device 1 having the area pixel 100 of the 23rd example includes a first area AR1 and a second area AR2. In the first area AR1, a first photoelectric conversion unit 110a and a first memory unit 113a are laminated, and a second photoelectric conversion unit 110b and a second memory unit 113b are laminated. In FIG96, an example is shown where the second photoelectric conversion unit 110b is disposed on a layer below the first photoelectric conversion unit 110a, and the second memory unit 113b is disposed on a layer below the second photoelectric conversion unit 110b, and the first memory unit 113a is disposed across the layers of the second photoelectric conversion unit 110b and the second memory unit 113b. However, the arrangement order or location of the first photoelectric conversion unit 110a, the first memory unit 113a, the second photoelectric conversion unit 110b, and the second memory unit 113b is arbitrary. The first area AR1 is disposed on a first substrate SUB1.

[0235] An AD conversion unit 190 is disposed in the second region AR2. The second region AR2 is disposed on the second substrate SUB2.

[0236] The first substrate SUB1 and the second substrate SUB2 transmit and receive the charge of the floating diffusion region FD of the first photoelectric conversion unit 110a and the charge of the floating diffusion region FD of the second photoelectric conversion unit 110b via the signal transmission unit 91 including the Cu-Cu connection 91a.

[0237] (Example 27 of Region Pixel 100) Figure 98 is a circuit diagram of Region Pixel 100 in Example 27, Figure 99 is a cross-sectional view of Region Pixel 100 in Example 27, Figure 100A is a top view in the direction of line AA in Figure 99, Figure 100B is a top view in the direction of line BB in Figure 99, and Figure 100C is a top view in the direction of line CC in Figure 99. The following explanation focuses on the differences from Example 23.

[0238] The common feature of the area pixel 100 in the 27th example and the 23rd example is that each pixel has a first photoelectric conversion unit 110a and a second photoelectric conversion unit 110b. However, the first photoelectric conversion unit 110a and the second photoelectric conversion unit 110b in the 27th example both have a semiconductor layer made of a material other than silicon, such as an organic semiconductor material.

[0239] As shown in Figure 99, a first photoelectric conversion unit 110a and a first memory unit 113a are stacked in the first region AR1, and a second photoelectric conversion unit 110b and a second memory unit 113b are also stacked. In Figure 99, the first photoelectric conversion unit 110a, the first memory unit 113a, the second photoelectric conversion unit 110b, and the second memory unit 113b are stacked sequentially from top to bottom, but the stacking order is arbitrary.

[0240] An AD conversion unit 190 made of silicon is disposed in the second region AR2. The first region AR1 and the second region AR2 are deposited on the same substrate. The first region AR1 and the second region AR2 receive and transmit the charge of the floating diffusion region FD of the first photoelectric conversion unit 110a through a signal transmission unit 91 including a through hole 91b, and receive and transmit the charge of the floating diffusion region FD of the second photoelectric conversion unit 110b through a signal transmission unit 91 including other through holes 91b.

[0241] As shown in Figures 100A, 100B and 100C, since the first photoelectric conversion unit 110a, the first memory unit 113a, the second photoelectric conversion unit 110b, the second memory unit 113b and the AD conversion unit 190 are respectively arranged in the entire area of ​​each region, even if each pixel has the first photoelectric conversion unit 110a and the second photoelectric conversion unit 110b, there is no risk of a decrease in aperture ratio.

[0242] (Example 28 of Region Pixel 100) Figure 101 is a circuit diagram of Region Pixel 100 in Example 28, Figure 102 is a cross-sectional view of Region Pixel 100 in Example 28, Figure 103A is a top view in the direction of line AA in Figure 102, Figure 103B is a top view in the direction of line BB in Figure 102, Figure 103C is a top view in the direction of line CC in Figure 102, and Figure 103D is a top view in the direction of line DD in Figure 102. The following explanation focuses on the differences from Example 27.

[0243] The area pixel 100 in Example 28 is similar to that in Example 27, and includes a first photoelectric conversion unit 110a and a second photoelectric conversion unit 110b having a semiconductor layer other than silicon. The difference between the area pixel 100 in Example 28 and that in Example 27 is that the AD conversion unit 190 is divided into a first segmented AD conversion unit 190a and a second segmented AD conversion unit 190b, and these are separately disposed in the third region AR3 and the fourth region AR4.

[0244] A first photoelectric conversion unit 110a and a first memory unit 113a are laminated in the first region AR1. A second photoelectric conversion unit 110b and a second memory unit 113b are laminated in the second region AR2. The first region AR1, the second region AR2, and the third region AR3 are laminated on the first substrate SUB1. The fourth region AR4 is disposed on the second substrate SUB2.

[0245] The first photoelectric conversion unit 110a and the first segmented AD conversion unit 190a in the first region AR1 transmit and receive the charge of the floating diffusion region FD of the first photoelectric conversion unit 110a via the signal transmission unit 91 including the through hole 91b. Furthermore, the second photoelectric conversion unit 110b and the first segmented AD conversion unit 190a in the second region AR2 transmit and receive the charge of the floating diffusion region FD of the second photoelectric conversion unit 110b via the signal transmission unit 91 including the through hole 91b. The third region AR3 and the fourth region AR4 transmit and receive the drain signal of the differential pair within the AD conversion unit 190 via the signal transmission unit 91 including the Cu-Cu connection 91a.

[0246] Since the region pixel 100 in the 28th example divides the AD conversion unit 190 into two parts and arranges them on different layers, the arrangement area of ​​the AD conversion unit 190 can be increased compared to the 27th example.

[0247] (Summary of Examples 23 to 28 of Region Pixel 100) Figure 104 is a diagram summarizing the features of the region pixels 100 in Examples 26 to 28 described above. The back side of Examples 26 and 28 is the light-illuminating surface, while the front side of Example 27 is the light-illuminating surface. The first photoelectric conversion unit 110a and the second photoelectric conversion unit 110b of Example 26 both have a semiconductor layer using silicon as the material, while the first photoelectric conversion unit 110a and the second photoelectric conversion unit 110b of Examples 27 and 28 both have a semiconductor layer using a material other than silicon. In Examples 26 to 28, the first photoelectric conversion unit 110a, the first memory unit 113a, the second photoelectric conversion unit 110b, and the first memory unit 113a are disposed on the first substrate SUB1. In examples 26 and 27, the AD conversion unit 190 is disposed in the second region AR2. In example 28, the first segment AD conversion unit 190a is disposed in the first region AR1, and the second segment AD conversion unit 190b is disposed in the second region AR2.

[0248] In Example 26, Region 1 AR1 and Region 2 AR2 transmit and receive charges in the floating diffusion regions FD of the first photoelectric conversion unit 110a and the second photoelectric conversion unit 110b via a signal transmission unit 91 including a Cu-Cu connection 91a. In Example 27, Region 1 AR1 and Region 2 AR2 transmit and receive charges in the floating diffusion regions FD of the first photoelectric conversion unit 110a and the second photoelectric conversion unit 110b via a signal transmission unit 91 including a through hole 91b. In Example 28, Region 3 AR3 and Region 4 AR4 transmit and receive the drain signal of the differential pair within the AD conversion unit 190 via a signal transmission unit 91 including a Cu-Cu connection 91a.

[0249] (Other variations of region pixel 100) In the region pixel 100 of the above-mentioned examples 26 to 28, the first photoelectric conversion unit 110a and the second photoelectric conversion unit 110b share an AD conversion unit 190. However, as shown in examples 24 or 25, a first AD conversion unit 190a corresponding to the first photoelectric conversion unit 110a and a second AD conversion unit 190b corresponding to the second photoelectric conversion unit 110b can also be provided.

[0250] In cases 11 and 28, the differential pair drain signal in the AD converter 190 can be transmitted and received in region 1 AR1 and region 2 AR2, and the comparison result output signal in the AD converter 190 can also be transmitted and received in region 1 AR1 and region 2 AR2.

[0251] In Examples 3, 6, 9, 14, and 17 above, as shown in the upper half of the circuit diagram in FIG105, the portion of the AD converter 190 up to the transistor 512 that outputs the comparison result signal is designated as the first segmented AD converter 190a, and the portion following the transistor 512 is designated as the second segmented AD converter 190b. The AD converter 190 is divided into two parts, which are respectively arranged in different regions. The boundary between the first segmented AD converter 190a and the second segmented AD converter 190b does not need to be the drain node of the transistor 512. For example, as shown in the lower half of the circuit diagram in FIG105, it can also be the drain node of the transistor 152 within the AD converter 190.

[0252] <Application Examples to Mobile Bodies> The technology disclosed herein (the technology) can be applied to various products. For example, the technology disclosed herein can also be implemented as a device mounted on any type of mobile body such as automobiles, electric vehicles, hybrid vehicles, motorcycles, bicycles, personal mobility vehicles, airplanes, drones, ships, and robots.

[0253] Figure 106 is a block diagram showing a schematic configuration example of a mobile body control system to which the technology disclosed herein is applicable, namely a vehicle control system.

[0254] The vehicle control system 12000 includes a plurality of electronic control units connected via a communication network 12001. In the example shown in FIG106, the vehicle control system 12000 includes a drive system control unit 12010, a vehicle body system control unit 12020, an external information detection unit 12030, an internal information detection unit 12040, and an integrated control unit 12050. Furthermore, the integrated control unit 12050 is shown to have the following functional components: a microcomputer 12051, an audio / image output unit 12052, and an in-vehicle network I / F (interface) 12053.

[0255] The drive system control unit 12010 controls the operation of devices associated with the vehicle's drive system according to various programs. For example, the drive system control unit 12010 functions as a control device for a drive force generating device such as an internal combustion engine or drive motor to generate drive force for the vehicle, a drive force transmission mechanism for transmitting drive force to the wheels, a steering mechanism for adjusting the vehicle's steering angle, and a braking device for generating braking force for the vehicle.

[0256] The vehicle system control unit 12020 controls the operation of various devices equipped on the vehicle body according to various programs. For example, the vehicle system control unit 12020 functions as a control device for keyless start systems, smart key systems, power windows, or various lighting fixtures such as headlights, taillights, brake lights, turn signals, or fog lights. In this case, radio waves or signals from various switches sent by a portable device that replaces the key can be input to the vehicle system control unit 12020. The vehicle system control unit 12020 accepts such radio waves or signal inputs and controls the vehicle's door lock devices, power window devices, lighting fixtures, etc.

[0257] The exterior information detection unit 12030 detects information about the exterior of the vehicle equipped with the vehicle control system 12000. For example, a camera unit 12031 is connected to the exterior information detection unit 12030. The exterior information detection unit 12030 causes the camera unit 12031 to capture images of the exterior of the vehicle and receives the captured images. The exterior information detection unit 12030 can also perform object detection processing or distance detection processing based on the received images, such as people, vehicles, obstacles, signs, or text on the road surface.

[0258] The camera unit 12031 is a light sensor that receives light and outputs an electrical signal corresponding to the amount of light received. The camera unit 12031 can output the electrical signal as an image or as ranging information. Furthermore, the light received by the camera unit 12031 can be visible light or non-visible light such as infrared light.

[0259] The in-vehicle information detection unit 12040 detects information inside the vehicle. A driver status detection unit 12041, for example, detecting the driver's state, is connected to the in-vehicle information detection unit 12040. The driver status detection unit 12041 includes, for example, a camera that captures images of the driver. Based on the detection information input from the driver status detection unit 12041, the in-vehicle information detection unit 12040 can calculate the driver's fatigue level or concentration level, and can also determine whether the driver is dozing off.

[0260] The microcomputer 12051 can calculate the control target values ​​of the drive force generating device, steering mechanism, or braking device based on the information obtained from the external information detection unit 12030 or the internal information detection unit 12040, and output control commands to the drive system control unit 12010. For example, the microcomputer 12051 can perform coordinated control for the purpose of realizing ADAS (Advanced Driver Assistance System) functions, including avoiding vehicle collisions or mitigating impacts, following based on inter-vehicle distance, maintaining vehicle speed, vehicle collision warning, or vehicle lane departure warning.

[0261] Furthermore, the microcomputer 12051 controls the drive force generating device, steering mechanism or braking device, etc., based on the information about the vehicle's surroundings obtained by the external information detection unit 12030 or the internal information detection unit 12040, and performs coordinated control for the purpose of autonomous driving without relying on the driver's operation.

[0262] Furthermore, the microcomputer 12051 can output control commands to the vehicle system control unit 12030 based on the external information obtained by the external information detection unit 12030. For example, the microcomputer 12051 can control the headlights based on the position of the vehicle in front or oncoming vehicle detected by the external information detection unit 12030, and perform coordinated control such as switching the high beams to low beams to achieve anti-glare purposes.

[0263] The audio-visual output unit 12052 transmits at least one output signal, including sound and image, to an output device that can provide visual or auditory notification information to the occupants of the vehicle or to the outside of the vehicle. In the example of FIG106, examples of output devices include a loudspeaker 12061, a display unit 12062, and an instrument panel 12063. The display unit 12062 may also include at least one of, for example, an in-vehicle display and a head-up display.

[0264] Figure 107 is an example of the installation position of the camera unit 12031.

[0265] In Figure 107, camera units 12101, 12102, 12103, 12104, and 12105 are included as camera unit 12031.

[0266] Camera units 12101, 12102, 12103, 12104, and 12105 are installed, for example, on the front bumper, side mirrors, rear bumper, tailgate, and the upper part of the windshield inside the vehicle 12100. Camera unit 12101 mounted on the front bumper and camera unit 12105 mounted on the upper part of the windshield inside the vehicle primarily acquire images of the front of the vehicle 12100. Camera units 12102 and 12103 mounted on the side mirrors primarily acquire images of the sides of the vehicle 12100. Camera unit 12104 mounted on the rear bumper or tailgate primarily acquires images of the rear of the vehicle 12100. Camera unit 12105 mounted on the upper part of the windshield inside the vehicle is mainly used to detect vehicles or pedestrians, obstacles, traffic lights, traffic signs, or lane markings ahead.

[0267] Additionally, Figure 107 shows an example of the imaging range of camera units 12101 to 12104. Camera range 12111 represents the imaging range of camera unit 12101 located on the front bumper; camera ranges 12112 and 12113 represent the imaging ranges of camera units 12102 and 12103 located on the side mirrors, respectively; and camera range 12114 represents the imaging range of camera unit 12104 located on the rear bumper or tailgate. For example, by superimposing the image data captured by camera units 12101 to 12104, an overhead view of vehicle 12100 can be obtained.

[0268] At least one of the camera units 12101 to 12104 may also have the function of acquiring distance information. For example, at least one of the camera units 12101 to 12104 may be a stereo camera including a plurality of camera elements, or a camera element having pixels for phase difference detection.

[0269] For example, based on distance information obtained from cameras 12101 to 12104, microcomputer 12051 calculates the distance to each three-dimensional object within the camera range 12111 to 12114, and the time change of that distance (relative speed to vehicle 12100). This allows it to specifically identify the closest three-dimensional object on the path of vehicle 12100, and the three-dimensional object traveling in approximately the same direction as vehicle 12100 at a specific speed (e.g., 0 km / h or higher), as the vehicle ahead. Furthermore, microcomputer 12051 can set a pre-established safe distance from the vehicle ahead and perform automatic braking control (including stop-and-go control) or automatic acceleration control (including start-and-go control). Coordinated control for purposes such as autonomous driving without driver input can be performed in this way.

[0270] For example, the microcomputer 12051 can classify three-dimensional object data related to three-dimensional objects into two-wheeled vehicles, ordinary vehicles, large vehicles, pedestrians, utility poles, and other three-dimensional objects based on distance information obtained from the cameras 12101 to 12104, and capture it for automatic obstacle avoidance. For example, the microcomputer 12051 can identify obstacles around the vehicle 12100 as obstacles that are visible to the driver of the vehicle 12100 and obstacles that are difficult to see. Furthermore, the microcomputer 12051 determines the collision risk, which indicates the degree of danger of collision with each obstacle. When the collision risk is above a set value and a collision is possible, it outputs an alarm to the driver via the loudspeaker 12061 or the display unit 12062, or performs forced deceleration or evasive steering via the drive system control unit 12010, thereby providing driving support to avoid collisions.

[0271] At least one of the camera units 12101 to 12104 may also be an infrared camera that detects infrared light. For example, the microcomputer 12051 can identify a pedestrian by determining whether a pedestrian exists in the image captured by the camera units 12101 to 12104. The pedestrian identification is performed based on, for example, the order in which feature points of the image captured by the camera units 12101 to 12104, which are infrared cameras, are captured, and the order in which pattern matching processing is performed on a series of feature points representing the outline of an object to determine whether it is a pedestrian. If the microcomputer 12051 determines that a pedestrian exists in the image captured by the camera units 12101 to 12104 and identifies it as a pedestrian, the audio-visual output unit 12052 controls the display unit 12062 to overlay a square outline of the identified pedestrian for emphasis. Furthermore, the audio-visual output unit 12052 can also control the display unit 12062 to display icons representing pedestrians at desired locations.

[0272] The above description pertains to an example of a vehicle control system to which the technology disclosed herein is applicable. The technology disclosed herein is applicable to the camera unit 12031 and the like in the configuration described above. Specifically, the camera device 1 disclosed herein is applicable to the camera unit 12031. By applying the technology disclosed herein to the camera unit 12031, clearer photographic images can be obtained, thereby reducing driver fatigue.

[0273] Also, the present technology can be configured as follows. (1) An imaging device comprising: a plurality of pixels, each having a photoelectric conversion unit; an analog-to-digital conversion unit, which is provided in a region pixel that includes two or more of the aforementioned pixels in the plurality of pixels, and converts a signal corresponding to the charge photoelectrically converted by the aforementioned two or more pixels into a digital signal; a floating diffusion region that outputs the charge photoelectrically converted by the aforementioned photoelectric conversion unit in the aforementioned pixels; a plurality of regions, which are stacked in equal layers and are provided for the plurality of aforementioned photoelectric conversion units, the plurality of aforementioned analog-to-digital conversion units and the plurality of aforementioned floating diffusion regions in the plurality of pixels; and a signal transmission unit that performs signal transmission and reception between the plurality of regions; and in the plurality of regions, the region provided for the plurality of photoelectric conversion units and the region provided for the aforementioned analog-to-digital conversion units are provided separately; (1) The region where the plurality of photoelectric conversion units are arranged within the aforementioned pixel area and the region where the aforementioned analog-to-digital conversion unit is arranged transmit and receive the charge of the plurality of floating diffusion regions via the same signal transmission unit. (2) The imaging device of (1), wherein the photoelectric conversion unit has a silicon semiconductor layer or a semiconductor layer other than silicon. (3) The imaging device of (2), wherein the semiconductor layer other than silicon is a semiconductor layer containing an organic semiconductor material. (4) The imaging device of any one of (1) to (3), comprising: a memory unit provided for each of the aforementioned pixels, which accumulates the charge photoelectrically converted by the aforementioned photoelectric conversion unit; a first transmission transistor provided for each of the aforementioned pixels, which switches whether to accumulate the charge photoelectrically converted by the aforementioned photoelectric conversion unit in the memory unit; and a second transmission transistor provided for each of the aforementioned pixels, which switches whether to transmit the charge accumulated in the aforementioned memory unit to the aforementioned floating diffusion region. (5) The imaging device of (4), wherein the memory unit is disposed in the plurality of regions in the region where the photoelectric conversion unit is disposed. (6) The imaging device of (5), wherein the memory unit is disposed on the same layer as the photoelectric conversion unit, or disposed on a layer on which the layer where the photoelectric conversion unit is disposed is stacked. (7) The imaging device of (4), wherein the memory unit is disposed in the plurality of regions in a region different from the region where the analog-to-digital conversion unit is disposed. (8) The imaging device of (7), wherein the different regions have a wiring layer electrically connected to the floating diffusion region; and the memory unit is disposed on the same layer as the wiring layer. (9) The imaging device of any one of (1) to (8), wherein the analog-to-digital conversion unit comprises: a comparator that compares an analog signal corresponding to the charge with a reference signal; a comparison output processing unit that outputs the comparison result of the comparator; and a waveform shaping unit that shapes the waveform of the output signal of the comparison output processing unit; and the comparator, the comparison output processing unit and the waveform shaping unit are disposed in the same region among the plurality of regions.(10) An imaging device according to any one of (1) to (8), wherein the analog-to-digital conversion unit comprises: a comparator that compares an analog signal corresponding to the charge with a reference signal; a comparison output processing unit that outputs the comparison result of the comparator; and a waveform shaping unit that shapes the waveform of the output signal of the comparison output processing unit; and the comparator, the comparison output processing unit, and the waveform shaping unit are disposed in mutually different regions of the plurality of regions. (11) An imaging device according to any one of (1) to (8), wherein the analog-to-digital conversion unit comprises: a comparator that compares an analog signal corresponding to the charge with a reference signal; a comparison output processing unit that outputs the comparison result of the comparator; and a waveform shaping unit that shapes the waveform of the output signal of the comparison output processing unit; and the comparator, the comparison output processing unit, and the waveform shaping unit are disposed in mutually different regions of the plurality of regions. (12) The camera device of any one of (1) to (11) has: a first region for which the photoelectric conversion unit is disposed; and a second region for which at least a portion of the analog-to-digital conversion unit is disposed; and the signal transmission unit transmits and receives the charge of the floating diffusion region between the first region and the second region. (13) The imaging device of any one of (1) to (11), wherein the photoelectric conversion unit has: a first photoelectric conversion unit; and a second photoelectric conversion unit; and the floating diffusion region has: a first floating diffusion region that accumulates the charge photoelectrically converted by the first photoelectric conversion unit; and a second floating diffusion region that accumulates the charge photoelectrically converted by the second photoelectric conversion unit; and the plurality of regions have: a first region that is configured with the first photoelectric conversion unit; a second region that is configured with the second photoelectric conversion unit; and a third region that is configured with at least a portion of the analog-to-digital conversion unit; and the signal transmission unit has: a first signal transmission unit that transmits and receives the charge of the first floating diffusion region between the first region and the third region; and a second signal transmission unit that transmits and receives the charge of the second floating diffusion region between the second region and the third region. (14) The camera device of (13), wherein one of the first photoelectric conversion unit and the second photoelectric conversion unit has a silicon semiconductor layer, and the other of the first photoelectric conversion unit and the second photoelectric conversion unit has a semiconductor layer other than silicon.(15) The camera device as described in (13) or (14) includes: a first memory unit, which is provided according to the aforementioned pixels and accumulates the charge converted by the aforementioned first photoelectric conversion unit; and a second memory unit, which is provided according to the aforementioned pixels and accumulates the charge converted by the aforementioned second photoelectric conversion unit; wherein the aforementioned first memory unit is disposed in the aforementioned first region; the aforementioned second memory unit is disposed in the aforementioned second region; the aforementioned first floating diffusion region accumulates the charge corresponding to the charge stored in the aforementioned first memory unit; and the aforementioned second floating diffusion region accumulates the charge corresponding to the charge stored in the aforementioned second memory unit. (16) The imaging device of (13) or (14) includes a memory unit, which is arranged according to the above-mentioned pixels and accumulates the charge converted by either the first photoelectric conversion unit or the second photoelectric conversion unit; the memory unit is disposed in the second region; either the first floating diffusion region or the second floating diffusion region accumulates the charge corresponding to the charge stored in the memory unit, and the other of the first floating diffusion region and the second floating diffusion region accumulates the charge not stored in the memory unit but converted by either the first photoelectric conversion unit or the second photoelectric conversion unit. (17) The imaging device of (13) wherein both the first photoelectric conversion unit and the second photoelectric conversion unit have a silicon semiconductor layer or a semiconductor layer other than silicon. (18) The camera device of (17) includes: a first memory unit, which is provided with respect to each of the above-mentioned pixels and accumulates the charge converted by the first photoelectric conversion unit; and a second memory unit, which is provided with respect to each of the above-mentioned pixels and accumulates the charge converted by the second photoelectric conversion unit. (19) The camera device of (18) wherein at least one of the first memory unit and the second memory unit is provided to span the first region and the second region. (20) An electronic device comprising: a camera that outputs digital signals of each pixel after photoelectric conversion; and a signal processing unit that performs signal processing on the digital signals; wherein the camera includes: a plurality of pixels, each having a photoelectric conversion unit; an analog-to-digital converter that is provided in a region pixel that includes two or more of the aforementioned pixels, and converts a signal corresponding to the charge photoelectrically converted by the two or more pixels into the digital signal; a floating diffusion region that outputs the charge photoelectrically converted by the aforementioned photoelectric conversion units within the aforementioned pixels; a plurality of regions that are stacked on top of each other and are configured for the plurality of pixels, the plurality of aforementioned analog-to-digital converters, and the plurality of aforementioned floating diffusion regions; and a signal transmission unit that transmits and receives signals between the plurality of regions; wherein the region configured for the aforementioned photoelectric conversion unit is separated from the region configured for the aforementioned analog-to-digital converter. The aforementioned signal transmission unit transmits and receives charges from the aforementioned floating diffusion region between the region where the aforementioned photoelectric conversion unit is disposed and the region where the aforementioned analog-to-digital conversion unit is disposed.

[0274] The form of this disclosure is not limited to the above-described embodiments, but also includes various variations that can be conceived by those skilled in the art, and the effects of this disclosure are not limited to the above content. That is, various additions, changes or partial deletions can be made within the scope of the conceptual ideas and themes of this disclosure derived from the content defined in the claims and their equivalents. [Simplified Explanation of the Diagram]

[0028] Figure 1 is a diagram showing an example of the configuration of an imaging device according to one embodiment of the present technology. Figure 2 is a diagram showing an example of the configuration of a vertical drive unit according to one embodiment of the present technology. Figure 3 is a diagram showing an example of the configuration of a horizontal control unit according to one embodiment of the present technology. Figure 4A is a diagram showing an example of the configuration of a region pixel according to one embodiment of the present technology. Figure 4B is a block diagram showing a schematic configuration of a region pixel corresponding to a global shutter mode. Figure 5A is a diagram showing an example of the configuration of a photoelectric conversion unit according to one embodiment of the present technology. Figure 5B is a circuit diagram of a photoelectric conversion unit for a global shutter mode. Figure 6 is a diagram showing an example of the configuration of a comparison unit according to one embodiment of the present technology. Figure 7 is a diagram showing an example of the configuration of a comparison output processing unit according to one embodiment of the present technology. Figure 8 is a diagram showing an example of the configuration of a conversion result holding unit according to one embodiment of the present technology. Figure 9 is a diagram showing an example of the configuration of a time code transmission unit according to one embodiment of the present technology. Figure 10 is a timing diagram during the first frame of the imaging device disclosed herein. Figure 11 is a circuit diagram of the region pixel in Example 1. Figure 12 is a cross-sectional view of the region pixel in Example 1. Figure 13A is a top view in the direction of line AA in Figure 12. Figure 13B is a top view in the direction of line BB in Figure 12. Figure 14 is a circuit diagram of the region pixel in Example 2. Figure 15 is a cross-sectional view of the region pixel in Example 2. Figure 16A is a top view in the direction of line AA in Figure 15. Figure 16B is a top view in the direction of line BB in Figure 15. Figure 16C is a top view in the direction of line CC in Figure 15. Figure 17 is a circuit diagram of the region pixel in Example 3. Figure 18 is a cross-sectional view of the region pixel in Example 3. Figure 19A is a top view in the direction of line AA in Figure 18. Figure 19B is a top view in the direction of line BB in Figure 18. Figure 19C is a top view in the direction of line CC in Figure 18. Figure 20 is a diagram summarizing the features of the region pixels in Examples 1 to 3. Figure 21 is a circuit diagram of the region pixel in Example 4. Figure 22 is a cross-sectional view of the region pixel in Example 4. Figure 23A is a top view of Figure 22 along the AA line direction. Figure 23B is a top view of Figure 22 along the BB line direction. Figure 24 is a circuit diagram of the region pixel in Example 5. Figure 25 is a cross-sectional view of the region pixel in Example 5. Figure 26A is a top view of Figure 25 along the AA line direction. Figure 26B is a top view of Figure 25 along the BB line direction. Figure 26C is a top view of Figure 25 along the CC line direction. Figure 27 is a circuit diagram of the region pixel in Example 6. Figure 28 is a cross-sectional view of the region pixel in Example 6. Figure 29A is a top view of Figure 28 along the AA line direction. Figure 29B is a top view of Figure 28 along the BB line direction. Figure 29C is a top view of Figure 28 along the CC line direction. Figure 30 is a diagram summarizing the features of the region pixels in Examples 4 to 6. Figure 31 is a circuit diagram of the region pixel in Example 7. Figure 32 is a cross-sectional view of the region pixel in Example 7. Figure 33A is a top view along line AA in Figure 32.Figure 33B is a top view of Figure 32 along the BB line. Figure 33C is a top view of Figure 32 along the CC line. Figure 34 is a circuit diagram of the region pixel in Example 8. Figure 35 is a cross-sectional view of the region pixel in Example 8. Figure 36A is a top view of Figure 35 along the AA line. Figure 36B is a top view of Figure 35 along the BB line. Figure 36C is a top view of Figure 35 along the CC line. Figure 37 is a diagram summarizing the features of the region pixels in Examples 7 and 8. Figure 38 is a circuit diagram of the region pixel in Example 9. Figure 39 is a cross-sectional view of the region pixel in Example 9. Figure 40A is a top view of Figure 39 along the AA line. Figure 40B is a top view of Figure 39 along the BB line. Figure 40C is a top view of Figure 39 along the CC line. Figure 41 is a circuit diagram of the region pixel in Example 10. Figure 42 is a cross-sectional view of the region pixel in Example 10. Figure 43A is a top view along line AA of Figure 42. Figure 43B is a top view along line BB of Figure 42. Figure 43C is a top view along line CC of Figure 42. Figure 44 is a circuit diagram of the region pixel in Example 11. Figure 45 is a cross-sectional view of the region pixel in Example 11. Figure 46A is a top view along line AA of Figure 45. Figure 46B is a top view along line BB of Figure 45. Figure 46C is a top view along line CC of Figure 45. Figure 46D is a top view along line DD of Figure 45. Figure 47 is a diagram summarizing the features of the region pixels in Examples 9 to 11. Figure 48 is a circuit diagram of the region pixel in Example 12. Figure 49 is a cross-sectional view of the region pixel in Example 12. Figure 50A is a top view along line AA of Figure 49. Figure 50B is a top view along line BB of Figure 49. Figure 51 is a circuit diagram of the region pixel in Example 13. Figure 52 is a cross-sectional view of the region pixel in Example 13. Figure 53A is a top view of Figure 52 along the AA line direction. Figure 53B is a top view of Figure 52 along the BB line direction. Figure 53C is a top view of Figure 52 along the CC line direction. Figure 54 is a circuit diagram of the region pixel in Example 14. Figure 55 is a cross-sectional view of the region pixel in Example 14. Figure 56A is a top view of Figure 55 along the AA line direction. Figure 56B is a top view of Figure 55 along the BB line direction. Figure 56C is a top view of Figure 55 along the CC line direction. Figure 57 is a diagram summarizing the features of the region pixels in Examples 12 to 14. Figure 58 is a circuit diagram of the region pixel in Example 15. Figure 59 is a cross-sectional view of the region pixel in Example 15. Figure 60A is a top view of Figure 59 along the AA line direction. Figure 60B is a top view of Figure 59 along the BB line direction. Figure 60C is a top view of Figure 59 along the CC line direction. Figure 61 is the circuit diagram of the region pixel in Example 16. Figure 62 is a cross-sectional view of the region pixel in Example 16. Figure 63A is a top view along line AA in Figure 62.Figure 63B is a top view of Figure 62 along the BB line. Figure 63C is a top view of Figure 62 along the CC line. Figure 63D is a top view of Figure 62 along the DD line. Figure 64 is a circuit diagram of the region pixel in Example 17. Figure 65 is a cross-sectional view of the region pixel in Example 17. Figure 66A is a top view of Figure 65 along the AA line. Figure 66B is a top view of Figure 65 along the BB line. Figure 66C is a top view of Figure 65 along the CC line. Figure 66D is a top view of Figure 65 along the DD line. Figure 67 is a diagram summarizing the features of the region pixels in Examples 15 to 17. Figure 68 is a circuit diagram of the region pixel in Example 18. Figure 69 is a cross-sectional view of the region pixel in Example 18. Figure 70A is a top view of Figure 69 along the AA line. Figure 70B is a top view of Figure 69 along the BB line. Figure 71 is a circuit diagram of the region pixel in Example 19. Figure 72 is a cross-sectional view of the region pixel in Example 19. Figure 73A is a top view of Figure 72 along the AA line direction. Figure 73B is a top view of Figure 72 along the BB line direction. Figure 73C is a top view of Figure 72 along the CC line direction. Figure 74 is a circuit diagram of the region pixel in Example 20. Figure 75 is a cross-sectional view of the region pixel in Example 20. Figure 76A is a top view of Figure 75 along the AA line direction. Figure 76B is a top view of Figure 75 along the BB line direction. Figure 76C is a top view of Figure 75 along the CC line direction. Figure 77 is a diagram summarizing the features of the region pixels in Examples 18 to 20. Figure 78 is a circuit diagram of the region pixel in Example 21. Figure 79 is a cross-sectional view of the region pixel in Example 21. Figure 80A is a top view of Figure 79 along the AA line direction. Figure 80B is a top view of Figure 79 along the BB line direction. Figure 80C is a top view of Figure 79 along the CC line direction. Figure 81 is a circuit diagram of the region pixel in Example 22. Figure 82 is a cross-sectional view of the region pixel in Example 22. Figure 83A is a top view of Figure 82 along the AA line direction. Figure 83B is a top view of Figure 82 along the BB line direction. Figure 83C is a top view of Figure 82 along the CC line direction. Figure 84 is a circuit diagram of the region pixel in Example 23. Figure 85 is a cross-sectional view of the region pixel in Example 23. Figure 86A is a top view of Figure 85 along the AA line direction. Figure 86B is a top view of Figure 85 along the BB line direction. Figure 86C is a top view of Figure 85 along the CC line direction. Figure 87 is a diagram summarizing the features of the region pixels in Examples 21 to 23. Figure 88 is a circuit diagram of the region pixel in Example 24. Figure 89 is a cross-sectional view of the region pixel in Example 24. Figure 90A is a top view of Figure 89 along the AA line direction. Figure 90B is a top view of Figure 89 along the BB line direction. Figure 90C is a top view of the CC line direction in Figure 89. Figure 91 is a circuit diagram of the region pixel in Example 25. Figure 92 is a cross-sectional view of the region pixel in Example 25.Figure 93A is a top view along line AA of Figure 92. Figure 93B is a top view along line BB of Figure 92. Figure 93C is a top view along line CC of Figure 92. Figure 94 is a diagram summarizing the features of the region pixels in examples 24 and 25. Figure 95 is a circuit diagram of the region pixels in example 23. Figure 96 is a cross-sectional view of the region pixels in example 23. Figure 97A is a top view along line AA of Figure 96. Figure 97B is a top view along line BB of Figure 96. Figure 97C is a top view along line CC of Figure 96. Figure 98 is a circuit diagram of the region pixels in example 27. Figure 99 is a cross-sectional view of the region pixels in example 27. Figure 100A is a top view along line AA of Figure 99. Figure 100B is a top view along line BB of Figure 99. Figure 100C is a top view along line CC of Figure 99. Figure 101 is a circuit diagram of the region pixels in example 28. Figure 102 is a cross-sectional view of the region pixels in Example 28. Figure 103A is a top view along line AA in Figure 99. Figure 103B is a top view along line BB in Figure 99. Figure 103C is a top view along line CC in Figure 99. Figure 103D is a top view along line DD in Figure 102. Figure 104 is a diagram summarizing the features of the region pixels in Examples 26 to 28. Figure 105 is a circuit diagram showing the comparison result output signal in the AD conversion unit. Figure 106 is a block diagram showing an example of the general structure of a vehicle control system. Figure 107 is an explanatory diagram showing an example of the installation positions of the vehicle exterior information detection unit and the camera unit.

Claims

1. A camera device comprising: a plurality of pixels, each having a first photoelectric conversion unit; an analog-to-digital conversion unit, configured in a region pixel that includes two or more of the aforementioned pixels, converting a signal corresponding to a charge photoelectrically converted by the two or more pixels into a digital signal; a first floating diffusion region that outputs the charge photoelectrically converted by the first photoelectric conversion unit within the aforementioned pixels; a plurality of regions, stacked on top of each other, and configured with the plurality of the aforementioned first photoelectric conversion units, the plurality of the aforementioned analog-to-digital conversion units, and the plurality of the aforementioned first floating diffusion regions within the plurality of pixels; and a first signal transmission unit that transmits and receives signals between the plurality of regions; wherein the region configured with the plurality of first photoelectric conversion units and the region configured with the aforementioned analog-to-digital conversion unit are separately provided among the plurality of regions; The region where the plurality of first photoelectric conversion units are configured within the aforementioned pixel area and the region where the aforementioned analog-to-digital conversion unit is configured transmit and receive charges of the plurality of first floating diffusion regions via the same first signal transmission unit; each of the plurality of pixels has: a second photoelectric conversion unit; and a second floating diffusion region storing charges photoelectrically converted by the second photoelectric conversion unit; the plurality of regions have: a first region configured with the first photoelectric conversion unit; a second region configured with the second photoelectric conversion unit; and a third region configured with at least a portion of the aforementioned analog-to-digital conversion unit; and each of the plurality of pixels has: a second signal transmission unit that transmits and receives charges of the second floating diffusion region between the second region and the third region.

2. The camera device of claim 1, wherein the first photoelectric conversion unit has a silicon semiconductor layer or a semiconductor layer other than silicon.

3. The camera device of claim 2, wherein the semiconductor layer other than silicon is a semiconductor layer containing organic semiconductor material.

4. The imaging device according to claim 1, comprising: a memory unit configured according to the aforementioned pixels, which accumulates the charge converted by the first photoelectric conversion unit; a first transmission transistor configured according to the aforementioned pixels, which switches whether to accumulate the charge converted by the first photoelectric conversion unit in the memory unit; and a second transmission transistor configured according to the aforementioned pixels, which switches whether to transfer the charge accumulated in the memory unit to the first floating diffusion region.

5. The camera device of claim 4, wherein the memory unit is disposed in the plurality of regions, and the region in which the first photoelectric conversion unit is disposed is located.

6. The camera device of claim 5, wherein the memory unit is disposed on the same layer as the first photoelectric conversion unit, or disposed on a layer on which the layer for which the first photoelectric conversion unit is disposed is stacked.

7. The camera device of claim 5, wherein the memory unit is disposed in the plurality of regions, in a region different from the region in which the analog-to-digital conversion unit is disposed.

8. The imaging device of claim 7, wherein the aforementioned different regions have a wiring layer electrically connected to the aforementioned first floating diffusion region; the aforementioned memory unit is disposed on the same layer as the aforementioned wiring layer.

9. The imaging apparatus of claim 1, wherein the analog-to-digital conversion unit comprises: a comparator that compares an analog signal corresponding to the charge with a reference signal; a comparison output processing unit that amplifies and levels the comparison result signal output from the comparator and outputs the processed comparison result of the comparator; and a waveform shaping unit that shapes the waveform of the output signal of the processed comparison output result into a sharp transitioning signal; and wherein the comparator, the comparison output processing unit, and the waveform shaping unit are disposed in the same region among the plurality of regions.

10. The imaging apparatus of claim 1, wherein the analog-to-digital conversion unit comprises: a comparator that compares an analog signal corresponding to the charge with a reference signal; a comparison output processing unit that amplifies and levels the comparison result signal output from the comparator and outputs the processed comparison result of the comparator; and a waveform shaping unit that shapes the waveform of the output signal of the processed comparison output result into a rapid transition signal; wherein the comparator, the comparison output processing unit, and the waveform shaping unit are disposed in mutually different regions among the plurality of regions.

11. The imaging apparatus of claim 1, wherein the analog-to-digital conversion unit comprises: a comparator that compares an analog signal corresponding to the charge with a reference signal; a comparison output processing unit that amplifies and levels-converts the comparison result signal output from the comparator and outputs the processed comparison result of the comparator; and a waveform shaping unit that shapes the waveform of the output signal of the processed comparison output result into a rapid transition signal; wherein the comparator, the comparison output processing unit, and the waveform shaping unit are disposed in mutually different regions among the plurality of regions.

12. The imaging device of claim 1, comprising: a first region for which the first photoelectric conversion unit is disposed; and a third region for which at least a portion of the analog-to-digital conversion unit is disposed; and the first signal transmission unit transmitting and receiving charge of the first floating diffusion region between the first region and the second region.

13. The imaging device of claim 1, wherein one of the first photoelectric conversion unit and the second photoelectric conversion unit has a silicon semiconductor layer, and the other of the first photoelectric conversion unit and the second photoelectric conversion unit has a semiconductor layer other than silicon.

14. The imaging apparatus of claim 1, comprising: a first memory unit, configured for each pixel, accumulating charge converted by the first photoelectric conversion unit; and a second memory unit, configured for each pixel, accumulating charge converted by the second photoelectric conversion unit; wherein the first memory unit is disposed in the first region; the second memory unit is disposed in the second region; a first floating diffusion region accumulates charge corresponding to the charge stored in the first memory unit; and a second floating diffusion region accumulates charge corresponding to the charge stored in the second memory unit.

15. The imaging apparatus of claim 1, comprising: a memory unit configured according to the aforementioned pixels, which accumulates charge photoelectrically converted by either the first photoelectric conversion unit or the second photoelectric conversion unit; the memory unit being disposed in the second region; either the first floating diffusion region or the second floating diffusion region accumulating charge corresponding to the charge stored in the memory unit, and the other of the first floating diffusion region or the second floating diffusion region accumulating charge not stored in the memory unit but photoelectrically converted by either the first photoelectric conversion unit or the second photoelectric conversion unit.

16. The imaging device of claim 1, wherein both the first photoelectric conversion unit and the second photoelectric conversion unit have a silicon semiconductor layer, or a semiconductor layer other than silicon.

17. The imaging device of claim 16, comprising: a first memory unit configured according to the aforementioned pixels, which accumulates the charge converted by the aforementioned first photoelectric conversion unit; and a second memory unit configured according to the aforementioned pixels, which accumulates the charge converted by the aforementioned second photoelectric conversion unit.

18. The camera device of claim 17, wherein at least one of the first memory unit and the second memory unit is disposed across the first region and the second region.

19. An electronic machine comprising: a camera device according to any one of claims 1 to 18, which outputs digital signals of each pixel after photoelectric conversion; and a signal processing unit that performs signal processing on the digital signals.

Images