Semiconductor devices and driving methods for semiconductor devices

Abstract

A novel semiconductor device and a driving method for the semiconductor device are provided. One embodiment of the invention provides a semiconductor device and a driving method for the semiconductor device. The semiconductor device includes first and second transistors, first to fifth switches, first to third capacitors, and a display element. The first transistor includes a back gate, the gate of which is electrically connected to a first switch. A second switch and a first capacitor are included between the gate and source of the first transistor. The back gate of the first transistor is electrically connected to a third switch. A second capacitor is included between the back gate and source of the first transistor. The source of the first transistor is electrically connected to a fourth switch and the drain of the second transistor. The gate of the second transistor is electrically connected to a fifth switch. A third capacitor is included between the gate and source of the second transistor. The source of the second transistor is electrically connected to the display element.

Description

[Technical Field]

[0001] One embodiment of the present invention relates to a semiconductor device and a method for driving the semiconductor device.

[0002] Note that one embodiment of the present invention is not limited to the above-described technical field. Examples of technical fields for one embodiment of the present invention disclosed in this specification include semiconductor devices, display devices, light-emitting devices, energy storage devices, memory devices, electronic devices, lighting equipment, input devices, input / output devices, driving methods thereof, or manufacturing methods thereof.

[0003] In this specification, etc., a semiconductor device refers to a device that utilizes the characteristics of a semiconductor, such as a circuit that includes semiconductor elements (e.g., transistors, diodes, photodiodes, etc.) or a device that includes such a circuit. Furthermore, a semiconductor device refers to all devices capable of functioning by utilizing the characteristics of a semiconductor. Examples of semiconductor devices include integrated circuits, wafers including integrated circuits, or electronic components in which a wafer is housed in a package. Additionally, memory devices, display devices, light-emitting devices, lighting equipment, or electronic devices are themselves semiconductor devices, and sometimes include semiconductor devices. [Previous Technology]

[0004] For example, there is a demand for display devices that can be applied to XR such as VR (virtual reality) or AR (augmented reality). Specifically, for example, in order to improve the sense of realism and immersion, the display device is required to have high resolution and high color reproduction.

[0005] For example, a liquid crystal display device, a light-emitting device including an organic EL (Electro Luminescence) element or a light-emitting diode (LED) or the like can be used in the display device.

[0006] For example, the basic structure of an organic EL element is a structure in which a layer containing a luminescent organic compound is sandwiched between a pair of electrodes. By applying a voltage to the element, light emission from the luminescent organic compound can be obtained. Since display devices using the above-mentioned organic EL elements do not require a backlight source as needed for liquid crystal display devices, thin, lightweight, high-contrast, and low-power display devices can be realized. In addition, because organic EL elements have a fast response speed, display devices suitable for displaying fast-moving images can be realized. For example, Patent Document 1 discloses an example of a display device using an organic EL element.

[0007] In addition, Patent Document 2 discloses a circuit structure in which the critical voltage unevenness of the transistor is corrected for each pixel in the pixel circuit that controls the light emission brightness of the organic EL element, thereby improving the display quality of the display device.

[0008] [Patent Document 1] Japanese Patent Application Publication No. 2002-324673 [Patent Document 2] Japanese Patent Application Publication No. 2015-132816 [Summary of the Invention]

[0009] On the other hand, depending on the structure of the organic EL element, driving the organic EL element sometimes requires a high voltage. To drive such an organic EL element, a power supply is needed to generate a high voltage. Furthermore, the current flowing through the organic EL element is controlled, for example, by the driving transistors. Because the driving transistors are arranged for each pixel, if the threshold voltages of each driving transistor are uneven, the display quality of the display device including the organic EL element may sometimes degrade. As a means to improve the display quality of the display device, for example, a correction period can be set during the driving period of the display device to correct for unevenness in the threshold voltages of each transistor included in each pixel.

[0010] One objective of one embodiment of the present invention is to provide a semiconductor device or display device that achieves miniaturization. Another objective of one embodiment of the present invention is to provide a semiconductor device or display device that improves display quality. Another objective of one embodiment of the present invention is to provide a semiconductor device or display device that achieves high color reproduction. Another objective of one embodiment of the present invention is to provide a high-definition semiconductor device or display device. Another objective of one embodiment of the present invention is to provide a semiconductor device or display device with high reliability. Another objective of one embodiment of the present invention is to provide a semiconductor device or display device with reduced power consumption. Another objective of one embodiment of the present invention is to provide a novel semiconductor device or display device.

[0011] Note that the description of these objectives does not preclude the existence of other objectives. Note that one embodiment of the present invention does not need to achieve all of the above objectives. In addition, objectives other than those described above can be derived from the description in the specification, drawings, claims, etc.

[0012] (1) One embodiment of the present invention is a semiconductor device including a first and a second transistor, a first to a fifth switch, a first to a third capacitor and a display element, wherein the first transistor includes a back gate, the gate of the first transistor is electrically connected to the first switch, a second switch and a first capacitor are included between the gate of the first transistor and the source of the first transistor, the back gate of the first transistor is electrically connected to the third switch, a second capacitor is included between the back gate of the first transistor and the source of the first transistor, the source of the first transistor is electrically connected to the fourth switch and the drain of the second transistor, the gate of the second transistor is electrically connected to the fifth switch, a third capacitor is included between the gate of the second transistor and the source of the second transistor, and the source of the second transistor is electrically connected to the display element.

[0013] (2) In addition, in the above (1), the first switch may also have the function of making the first wiring and the gate of the first transistor in a conducting state or a non-conducting state, the second switch may also have the function of making the gate of the first transistor and the source of the first transistor in a conducting state or a non-conducting state, the third switch may also have the function of making the second wiring and the back gate of the first transistor in a conducting state or a non-conducting state, the fourth switch may also have the function of making the third wiring and the source of the first transistor in a conducting state or a non-conducting state, and the fifth switch may also have the function of making the fourth wiring and the gate of the second transistor in a conducting state or a non-conducting state.

[0014] (3) In addition, in the above (1) or (2), the first to fifth switches may each be a transistor.

[0015] (4) In addition, in any one of (1) to (3) above, at least one of the first transistor and the second transistor preferably contains a metal oxide in the semiconductor layer forming the channel.

[0016] (5) In addition, in the above (4), the metal oxide preferably includes at least one of indium and zinc.

[0017] (6) In addition, in any of the above (1) to (5), the display element may, for example, be an organic EL element in a series structure.

[0018] (7) One embodiment of the present invention is a driving method for a semiconductor device, the semiconductor device including a first and a second transistor, a first to a fifth switch, a first to a third capacitor, and a display element, wherein the first transistor includes a back gate, the gate of the first transistor is electrically connected to a first switch, a second switch and a first capacitor are included between the gate and the source of the first transistor, the back gate of the first transistor is electrically connected to a third switch, a second capacitor is included between the back gate and the source of the first transistor, the source of the first transistor is electrically connected to a fourth switch and the drain of the second transistor, the gate of the second transistor is electrically connected to a fifth switch, a third capacitor is included between the gate and the source of the second transistor, and the source of the second transistor is electrically connected to the display element. The driving method for the semiconductor device includes a first to a fourth process, wherein, in the first process, the first transistor is... A potential is supplied to the source of the first transistor via a fourth switch and to the gate of the first transistor via a second switch. A second potential, which is higher than the first potential, is supplied to the back gate of the first transistor via a third switch. In the second process, a third potential is supplied to the gate of the first transistor via a first switch and a first potential is supplied to the source of the first transistor via a fourth switch. In the third process, a potential that puts the second transistor in a conducting state is supplied to the gate of the second transistor via a fifth switch. In the fourth process, a potential that puts the second transistor in a non-conducting state is supplied to the gate of the second transistor via a fifth switch. The first process begins after the fourth process begins, the third process begins after the fourth process ends, the first process ends before the third process begins, the second process begins after the first process ends, and the fourth process begins after both the second and third processes end.

[0019] (8) In addition, in the above (7), the first switch may also have the function of making the first wiring and the gate of the first transistor in a conducting state or a non-conducting state, the second switch may also have the function of making the gate of the first transistor and the source of the first transistor in a conducting state or a non-conducting state, the third switch may also have the function of making the second wiring and the back gate of the first transistor in a conducting state or a non-conducting state, the fourth switch may also have the function of making the third wiring and the source of the first transistor in a conducting state or a non-conducting state, and the fifth switch may also have the function of making the fourth wiring and the gate of the second transistor in a conducting state or a non-conducting state.

[0020] (9) In addition, in the above (7) or (8), the first to fifth switches may each be transistors.

[0021] (10) In addition, in any of the above (7) to (9), at least one of the first transistor and the second transistor preferably contains a metal oxide in the semiconductor layer forming the channel.

[0022] (11) In addition, in the above (10), the metal oxide preferably includes at least one of indium and zinc.

[0023] (12) In addition, in any of the above (7) to (11), the display element may, for example, be an organic EL element in a series structure.

[0024] (13) One embodiment of the present invention is a driving method for a semiconductor device, the semiconductor device including a transistor, a switch and a signal line, wherein the source of the transistor is electrically connected to a terminal of the switch, the driving method for the semiconductor device includes a first to a fourth process, wherein in the first process, a first potential is supplied to the source of the transistor and to the gate of the transistor; in the second process, the first potential is supplied to the source of the transistor and the potential of the signal line is supplied to the gate of the transistor; in the third process, the switch is turned on; in the fourth process, the switch is turned off; after the fourth process begins, the potential of the signal line is compared with the first potential; if the potential of the signal line is equal to the first potential, the following process is performed: the first process begins; the first process ends before the third process begins; and the second process begins after the first process ends; if the potential of the signal line is not equal to the first potential, the following process is performed: the second process begins; the third process begins after the fourth process ends; and the fourth process begins after the second process ends and the third process ends.

[0025] (14) One embodiment of the present invention is a driving method for a semiconductor device, the semiconductor device including a transistor, a switch and a signal line, wherein the source of the transistor is electrically connected to a terminal of the switch, the driving method for the semiconductor device includes a first to a fourth process, wherein in the first process, a first potential is supplied to the source of the transistor and to the gate of the transistor, and a potential equal to the first potential is supplied to the signal line; in the second process, the first potential is supplied to the source of the transistor and the potential of the signal line is supplied to the gate of the transistor; in the third process, the switch is turned on; in the fourth process, the switch is turned off; the first process begins after the fourth process begins; the first process ends before the third process begins; the second process begins after the first process ends; the third process begins after the fourth process ends; and the fourth process begins after the second process ends and the third process ends.

[0026] (15) One embodiment of the present invention is a driving method for a semiconductor device, the semiconductor device including a transistor, a switch and a signal line, wherein the source of the transistor is electrically connected to a terminal of the switch, the driving method for the semiconductor device includes a first to a fourth process, wherein in the first process, a first potential is supplied to the source of the transistor and to the gate of the transistor, so that the signal line is in a floating state; in the second process, the first potential is supplied to the source of the transistor and the potential of the signal line is supplied to the gate of the transistor; in the third process, the switch is in a conducting state; in the fourth process, the switch is in a non-conducting state; the first process begins after the fourth process begins; the first process ends before the third process begins; the second process begins after the first process ends; the third process begins after the fourth process ends; and the fourth process begins after the second process ends and the third process ends.

[0027] According to one embodiment of the present invention, a semiconductor device or display device that achieves miniaturization can be provided. Furthermore, according to one embodiment of the present invention, a semiconductor device or display device that improves display quality can be provided. Furthermore, according to one embodiment of the present invention, a semiconductor device or display device that achieves high color reproduction can be provided. Furthermore, according to one embodiment of the present invention, a high-definition semiconductor device or display device can be provided. Furthermore, according to one embodiment of the present invention, a semiconductor device or display device with high reliability can be provided. Furthermore, according to one embodiment of the present invention, a semiconductor device or display device with reduced power consumption can be provided. Furthermore, according to one embodiment of the present invention, a novel semiconductor device or display device can be provided.

[0028] Note that the description of these effects does not preclude the existence of other effects. Note that one embodiment of the present invention does not need to have all the above-described effects. In addition, effects other than those described above can be derived from the description in the specification, drawings, claims, etc.

Implementation Method

[0030] Hereinafter, embodiments will be described with reference to the drawings. Note that the embodiments can be implemented in many different forms. Therefore, those skilled in the art will readily understand that the manner and details can be varied in many ways without departing from its spirit and scope. Therefore, the present invention should not be construed as being limited to the contents described in the following embodiments.

[0031] Furthermore, in this specification, when it is stated as "X and Y are connected," it means that the following situations are disclosed in this specification: X and Y are electrically connected; X and Y are functionally connected; and X and Y are directly connected. Therefore, the connection relationship is not limited to that shown in the drawings or text; other connection relationships are also described within the scope of the drawings or text. X and Y are both objects (e.g., devices, components, circuits, wiring, electrodes, terminals, conductive films or layers, etc.).

[0032] As an example of the case where X and Y are electrically connected, more than one element capable of electrically connecting X and Y (e.g., switch, transistor, capacitor, inductor, resistor, diode, display device, light-emitting device or load, etc.) can be connected between X and Y.

[0033] As an example of a case where X and Y are functionally connected, one or more circuits capable of functionally connecting X and Y (e.g., logic circuits (e.g., inverters, NAND circuits, or NOR circuits), signal conversion circuits (e.g., digital-to-analog converters, analog-to-digital converters, or gamma correction circuits), potential level conversion circuits (e.g., power supply circuits (e.g., boost circuits or buck circuits) or level transfer circuits that change the potential level of a signal), voltage sources, current sources, switching circuits, amplification circuits (e.g., circuits that can increase signal amplitude or current, operational amplifiers, differential amplifiers, source follower circuits, or buffer circuits), signal generation circuits, memory circuits, or control circuits, etc.) can be connected between X and Y. Note that, for example, even if other circuits are sandwiched between X and Y, when the signal output from X is transmitted to Y, it can be said that X and Y are functionally connected.

[0034] Furthermore, when it is explicitly stated as “X and Y are electrically connected”, it includes the following cases: X and Y are electrically connected (in other words, X and Y are connected in a way that includes other components or other circuits); and X and Y are directly connected (in other words, X and Y are connected in a way that does not include other components or other circuits).

[0035] For example, it can be expressed as "X, Y, the source (or first terminal, etc.) of the transistor and the drain (or second terminal, etc.) of the transistor are electrically connected to each other, and X, the source (or first terminal, etc.) of the transistor, the drain (or second terminal, etc.) of the transistor and Y are electrically connected in sequence." Or, it can be expressed as "The source (or first terminal, etc.) of the transistor is electrically connected to X, the drain (or second terminal, etc.) of the transistor is electrically connected to Y, and X, the source (or first terminal, etc.) of the transistor, the drain (or second terminal, etc.) of the transistor and Y are electrically connected in sequence." Or, it can be expressed as "X is electrically connected to Y via the source (or first terminal, etc.) and the drain (or second terminal, etc.) of the transistor, and X, the source (or first terminal, etc.) of the transistor, the drain (or second terminal, etc.) of the transistor and Y are arranged in sequence." By specifying the connection order in the circuit structure using the same expression as in this example, the source (or first terminal, etc.) and drain (or second terminal, etc.) of the transistor can be distinguished, thus determining the scope of the technology. Note that this expression is an example and is not limited to the expression described above. Here, X and Y are both objects (e.g., devices, components, circuits, wiring, electrodes, terminals, conductive films or layers, etc.).

[0036] Furthermore, even when components that are independent on a circuit diagram are electrically connected to each other, sometimes one component performs the function of multiple components. For example, when a portion of a wiring is used as an electrode, a conductive film performs the function of both the wiring and the electrode. Therefore, the scope of "electrical connection" in this specification also includes such cases where a conductive film performs the function of multiple components.

[0037] In this specification, etc., a "capacitor element" may include, for example, a circuit element having an electrostatic capacitance value higher than 0F, a region of wiring having an electrostatic capacitance value higher than 0F, parasitic capacitance, or gate capacitance of a transistor. Therefore, in this specification, etc., a "capacitor element" is not limited to a circuit element comprising a pair of electrodes and a dielectric between the electrodes. A "capacitor element" may include, for example, parasitic capacitance generated between wirings or gate capacitance generated between one of the source and drain electrodes of a transistor and the gate. Furthermore, for example, "capacitor element," "parasitic capacitance," or "gate capacitance" may be referred to as a "capacitor." Conversely, for example, a "capacitor" may be referred to as a "capacitor element," "parasitic capacitance," or "gate capacitance." Furthermore, for example, a "pair of electrodes" of a "capacitor" may be referred to as a "pair of conductors," a "pair of conductive regions," or a "pair of regions." The electrostatic capacitance value may, for example, be 0.05fF or more and 10pF or less. Furthermore, for example, it may be 1pF or more and 10μF or less.

[0038] In this specification, a transistor includes three terminals: a gate, a source, and a drain. The gate is used as a control terminal to control the amount of current flowing between the source and drain. The two terminals used as the source or drain are the input and output terminals of the transistor. Depending on the transistor's conductivity type (n-channel or p-channel) and the potential applied to the three terminals of the transistor, one of the two input and output terminals is used as the source and the other as the drain. Therefore, in this specification, "source" and "drain" can be interchanged. In this specification, when describing the connection relationship of the transistor, the expressions "one of the source and drain" (first electrode or first terminal) or "the other of the source and drain" (second electrode or second terminal) are used. Furthermore, depending on the structure of the transistor, sometimes a back gate is included in addition to the above three terminals. In this case, in this specification, sometimes one of the transistor's gate and back gate is referred to as the first gate, and the other of the transistor's gate and back gate is referred to as the second gate. Furthermore, in the same transistor, the "gate" and "back gate" can sometimes be interchanged. In addition, when a transistor includes three or more gates, in this specification, etc., each gate is sometimes referred to as the first gate, the second gate, or the third gate, etc.

[0039] Furthermore, in this specification, etc., "node" may be referred to as "terminal", "wiring", "electrode", "conductive layer", "conductor" or "impurity region" depending on the circuit structure or device structure. In addition, for example, "terminal" or "wiring" may be referred to as "node".

[0040] Furthermore, in this specification, ordinal numbers such as "first," "second," or "third" are added to avoid confusion regarding the components. Therefore, these ordinal numbers do not limit the number of components. Furthermore, these ordinal numbers do not limit the order of the components. For example, a component labeled "first" in one embodiment of this specification may be labeled "second" in other embodiments or claims. Furthermore, for example, a component referred to by "first" in one embodiment may be omitted in other embodiments or claims.

[0041] Furthermore, in this specification and the like, for convenience, terms such as "upper," "lower," "above," or "below" are sometimes used to indicate the arrangement of components in order to illustrate the positional relationship of the components with reference to the diagram. Moreover, the positional relationship of the components may be appropriately changed depending on the direction in which each structure is described. Therefore, the terms indicating the arrangement described in this specification and the like are not limited to those used in this specification, and may be appropriately replaced as needed. For example, in the description "insulator located on the top surface of a conductor," by rotating the direction of the diagram shown by 180 degrees, it can also be referred to as "insulator located on the bottom surface of a conductor."

[0042] Furthermore, terms such as "above" or "below" are not limited to situations where the components are positioned "directly above" or "directly below" and in direct contact. For example, the statement "electrode B on insulating layer A" does not necessarily mean that electrode B is formed in direct contact on insulating layer A, and may also include situations where other components are included between insulating layer A and electrode B.

[0043] Furthermore, in this specification and the like, terms such as "overlapping" are not limited to the state of the stacking order of components. For example, the statement "electrode B overlapping with insulating layer A" does not necessarily mean that electrode B is formed on insulating layer A. The statement "electrode B overlapping with insulating layer A" may, for example, include a state in which electrode B is formed under insulating layer A or a state in which electrode B is formed on the right (or left) side of insulating layer A.

[0044] Furthermore, in this specification and the like, terms such as "adjacent" or "close" are not limited to cases where components are in direct contact. For example, the statement "electrode B adjacent to insulating layer A" does not necessarily mean that insulating layer A and electrode B are formed in direct contact; it may also include cases where other components are included between insulating layer A and electrode B.

[0045] Furthermore, in this specification and the like, depending on the circumstances, terms such as "film" or "layer" may sometimes be interchanged. For example, "conductive layer" may sometimes be changed to "conductive film." For example, "insulating film" may sometimes be changed to "insulating layer." Furthermore, depending on the circumstances, other terms may sometimes be used instead of terms such as "film" or "layer." For example, "conductive layer" or "conductive film" may sometimes be changed to "conductive body." Furthermore, "conductive body" may sometimes be changed to "conductive layer" or "conductive film." For example, "insulating layer" or "insulating film" may sometimes be changed to "insulator." Furthermore, "insulator" may sometimes be changed to "insulating layer" or "insulating film."

[0046] Note that in this specification, terms such as "electrode," "wiring," or "terminal" do not functionally limit the components. For example, sometimes "electrode" is used as part of "wiring," and vice versa. Furthermore, "electrode" or "wiring" may also include cases where multiple "electrodes" or "wiring" are formed as one unit. Additionally, for example, sometimes "terminal" is used as part of "wiring" or "electrode," and vice versa. Furthermore, the term "terminal" may also include cases where multiple "electrodes," "wiring," or "terminals" are formed as one unit. Therefore, for example, an "electrode" may be part of a "wiring" or "terminal." Furthermore, for example, a "terminal" may be part of a "wiring" or "electrode." Furthermore, for example, terms such as "electrode," "wiring," or "terminal" may sometimes be replaced with terms such as "area."

[0047] In this specification, for example, depending on the situation, terms such as "wiring," "signal line," or "power line" may be interchanged. For example, "wiring" may sometimes be changed to "signal line." Furthermore, for example, "wiring" may sometimes be changed to "power line." Conversely, for example, "signal line" or "power line" may sometimes be changed to "wiring." Furthermore, for example, "power line" may sometimes be changed to "signal line." Conversely, for example, "signal line" may sometimes be changed to "power line." Furthermore, depending on the situation, for example, "potential" applied to the wiring may be changed to "signal." Conversely, for example, "signal" may sometimes be changed to "potential."

[0048] Furthermore, in this specification and the like, a "switch" includes multiple terminals and has the function of switching (selecting) the conduction or non-conduction between the terminals. For example, when the switch includes two terminals and the two terminals are conductive, the switch is in a "conducting state" or an "on state". Conversely, when the two terminals are not conductive, the switch is in a "non-conducting state" or a "closed state". Note that "the switch is switched to one of the conducting state and the non-conducting state" or "the switch maintains one of the conducting state and the non-conducting state" is sometimes referred to as "controlling the conducting state".

[0049] In other words, a switch is a component that controls whether current flows through it. Alternatively, a switch is a component that selects and switches the current path. For example, an electrical switch or a mechanical switch can be used as a switch. In other words, a switch is not limited to a specific component as long as it can control current.

[0050] As an example of a switch, there are transistors (such as bipolar transistors or MOS (Metal Oxide Semiconductor) transistors), diodes (such as PN diodes, PIN diodes, Schottky diodes, metal-insulator-metal (MIM) diodes, metal-insulator-semiconductor (MIS) diodes, or diode-connected transistors), or logic circuits combining these components. When a transistor is used as a switch, the "on state" or "turn-on state" of the transistor refers to the state in which the source electrode and drain electrode of the transistor are electrically short-circuited. Conversely, the "off state" or "turn-off state" of the transistor refers to the state in which the source electrode and drain electrode of the transistor are electrically disconnected. When a transistor is used only as a switch, there are no particular restrictions on the polarity (conductivity type) of the transistor.

[0051] As an example of a mechanical switch, a switch utilizing MEMS (Micro-Electro-Mechanical Systems) technology can be cited. This switch has a mechanically movable electrode, and the on or off state is selected by moving the electrode.

[0052] In this specification, "parallel" means a state in which the angle formed by two straight lines is -10° or more and less than 10°. Therefore, it also includes a state in which the angle is -5° or more and less than 5°. "Approximately parallel" means a state in which the angle formed by two straight lines is -30° or more and less than 30°. Furthermore, "perpendicular" means a state in which the angle formed by two straight lines is 80° or more and less than 100°. Therefore, it also includes a state in which the angle is 85° or more and less than 95°. "Approximately perpendicular" means a state in which the angle formed by two straight lines is 60° or more and less than 120°.

[0053] Furthermore, in this specification and the like, unless otherwise stated, when referring to count values ​​and measurement values, such as “same,” “identical,” “equal,” or “uniform” (including their synonyms), they include an error of ±20%.

[0054] The embodiments described in this specification are illustrated with reference to the drawings. Note that the embodiments can be implemented in many different forms. Therefore, those skilled in the art can easily understand that the manner and details can be varied in many ways without departing from its spirit and scope. Therefore, the present invention should not be construed as limited to the contents described in the embodiments. Note that, regarding the drawings illustrating the embodiments, in the structure of the invention, the same element symbols are sometimes used in different drawings to represent the same parts or parts having the same function, thus omitting repeated descriptions. Furthermore, in the drawings, the same shading lines are sometimes used to represent parts having the same function without specifically adding element symbols. For example, in perspective views or top views, for clarity, illustrations of some components are sometimes omitted.

[0055] In the drawings and other representations of this specification, sizes, layer thicknesses, or areas are sometimes exaggerated for clarity. Therefore, the drawings are not limited to the dimensions or aspect ratios shown. Furthermore, ideal examples are schematically shown in the drawings, and the invention is not limited to the shapes or values ​​shown in the drawings. For example, it may include non-uniformity of signals, voltages, or currents caused by noise or timing deviations.

[0056] Furthermore, arrows indicating the X, Y, and Z directions are sometimes included in the drawings and other materials according to this specification. In this specification, "X direction" refers to the direction along the X-axis, and unless explicitly stated otherwise, the positive and negative directions are not sometimes distinguished. "Y direction" and "Z direction" are the same as "X direction". In addition, the X, Y, and Z directions are intersecting directions. More specifically, the X, Y, and Z directions are orthogonal directions. In this specification, one of the X, Y, and Z directions is sometimes referred to as the "first direction". In addition, the other one is sometimes referred to as the "second direction". In addition, the remaining one is sometimes referred to as the "third direction".

[0057] In this specification, etc., when multiple components use the same symbol and it is necessary to distinguish them, sometimes symbols such as “A”, “b”, “_1”, “[n]” or “[m,n]” are added to the symbol for identification.

[0058] Embodiment 1: A semiconductor device 100A according to one embodiment of the present invention will be described. The semiconductor device 100A according to one embodiment of the present invention can be used, for example, as a pixel of a display device.

[0059] <Structural Example> Figure 1 shows an example of the circuit structure of the semiconductor device 100A. The semiconductor device 100A includes a pixel circuit 51A and a light-emitting element 61. The pixel circuit 51A includes transistors M1 to M7 and capacitors C1 to C3. In this embodiment, unless otherwise stated, transistors M1 to M7 are enhancement-mode (normally off) n-channel field-effect transistors. Therefore, the threshold voltage (also referred to as "Vth") of each transistor M1 to M7 is greater than 0V. Note that the threshold voltages of each transistor M1 to M7 may also be different. For example, the threshold voltage of transistor M2 is sometimes referred to as Vth2. In addition, the threshold voltage of transistor M5 is sometimes referred to as Vth5. In addition, the threshold voltage of transistor M7 is sometimes referred to as Vth7.

[0060] The gate of transistor M1 is electrically connected to wiring GLa. One of the source and drain of transistor M1 is electrically connected to wiring DL. The other of the source and drain of transistor M1 is electrically connected to the gate of transistor M2. Transistor M1 has the function of putting the gate of transistor M2 and wiring DL into a conducting or non-conducting state.

[0061] The gate of transistor M2 is electrically connected to one terminal of capacitor C1. One of the source and drain of transistor M2 is electrically connected to wiring 101. The other of the source and drain of transistor M2 is electrically connected to the other terminal of capacitor C1. Additionally, transistor M2 includes a back gate. The back gate of transistor M2 is electrically connected to one terminal of capacitor C2. The other terminal of capacitor C2 is electrically connected to the other of the source and drain of transistor M2.

[0062] The gate of transistor M3 is electrically connected to wiring GLb. One of the source and drain of transistor M3 is electrically connected to one terminal of capacitor C1. The other of the source and drain of transistor M3 is electrically connected to the other terminal of capacitor C1. Transistor M3 has the function of putting the gate of transistor M2 and the other of the source and drain of transistor M2 into a conducting or non-conducting state.

[0063] The gate of transistor M4 is electrically connected to wiring GLb. One of the source and drain of transistor M4 is electrically connected to wiring 102. The other of the source and drain of transistor M4 is electrically connected to one terminal of capacitor C2. Transistor M4 has the function of putting wiring 102 and one terminal of capacitor C2 into a conducting or non-conducting state.

[0064] The gate of transistor M5 is electrically connected to one terminal of capacitor C3. One of the source and drain of transistor M5 is electrically connected to the other of the source and drain of transistor M2. The other of the source and drain of transistor M5 is electrically connected to the other terminal of capacitor C3 and one terminal (e.g., anode terminal) of light-emitting element 61. The other terminal (e.g., cathode terminal) of light-emitting element 61 is electrically connected to wiring 104.

[0065] The gate of transistor M6 is electrically connected to wiring GLd. One of the source and drain of transistor M6 is electrically connected to the other of the source and drain of transistor M2. The other of the source and drain of transistor M6 is electrically connected to wiring 103. Transistor M6 has the function of putting the other of the source and drain of transistor M2 into a conducting state or a non-conducting state with wiring 103.

[0066] The gate of transistor M7 is electrically connected to wiring GLd. One of the source and drain of transistor M7 is electrically connected to wiring GLc. The other of the source and drain of transistor M7 is electrically connected to the gate of transistor M5. Transistor M7 has the function of putting the gate of transistor M5 and wiring GLc into a conducting or non-conducting state.

[0067] In addition, the region in which the other terminal of capacitor C1, the other terminal of capacitor C2, the other of the source and drain of transistor M2, the other of the source and drain of transistor M3, one of the source and drain of transistor M5, and one of the source and drain of transistor M6 are electrically connected to each other is also called node ND1.

[0068] In addition, the region where one terminal of capacitor C2, the back gate of transistor M2, and the source and drain of transistor M4 are electrically connected to each other is also called node ND2.

[0069] In addition, the region in which the source and drain of transistor M1, one of the source and drain of transistor M3, one terminal of capacitor C1 and the gate of transistor M2 are electrically connected to each other is also called node ND3.

[0070] In addition, the region where the gate of transistor M5, one terminal of capacitor C3, and another of the source and drain of transistor M7 are electrically connected to each other is also called node ND4.

[0071] Capacitor C1, for example, has the function of maintaining the potential difference between the source and drain of transistor M2 and the gate of transistor M2 when node ND3 is in a floating state. Capacitor C2, for example, has the function of maintaining the potential difference between the source and drain of transistor M2 and the back gate of transistor M2 when node ND2 is in a floating state. Capacitor C3, for example, has the function of maintaining the potential difference between the source and drain of transistor M5 and the gate of transistor M5 when node ND4 is in a floating state.

[0072] The pixel circuit 51A of one embodiment of the present invention can use a transistor comprising various semiconductors. For example, a transistor comprising a single-crystal semiconductor, a polycrystalline semiconductor, a microcrystalline semiconductor, or an amorphous semiconductor in the channel forming region can be used. Note that the semiconductor contained in the transistor is not limited to a single semiconductor whose main component is composed of a single element (e.g., silicon (Si) or germanium (Ge)). As the semiconductor contained in the transistor, for example, compound semiconductors (e.g., silicon germanium (SiGe) or gallium arsenide (GaAs)) or oxide semiconductors can be used.

[0073] Furthermore, in this embodiment, an example is shown where an n-channel transistor is used to construct the semiconductor device 100A; however, one embodiment of the present invention is not limited to this. Some or all of the transistors constituting the semiconductor device 100A may also be p-channel transistors.

[0074] Furthermore, various transistor structures can be used in the pixel circuit 51A as one embodiment of the present invention. For example, planar, fin, tri-gate, top-gate, bottom-gate, or dual-gate transistors (structures with gates arranged above and below the channel) can be used. Additionally, transistors as one embodiment of the present invention can be, for example, MOS transistors, junction transistors, or bipolar transistors.

[0075] For example, as the transistor constituting the pixel circuit 51A, it is preferable to use an OS transistor (a transistor in which an oxide semiconductor is included in the semiconductor layer forming the channel. The band gap of the oxide semiconductor is 2 eV or more, thereby resulting in very little off-state current).

[0076] The off-state current of an OS transistor with a channel width of 1 μm at room temperature can be less than 1aA (1×10⁻¹⁸ A), less than 1zA (1×10⁻²¹ A), or less than 1yA (1×10⁻²⁴ A). Note that the off-state current of a Si transistor with a channel width of 1 μm at room temperature (a transistor containing silicon in the semiconductor layer forming the channel) is greater than or equal to 1fA (1×10⁻¹⁵ A) and less than 1pA (1×10⁻¹² A). Therefore, it can also be said that the off-state current of an OS transistor is about 10 bits lower than that of a Si transistor.

[0077] When an OS transistor is used as the transistor constituting the pixel circuit 51A, the charge written to each node of the pixel circuit 51A can be maintained for a long period of time. For example, when displaying a static image that does not require rewriting for each frame, the pixel circuit 51A can continue to display the image even if the operation of the peripheral drive circuit is stopped. This driving method of stopping the operation of the peripheral drive circuit when displaying a static image is also called "idling stop (IDS) driving". By performing idling stop driving, the power consumption of the display device can be reduced.

[0078] Furthermore, even at high temperatures, the off-state current of the OS transistor hardly increases. Specifically, even at ambient temperatures above room temperature and below 200°C, the off-state current of the OS transistor hardly increases. Moreover, even at high temperatures, the on-state current of the OS transistor does not easily decrease. Semiconductor devices including OS transistors operate stably and with high reliability even at high temperatures.

[0079] Furthermore, in an OS transistor, the insulation withstand voltage between the source and drain is very high. By using an OS transistor as the transistor constituting the pixel circuit 51A, stable operation is achieved even when the potential difference between the potential supplied to wiring 101 (also known as the anode potential) and the potential supplied to wiring 104 (also known as the cathode potential) is large. OS transistors can realize semiconductor devices with high reliability. In particular, it is preferable to use an OS transistor for one or both of transistors M2 and M5.

[0080] The semiconductor layer of the OS transistor preferably comprises at least one of indium and zinc. Furthermore, the semiconductor layer of the OS transistor preferably comprises, for example, indium, M (where M is selected from one or more of gallium, aluminum, silicon, boron, yttrium, tin, copper, vanadium, beryllium, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, and magnesium) and zinc. In particular, M is preferably selected from one or more of aluminum, gallium, yttrium, and tin.

[0081] In particular, as the semiconductor layer, it is preferable to use an oxide containing indium (In), gallium (Ga), and zinc (Zn) (also referred to as "IGZO"). Alternatively, as the semiconductor layer, an oxide containing indium (In), aluminum (Al), and zinc (Zn) (also referred to as "IAZO") may also be used. Alternatively, as the semiconductor layer, an oxide containing indium (In), aluminum (Al), gallium (Ga), and zinc (Zn) (also referred to as "IAGZO") may also be used.

[0082] When using an In-M-Zn oxide in a semiconductor layer, the number of In atoms in the In-M-Zn oxide is preferably greater than or equal to the number of M atoms. Examples of the metal element atomic ratios in such an In-M-Zn oxide include: In:M:Zn = 1:1:1 or similar; In:M:Zn = 1:1:1.2 or similar; In:M:Zn = 1:3:2 or similar; In:M:Zn = 1:3:4 or similar; In:M:Zn = 2:1:3 or similar; In:M:Zn = 3:1:2 or similar; and In:M:Zn = 4:1:3. Compositions with n=4:2:3 or similar, In:M:Zn=4:2:4.1 or similar, In:M:Zn=5:1:3 or similar, In:M:Zn=5:1:6 or similar, In:M:Zn=5:1:7 or similar, In:M:Zn=5:1:8 or similar, In:M:Zn=6:1:6 or similar, or In:M:Zn=5:2:5 or similar, etc. Note that "similar" composition includes a range of ±30% of the desired atomic number ratio.

[0083] For example, when the atomic number ratio is described as In:Ga:Zn = 4:2:3 or a similar composition, the following cases are included: when the atomic number ratio of In is 4, the atomic number ratio of Ga is 1 or more and 3 or less, and the atomic number ratio of Zn is 2 or more and 4 or less. Furthermore, when the atomic number ratio is described as In:Ga:Zn = 5:1:6 or a similar composition, the following cases are included: when the atomic number ratio of In is 5, the atomic number ratio of Ga is greater than 0.1 and less than 2, and the atomic number ratio of Zn is 5 or more and less than 7. Furthermore, when the atomic number ratio is described as In:Ga:Zn = 1:1:1 or a similar composition, the following cases are included: when the atomic number ratio of In is 1, the atomic number ratio of Ga is greater than 0.1 and less than 2, and the atomic number ratio of Zn is greater than 0.1 and less than 2.

[0084] Alternatively, the pixel circuit 51A can also be composed of multiple transistors using different semiconductor materials. For example, the pixel circuit 51A can also be composed of a transistor containing low-temperature polysilicon (LTPS) in the semiconductor layer (hereinafter also referred to as an LTPS transistor) and an OS transistor. LTPS transistors have high field-effect mobility and good frequency characteristics. Sometimes the structure combining LTPS transistors and OS transistors is called LTPO.

[0085] When the pixel circuit 51A is composed of multiple transistors using different semiconductor materials, the transistors can be disposed on different layers depending on the type of transistor. For example, when the pixel circuit 51A is composed of Si transistors and OS transistors, each of the layer including the Si transistor and the layer including the OS transistor can be disposed in an overlapping manner. By having this structure, the area occupied by the pixel circuit 51A is reduced.

[0086] Note that transistor M2 has the function of controlling the amount of current flowing through the light-emitting element 61. That is to say, transistor M2 has the function of controlling the amount of light emitted by the light-emitting element 61. Therefore, in this specification and the like, transistor M2 is sometimes referred to as a "driving transistor".

[0087] Furthermore, transistor M5 has the function of putting transistor M2 and light-emitting element 61 into a conducting state (also called an on state) or a non-conducting state (also called an off state). When transistor M5 is in the off state, no current flows through light-emitting element 61, so the light emission of light-emitting element 61 stops (quenches). On the other hand, when transistor M5 is in the on state, current flows through light-emitting element 61 through transistor M5, causing light-emitting element 61 to emit light. Therefore, in this specification, transistor M5 is sometimes referred to as a "light-emitting transistor". When emitting light, a current of the amount determined by the driving transistor flows through light-emitting element 61, so transistor M5 needs to be in the on state regardless of the values ​​of the source potential and drain potential.

[0088] Transistors M1, M3, M4, M6, and M7, which constitute the pixel circuit 51A, are used as switches. Therefore, the semiconductor device 100A can be represented by FIG2.

[0089] In addition, transistor M5 is also used as a switch. Therefore, semiconductor device 100A can also be represented by FIG3. Transistors M1 and M3 to M7 can be replaced by components capable of performing the switching function.

[0090] All or part of the transistor constituting the pixel circuit 51A may also be a transistor including a back gate. By providing a back gate in the transistor, the electric field generated outside the transistor is less likely to affect the channel forming region. As a result, the operation of the semiconductor device using the transistor is stabilized, and reliability can be improved. In addition, by applying a potential equal to that of the gate to the back gate of the transistor, the on-state resistance of the transistor is reduced. Furthermore, by independently controlling the potentials of the back gate and the gate of the transistor, the threshold voltage of the transistor can be changed.

[0091] Figure 4 is an example of the circuit structure of a semiconductor device 100A in which not only transistor M2, but also transistors M1, M3 to M7 are transistors that include a back gate. Figure 4 shows an example of the gate and back gate of each of transistors M1 and M3 to M7 being electrically connected. However, it is not necessary for all transistors constituting the semiconductor device to have a back gate.

[0092] Furthermore, in each of transistors M1 and M3 to M7, the gate may not be electrically connected to the back gate, and an arbitrary potential may be supplied to the back gate. Note that the potential supplied to the back gate is not limited to a fixed potential. The potential supplied to the back gate of the transistor constituting the semiconductor device may be different or the same for each transistor.

[0093] Figure 5 is an example of a plan view of the semiconductor device 100A shown in Figure 4.

[0094] The semiconductor layer 112 of the transistor M1 is disposed on the conductive layer 111. The conductive layer 111 and the semiconductor layer 112 have overlapping regions. A portion of the conductive layer 111 is used as the back gate of the transistor M1. The conductor 113 is used as the gate of the transistor M1. In addition, the conductor 113 is electrically connected to the conductive layer 111 and the wiring GLa in the contact hole 114.

[0095] One of the source and drain electrodes of transistor M1 is electrically connected to wiring DL via conductive layer 115. The other of the source and drain electrodes of transistor M1 is electrically connected to conductive layer 116.

[0096] A semiconductor layer 118 of transistor M2 is disposed on conductive layer 117. Conductive layer 117 and semiconductor layer 118 have overlapping regions. A portion of conductive layer 117 is used as the back gate of transistor M2. Conductive layer 119 is used as the gate of transistor M2. In addition, conductive layer 119 is electrically connected to conductive layer 116.

[0097] One of the source and drain electrodes of transistor M2 is electrically connected to wiring 101 via conductive layer 121. The other of the source and drain electrodes of transistor M2 is electrically connected to conductive layer 122. Conductive layer 122 is electrically connected to conductive layer 123. The area where conductive layer 116 overlaps with conductive layer 123 is used as capacitor C1.

[0098] The semiconductor layer 125 of the transistor M3 is disposed on the conductive layer 124. The conductive layer 124 and the semiconductor layer 125 have overlapping regions. A portion of the conductive layer 124 is used as the back gate of the transistor M3. The conductor 126 is used as the gate of the transistor M3. In addition, the conductor 126 is electrically connected to the conductive layer 124 and the wiring GLb in the contact hole 127.

[0099] One of the source and drain electrodes of transistor M3 is electrically connected to conductive layer 116. The other of the source and drain electrodes of transistor M3 is electrically connected to conductive layer 122.

[0100] The semiconductor layer 128 of the transistor M4 is disposed on the conductive layer 124. The conductive layer 124 and the semiconductor layer 128 have overlapping regions. A portion of the conductive layer 124 is used as the back gate of the transistor M4. The conductor 126 is used as the gate of the transistor M4.

[0101] One of the source and drain electrodes of transistor M4 is electrically connected to wiring 102 via conductive layer 129. The other of the source and drain electrodes of transistor M4 is electrically connected to conductive layer 131. Conductive layer 131 is electrically connected to conductive layer 117. The area where conductive layer 131 overlaps with conductive layer 123 is used as capacitor C2.

[0102] The semiconductor layer 133 of the transistor M5 is disposed on the conductive layer 132. The conductive layer 132 and the semiconductor layer 133 have overlapping regions. A portion of the conductive layer 132 is used as the back gate of the transistor M5. A conductor 134 is used as the gate of the transistor M5. In addition, the conductor 134 is electrically connected to the conductive layer 132 and the conductive layer 136 in the contact hole 135.

[0103] One of the source and drain electrodes of transistor M5 is electrically connected to conductive layer 122. The other of the source and drain electrodes of transistor M5 is electrically connected to conductive layer 137. Conductive layer 137 is electrically connected to conductive layer 138. The area where conductive layer 136 and conductive layer 138 overlap is used as capacitor C3. In addition, conductive layer 137 is electrically connected to light-emitting element 61.

[0104] The semiconductor layer 141 of the transistor M6 is disposed on the conductive layer 139. The conductive layer 139 and the semiconductor layer 141 have overlapping regions. A portion of the conductive layer 139 is used as the back gate of the transistor M6. The conductor 142 is used as the gate of the transistor M6. In addition, the conductor 142 is electrically connected to the conductive layer 139 and the wiring GLd in the contact hole 143.

[0105] One of the source and drain electrodes of transistor M6 is electrically connected to conductive layer 122. The other of the source and drain electrodes of transistor M6 is electrically connected to wiring 103 via conductive layer 144.

[0106] The semiconductor layer 145 of the transistor M7 is disposed on the conductive layer 139. The conductive layer 139 and the semiconductor layer 145 have overlapping regions. A portion of the conductive layer 139 is used as the back gate of the transistor M7. The conductor 142 is used as the gate of the transistor M7.

[0107] One of the source and drain electrodes of transistor M7 is electrically connected to wiring GLc via conductive layer 146. The other of the source and drain electrodes of transistor M7 is electrically connected to conductive layer 136.

[0108] Conductive layer 122 is used as node ND1. Conductive layer 131 is used as node ND2. Conductive layer 116 is used as node ND3. Conductive layer 136 is used as node ND4.

[0109] The transistor constituting the pixel circuit 51A can be either a single-gate transistor with a gate between the source and drain, or a dual-gate transistor. Figure 6A shows an example of the circuit diagram symbol for a dual-gate transistor 180A.

[0110] Transistor 180A has a structure in which transistors Tr1 and Tr2 are connected in series. In FIG6A, one of the source and drain terminals of transistor Tr1 is electrically connected to terminal S, the other of the source and drain terminals of transistor Tr1 is electrically connected to one of the source and drain terminals of transistor Tr2, and the other of the source and drain terminals of transistor Tr2 is electrically connected to terminal D. In addition, each of the gate terminals of transistor Tr1 and transistor Tr2 is electrically connected to each other and electrically connected to terminal G.

[0111] The transistor 180A shown in FIG. 6A has the function of putting terminals S and D into a conducting or non-conducting state by changing the potential of terminal G. Therefore, the dual-gate transistor 180A includes transistor Tr1 and transistor Tr2 and is used as a single transistor. That is to say, in FIG. 6A, one of the source and drain of transistor 180A is electrically connected to terminal S, the other of the source and drain is electrically connected to terminal D, and the gate is electrically connected to terminal G.

[0112] Alternatively, the transistor constituting the pixel circuit 51A can also be a three-gate transistor. Figure 6B shows an example of a circuit diagram symbol for a three-gate transistor 180B.

[0113] Transistor 180B has a structure in which transistors Tr1, Tr2, and Tr3 are connected in series. In FIG6B, one of the source and drain terminals of transistor Tr1 is electrically connected to terminal S, the other of the source and drain terminals of transistor Tr1 is electrically connected to one of the source and drain terminals of transistor Tr2, the other of the source and drain terminals of transistor Tr2 is electrically connected to one of the source and drain terminals of transistor Tr3, and the other of the source and drain terminals of transistor Tr3 is electrically connected to terminal D. In addition, the gate terminals of transistors Tr1, Tr2, and Tr3 are each electrically connected to each other and electrically connected to terminal G.

[0114] The transistor 180B shown in FIG6B has the function of putting terminals S and D into a conducting or non-conducting state by changing the potential of terminal G. Therefore, the tri-gate transistor 180B includes transistors Tr1, Tr2, and Tr3 and is used as a single transistor. That is to say, in FIG6B, one of the source and drain of transistor 180B is electrically connected to terminal S, the other of the source and drain is electrically connected to terminal D, and the gate is electrically connected to terminal G.

[0115] In addition, the transistor constituting the pixel circuit 51A may also have a structure in which four or more transistors are connected in series. The transistor 180C shown in FIG6C has a structure in which six transistors (transistors Tr1 to Tr6) are connected in series. In addition, the gates of the six transistors are electrically connected to each other and to the terminal G.

[0116] The transistor 180C shown in FIG. 6C has the function of putting terminals S and D into a conducting or non-conducting state by changing the potential of terminal G. Therefore, transistor 180C includes transistors Tr1 to Tr6 and is used as a single transistor. That is to say, in FIG. 6C, one of the source and drain of transistor 180C is electrically connected to terminal S, the other of the source and drain is electrically connected to terminal D, and the gate is electrically connected to terminal G.

[0117] Sometimes transistors such as transistors 180A, 180B and 180C, which include multiple gates and are electrically connected to each other, are called "multi-gate transistors" or "multi-gate transistors".

[0118] For example, in order to improve the electrical characteristics of the saturation region of a transistor, the channel length of the transistor is sometimes preferably long. In order to realize a transistor with a long channel length, a multi-gate transistor can also be used.

[0119] As the light-emitting element 61, various display elements may be used, such as EL elements (including organic and inorganic EL elements, organic EL elements or inorganic EL elements), LEDs (e.g., white LEDs, red LEDs, green LEDs or blue LEDs), micro LEDs (e.g., LEDs with one side shorter than 0.1 mm), QLEDs (Quantum-dot Light Emitting Diodes), or electron emission elements.

[0120] <Operating Example> Next, an operating example of the semiconductor device 100A will be described with reference to the diagrams. Figure 7 is a timing diagram used to illustrate the operating example of the semiconductor device 100A. Figures 8 to 13 are circuit diagrams used to illustrate the operating example of the semiconductor device 100A.

[0121] Wiring DL is supplied with a video signal Vdata. Therefore, wiring DL is sometimes referred to as a "signal line". Wiring 101 is supplied with a potential Va, wiring 102 with a potential V1, wiring 103 with a potential V0, and wiring 104 with a potential Vc. Additionally, each of wiring GLa, GLb, GLc, and GLd is supplied with either a potential H or a potential L. Potential H is preferably a higher potential than potential L. Note that in this specification, "potential H" is the potential that turns on the n-channel transistor by supplying it to the gate. Similarly, "potential L" is the potential that turns off the n-channel transistor by supplying it to the gate.

[0122] Potential Va is the anode potential, and potential Vc is the cathode potential. Furthermore, potential V1 is preferably a higher potential than potential V0. For example, potential V1 can also be a potential that turns the transistor on by supplying it to the gate. Similarly, potential V0 can also be a potential that turns the transistor off by supplying it to the gate. Potential V0 is, for example, 0V or potential L. Furthermore, potential H is preferably a higher potential than potential V1. Note that in this embodiment, potential V0 is 0V, and potential V1 is 5V. Additionally, potential Va is 15V, and potential Vc is 0V. Furthermore, potential L is 0V, and potential H is 6V.

[0123] The semiconductor device 100A has the function of controlling the magnitude of the current Ie (see Figure 12) flowing through the light-emitting element 61 according to the video signal Vdata supplied from the wiring DL. The light emission brightness of the light-emitting element 61 is controlled according to the magnitude of the current Ie.

[0124] Note that in the diagrams, for example, symbols indicating potential such as "H", "L", "V0" or "V1" (also called "potential symbols") are sometimes attached adjacent to terminals or wiring. Additionally, for example, to facilitate understanding of potential changes, potential symbols attached to terminals or wiring where potential changes have occurred are sometimes indicated with a frame. Furthermore, sometimes an "×" symbol is attached overlapping with a transistor in the off state.

[0125] The current Ie flowing through the light-emitting element 61 is mainly determined by the video signal Vdata and the Vth2 of the transistor M2. Therefore, when the Vth2 of the transistor M2 included in each pixel circuit is different, even if the same video signal Vdata is supplied to multiple pixel circuits, the current Ie will be different for each pixel. Therefore, the non-uniformity of the Vth2 of the transistor M2 is one of the reasons for the degradation of display quality.

[0126] Thus, by obtaining the Vth2 of transistor M2 for each pixel, the non-uniformity of current Ie is reduced. Note that the process of obtaining the Vth2 of transistor M2 is sometimes referred to as "Vth value correction".

[0127] Note that in this specification, the following series of operations are sometimes referred to as “processing”: changing the on or off state of a transistor, supplying charge to a node electrically connected to the transistor, and changing the potential of the node.

[0128] [Vth Correction Operation] First, a reset operation is performed during period T11. Specifically, routing GLb and routing GLd are supplied with potential H, and routing GLa and routing GLc are supplied with potential L (see Figure 8).

[0129] At this time, transistors M3, M4, M6 and M7 are in the on state, and transistor M1 is in the off state.

[0130] Thus, node ND1 is supplied with a potential V0 via transistor M6. Furthermore, node ND3 is supplied with a potential V0 via transistors M6 and M3. Additionally, node ND2 is supplied with a potential V1 via transistor M4. Furthermore, node ND4 is supplied with a potential L via transistor M7. Therefore, transistor M5 is in the off state.

[0131] Next, during period T12, wiring GLd is supplied with potential L (see Figure 9). At this time, transistors M6 and M7 are in the off state. As a result, node ND4 is in the floating state, maintaining the charge supplied to node ND4. Therefore, transistor M5 is maintained in the off state.

[0132] Because the potential of node ND2 is potential V1, transistor M2 is in the ON state. At this time, charge is supplied from wiring 101 to node ND1 via transistor M2. As a result, the potential of node ND1 rises. In addition, because transistor M3 is also in the ON state, the potential of node ND3 also rises. Specifically, the potentials of nodes ND1 and ND3 rise to the value of potential V1 minus the Vth2 of transistor M2.

[0133] Here, since the potential of node ND2 is fixed at potential V1, the potential difference between the back gate and source of transistor M2 decreases as the potentials of nodes ND1 and ND3 rise. When the potential of node ND1 rises to near potential V1-Vth2, the current flowing through node ND1 from wiring 101 via transistor M2 decreases. Therefore, the rate of potential rise of node ND1 slows down. Thus, the period T12 is the time until the potential of node ND1 rises to potential V1-Vth2, and preferably this time is sufficiently ensured. Specifically, the period T12 is preferably 1 μs or more, and more preferably 10 μs or more.

[0134] Next, during period T13, wiring GLb is supplied with a potential L (see Figure 10). At this time, transistors M3 and M4 are in the off state. As a result, nodes ND2 and ND3 are in the floating state. Therefore, the charge supplied to each node is maintained. Note that because transistor M7 is in the off state, the potential of wiring GLc does not affect the operation. That is, the charge supplied to node ND4 is maintained. As a result, transistor M5 is maintained in the off state. Here is an example of supplying a potential H to wiring GLc during period T13; the potential H can also be supplied to wiring GLc during period T14, which will be described below.

[0135] [Data Writing Operation] During period T14, wiring GLa and wiring GLD are supplied with potential H (see Figure 11). At this time, transistor M1 is in the ON state. Therefore, node ND3 is supplied with video signal Vdata. In addition, transistor M6 is in the ON state. Therefore, node ND1 is supplied with potential V0.

[0136] Nodes ND1 and ND2 are capacitively coupled via capacitor C2. Therefore, when the potential of node ND1 changes from V1-Vth2 to V0, the potential of node ND2 also changes accordingly. In this embodiment, since potential V0 is 0V, the potential of node ND2 is represented by potential V1 - (potential V1 - Vth2). That is, the potential of node ND2 is Vth2.

[0137] Furthermore, transistor M7 is in the ON state. As a result, charge is supplied from wiring GLC to node ND4. At this time, the potential of node ND4 rises to the value obtained by subtracting the Vth7 of transistor M7 from the potential H. In this embodiment, the potential H is 6V. Additionally, when the Vth5 of transistor M5 and the Vth7 of transistor M7 are each 1V, the potential of node ND4 (potential H - Vth7) is 5V. At this time, transistor M5 is in the ON state. Therefore, the potential of the anode terminal of the light-emitting element 61 is potential V0.

[0138] [Light Emitting Operation] During period T15, wiring GLa and wiring GLD are supplied with potential L (see Figure 12). At this time, transistors M1 and M6 are in the off state. As a result, current flows from wiring 101 to wiring 104. That is, current Ie flows through the light-emitting element 61. Therefore, the light-emitting element 61 emits light with a brightness corresponding to the current Ie. In addition, when current flows from wiring 101 to wiring 104, the potential of node ND1 and the anode terminal of the light-emitting element 61 rises.

[0139] Furthermore, node ND3 is in a floating state, and nodes ND1 and ND3 are capacitively coupled via capacitor C1. Therefore, when the potential of node ND1 changes from potential V0 to potential Va1, the potential of node ND3 also changes accordingly. In this embodiment, the potential of node ND3 is the video signal Vdata + potential Va1. That is, even if the source potential of transistor M2 changes, the potential difference (voltage) between the gate and source of transistor M2 maintains the video signal Vdata.

[0140] Similarly, node ND2 is in a floating state, and nodes ND1 and ND3 are capacitively coupled via capacitor C1. Therefore, as the potential of node ND1 changes, the potential of node ND2 becomes Vth2 + potential Va1. That is, the potential difference between the back gate and source of transistor M2 remains at Vth2.

[0141] Furthermore, when transistor M7 is in the off state, node ND4 is in a floating state. The anode terminal of the light-emitting element 61 and node ND4 are capacitively coupled via capacitor C3. Therefore, when the potential of the anode terminal of the light-emitting element 61 changes from potential V0 to potential Va2, the potential of node ND4 also changes accordingly. In this embodiment, since potential V0 is 0V, the potential of node ND4 is potential H - Vth7 + potential Va2. That is, even if the potential of the anode terminal of the light-emitting element 61 changes, the potential difference (voltage) between the gate and source of transistor M5 remains at potential H - Vth7.

[0142] For example, when the gate of transistor M5 has a fixed potential, when the source potential of transistor M5 increases, the potential difference between the gate and source of transistor M5 decreases. Furthermore, when the potential difference between the gate and source of transistor M5 is less than the critical voltage of transistor M5, transistor M5 is in the off state. Therefore, when increasing the anode potential, it is also necessary to increase the fixed potential supplied to the gate of transistor M5. Therefore, a power supply or power supply circuit is also required.

[0143] In a semiconductor device 100A according to one embodiment of the present invention, a capacitor C3 is provided between the gate and source of transistor M5 to form a bootstrap circuit. Even if the anode potential is increased, the transistor M5 can be maintained in the on state without a power supply circuit. Therefore, current Ie is stably supplied to the light-emitting element 61. Note that capacitor C3 is sometimes referred to as a "bootstrap capacitor". Additionally, capacitors C1 and C2 are each used as bootstrap capacitors.

[0144] The semiconductor device 100A of one embodiment of the present invention is suitable not only for single-structure light-emitting elements but also for series-structure light-emitting elements that require a larger driving voltage than single-structure light-emitting elements. Note that the structure of the light-emitting element will be described later.

[0145] Furthermore, as described above, the amount of current Ie flowing through the light-emitting element 61 is determined by the video signal Vdata and the Vth2 of the transistor M2. In a semiconductor device 100A according to one embodiment of the present invention, the amount of current Ie flowing through the light-emitting element 61 is controlled by the video signal Vdata by performing Vth value correction.

[0146] Furthermore, the brightness of the light-emitting element 61 is controlled by the video signal Vdata. Therefore, during light emission, the transistor M5 needs to be reliably turned on. In the semiconductor device 100A of one embodiment of the present invention, the transistor M5 can be reliably turned on during light emission. By using the semiconductor device 100A of one embodiment of the present invention in a display device, the current Ie can be correctly controlled, thereby improving the color reproduction of the intermediate grayscale of the display device. Therefore, the display quality of the display device is improved.

[0147] [Quenching Operation] During period T16, wiring GLd is supplied with potential H, and wiring GLC is supplied with potential L (see Figure 13). At this time, transistors M6 and M7 are in the on state. Therefore, potential L is supplied from wiring GLC to node ND4. At this time, transistor M5 is in the off state. Therefore, when transistor M5 is in the off state, current does not flow through the light-emitting element 61, so the light emission of the light-emitting element 61 stops (quenching).

[0148] A display device using light-emitting elements such as EL elements as display components can continuously emit light from the light-emitting elements during a frame period. This driving method is also called "holding type" or "holding-type drive". By adopting holding-type drive as the driving method of the display device, for example, the flickering phenomenon of the display screen can be reduced. On the other hand, holding-type drive is prone to image retention and image blurring when displaying moving images. The resolution perceived by humans when displaying moving images is also called "moving image resolution". That is to say, the moving image resolution of holding-type drive is prone to decrease.

[0149] For example, as a method to improve the persistence of motion and image blur when displaying moving images, a "black insertion drive" is known. The "black insertion drive" is also called a "pseudo impulse type" or "pseudo impulse type drive". The black insertion drive is a driving method that displays black every other frame or displays black for a specified period within a frame.

[0150] The semiconductor device 100A of one embodiment of the present invention easily realizes black insertion drive by quenching operation. Therefore, the dynamic image resolution of the display device using the semiconductor device 100A of one embodiment of the present invention is not easily degraded. Thus, the display of dynamic images with high display quality is achieved by using the semiconductor device 100A of one embodiment of the present invention.

[0151] Note that during the quenching operation, transistor M5 is in the off state. Therefore, even if the potential of node ND1 changes, the potential change does not affect the quenching operation. Furthermore, during the Vth correction operation, transistor M5 is also in the off state. Therefore, in this example, we illustrate the case where the Vth correction operation and the quenching operation occur during different periods; however, the Vth correction operation can also be performed during the quenching operation.

[0152] <Driving Example 1> Next, a driving example of the display device when the semiconductor device 100A according to one embodiment of the present invention is used as a pixel of the display device will be described. Although it will be described later, the display device includes a plurality of pixels configured in a matrix. The semiconductor device 100A can also be used as a pixel of the display device. In this case, the plurality of semiconductor devices 100A can also be electrically connected to wiring DL.

[0153] For example, in the case of a display device in which pixels are arranged in a matrix of n rows and m columns (n ​​and m are each integers greater than or equal to 1), the n rows of semiconductor devices 100A are electrically connected to the wiring DL. During a frame, semiconductor devices 100A in at least one row can be selected sequentially from the n rows of semiconductor devices 100A, and the above-mentioned Vth correction operation, data writing operation, light emission operation, and quenching operation can be performed on the selected semiconductor devices 100A.

[0154] Figure 14 is an example of a timing diagram used to illustrate the driving of the n-row semiconductor device 100A. Note that in this embodiment, etc., the semiconductor device 100A in the p-th row (p is an integer greater than or equal to 1 and less than or equal to n) is sometimes referred to as semiconductor device 100A_p. In addition, the transistors M1 to M7 included in the semiconductor device 100A_p are sometimes referred to as transistors M1_p to M7_p, respectively. In addition, the capacitors C1 to C3 included in the semiconductor device 100A_p are sometimes referred to as capacitors C1_p to C3_p, respectively. In addition, the wiring GL1, wiring GLb, wiring GLc, and wiring GLd electrically connected to the semiconductor device 100A_p are sometimes referred to as wiring GL1_p, wiring GLb_p, wiring GLc_p, and wiring GLd_p, respectively. In addition, the nodes ND1 to ND4 included in the semiconductor device 100A_p are sometimes referred to as nodes ND1_p to ND4_p, respectively. In addition, the light-emitting element 61 included in the semiconductor device 100A_p is sometimes referred to as light-emitting element 61_p.

[0155] Additionally, in Figure 14, the labels “F11”, “F12_1”, and “F12_2” represent frame diagrams. Furthermore, the labels “1”, “2”, and “n” in each frame represent the periods during which semiconductor devices 100A_1, 100A_2, and 100A_n are driven, respectively. Note that semiconductor devices 100A_3 to 100A_n-1 are omitted from the figures.

[0156] In frame F11, semiconductor devices 100A are sequentially selected from each row of n semiconductor devices 100A, and Vth calibration is performed on the selected semiconductor devices 100A. Sometimes the frame in which these operations are performed is called the "calibration frame". In the calibration frame, the potentials of wirings GLa_1 to GLa_n are maintained at potential L.

[0157] First, wiring GLb_1 and wiring GLd_1 are supplied with a potential H, and wiring GLc_1 is supplied with a potential L (corresponding to period T11). Next, the critical voltage of transistor M2_1 is obtained by supplying potential L to wiring GLd_1 (corresponding to period T12). Next, the obtained critical voltage of transistor M2_1 is maintained in capacitor C2_1 by supplying potential L to wiring GLb_1 and potential H to wiring GLc_1 (corresponding to period T13). Then, wiring GLb_2 and wiring GLd_2 are supplied with a potential H, and wiring GLc_2 is supplied with a potential L (corresponding to period T11). Next, the critical voltage of transistor M2_2 is obtained by supplying potential L to wiring GLd_2 (corresponding to period T12). Next, the obtained critical voltage of transistor M2_2 is maintained in capacitor C2_2 by supplying potential L to wiring GLb_2 and potential H to wiring GLc_2 (corresponding to period T13). By repeatedly performing this operation on n rows, the critical voltage of each of the transistors M2_1 to M2_n is maintained in each of the capacitors C2_1 to C2_n.

[0158] Furthermore, in each of frames F12_1 and F12_2, semiconductor devices 100A in each row of n rows are selected sequentially, and data writing, light emission, and quenching operations are performed on the selected semiconductor devices 100A. Frame F12_2 is executed after frame F12_1. Sometimes the frame in which these operations are performed is called a "display frame". In the display frame, the potential of wiring GLb_1 to wiring GLb_n is maintained at potential L. Thus, the critical voltage of each transistor M2_1 to transistor M2_n held in each of capacitors C2_1 to C2_n is maintained.

[0159] In each of frames F12_1 and F12_2, firstly, by supplying a potential H to wiring GLa_1, wiring GLc_1, and wiring GLd_1, a video signal Vdata is supplied to node ND3_1 (corresponding to period T14). Next, by supplying a potential L to wiring GLa_1 and wiring GLd_1, the light-emitting element 61_1 is made to emit light (corresponding to period T15). Furthermore, by supplying a potential H to wiring GLa_2, wiring GLc_2, and wiring GLd_2, a video signal Vdata is supplied to node ND3_2 (corresponding to period T14). Next, by supplying a potential L to wiring GLa_2 and wiring GLd_2, the light-emitting element 61_2 is made to emit light (corresponding to period T15). By repeating this operation on n rows, each of the light-emitting elements 61_1 to 61_n can be made to emit light.

[0160] Furthermore, in each of frames F12_1 and F12_2, the light emission of the light-emitting element 61_1 is stopped (corresponding to period T16) by supplying a potential L to wiring GLc_1 and a potential H to wiring GLd_1. Then, the cessation of light emission of the light-emitting element 61_1 is maintained by supplying a potential H to wiring GLc_1 and a potential L to wiring GLd_1. Similarly, the light emission of the light-emitting element 61_2 is stopped (corresponding to period T16) by supplying a potential L to wiring GLc_2 and a potential H to wiring GLd_2. Then, the cessation of light emission of the light-emitting element 61_2 is maintained by supplying a potential H to wiring GLd_2. By repeatedly performing this operation on n rows, the light emission of each of the light-emitting elements 61_1 to 61_n can be stopped.

[0161] Note that, as described above, the frame calibration period is preferably a time sufficient to ensure Vth calibration. For example, the frame calibration period is preferably 33.3ms or more, and more preferably 1s or more. Furthermore, to improve display quality, the frame display period is preferably short. For example, by setting the frame frequency to 120Hz, the frame display period can be set to 8.33ms. Alternatively, by setting the frame frequency to 360Hz, the frame display period can be set to 2.78ms.

[0162] In the driving example shown in Figure 14, frame F11 of the calibration frame is executed immediately after the display device is started, frame F12_1 of the display frame is executed after frame F11 ends, and frame F12_2 of the display frame is executed after frame F12_1 ends. Note that although not shown, the next display frame is executed repeatedly after frame F12_2 ends. By continuously executing the display frames, the display of dynamic images can be realized. In addition, by executing the calibration frame before the display frame begins, the calibration frame period is fully ensured. Therefore, the display quality of the display device is improved.

[0163] Furthermore, the calibration frame is performed as needed. For example, the calibration frame may be performed at regular intervals. For example, the calibration frame may be performed every time the display frame is executed. Note that during the calibration frame period, because the transistor M5 is in the off state, the light-emitting elements 61_1 to 61_n are kept quenched. Therefore, when the calibration frame is performed every time the display frame is executed, display flicker may occur. In addition, corresponding to the calibration frame period, the frequency of data writing operations for the display frame is reduced. Therefore, the calibration frame period is preferably short. Furthermore, the interval between performing the calibration frame is preferably long. For example, it is preferable to perform the calibration frame every three or more times the display frame is executed, and more preferably every ten or more times the display frame is executed.

[0164] Note that this example illustrates Vth calibration during the calibration frame process, performed row by row sequentially, but is not limited to this. During the calibration frame process, because the potential of the wiring DL is fixed, Vth calibration can be performed simultaneously for multiple rows or for all rows. The calibration frame period is shortened by performing Vth calibration for multiple rows or all rows simultaneously.

[0165] Note that in this driving example, transistors M4_1 to M4_n are preferably OS transistors. OS transistors have very low off-state current. As a result, the critical voltage of each of transistors M2_1 to M2_n is maintained for a long time in each of capacitors C2_1 to C2_n. Therefore, the number of times the correction block is executed is reduced.

[0166] <Drive Example 2> Figure 15 is another example of a timing diagram used to illustrate the driving of semiconductor devices 100A_1 to 100A_n. In each of frames F14_1 and F14_2, semiconductor devices 100A in each row of n are selected sequentially, and data writing, light emission, and quenching operations are performed on the selected semiconductor devices 100A. In addition, Vth correction is performed during the quenching operation. Sometimes the frame in which these operations are performed is called the "display correction frame".

[0167] Note that, to improve display quality, the display calibration frame period is preferably short. For example, by setting the frame frequency to 120Hz, the display calibration frame period can be set to 8.33ms. Alternatively, by setting the frame frequency to 360Hz, the display calibration frame period can be set to 2.78ms. Note that, as described below, by using a display calibration frame, it is not always necessary to set the calibration frame separately. Therefore, the frequency of data writing operations is increased. As a result, the display quality of the display device is improved.

[0168] During data writing and light emission operations, the display calibration frame is the same as the display frame described in Driving Example 1. However, the difference between the display calibration frame and the display frame described in Driving Example 1 is that Vth calibration is performed during the quenching operation. Here, the difference from the display frame in Driving Example 1 will be explained. First, by supplying a potential L to wiring GLc_1 and a potential H to wiring GLd_1, the light emission of the light-emitting element 61_1 stops (quenches). Additionally, by supplying a potential H to wiring GLb_1, the Vth calibration operation of the semiconductor device 100A_1 begins (corresponding to period T11). Next, by supplying a potential H to wiring GLc_1 and a potential L to wiring GLd_1, the quenching of the light-emitting element 61_1 is maintained. Furthermore, by maintaining the potential H of wiring GLb_1, the critical voltage of transistor M2_1 is obtained.

[0169] Furthermore, by supplying a potential L to wiring GLc_2 and a potential H to wiring GLd_2, the light emission of the light-emitting element 61_2 stops. Additionally, by supplying a potential H to wiring GLb_2, the Vth correction operation of the semiconductor device 100A_2 begins (corresponding to period T11). Next, by supplying a potential H to wiring GLc_2 and a potential L to wiring GLd_2, the quenching of the light-emitting element 61_2 is maintained. Furthermore, by maintaining the potential H of wiring GLb_2, the critical voltage of transistor M2_2 is obtained. By repeatedly performing this operation on n rows, the critical voltage of each of transistors M2_1 to M2_n is obtained.

[0170] In the driving example shown in Figure 15, the display calibration frame F14_1 is performed, and the display calibration frame F14_2 is performed after frame F14_1 ends. Note that although not shown, the next display calibration frame can be performed repeatedly after frame F14_2 ends.

[0171] Note that, for example, during the Vth calibration operation of semiconductor device 100A_p, the period for obtaining the critical voltage of transistor M2_p can be from the start of the quenching operation to the start of the data writing operation for the next display calibration frame. Furthermore, during the period for obtaining the critical voltage of transistor M2_p, wiring GLa_p is supplied with a potential L. As a result, transistor M1_p is in the off state. Therefore, data writing operations can also be performed on rows of semiconductor device 100A other than p rows.

[0172] In the display calibration diagram, Vth calibration is performed for each diagram. Therefore, when the Vth2 of transistor M2 changes during the operation of the display device, Vth calibration is performed immediately. This improves the display quality of the display device. Furthermore, it is not necessary to separately set the period for Vth calibration. For example, Vth calibration is not required when starting the display device. This shortens the startup time of the display device.

[0173] The structure shown in this embodiment can be used in appropriate combination with the structures shown in other embodiments and examples.

[0174] Embodiment 2 In this embodiment, a semiconductor device 100B according to one embodiment of the present invention will be described. Semiconductor device 100B is a variation of semiconductor device 100A. Therefore, in order to reduce repetitive descriptions, the differences between semiconductor device 100B and semiconductor device 100A will be mainly described.

[0175] <Structural Example> Figure 16 shows an example of the circuit structure of semiconductor device 100B. Semiconductor device 100B includes pixel circuit 51B and light-emitting element 61. The difference between pixel circuit 51B and pixel circuit 51A is that the gates of transistor M6 and M7 are electrically connected to wiring GL1. That is, semiconductor device 100B does not have wiring GL1 of semiconductor device 100A. Therefore, because the formation of wiring GL1 is omitted, the display device using semiconductor device 100B according to one embodiment of the present invention can achieve a high aperture ratio. In addition, high resolution can be achieved. Furthermore, by reducing parasitic capacitance, the operating speed is improved.

[0176] <Operating Example> Next, an operating example of the semiconductor device 100B will be described with reference to the figures. Figure 17 is a timing diagram used to illustrate an operating example of the semiconductor device 100B. Figures 18 to 23 are circuit diagrams used to illustrate an operating example of the semiconductor device 100B.

[0177] [Vth Correction Operation] First, the same reset operation as in period T11 is performed during period T21. Specifically, wiring GLa and wiring GLb are supplied with potential H, and wiring GLc is supplied with potential L (see Figure 18). During period T21, transistors M1, M3, M4, M6, and M7 are in the ON state.

[0178] Additionally, node ND1 is supplied with a potential V0 via transistor M6. Furthermore, node ND3 is supplied with a potential V0 via transistors M6 and M3. Additionally, node ND2 is supplied with a potential V1 via transistor M4. Furthermore, node ND4 is supplied with a potential L via transistor M7. Therefore, transistor M5 is in the off state.

[0179] Additionally, during period T21, wiring DL and wiring 103 are in a conducting state via transistors M1, M3, and M6. Therefore, during period T21, it is preferable that wiring DL and wiring 103 have the same potential or that wiring DL is in a floating state.

[0180] Next, during period T22, wiring GLa is supplied with potential L (see Figure 19). At this time, transistors M1, M6, and M7 are in the off state. In addition, node ND4 is in the floating state, and the charge supplied to node ND4 is maintained, thus keeping transistor M5 in the off state. Similar to period T12 above, the potentials of nodes ND1 and ND3 rise to the value of potential V1 minus Vth2 of transistor M2.

[0181] Next, during period T23, wiring GLb is supplied with potential L, and wiring GLc is supplied with potential H (see Figure 20). At this time, transistors M3 and M4 are in the off state. Nodes ND1, ND2, and ND3 are in the floating state, maintaining the charge supplied to each node. In addition, transistor M5 is maintained in the off state.

[0182] [Data Writing Operation] During period T24, wiring GLa is supplied with a potential H (see Figure 21). At this time, transistor M1 is in the on state, and node ND3 is supplied with the video signal Vdata. In addition, transistor M6 is in the on state, and node ND1 is supplied with a potential V0. Similar to period T14, the potential of node ND2 is Vth2.

[0183] Additionally, transistor M7 is in the ON state, and charge is supplied from wiring GLC to node ND4. Similar to the aforementioned period T14, transistor M5 is in the ON state, and the potential of the anode terminal of light-emitting element 61 is potential V0.

[0184] [Light Emitting Operation] During period T25, wiring GLa is supplied with potential L (see Figure 22). At this time, transistors M1 and M6 are in the off state. Similar to period T15, current flows from wiring 101 to wiring 104, and light-emitting element 61 emits light with a brightness corresponding to current Ie. In addition, at this time, the potential of node ND1 and the anode terminal of light-emitting element 61 rises. The potential of node ND1 is potential Va1, and the potential of the anode terminal is potential Va2. In addition, the potential of node ND3 is the video signal Vdata+ potential Va1, and the potential of node ND2 is Vth2+ potential Va1.

[0185] Furthermore, transistor M7 is in the off state, and node ND4 is in the floating state. Similar to the period T15 described above, when the potential of the anode terminal of the light-emitting element 61 rises from potential V0 to potential Va2, the potential of node ND4 becomes potential H - Vth7 + potential Va2. That is to say, even if the potential of the anode terminal on the source side of transistor M5 rises, the on state of transistor M5 is reliably maintained.

[0186] [Quenching Operation] During period T26, wiring GLa is supplied with potential H, and wiring GLC is supplied with potential L (see Figure 23). At this time, transistors M1, M6, and M7 are in the on state, the potential of node ND1 is potential V0, and the potential of node ND4 is potential L. When the potential of node ND4 is potential L, transistor M5 is in the off state, and the light emission of light-emitting element 61 stops.

[0187] Note that during period T26, video signals used for writing to other semiconductor devices 100B electrically connected to wiring DL are sometimes supplied to node ND3 via transistor M1, but transistor M5 is in the off state, so it does not affect the quenching operation. Note that in order to distinguish it from the video signal Vdata during period T24 (data writing operation), the video signal used for writing to other semiconductor devices 100B is recorded as VdataX in FIG23.

[0188] Similar to semiconductor device 100A, semiconductor device 100B can also be used not only for single-structure light-emitting elements but also appropriately for series-structure light-emitting elements requiring a larger driving voltage than single-structure elements. Furthermore, similar to semiconductor device 100A, semiconductor device 100B can also be black-insertion driven. Therefore, the dynamic image resolution of the display device using semiconductor device 100B according to one embodiment of the present invention is less likely to decrease. Thus, a display device capable of displaying dynamic images with high display quality can be realized.

[0189] <Driving Example 1> Next, a driving example of a display device when the semiconductor device 100B of one embodiment of the present invention is used as a pixel of a display device will be described. FIG24 is an example of a timing diagram for explaining the driving of n rows of semiconductor devices 100B. Note that this driving example is an example of applying driving example 1 of embodiment 1 to the driving of a display device using semiconductor devices 100B, and can be appropriately referred to in the description. Here, the differences between this driving example and driving example 1 of embodiment 1 will be mainly explained.

[0190] Frame F21 is a calibration frame. In frame F21, semiconductor devices 100B_1 to 100B_n are selected sequentially in each row, and Vth calibration is performed on the selected semiconductor devices 100B. First, wiring GLA_1 and wiring GLB_1 are supplied with a potential H, and wiring GLC_1 is supplied with a potential L (corresponding to period T21). Next, the critical voltage of transistor M2_1 is obtained by supplying potential L to wiring GLA_1 (corresponding to period T22). Next, the obtained critical voltage of transistor M2_1 is maintained in capacitor C2_1 by supplying potential L to wiring GLB_1 and potential H to wiring GLC_1 (corresponding to period T23). Furthermore, wiring GLA_2 and wiring GLB_2 are supplied with a potential H, and wiring GLC_2 is supplied with a potential L (corresponding to period T21). Next, by supplying a potential L to wiring GLa_2, the critical voltage of transistor M2_2 is obtained (corresponding to period T22). Then, by supplying a potential L to wiring GLb_2 and a potential H to wiring GLc_2, the obtained critical voltage of transistor M2_2 is maintained in capacitor C2_2 (corresponding to period T23). By repeating this operation for n rows, the critical voltage of each of transistors M2_1 to M2_n is maintained in each of capacitors C2_1 to C2_n.

[0191] Note that in the calibration frame, the wiring DL and wiring 103 are in a conducting state via transistors M1, M3, and M6 included in each of semiconductor devices 100B_1 to 100B_n. Therefore, during the execution of the calibration frame, the wiring DL can be supplied with the same potential as wiring 103, or the wiring DL can be in a floating state. For example, in this embodiment, since the potential V0 supplied to wiring 103 is 0V, the video signal Vdata supplied to wiring DL during the execution of the calibration frame can be 0V (equivalent to the potential of black display). Alternatively, a switch can be provided between wiring DL and the supply source of video signal Vdata (e.g., a source driver), and this switch can be in a non-conducting state during the execution of the calibration frame.

[0192] Both frame F22_1 and frame F22_2 are display frames. In each of frame F22_1 and frame F22_2, semiconductor devices 100B_1 to 100B_n are selected sequentially row by row, and data writing, light emission, and quenching operations are performed on the selected semiconductor devices 100B. In the display frames, the potential L of wirings GLb_1 to GLb_n is maintained. Thus, the critical voltage of each transistor M2_1 to M2_n held in each of capacitors C2_1 to C2_n is maintained.

[0193] In each of frames F22_1 and F22_2, firstly, a potential H is supplied to wiring GLa_1 and wiring GLc_1, and a video signal Vdata is supplied to node ND3_1 (corresponding to period T24). Next, a potential L is supplied to wiring GLa_1, causing the light-emitting element 61_1 to emit light (corresponding to period T25). Then, a potential H is supplied to wiring GLa_2 and wiring GLc_2, and a video signal Vdata is supplied to node ND3_2 (corresponding to period T24). Next, a potential L is supplied to wiring GLa_2, causing the light-emitting element 61_2 to emit light (corresponding to period T25). By repeating this operation on n rows, each of the light-emitting elements 61_1 to 61_n can emit light.

[0194] Furthermore, in each of frames F22_1 and F22_2, the light emission of the light-emitting element 61_1 is stopped (corresponding to period T26) by supplying a potential H to wiring GLa_1 and a potential L to wiring GLc_1. Then, the cessation of light emission of the light-emitting element 61_1 is maintained by supplying a potential L to wiring GLa_1 and a potential H to wiring GLc_1. Similarly, the light emission of the light-emitting element 61_2 is stopped (corresponding to period T26) by supplying a potential H to wiring GLc_2 and a potential L to wiring GLc_2. Then, the cessation of light emission of the light-emitting element 61_2 is maintained by supplying a potential L to wiring GLc_2. By repeatedly performing this operation on n rows, the light emission of each of the light-emitting elements 61_1 to 61_n can be stopped.

[0195] In the driving example shown in FIG24, frame F21 for calibrating the frame is performed immediately after the display device is started, frame F22_1 for displaying the frame is performed after frame F21 ends, and frame F22_2 for displaying the frame is performed after frame F22_1 ends. By performing the calibration frame before the display frame begins, the calibration frame period is fully ensured. Therefore, the display quality of the display device is improved.

[0196] In addition, the calibration frame is performed as needed. For example, the calibration frame may be performed at regular intervals. For example, the calibration frame may be performed every time the display frame is executed. Note that display flickering may occur when the calibration frame is executed. In addition, the frequency of data writing operations for the display frame is reduced corresponding to the calibration frame period. Therefore, the calibration frame period is preferably short. Furthermore, the interval between performing the calibration frame is preferably long.

[0197] Note that this example illustrates Vth calibration during the calibration frame process, performed row by row sequentially, but is not limited to this. During the calibration frame process, because the potential of the wiring DL is fixed, Vth calibration can be performed simultaneously on multiple rows or on all rows simultaneously. The calibration frame period is shortened by performing Vth calibration on multiple rows or all rows simultaneously.

[0198] <Drive Example 2> Figure 25 is a timing diagram used to illustrate other driving examples of semiconductor devices 100B_1 to 100B_n. Note that this driving example is an example of applying driving example 2 of Embodiment 1 to the driving of a display device using semiconductor device 100B, and can be described with appropriate reference. Here, the differences between this driving example and driving example 2 of Embodiment 1 will be mainly explained.

[0199] Frames F24_1 and F24_2 are both display calibration frames. In each of frames F24_1 and F24_2, semiconductor devices 100B_1 to 100B_n are selected sequentially in each row, and data writing, light emission, and quenching operations are performed on the selected semiconductor devices 100B. In addition, during the quenching operation, Vth calibration is also performed when the potential of wiring DL is equal to the potential of wiring 103. As described above, for example, in the Vth calibration operation of semiconductor device 100B_p in row p (p is an integer greater than or equal to 1 and less than or equal to n), during the reset operation (equivalent to period T21), transistors M1_p, M3_p, and M6_p are in the on state, and wiring DL and wiring 103 are in the conductive state (see Figure 18). Furthermore, during the quenching operation of semiconductor device 100B_p, because data writing operations are performed on semiconductor devices 100B in rows other than p, the video signal VdataX is supplied to wiring DL. The video signal VdataX supplied to wiring DL is then supplied to node ND3_p via transistor M1_p (see Figure 23). Therefore, preferably, during the quenching operation, Vth correction is performed when the video signal VdataX has a potential equal to the potential V0 supplied to wiring 103 (equivalent to the potential for black display). Furthermore, preferably, Vth correction is not performed when the video signal VdataX has a potential different from the potential V0. For example, in this embodiment, the potential V0 is 0V. Therefore, during the quenching operation, Vth correction can be performed when the video signal VdataX is 0V, and Vth correction can be omitted when the video signal VdataX is not 0V.

[0200] Note, for example, Figure 25 shows a timing diagram when the video signal VdataX in the first row and the nth row is not 0V and therefore no Vth correction operation is performed on semiconductor device 100B_1 and semiconductor device 100_n, and Figure 25 shows a timing diagram when the video signal VdataX in the second row is 0V and Vth correction operation is performed on semiconductor device 100B_2.

[0201] Figure 26 is a flowchart illustrating the operation of the display calibration frame in this driving example. Note that, for simplicity, the operation of the display calibration frame is shown in Figure 26 starting from the quenching operation. Alternatively, the display calibration frame can be repeatedly performed by starting the quenching operation of the next display calibration frame after the luminescence operation ends. Note that step S01 corresponds to period T26, step S03 corresponds to period T21, step S04 corresponds to period T24, and step S05 corresponds to period T25.

[0202] In step S01, the quenching operation of the semiconductor device 100B_p begins. Then, in step S02, it is determined whether the video signal VdataX has a potential equal to the potential V0. If the determination in step S02 is YES (the video signal VdataX has a potential equal to the potential V0), the Vth correction operation in step S03 begins, and the data writing operation in step S04 is performed after the end of step S03. Alternatively, if the determination in step S02 is NO (the video signal VdataX does not have a potential equal to the potential V0), the Vth correction operation in step S03 is not performed, and the data writing operation in step S04 is performed. After performing step S04, the light emission operation in step S05 is performed, and the light emission is maintained until the quenching operation in step S01 of the next display correction frame.

[0203] Note that when the semiconductor device 100B of one embodiment of the present invention is used as a pixel of a display device, for example, the semiconductor devices 100B are arranged in a matrix of n rows and m columns (n ​​and m are each integers greater than or equal to 1), and the wiring GLa, wiring GLb, and wiring GLc of each row are connected to the semiconductor devices 100B of the m columns. Thus, quenching and Vth correction are performed simultaneously on all semiconductor devices 100B of each row and m columns. Therefore, Vth correction can be performed when each video signal VdataX supplied to each wiring DL of the m columns is 0V (equivalent to the potential for black display). Alternatively, Vth correction can be omitted when at least one of the video signals VdataX supplied to each wiring DL of the m columns is not 0V (equivalent to the potential for black display).

[0204] In Figure 25, firstly, by supplying a potential H to wiring GLa_1 and a potential L to wiring GLc_1, the light emission of the light-emitting element 61_1 stops (quenches). Additionally, by maintaining the potential L of wiring GLb_1, the Vth correction operation of the semiconductor device 100B_1 is not performed. Next, by supplying a potential L to wiring GLa_1 and a potential H to wiring GLc_1, the quenching of the light-emitting element 61_1 is maintained.

[0205] Furthermore, by supplying a potential H to wiring GLa_2 and a potential L to wiring GLc_2, the light emission of the light-emitting element 61_2 is stopped. Additionally, by supplying a potential H to wiring GLb_2, the Vth correction operation of the semiconductor device 100B_2 begins (corresponding to period T21). Next, by supplying a potential L to wiring GLa_2 and a potential H to wiring GLc_2, the quenching of the light-emitting element 61_2 is maintained. Furthermore, by maintaining the potential H of wiring GLb_2, the critical voltage of transistor M2_2 is obtained.

[0206] Thus, for example, when Vth calibration is performed in semiconductor device 100B_p, wiring GLb_p is supplied with a potential H, and when Vth calibration is not performed, the potential of wiring GLb_p is maintained at a potential L. By repeatedly performing this operation on n rows, the critical voltage of transistor M2 is obtained only for the row where the video signal VdataX has a potential equal to the potential V0 (equivalent to the potential of black display). In addition, the period for obtaining the critical voltage of transistor M2_p can also be from the start of the quenching operation to the start of the data writing operation of the next display calibration frame.

[0207] In the driving example shown in Figure 25, frame F24_1 is used for display calibration, and frame F24_2 is used after frame F24_1 ends. Note that although not shown, the next display calibration frame can be performed repeatedly after frame F24_2 ends. Therefore, it is not necessary to set a separate calibration frame. Thus, the frequency of data writing can be increased. As a result, the display quality of the display device is improved.

[0208] The structure shown in this embodiment can be used in appropriate combination with the structures shown in other embodiments and examples.

[0209] Embodiment 3 In this embodiment, a structural example of a display device 10 using a semiconductor device 100 (semiconductor device 100A or semiconductor device 100B) will be described. FIG27A is a block diagram illustrating the display device 10. The display device 10 includes a display area 235, a first driving circuit section 231, and a second driving circuit section 232. The display area 235 includes a plurality of pixels 230 arranged in a matrix. The semiconductor device 100 of one embodiment of the present invention can also be used for the pixels 230.

[0210] The circuit included in the first driving circuit section 231 is used, for example, as a scan line driving circuit. The circuit included in the second driving circuit section 232 is used, for example, as a signal line driving circuit. Note that a circuit may also be provided at a position opposite to the first driving circuit section 231 across the display area 235. A circuit may also be provided at a position opposite to the second driving circuit section 232 across the display area 235. Note that in this specification, the circuits included in the first driving circuit section 231 and the second driving circuit section 232 are sometimes collectively referred to as "peripheral driving circuits".

[0211] As a peripheral drive circuit, various circuits such as shift registers, level converters, inverters, latches, analog switches, or logic circuits can also be used. Transistors or capacitors can be used, for example, in the peripheral drive circuit.

[0212] For example, an OS transistor can be used as the transistor constituting pixel 230, and a Si transistor can be used as the transistor constituting the peripheral driving circuit. The OS transistor has a very low off-state current. Therefore, the power consumption of the pixel 230 using the OS transistor can be reduced. The Si transistor operates faster than the OS transistor. Therefore, the Si transistor is preferably used in the peripheral driving circuit. Furthermore, according to the display device, an OS transistor can be used as both the transistor constituting pixel 230 and the transistor constituting the peripheral driving circuit. Furthermore, according to the display device, a Si transistor can be used as the transistor constituting pixel 230, and an OS transistor can be used as the transistor constituting the peripheral driving circuit.

[0213] Alternatively, both Si transistors and OS transistors can be used as transistors constituting pixel 230. Alternatively, both Si transistors and OS transistors can be used as transistors constituting peripheral driving circuits.

[0214] Additionally, the display device 10 includes m wires 236 arranged in approximately parallel configurations, and the potential of the m wires 236 is controlled by the circuitry included in the first drive circuitry section 231. Furthermore, the display device 10 includes n wires 237 arranged in approximately parallel configurations, and the potential of the n wires 237 is controlled by the circuitry included in the second drive circuitry section 232.

[0215] Note that Figure 27A is a diagram showing an example of wiring 236 and wiring 237 connected to pixel 230. However, Figure 27A is only an example, and the wiring connected to pixel 230 is not limited to wiring 236 and wiring 237.

[0216] A display device 10 can achieve full-color display by using a single pixel 240 that controls red light, green light, and blue light, and controlling the light emission amount (luminance) of each pixel 230. Thus, the three pixels 230 are each used as a sub-pixel. In other words, the three sub-pixels control, for example, the light emission amount of red, green, or blue light respectively (see Figure 27B). Furthermore, the color of the light controlled by the three sub-pixels is not limited to a combination of red (R), green (G), and blue (B), but can also be a combination of cyan (C), magenta (M), and yellow (Y) (see Figure 27C).

[0217] Alternatively, as a configuration of the three pixels 230 constituting one pixel 240, a Delta configuration can also be used (see Figure 27D). Specifically, the three pixels 230 constituting one pixel 240 can also be configured such that the lines connecting the center points of each pixel 230 form a triangle.

[0218] Furthermore, the areas of the three sub-pixels (pixels 230) can also be different. When the luminous efficiency and reliability differ depending on the emission color, the area of ​​each of the three sub-pixels can also be changed according to the emission color (see Figure 27E). In addition, for example, the sub-pixel configuration shown in Figure 27E can be called "S-Stripe RGB arrangement", etc.

[0219] Alternatively, the four sub-pixels can be used as a single pixel 240. For example, a sub-pixel controlling white light can be added to the three sub-pixels that control red, green, and blue light respectively (see Figure 27F). By adding a sub-pixel controlling white light, the display device 10 can achieve increased brightness of the display area 235. Furthermore, for example, a sub-pixel controlling yellow light can be added to the three sub-pixels that control red, green, and blue light respectively (see Figure 27G). Additionally, for example, a sub-pixel controlling white light can be added to the three sub-pixels that control cyan, magenta, and yellow light respectively (see Figure 27H).

[0220] Furthermore, in pixel 240, by increasing the number of subpixels used as a single pixel and appropriately combining subpixels that control light such as red, green, blue, cyan, magenta, and yellow, the display device 10 with improved halftone reproduction can be realized. Therefore, a display device 10 with improved display quality can be realized.

[0221] A display device 10 according to one embodiment of the present invention can reproduce color gamuts of various specifications. For example, the following color gamuts can be reproduced: PAL (Phase Alternating Line) or NTSC (National Television System Committee) specifications used in television broadcasting; sRGB (standard RGB) or Adobe RGB specifications widely used in display devices such as personal computers, digital cameras, or printers; ITU-R BT.709 (International Telecommunication Union Radiocommunication Sector Broadcasting Service (Television) 709) specifications used in HDTV (High Definition Television); DCI-P3 (Digital Cinema Initiatives P3) specifications used in digital cinema projection; or ITU-R BT.2020 (REC.2020 (Recommendation 2020)) specifications used in UHDTV (Ultra High Definition Television).

[0222] Furthermore, for example, by arranging the pixels 240 in a matrix of 1920×1080, a display device 10 capable of displaying full color at a resolution known as Full HD (e.g., also referred to as "2K resolution," "2K1K," or "2K," etc.). Additionally, for example, by arranging the pixels 240 in a matrix of 3840×2160, a display device 10 capable of displaying full color at a resolution known as Ultra HD (e.g., also referred to as "4K resolution," "4K2K," or "4K," etc.). Furthermore, for example, by arranging the pixels 240 in a matrix of 7680×4320, a display device 10 capable of displaying full color at a resolution known as Ultra HD (e.g., also referred to as "8K resolution," "8K4K," or "8K," etc.). Furthermore, by increasing the number of pixels 240, a display device 10 capable of displaying full color at a resolution of 16K or 32K can also be realized.

[0223] In addition, the pixel density of the display area 235 is preferably 100ppi or higher and 10,000ppi or lower, and more preferably 1,000ppi or higher and 10,000ppi or lower. For example, the pixel density of the display area 235 may be 2,000ppi or higher and 6,000ppi or lower, or 3,000ppi or higher and 5,000ppi or lower.

[0224] Note that there is no particular limitation on the aspect ratio (screen ratio) of the display area 235. The display area 235 of the display device 10 can correspond to various aspect ratios such as 1:1 (square), 4:3, 16:9, 16:10, etc.

[0225] In addition, the diagonal size of the display area 235 can be 0.1 inches or more and less than 100 inches, or it can be more than 100 inches.

[0226] When the display device 10 is used as a display device for virtual reality (VR) or augmented reality (AR), the diagonal size of the display area 235 can be set to 0.1 inches or more and 5.0 inches or less, preferably 0.5 inches or more and 2.0 inches or less, and more preferably 1 inch or more and 1.7 inches or less. For example, the diagonal size of the display area 235 can also be set to 1.5 inches or around 1.5 inches. By setting the diagonal size of the display area 235 to 2.0 inches or less, preferably around 1.5 inches, processing can be performed in a single exposure process using an exposure device (typically a scanning device), thus improving the productivity of the manufacturing process.

[0227] Additionally, the structure of the transistor used in the display area 235 can be appropriately selected based on the diagonal size of the display area 235. For example, when a single-crystal Si transistor is used in the display area 235, the diagonal size of the display area 235 is preferably 0.1 inches or more and 3 inches or less. Furthermore, when an LTPS transistor is used in the display area 235, the diagonal size of the display area 235 is preferably 0.1 inches or more and 30 inches or less, more preferably 1 inch or more and 30 inches or less. Furthermore, when an LTPO (a structure combining LTPS and OS transistors) is used in the display area 235, the diagonal size of the display area 235 is preferably 0.1 inches or more and 50 inches or less, more preferably 1 inch or more and 50 inches or less. Furthermore, when an OS transistor is used in the display area 235, the diagonal size of the display area 235 is preferably 0.1 inches or more and 200 inches or less, more preferably 50 inches or more and 100 inches or less.

[0228] The size of a single-crystal Si transistor is the same as the size of a single-crystal Si substrate, making it very difficult to scale up display panels. Furthermore, LTPS transistors use laser crystallization devices in their manufacturing process, making it difficult to accommodate larger display panels (typically screen sizes with a diagonal dimension greater than 30 inches). On the other hand, OS transistors are not limited by the use of laser crystallization devices in their manufacturing process, or can be manufactured at lower process temperatures (typically below 450°C), thus allowing for display panels with larger areas (typically diagonal dimensions of 50 inches or more but less than 100 inches). Additionally, LTPO can be used for display panels in the area between those using LTPS transistors and those using OS transistors (typically diagonal dimensions of 1 inch or more but less than 50 inches).

[0229] <Example of the structure of the light-emitting element> A light-emitting element (also called a light-emitting device) of a semiconductor device that can be used in one embodiment of the present invention will be described.

[0230] As shown in FIG28A, the light-emitting element 61 includes an EL layer 172 between a pair of electrodes (conductive layer 171 and conductive layer 173). The EL layer 172 may be composed of multiple layers such as layer 4420, light-emitting layer 4411, and layer 4430. Layer 4420 may include, for example, a layer containing a substance with high electron injection capability (electron injection layer) and a layer containing a substance with high electron transport capability (electron transport layer). Light-emitting layer 4411 may include, for example, a light-emitting compound. Layer 4430 may include, for example, a layer containing a substance with high hole injection capability (hole injection layer) and a layer containing a substance with high hole transport capability (hole transport layer).

[0231] The structure including layer 4420, light-emitting layer 4411 and layer 4430 disposed between a pair of electrodes can be used as a single light-emitting unit. In this specification, the structure of FIG28A is referred to as a single structure.

[0232] Furthermore, FIG28B is a modified example of the EL layer 172 included in the light-emitting element 61 shown in FIG28A. Specifically, the light-emitting element 61 shown in FIG28B includes layer 4430-1 on conductive layer 171, layer 4430-2 on layer 4430-1, light-emitting layer 4411 on layer 4430-2, layer 4420-1 on light-emitting layer 4411, layer 4420-2 on layer 4420-1, and conductive layer 173 on layer 4420-2. For example, when conductive layer 171 and conductive layer 173 are used as the anode and cathode, respectively, layer 4430-1 is used as the hole injection layer, layer 4430-2 is used as the hole transport layer, layer 4420-1 is used as the electron transport layer, and layer 4420-2 is used as the electron injection layer. Alternatively, when conductive layers 171 and 173 are used as the cathode and anode, respectively, layer 4430-1 is used as the electron injection layer, layer 4430-2 as the electron transport layer, layer 4420-1 as the hole transport layer, and layer 4420-2 as the hole injection layer. By employing this layer structure in the light-emitting element 61, carriers can be effectively injected into the light-emitting layer 4411, thereby improving the carrier recombination efficiency within the light-emitting layer 4411.

[0233] In addition, as shown in Figure 28C, the structure in which multiple light-emitting layers (light-emitting layer 4411, light-emitting layer 4412 and light-emitting layer 4413) are disposed between layer 4420 and layer 4430 is also a variant example of a single structure.

[0234] As shown in FIG28D, the structure in which multiple light-emitting units (EL layers 172a and EL layers 172b) are connected in series with an intermediate layer (charge generation layer) 4440 is referred to as a series structure or a stacked structure in this specification. By adopting a series structure for the light-emitting element 61, a light-emitting element 61 capable of emitting high brightness can be realized.

[0235] Furthermore, when the light-emitting element 61 has the series structure shown in FIG. 28D, the light-emitting colors of EL layers 172a and EL layers 172b can be the same. For example, the light-emitting colors of EL layers 172a and EL layers 172b can both be green. When the display area 235 includes three types of sub-pixels, R, G, and B, and each sub-pixel includes a light-emitting element, the light-emitting elements of each sub-pixel can also have a series structure. Specifically, the EL layers 172a and EL layers 172b of the R sub-pixel both contain materials capable of emitting red light. In addition, the EL layers 172a and EL layers 172b of the G sub-pixel both contain materials capable of emitting green light. In addition, the EL layers 172a and EL layers 172b of the B sub-pixel both contain materials capable of emitting blue light. In other words, the materials of the light-emitting layers 4411 and 4412 can also be the same. In the series-connected light-emitting element 61 shown in Figure 28D, by making the emitting colors of EL layers 172a and EL layers 172b the same, the current density per unit luminance can be reduced. Therefore, the reliability of the light-emitting element 61 can be improved.

[0236] The light-emitting color of the light-emitting element can be, for example, red, green, blue, cyan, magenta, yellow, or white, depending on the material constituting the EL layer 172. In addition, by giving the light-emitting element a microcavity structure, the color purity can be further improved.

[0237] The light-emitting layer may, for example, contain two or more light-emitting materials, each emitting a color of R (red), G (green), B (blue), Y (yellow), or O (orange). A white light-emitting element preferably has a structure in which the light-emitting layer contains two or more light-emitting materials. In a light-emitting element according to one embodiment of the present invention, when white light emission is obtained using two light-emitting materials, it is sufficient to select two light-emitting materials whose light emission is in a complementary color relationship. For example, in a light-emitting element according to one embodiment of the present invention, by making the light emission color of the first light-emitting material and the light emission color of the second light-emitting material in a complementary color relationship, a light-emitting element that emits white light throughout the entire light-emitting element can be obtained. Furthermore, in a light-emitting element according to one embodiment of the present invention, when white light emission is obtained using three or more light-emitting materials, the light emission colors of the three or more light-emitting materials are combined to obtain a light-emitting element that can emit white light throughout the entire light-emitting element.

[0238] In addition, preferably, the light-emitting layer contains two or more light-emitting materials, and the light emitted by each light-emitting material contains spectral components of two or more colors among R, G and B.

[0239] Examples of luminescent materials include fluorescent materials, phosphorescent materials, inorganic compounds (e.g., quantum dot materials), and materials exhibiting thermally activated delayed fluorescence (thermally activated delayed fluorescence (TADF) materials). Furthermore, materials in thermal equilibrium between singlet and triplet excited states can also be used as TADF materials. Because of their short emission lifetime (excitation lifetime), such TADF materials can suppress efficiency degradation in the high-brightness region of the light-emitting element.

[0240] <Method for forming light-emitting element> The following describes an example of a method for forming light-emitting element 61.

[0241] Figure 29A is a top view of the light-emitting element 61. The light-emitting element 61 includes multiple light-emitting elements 61R that emit red light, multiple light-emitting elements 61G that emit green light, and multiple light-emitting elements 61B that emit blue light. In Figure 29A, to facilitate the distinction between the light-emitting elements, the symbols "R", "G", and "B" are attached to the light-emitting areas of each light-emitting element. Furthermore, the structure of the light-emitting element 61 shown in Figure 29A can also be referred to as an SBS (Side By Side) structure. Additionally, Figure 29A shows a structure of a light-emitting element 61 with three colors: red (R), green (G), and blue (B) as an example, but is not limited to this. For example, one embodiment of the present invention may employ a structure of light-emitting elements 61 with four or more colors.

[0242] Light-emitting elements 61R, 61G, and 61B are all arranged in a matrix. Figure 29A shows a so-called stripe arrangement, that is, an arrangement of light-emitting elements of the same color in one direction; however, the arrangement of light-emitting elements is not limited to this. For example, delta arrangement, zigzag arrangement, S-Stripe RGB arrangement, or pentile arrangement can be used as the arrangement method of light-emitting elements.

[0243] As light-emitting elements 61R, 61G, and 61B, organic EL devices such as OLED (Organic Light Emitting Diode) or QOLED (Quantum-dot Organic Light Emitting Diode) are preferably used. Examples of light-emitting materials included in the EL element include fluorescent materials, phosphorescent materials, inorganic compounds (e.g., quantum dot materials), or materials exhibiting thermally activated delayed fluorescence (TADF) materials.

[0244] Figure 29B is a cross-sectional schematic diagram corresponding to the dashed line A1-A2 in Figure 29A. Figure 29B shows the cross-sections of light-emitting elements 61R, 61G, and 61B. Light-emitting elements 61R, 61G, and 61B are all disposed on insulating layer 363. Light-emitting elements 61R, 61G, and 61B include a conductive layer 171 used as a pixel electrode and a conductive layer 173 used as a common electrode. As insulating layer 363, one or both of inorganic insulating film and organic insulating film can be used. As insulating layer 363, inorganic insulating film is preferred. Examples of inorganic insulating films include oxide insulating films or nitride insulating films such as silicon oxide film, silicon oxynitride film, silicon oxynitride film, silicon nitride film, aluminum oxide film, aluminum oxynitride film, or hafnium oxide film.

[0245] The light-emitting element 61R includes an EL layer 172R between the conductive layer 171, which serves as a pixel electrode, and the conductive layer 173, which serves as a common electrode. The EL layer 172R contains a luminescent organic compound that emits light with intensity at least in the red wavelength region. The EL layer 172G in the light-emitting element 61G contains a luminescent organic compound that emits light with intensity at least in the green wavelength region. The EL layer 172B in the light-emitting element 61B contains a luminescent organic compound that emits light with intensity at least in the blue wavelength region.

[0246] In addition to the layer containing the luminescent organic compound (luminescent layer), each of the EL layer 172R, EL layer 172G and EL layer 172B may also include one or more of the following: an electron injection layer, an electron transport layer, a hole injection layer and a hole transport layer.

[0247] Each light-emitting element is provided with a conductive layer 171 that serves as a pixel electrode. Additionally, the conductive layer 173 that serves as a common electrode is a continuous layer shared by all light-emitting elements. Either the conductive layer 171 used as a pixel electrode or the conductive layer 173 used as a common electrode uses a conductive film that is transparent to visible light, while the other uses a reflective conductive film. In a display device according to one embodiment of the present invention, by making the conductive layer 171 used as a pixel electrode transparent and the conductive layer 173 used as a common electrode reflective, a bottom-emitting type (bottom-emitting structure) display device can be manufactured. Alternatively, in a display device according to one embodiment of the present invention, by making the conductive layer 171 used as a pixel electrode reflective and the conductive layer 173 used as a common electrode transparent, a top-emitting type (top-emitting structure) display device can be manufactured. Note that in a display device according to one embodiment of the present invention, a double-sided emission type (double-sided emission structure) display device can also be manufactured by making both the conductive layer 171 used as a pixel electrode and the conductive layer 173 used as a common electrode transparent.

[0248] For example, when the light-emitting element 61R has a top-emitting structure, light 175R from the light-emitting element 61R is emitted to the conductive layer 173 side. When the light-emitting element 61G has a top-emitting structure, light 175G from the light-emitting element 61G is emitted to the conductive layer 173 side. When the light-emitting element 61B has a top-emitting structure, light 175B from the light-emitting element 61B is emitted to the conductive layer 173 side.

[0249] An insulating layer 272 is provided such that it covers the ends of the conductive layer 171 used as a pixel electrode. The ends of the insulating layer 272 are preferably tapered. The insulating layer 272 can be made of the same material that can be used for the insulating layer 363.

[0250] The insulating layer 272 is provided to prevent unintentional electrical short circuits between adjacent light-emitting elements 61 and unintentional light emission from the light-emitting elements 61. In addition, the insulating layer 272 also has the function of preventing the metal mask from contacting the conductive layer 171 when the EL layer 172 is formed using a metal mask.

[0251] Each of the EL layers 172R, EL layers 172G and EL layers 172B includes a region that contacts the top surface of the conductive layer 171 used as a pixel electrode and a region that contacts the surface of the insulating layer 272. In addition, the ends of the EL layers 172R, EL layers 172G and EL layers 172B are located on the insulating layer 272.

[0252] As shown in FIG29B, a gap is provided between the EL layers that display two different colors of light-emitting elements. Thus, it is preferable that the EL layers 172R, EL layer 172G, and EL layer 172B are arranged in a manner that prevents them from touching each other. This appropriately prevents unintended light emission (also known as crosstalk) caused by current flowing through two adjacent EL layers. Therefore, one embodiment of the present invention can improve contrast and achieve a display device with high display quality.

[0253] For example, EL layers 172R, EL layer 172G, and EL layer 172B can be formed separately using a vacuum evaporation method that uses a shadow mask such as a metal mask. Alternatively, the EL layers can be formed separately using photolithography. By using photolithography, one embodiment of the present invention can realize a high-definition display device that is difficult to achieve when using a metal mask.

[0254] Note that in this specification, devices manufactured using a metal mask or FMM (Fine Metal Mask) are sometimes referred to as MM (Metal Mask) structure devices. Additionally, devices manufactured without a metal mask or FMM are sometimes referred to as MML (Metal Mask Less) structure devices. Because MML structure display devices are not manufactured using a metal mask, their pixel configuration and pixel shape design are more flexible than those of MM structure display devices.

[0255] A protective layer 271 is provided on the conductive layer 173, which is used as a common electrode, so as to cover the light-emitting elements 61R, 61G, and 61B. The protective layer 271 has the function of preventing impurities such as water from diffusing to each light-emitting element from above.

[0256] The protective layer 271 can, for example, be a single-layer structure or a multilayer structure comprising at least an inorganic insulating film. Examples of inorganic insulating films include oxide films or nitride films such as silicon oxide films, silicon oxynitride films, silicon oxynitride films, silicon nitride films, aluminum oxide films, aluminum oxynitride films, or hafnium oxide films. Alternatively, semiconductor materials such as indium gallium oxide or indium gallium zinc oxide (IGZO) can also be used as the protective layer 271. Furthermore, the protective layer 271 can be formed using, for example, an ALD method, a CVD method, or a sputtering method. Note that the structure of the protective layer 271 comprising an inorganic insulating film is illustrated here, but it is not limited to this. For example, the protective layer 271 may also have a multilayer structure comprising an inorganic insulating film and an organic insulating film.

[0257] In this specification, nitrogen oxides refer to compounds in which the nitrogen content is greater than the oxygen content. Additionally, oxynitrides refer to compounds in which the oxygen content is greater than the nitrogen content. Furthermore, the content of each element can be determined, for example, using Rutherford Backscattering Spectrometry (RBS).

[0258] When the protective layer 271 uses indium gallium zinc oxide, it can be processed using wet etching or dry etching. For example, when the protective layer 271 uses IGZO, it can be processed using oxalic acid, phosphoric acid, or a mixed solution (e.g., a mixed solution of phosphoric acid, acetic acid, nitric acid, and water (also known as a mixed aluminum etchant)). This mixed aluminum etchant can be formulated with a volume ratio of phosphoric acid:acetic acid:nitric acid:water of approximately 53.3:6.7:3.3:36.7.

[0259] FIG29C shows an example different from the structure described above. Specifically, in FIG29C, the light-emitting element 61 includes a light-emitting element 61W that emits white light. The light-emitting element 61W includes an EL layer 172W that emits white light between the conductive layer 171, which is used as a pixel electrode, and the conductive layer 173, which is used as a common electrode.

[0260] As the EL layer 172W, for example, a structure in which two light-emitting layers are stacked and selected in such a way that their respective light-emitting colors are complementary can be used. Alternatively, a stacked EL layer in which a charge-generating layer is sandwiched between the light-emitting layers can also be used.

[0261] Figure 29C shows three light-emitting elements 61W side by side. A color layer 264R is disposed on the upper part of the left light-emitting element 61W. The color layer 264R is used as a bandpass filter that allows red light to pass through. Similarly, a color layer 264G that allows green light to pass through is disposed on the upper part of the middle light-emitting element 61W. Similarly, a color layer 264B that allows blue light to pass through is disposed on the upper part of the right light-emitting element 61W. Thus, the display device can display color images.

[0262] Here, the EL layer 172W and the conductive layer 173, which serves as a common electrode, are separated from each other between two adjacent light-emitting elements 61W. This prevents unintended light emission caused by current flowing through the EL layer 172W between the two adjacent light-emitting elements 61W. In particular, when a stacked EL layer with a charge-generating layer between the two light-emitting layers is used as the EL layer 172W, the following problem arises: in display devices using this EL layer, the higher the resolution, i.e., the smaller the distance between adjacent pixels, the more pronounced the crosstalk effect, and the lower the contrast. Therefore, by adopting this structure, one embodiment of the present invention can realize a display device that combines high resolution and high contrast.

[0263] Preferably, the EL layer 172W and the conductive layer 173, which is used as a common electrode, are separated using photolithography. This reduces the gap between the light-emitting elements. Therefore, for example, compared to using a shadow mask such as a metal mask, one embodiment of the present invention can achieve a display device with a high aperture ratio.

[0264] Note that when a light-emitting element with a bottom-emitting structure is used in a display device according to one embodiment of the present invention, a color layer may be provided between the conductive layer 171, which is used as a pixel electrode, and the insulating layer 363.

[0265] Figure 29D shows an example different from the structure described above. Specifically, in Figure 29D, no insulating layer 272 is provided between the light-emitting elements 61R, 61G, and 61B. By adopting this structure, the display device of one embodiment of the present invention can achieve a higher aperture ratio. In addition, in the display device of one embodiment of the present invention, since the unevenness of the light-emitting element 61 is reduced by not providing the insulating layer 272, a display device with an improved viewing angle can be achieved. Specifically, by using the display device of one embodiment of the present invention, the viewing angle can be set to 150° or more and less than 180°, preferably 160° or more and less than 180°, and more preferably 160° or more and less than 180°.

[0266] Furthermore, the protective layer 271 covers the sides of EL layers 172R, EL layers 172G, and EL layers 172B. By employing this structure, one embodiment of the present invention can suppress impurities (typically water, etc.) that may enter from the sides of EL layers 172R, EL layers 172G, and EL layers 172B. Therefore, leakage current between adjacent light-emitting elements 61 is reduced. Thus, the display device of one embodiment of the present invention has improved chroma and contrast and reduced power consumption.

[0267] Furthermore, in the structure shown in FIG29D, the top surface shapes of conductive layer 171, EL layer 172R, and conductive layer 173 are approximately identical. This structure can be formed together, for example, using a photoresist mask, after the conductive layer 171, EL layer 172R, and conductive layer 173 are formed. This process, since the conductive layer 173 is used as a mask to process the EL layer 172R and conductive layer 173, can also be referred to as self-aligned patterning. Note that EL layer 172R is described here, but EL layers 172G and EL layer 172B can also adopt the same structure.

[0268] Furthermore, in FIG. 29D, a protective layer 273 is also provided on the protective layer 271. For example, the protective layer 271 can be formed using an apparatus capable of depositing a film with high coverage (typically an ALD apparatus, etc.), and the protective layer 273 can be formed using an apparatus capable of depositing a film with lower coverage than the protective layer 271 (typically a sputtering apparatus, etc.). By forming the protective layers 271 and 273, a region 275 can be provided between the protective layers 271 and 273. In other words, the region 275 is located between the EL layers 172R and 172G, and between the EL layers 172G and 172B.

[0269] Region 275 may contain, for example, one or more elements selected from air, nitrogen, oxygen, carbon dioxide, and Group 18 elements (typically helium, neon, argon, xenon, and krypton). Additionally, region 275 may sometimes contain, for example, the gas used when depositing the protective layer 273. For example, when the protective layer 273 is deposited using a sputtering method, region 275 may sometimes contain one or more of the aforementioned Group 18 elements. Note that when region 275 contains a gas, the gas can be identified, for example, using gas chromatography. Furthermore, when the protective layer 273 is deposited using a sputtering method, the film of the protective layer 273 may also contain the gas used during sputtering. In this case, for example, when the protective layer 273 is analyzed using energy-dispersive X-ray analysis (EDX analysis), elements such as argon may sometimes be detected.

[0270] Furthermore, when the refractive index of region 275 is lower than that of protective layer 271, light emitted by EL layer 172R, EL layer 172G, or EL layer 172B is reflected at the interface between protective layer 271 and region 275. Therefore, it is sometimes possible to suppress the incident light emitted by EL layer 172R, EL layer 172G, or EL layer 172B onto adjacent pixels. This can suppress the mixing of different emission colors from adjacent pixels, thereby improving the display quality of the display device.

[0271] Furthermore, when using the structure shown in FIG29D, the region between the light-emitting element 61R and the light-emitting element 61G, or the region between the light-emitting element 61G and the light-emitting element 61B (hereinafter simply referred to as the distance between the light-emitting elements) can be narrowed. Specifically, the distance between the light-emitting elements can be set to 1 μm or less, preferably 500 nm or less, more preferably 200 nm or less, 100 nm or less, 90 nm or less, 70 nm or less, 50 nm or less, 30 nm or less, 20 nm or less, 15 nm or less, or 10 nm or less. In other words, the structure shown in FIG29D has a region where the spacing between the side of EL layer 172R and the side of EL layer 172G, or the spacing between the side of EL layer 172G and the side of EL layer 172B, is 1 μm or less, preferably 0.5 μm (500 nm) or less, and more preferably 100 nm or less.

[0272] In addition, in the structure shown in FIG29D, for example, when region 275 contains gas, the mixing or crosstalk of light from each light-emitting element can be suppressed while the element separation between the light-emitting elements is performed.

[0273] Additionally, region 275 may also be filled with a filler. Examples of fillers include epoxy resin, acrylic resin, silicone resin, phenolic resin, polyimide resin, PVC (polyvinyl chloride) resin, PVB (polyvinyl butyral) resin, or EVA (ethylene vinyl acetate) resin. Alternatively, a photoresist may be used as a filler. The photoresist used as a filler can be either a positive or negative photoresist.

[0274] Furthermore, when comparing the aforementioned white light-emitting devices (single-structure or series-structure) and SBS structure light-emitting devices, the power consumption of the SBS structure light-emitting device is lower than that of the white light-emitting device. Therefore, in a display device according to one embodiment of the present invention, when it is desirable to reduce power consumption, it is preferable to use an SBS structure light-emitting device. On the other hand, the manufacturing process of a white light-emitting device is simpler than that of an SBS structure light-emitting device. Thus, in a display device according to one embodiment of the present invention, by appropriately using a white light-emitting device, manufacturing costs can be reduced or manufacturing yield can be improved.

[0275] FIG30A shows an example different from the structure described above. Specifically, the structure shown in FIG30A differs from the structure shown in FIG29D in the structure of the insulating layer 363. During the processing of the light-emitting elements 61R, 61G, and 61B, a portion of the top surface of the insulating layer 363 is removed, resulting in a recess. A protective layer 271 is formed in this recess. In other words, in the structure shown in FIG30A, the bottom surface with the protective layer 271 is located below the bottom surface of the conductive layer 171 when viewed in cross-section. In the structure shown in FIG30A, by having this area, impurities (typically water, etc.) that can enter the light-emitting elements 61R, 61G, and 61B from below can be appropriately suppressed. Furthermore, the aforementioned recess can be formed when removing impurities (also called residues) that can adhere to the sides of each light-emitting element during the processing of the light-emitting elements 61R, 61G, and 61B by means of wet etching or the like. By covering the sides of each light-emitting element with a protective layer 271 after removing the aforementioned residue, the display device of one embodiment of the present invention can be a highly reliable display device.

[0276] Figure 30B shows an example different from the structure described above. Specifically, the structure shown in Figure 30B includes an insulating layer 276 and a microlens array 277 in addition to the structure shown in Figure 30A. The insulating layer 276 is used as an adhesive layer. Furthermore, when the refractive index of the insulating layer 276 is lower than the refractive index of the microlens array 277, the microlens array 277 can focus the light emitted by the light-emitting elements 61R, 61G, and 61B. Thus, in the structure shown in Figure 30B, the light extraction efficiency of the display device can be improved. This is especially advantageous when the user views the display surface from the front of the display surface, as a bright image can be seen. In addition, as the insulating layer 276, various curing adhesives such as UV-curing adhesives, reaction-curing adhesives, thermosetting adhesives, or anaerobic adhesives can be used. Examples of such adhesives include epoxy resins, acrylic resins, silicone resins, phenolic resins, polyimide resins, PVC (polyvinyl chloride) resins, PVB (polyvinyl butyral) resins, and EVA (ethylene vinyl acetate) resins. In particular, materials with low moisture permeability, such as epoxy resins, are preferred. Two-component mixed resins can also be used. Furthermore, adhesive sheets can also be used.

[0277] Figure 30C shows an example different from the structure described above. Specifically, the structure shown in Figure 30C includes three light-emitting elements 61W instead of the light-emitting elements 61R, 61G, and 61B in the structure shown in Figure 30A. Furthermore, the structure shown in Figure 30C includes an insulating layer 276 above the three light-emitting elements 61W. Additionally, the structure shown in Figure 30C includes color layers 264R, 264G, and 264B above the insulating layer 276. Specifically, a color layer 264R that transmits red light is disposed at the position overlapping the light-emitting element 61W on the left. A color layer 264G that transmits green light is disposed at the position overlapping the light-emitting element 61W in the center. A color layer 264B that transmits blue light is disposed at the position overlapping the light-emitting element 61W on the right. Thus, the display device can display color images. Note that the structure shown in Figure 30C is also a variation of the structure shown in Figure 29C.

[0278] Figure 30D shows an example different from the structure described above. Specifically, in the structure shown in Figure 30D, the protective layer 271 is disposed adjacent to the side of the conductive layer 171 and the EL layer 172. Furthermore, the conductive layer 173 is configured as a continuous layer shared by all light-emitting elements. Additionally, in the structure shown in Figure 30D, region 275 is preferably filled with a filler.

[0279] By giving the light-emitting element 61 of one embodiment of the present invention an optical microcavity resonator (microcavity) structure, the color purity of the emitted color can be improved. When giving the light-emitting element 61 a microcavity structure, the light-emitting element 61 is configured such that the product of the distance d between the conductive layer 171 and the conductive layer 173 and the refractive index n of the EL layer 172 (optical distance) is set to m times half of the wavelength λ (m is an integer greater than or equal to 1). The distance d can be obtained from mathematical formula 1.

[0280] d=m×λ / (2×n) (Mathematical Formula 1).

[0281] According to mathematical formula 1, the distance d in the light-emitting element 61 of the microcavity structure is determined based on the wavelength (emission color) of the emitted light. The distance d is equivalent to the thickness of the EL layer 172. Therefore, the EL layer 172G is sometimes provided to be thicker than the EL layer 172B, and the EL layer 172R is sometimes provided to be thicker than the EL layer 172G.

[0282] Note that, strictly speaking, distance d is the distance from the reflective region in the conductive layer 171 used as a reflective electrode to the reflective region in the conductive layer 173 used as a transmissive-reflective electrode. For example, when the conductive layer 171 is a stack of silver and a transparent conductive film of ITO, and the ITO is located on one side of the EL layer 172, the distance d corresponding to the emission color can be set by adjusting the thickness of the ITO. That is, even if the thicknesses of the EL layers 172R, EL layers 172G, and EL layers 172B are all the same, a distance d suitable for the emission color can be obtained by changing the thickness of the ITO.

[0283] However, it is sometimes difficult to strictly determine the position of the reflective region in the conductive layer 171 and the conductive layer 173. In this case, the light-emitting element 61 can fully obtain the microcavity effect by assuming any position in the conductive layer 171 and the conductive layer 173 as the reflective region.

[0284] The light-emitting element 61 is composed of, for example, a hole injection layer, a hole transport layer, a light-emitting layer, an electron transport layer, or an electron injection layer. Detailed structural examples of the light-emitting element 61 will be described in other embodiments. To improve the light extraction efficiency of the microcavity structure, it is preferable to set the optical distance from the conductive layer 171, which is used as a reflective electrode, to the light-emitting layer to an odd multiple of λ / 4. To achieve this optical distance, it is preferable to adjust the thickness of each layer constituting the light-emitting element 61.

[0285] Furthermore, when light is emitted from the conductive layer 173 side, the light reflectivity of the conductive layer 173 is preferably higher than its light transmittance. The light transmittance of the conductive layer 173 is preferably 2% or more and 50% or less, more preferably 2% or more and 30% or less, and even more preferably 2% or more and 10% or less. By reducing the light transmittance of the conductive layer 173 (increasing the light reflectivity), the microcavity effect can be improved.

[0286] FIG. 31A shows an example different from the structure described above. Specifically, in the structure shown in FIG. 31A, the EL layer 172 in each of the light-emitting elements 61R, 61G, and 61B extends beyond the end of the conductive layer 171. For example, in the light-emitting element 61R, the EL layer 172R extends beyond the end of the conductive layer 171. Additionally, in the light-emitting element 61G, the EL layer 172G extends beyond the end of the conductive layer 171. Furthermore, in the light-emitting element 61B, the EL layer 172B extends beyond the end of the conductive layer 171.

[0287] Furthermore, in each of the light-emitting elements 61R, 61G, and 61B, the EL layer 172 and the protective layer 271 have an overlapping area separated by the insulating layer 270. In addition, in the area between adjacent light-emitting elements 61, the insulating layer 278 is disposed on the protective layer 271.

[0288] Examples of insulating layers 278 include epoxy resin, acrylic resin, silicone resin, phenolic resin, polyimide resin, PVC (polyvinyl chloride) resin, PVB (polyvinyl butyral) resin, or EVA (ethylene vinyl acetate) resin. Additionally, photoresist can also be used as the insulating layer 278. The photoresist used as the insulating layer 278 can be either a positive or negative photoresist.

[0289] A common layer 174 is provided on the light-emitting elements 61R, 61G, 61B, and insulating layer 278. A conductive layer 173 is provided on the common layer 174. The common layer 174 has a region that contacts the EL layer 172R, a region that contacts the EL layer 172G, and a region that contacts the EL layer 172B. The light-emitting elements 61R, 61G, and 61B share the common layer 174.

[0290] The common layer 174 can be one or more of the following: a hole injection layer, a hole transport layer, a hole barrier layer, an electron barrier layer, an electron transport layer, and an electron injection layer. For example, the common layer 174 can also be a carrier injection layer (a hole injection layer or an electron injection layer). Furthermore, the common layer 174 can also be considered part of the EL layer 172. In addition, the common layer 174 can be set as needed. When the common layer 174 is set, the layers included in the EL layer 172 may not have layers with the same function as the common layer 174.

[0291] A protective layer 273 is disposed on the conductive layer 173. An insulating layer 276 is disposed on the protective layer 273.

[0292] Figure 31B shows an example different from the structure described above. Specifically, the structure shown in Figure 31B includes three light-emitting elements 61W instead of the light-emitting elements 61R, 61G, and 61B in the structure shown in Figure 31A. Furthermore, the structure shown in Figure 31B includes an insulating layer 276 above the three light-emitting elements 61W. Additionally, the structure shown in Figure 31B includes color layers 264R, 264G, and 264B above the insulating layer 276. Specifically, a color layer 264R that transmits red light is disposed at the position overlapping the light-emitting element 61W on the left. A color layer 264G that transmits green light is disposed at the position overlapping the light-emitting element 61W in the center. A color layer 264B that transmits blue light is disposed at the position overlapping the light-emitting element 61W on the right. Thus, the display device can display color images. Note that the structure shown in Figure 31B is also a variation of the structure shown in Figure 30C.

[0293] FIG32A is a perspective view of the display device 10. The display device 10 shown in FIG32A includes a layer 60 overlapping with layer 50. Layer 50 includes a plurality of pixel circuits 51 arranged in a matrix, a first driving circuit section 231, a second driving circuit section 232, and an input / output terminal section 29. Layer 60 includes a plurality of light-emitting elements 61 arranged in a matrix.

[0294] A pixel circuit 51 and a light-emitting element 61 are electrically connected to each other to be used as a pixel 230. Therefore, the area where the multiple pixel circuits 51 included in layer 50 and the multiple light-emitting elements 61 included in layer 60 overlap with each other is used as a display area 235.

[0295] The power and signals required for the operation of the display device 10 are supplied to the display device 10 through the input / output terminal section 29. In the display device 10 shown in FIG32A, the transistors included in the peripheral driving circuit and the transistors included in the pixel 230 can be formed by the same process.

[0296] Additionally, as shown in FIG32B, the display device 10 may also have layers 40, 50, and 60 stacked. In the display device 10 shown in FIG32B, layer 50 is provided with a plurality of pixel circuits 51 arranged in a matrix, and layer 40 is provided with a first driving circuit section 231 and a second driving circuit section 232. In the display device 10 shown in FIG32B, by providing the first driving circuit section 231 and the second driving circuit section 232 in a layer different from the pixel circuits 51, the bezel around the display area 235 can be narrowed, thereby increasing the area occupied by the display area 235.

[0297] The display device 10 shown in FIG. 32B can improve its resolution by increasing the area occupied by the display region 235. Alternatively, with the resolution of the display region 235 fixed, the display device 10 shown in FIG. 32B can increase the luminous brightness because it can increase the area occupied by each pixel. In addition, by increasing the area occupied by each pixel, the ratio of the luminous area to the area occupied by a pixel (also known as the "aperture ratio") can be increased. For example, the aperture ratio of the pixel can be 40% or more and less than 100%, preferably 50% or more and less than 95%, and more preferably 60% or more and less than 95%. Furthermore, by increasing the area occupied by each pixel, the current density supplied to the light-emitting element 61 can be reduced. Therefore, the load applied to the light-emitting element 61 is reduced. As a result, the reliability of the semiconductor device 100 can be improved. Therefore, the reliability of the display device 10 including the semiconductor device 100 can be improved.

[0298] By stacking the display area 235 and peripheral driving circuits, the wiring connecting them can be shortened. Therefore, wiring resistance and parasitic capacitance are reduced. This improves the operating speed of the semiconductor device 100. Furthermore, it reduces the power consumption of the semiconductor device 100.

[0299] In addition, layer 40 may include a CPU 23 (Central Processing Unit), a GPU 24 (Graphics Processing Unit), and a memory circuit section 25, in addition to the peripheral driving circuit. In this embodiment, the peripheral driving circuit, CPU 23, GPU 24, and memory circuit section 25 are sometimes collectively referred to as "functional circuit".

[0300] For example, the CPU 23 has the function of controlling the operation of the circuits set in the GPU 24 and layer 40 according to the program stored in the memory circuit section 25. The GPU 24 has the function of performing computational processing to form image data. In addition, the GPU 24 can perform a large number of row and column operations (product and sum operations) in parallel, so it can perform computational processing using neural networks at high speed, for example. The GPU 24 has, for example, the function of correcting the image data using correction data stored in the memory circuit section 25. For example, the GPU 24 has the function of generating image data after correcting one or more of the following: brightness, color, and contrast.

[0301] The display device 10 may also use the GPU 24 to perform up-conversion or down-conversion of image data. Furthermore, a super-resolution circuit may be provided in layer 40 of the display device 10. The super-resolution circuit has the function of determining the potential of any pixel in the display area 235 by performing a product of the potentials and weights of the pixels surrounding that pixel. The super-resolution circuit has the function of up-converting image data with a resolution lower than that of the display area 235. Additionally, the super-resolution circuit has the function of down-converting image data with a resolution higher than that of the display area 235.

[0302] The display device 10 can reduce the load on the GPU 24 by including a super-resolution circuit. For example, processing at 2K resolution (or 4K resolution) is performed using the GPU 24, and up-converted to 4K resolution (or 8K resolution) is performed using the super-resolution circuit, thereby reducing the load on the GPU 24. Down-conversion can also be performed in the same way.

[0303] Note that the functional circuits included in layer 40 may not include all of these components, or may include other components. For example, it may include one or more of the following: a potential generation circuit that generates multiple different potentials, and a power management circuit that controls the power supply or power cut-off of each circuit of the display device 10.

[0304] Power can be supplied to or stopped for each circuit constituting the CPU 23. For example, power can be stopped for circuits in the CPU 23 that are determined to be temporarily unused, and power can be resumed when needed, thereby reducing the power consumption of the CPU 23. The data required when power is resumed can be stored in the memory circuit or memory circuit section 25 of the CPU 23 before the circuit was stopped. By storing the data required when the circuit is restored, such as in the memory circuit or memory circuit section 25 of the CPU 23, the circuit that was stopped can be quickly restored. In addition, the CPU 23 can also stop circuit operation by stopping the supply of clock signals.

[0305] In addition, the functional circuit may include one or more of the following: DSP circuit, sensor circuit, communication circuit and FPGA (Field Programmable Gate Array).

[0306] A portion of the transistors constituting the functional circuits included in layer 40 may be disposed in layer 50. Additionally, a portion of the transistors constituting the pixel circuit 51 included in layer 50 may be disposed in layer 40. Therefore, the functional circuits may include both Si transistors and OS transistors. Furthermore, the pixel circuit 51 may also include both Si transistors and OS transistors.

[0307] FIG33 is a cross-sectional structural example of a portion of the display device 10 shown in FIG32A. The display device 10 shown in FIG33 includes a layer 50 having a substrate 301, a capacitor 246 and a transistor 310, and a layer 60 having light-emitting elements 61R, 61G and 61B. The layer 60 is disposed on the insulating layer 363 included in the layer 50.

[0308] Transistor 310 is a transistor having a channel forming region in substrate 301. Substrate 301 can be, for example, a semiconductor substrate such as a single-crystal silicon substrate. Transistor 310 includes a portion of substrate 301, a conductive layer 311, a low-resistance region 312, an insulating layer 313, and an insulating layer 314. Conductive layer 311 serves as a gate electrode. Insulating layer 313 is located between substrate 301 and conductive layer 311 and serves as a gate insulating layer. Low-resistance region 312 is a region in substrate 301 doped with impurities and serves as one of the source and drain electrodes. Insulating layer 314 covers the side of conductive layer 311 and serves as an insulating layer.

[0309] A component separation layer 315 is provided between two adjacent transistors 310 in such a way as to be embedded in the substrate 301.

[0310] An insulating layer 261 is provided to cover the transistor 310. A capacitor 246 is provided on the insulating layer 261.

[0311] The capacitor 246 includes a conductive layer 241, a conductive layer 245, and an insulating layer 243 located between them. The conductive layer 241 is used as one electrode of the capacitor 246. The conductive layer 245 is used as the other electrode of the capacitor 246. The insulating layer 243 is used as the dielectric of the capacitor 246.

[0312] A conductive layer 241 is disposed on an insulating layer 261 and embedded in an insulating layer 254. The conductive layer 241 is electrically connected to one of the source and drain electrodes of a transistor 310 via a plug 266 embedded in the insulating layer 261. An insulating layer 243 is disposed covering the conductive layer 241. A conductive layer 245 is disposed in the region where it overlaps with the conductive layer 241, separated by the insulating layer 243.

[0313] An insulating layer 255 is provided to cover the capacitor 246. An insulating layer 363 is provided on the insulating layer 255. Light-emitting elements 61R, 61G, and 61B are provided on the insulating layer 363. A protective layer 415 is provided on the light-emitting elements 61R, 61G, and 61B. A substrate 420 is provided on the top surface of the protective layer 415, separated by a resin layer 419.

[0314] The pixel electrode of the light-emitting element is electrically connected to one of the source and drain of the transistor 310 via a plug 256 embedded in insulating layer 243, insulating layer 255 and insulating layer 363, a conductive layer 241 embedded in insulating layer 254 and a plug 266 embedded in insulating layer 261.

[0315] Figure 34 is a modified example of the cross-sectional structure example shown in Figure 33. The main difference between the cross-sectional structure example of the display device 10 shown in Figure 34 and the cross-sectional structure example shown in Figure 33 is that the transistor 320 is included instead of the transistor 310. Note that the description of the same parts as in Figure 33 is sometimes omitted.

[0316] Transistor 320 is a transistor that uses metal oxide (also known as oxide semiconductor) in the semiconductor layer that forms the channel.

[0317] Transistor 320 includes semiconductor layer 321, insulating layer 323, conductive layer 324, a pair of conductive layers 325, insulating layer 326 and conductive layer 327.

[0318] As substrate 331, an insulating substrate or a semiconductor substrate can be used.

[0319] An insulating layer 332 is provided on the substrate 331. The insulating layer 332 serves as a barrier layer, preventing impurities such as water or hydrogen from diffusing from the substrate 331 to the transistor 320 and preventing oxygen from escaping from the semiconductor layer 321 towards the insulating layer 332. As the insulating layer 332, a film that is less susceptible to hydrogen or oxygen diffusion than a silicon oxide film can be used. For example, the insulating layer 332 can be an aluminum oxide film, a hafnium oxide film, or a silicon nitride film.

[0320] A conductive layer 327 is disposed on an insulating layer 332. An insulating layer 326 is disposed to cover the conductive layer 327. The conductive layer 327 serves as the first gate electrode of the transistor 320. A portion of the insulating layer 326 serves as the first gate insulating layer. Preferably, at least the portion of the insulating layer 326 in contact with the semiconductor layer 321 is an oxide insulating film such as a silicon oxide film. Preferably, the top surface of the insulating layer 326 is planarized.

[0321] A semiconductor layer 321 is disposed on an insulating layer 326. Preferably, the semiconductor layer 321 is a metal oxide (also known as an oxide semiconductor) film containing semiconductor properties. Materials that can be used for the semiconductor layer 321 will be described in detail later.

[0322] A pair of conductive layers 325 are in contact with the semiconductor layer 321 and serve as the source electrode and the drain electrode.

[0323] An insulating layer 328 is provided to cover the top and side surfaces of a pair of conductive layers 325 and the side surfaces of the semiconductor layer 321. An insulating layer 264 is provided on the insulating layer 328. The insulating layer 328 serves as a barrier layer, preventing impurities such as water or hydrogen from diffusing from the insulating layer 264 to the semiconductor layer 321 and preventing oxygen from escaping from the semiconductor layer 321. As the insulating layer 328, the same insulating film as the insulating layer 332 described above can be used.

[0324] Openings are provided in insulating layer 328 and insulating layer 264 to reach semiconductor layer 321. An insulating layer 323 and a conductive layer 324 are embedded inside these openings, contacting the sides of insulating layer 264, insulating layer 328, and conductive layer 325, as well as the top surface of semiconductor layer 321. Conductive layer 324 serves as a second gate electrode. Insulating layer 323 serves as a second gate insulating layer.

[0325] The top surfaces of the conductive layer 324, the insulating layer 323, and the insulating layer 264 are planarized with approximately the same height. Furthermore, insulating layers 329 and 265 are provided to cover them.

[0326] Insulating layers 264 and 265 are used as interlayer insulating layers. Insulating layer 329 is used as a barrier layer to prevent impurities such as water or hydrogen from diffusing from insulating layer 265 to transistor 320. Insulating layer 329 may use the same insulating film as insulating layers 328 and 332 described above.

[0327] A plug 274, electrically connected to one of the pair of conductive layers 325, is embedded in insulating layers 265, 329, and 264. Preferably, the plug 274 has a conductive layer 274a covering the side surfaces of the openings of each of the insulating layers 265, 329, 264, and 328, and a portion of the top surface of the conductive layer 325, and a conductive layer 274b in contact with the top surface of the conductive layer 274a. Preferably, the conductive layer 274a is made of a conductive material that does not readily diffuse hydrogen and oxygen.

[0328] FIG35 is a cross-sectional structural example of a portion of the display device 10 shown in FIG32B. In the display device 10 shown in FIG35, transistors 310A with channels formed in substrate 301A included in layer 40 and transistors 310B with channels formed in substrate 301B included in layer 50 are stacked. Substrate 301A can be made of the same material as substrate 301.

[0329] In the display device 10 shown in FIG35, there is a layer 60 on which a light-emitting element 61 is attached, a layer 50 on which a substrate 301B, a transistor 310B and a capacitor 246 are disposed, and a layer 40 on which a substrate 301A and a transistor 310A are disposed.

[0330] A connector 343 penetrating through the substrate 301B is provided on the substrate 301B. The connector 343 is used as a through silicon via (TSV). The connector 343 is electrically connected to a conductive layer 342 disposed on the back side of the substrate 301B (the surface opposite to the side of the substrate 420). The conductive layer 341 is disposed on the insulating layer 261 of the substrate 301A.

[0331] By bonding conductive layer 341 and conductive layer 342, layer 40 and layer 50 are electrically connected.

[0332] It is preferable that the same conductive material is used for both conductive layers 341 and 342. For example, a metal film containing elements selected from Al, Cr, Cu, Ta, Sn, Zn, Au, Ag, Pt, Ti, Mo, and W, or a metal nitride film (titanium nitride film, molybdenum nitride film, or tungsten nitride film) composed of the aforementioned elements can be used. Copper is particularly preferred as both conductive layers 341 and 342. Therefore, in order to bond conductive layers 341 and 342, a Cu-Cu (copper-copper) direct bonding technique (a technique that enables electrical conduction by connecting Cu (copper) pads to each other) can be used. Alternatively, conductive layers 341 and 342 can be bonded by bumps.

[0333] FIG36 is a modified example of the cross-sectional structure example shown in FIG35. In the cross-sectional structure example of the display device 10 shown in FIG36, a transistor 310A with a channel formed in a substrate 301A and a transistor 320 containing metal oxide in the semiconductor layer forming the channel are stacked. Note that the description of the same parts as in FIG33 to FIG35 is sometimes omitted.

[0334] Layer 50 shown in FIG. 36 has a structure in which substrate 331 is removed from layer 50 shown in FIG. 34. In layer 40 shown in FIG. 36, an insulating layer 261 is provided to cover transistor 310A. A conductive layer 251 is provided on insulating layer 261. An insulating layer 262 is provided to cover conductive layer 251. A conductive layer 252 is provided on insulating layer 262. Conductive layers 251 and 252 are each used as wiring. An insulating layer 263 and an insulating layer 332 are provided to cover conductive layer 252. A transistor 320 is provided on insulating layer 332. An insulating layer 265 is provided to cover transistor 320. A capacitor 246 is provided on insulating layer 265. The capacitor 246 and transistor 320 are electrically connected via connector 274. The insulating layers 263 included in layers 50 and 40 are provided overlapping.

[0335] Transistor 320 can be used as a transistor constituting pixel circuit 51. Transistor 310 can be used as a transistor constituting pixel circuit 51 or a transistor constituting peripheral driving circuit. Transistor 310 and transistor 320 can, for example, be used as transistors constituting functional circuits such as arithmetic circuits or memory circuits.

[0336] In the display device 10 shown in FIG36, by having this structure, in addition to the pixel circuit 51, a peripheral driving circuit and the like can also be formed directly below the layer 60 including the light-emitting element 61. Therefore, compared with the case where the driving circuit is provided around the periphery of the display area, the display device can be miniaturized.

[0337] The structure shown in this embodiment can be used in appropriate combination with the structures shown in other embodiments and examples.

[0338] Embodiment 4 In this embodiment, a transistor that can be used in a semiconductor device according to one embodiment of the present invention is described.

[0339] <Example of Transistor Structure> Figures 37A, 37B, and 37C are top views and cross-sectional views of a transistor 500 that can be used in a semiconductor device according to one embodiment of the present invention. The transistor 500 can be applied to a semiconductor device according to one embodiment of the present invention.

[0340] Figure 37A is a top view of transistor 500. Furthermore, Figures 37B and 37C are cross-sectional views of transistor 500. Here, Figure 37B is a cross-sectional view along the dashed line A1-A2 in Figure 37A. This cross-sectional view corresponds to a cross-sectional view along the channel length direction of transistor 500. Figure 37C is a cross-sectional view along the dashed line A3-A4 in Figure 37A. This cross-sectional view corresponds to a cross-sectional view along the channel width direction of transistor 500. Note that for ease of understanding, some components are omitted in the top view of Figure 37A.

[0341] As shown in FIG37, the transistor 500 includes: a metal oxide 531a disposed on a substrate (not shown); a metal oxide 531b disposed on the metal oxide 531a; a conductor 542a and a conductor 542b disposed on the metal oxide 531b and separated from each other; an insulator 580 disposed on the conductor 542a and the conductor 542b and having an opening formed between the conductor 542a and the conductor 542b; a conductor 560 disposed in the opening; an insulator 550 disposed between the metal oxide 531b, the conductor 542a, the conductor 542b and the insulator 580 and the conductor 560; and a metal oxide 531c disposed between the metal oxide 531b, the conductor 542a, the conductor 542b and the insulator 580 and the insulator 550. Here, as shown in Figures 37B and 37C, the top surface of conductor 560 is preferably substantially aligned with the top surfaces of insulators 550, 554, metal oxide 531c, and 580. Hereinafter, metal oxides 531a, 531b, and 531c are sometimes collectively referred to as metal oxide 531. Furthermore, conductors 542a and 542b are sometimes collectively referred to as conductor 542.

[0342] In the transistor 500 shown in FIG. 37, the side surfaces of conductors 542a and 542b located on the side of conductor 560 have a generally vertical shape. However, the transistor 500 is not limited to this. In the transistor 500, the angle formed by the side surfaces and bottom surfaces of conductors 542a and 542b can be 10° or more and 80° or less, preferably 30° or more and 60° or less. Furthermore, the opposing side surfaces of conductors 542a and 542b can also have multiple surfaces.

[0343] As shown in FIG37, in transistor 500, preferably, an insulator 554 is disposed between insulator 524, metal oxide 531a, metal oxide 531b, conductor 542a, conductor 542b, and metal oxide 531c and insulator 580. Here, as shown in FIGS.37B and 37C, insulator 554 is preferably in contact with the side surface of metal oxide 531c, the top surface and side surface of conductor 542a, the top surface and side surface of conductor 542b, the side surface of metal oxide 531a and metal oxide 531b, and the top surface of insulator 524.

[0344] Note that in the transistor 500 shown in FIG. 37, in and around the channel forming region (hereinafter also referred to as the channel forming region), the metal oxide 531 has a three-layer structure consisting of stacked metal oxides 531a, 531b, and 531c. However, one embodiment of the present invention is not limited to this. For example, the metal oxide 531 may have a two-layer structure consisting of metal oxides 531b and 531c, or a stacked structure consisting of four or more layers. Furthermore, in the transistor 500 shown in FIG. 37, the conductor 560 has a two-layer structure. However, one embodiment of the present invention is not limited to this. For example, the conductor 560 may also have a single-layer structure or a stacked structure consisting of three or more layers. Furthermore, for example, in the metal oxide 531, metal oxides 531a, 531b, and 531c may each have a stacked structure consisting of two or more layers.

[0345] For example, when the metal oxide 531c has a stacked structure consisting of a first metal oxide and a second metal oxide on the first metal oxide, it is preferable that the first metal oxide has the same composition as the metal oxide 531b, and the second metal oxide has the same composition as the metal oxide 531a.

[0346] Here, conductor 560 is used as the gate electrode of the transistor. Additionally, conductors 542a and 542b are each used as the source electrode or drain electrode of the transistor. As described above, conductor 560 is formed such that it is embedded in the opening of insulator 580 and sandwiched in the region between conductors 542a and 542b. Here, the arrangement of conductors 560, 542a, and 542b is selected to be self-aligned relative to the opening of insulator 580. That is, in one embodiment of the present invention, in transistor 500, the gate electrode can be self-aligned and arranged between the source electrode and the drain electrode. Therefore, conductor 560 can be formed without providing room for alignment. Thus, the occupied area of ​​transistor 500 can be reduced. This allows for higher resolution display devices. Furthermore, a display device with a narrow bezel can be realized.

[0347] As shown in FIG37, the conductor 560 preferably includes a conductor 560a disposed inside the insulator 550 and a conductor 560b disposed in a manner embedded inside the conductor 560a.

[0348] The transistor 500 preferably includes an insulator 514 disposed on a substrate (not shown), an insulator 516 disposed on the insulator 514, a conductor 505 disposed in a manner embedded in the insulator 516, an insulator 522 disposed on the insulator 516 and the conductor 505, and an insulator 524 disposed on the insulator 522. Furthermore, it is preferable that a metal oxide 531a is disposed on the insulator 524.

[0349] Preferably, an insulator 574 and an insulator 581, which serve as interlayer films, are disposed on the transistor 500. Here, the insulator 574 is preferably in contact with the top surface of the conductor 560, the insulator 550, the insulator 554, the metal oxide 531c, and the insulator 580.

[0350] Insulators 522, 554, and 574 preferably have the function of suppressing the diffusion of hydrogen (e.g., at least one of hydrogen atoms and hydrogen molecules). For example, the hydrogen permeability of insulators 522, 554, and 574 is preferably lower than that of insulators 524, 550, and 580. Furthermore, insulators 522 and 554 preferably have the function of suppressing the diffusion of oxygen (e.g., at least one of oxygen atoms and oxygen molecules). For example, the oxygen permeability of insulators 522 and 554 is preferably lower than that of insulators 524, 550, and 580.

[0351] Here, insulator 524, metal oxide 531, and insulator 550 are separated from insulator 580 and insulator 581 by insulator 554 and insulator 574. Thus, insulator 554 and insulator 574 can suppress the mixing of impurities such as hydrogen and excess oxygen contained in insulator 580 and insulator 581 into insulator 524, metal oxide 531, and insulator 550.

[0352] Preferably, a conductor 545 (conductor 545a and conductor 545b) is provided that is electrically connected to the transistor 500 and used as a plug. Furthermore, an insulator 541 (insulator 541a and insulator 541b) is included that contacts the side of the conductor 545 used as a plug. That is, the insulator 541 is formed in contact with the inner wall of the opening of the insulator 554, insulator 580, insulator 574, and insulator 581. Furthermore, a first conductor of the conductor 545 may be provided in contact with the side of the insulator 541, and a second conductor of the conductor 545 may be provided inside the first conductor of the conductor 545. Here, the height of the top surface of the conductor 545 and the height of the top surface of the insulator 581 may be approximately the same. Furthermore, the transistor 500 shown in FIG. 37 has a structure in which the first conductor and the second conductor of the conductor 545 are stacked, but one embodiment of the present invention is not limited to this. For example, conductor 545 can also have a single-layer structure or a stacked structure of three or more layers. Note that when a structure has a stacked structure, ordinal numbers are sometimes assigned according to the order of formation for distinction.

[0353] Preferably, in the transistor 500, a metal oxide (hereinafter also referred to as an oxide semiconductor) used as an oxide semiconductor is used in the metal oxide 531 (metal oxide 531a, metal oxide 531b, and metal oxide 531c) that includes the channel forming region. For example, as the metal oxide that forms the channel forming region of the metal oxide 531, it is preferable to use a metal oxide with a band gap of 2 eV or more, preferably 2.5 eV or more.

[0354] As the aforementioned metal oxide, it is preferable to include at least indium (In) or zinc (Zn). In particular, it is preferable to include both indium (In) and zinc (Zn). Furthermore, it is preferable to also include element M. Element M can be one or more of aluminum (Al), gallium (Ga), yttrium (Y), tin (Sn), boron (B), titanium (Ti), iron (Fe), nickel (Ni), germanium (Ge), zirconium (Zr), molybdenum (Mo), lanthanum (La), cerium (Ce), neodymium (Nd), hafnium (Hf), tantalum (Ta), tungsten (W), magnesium (Mg), and cobalt (Co). In particular, element M is preferably one or more of aluminum (Al), gallium (Ga), yttrium (Y), and tin (Sn). In addition, element M is more preferably composed of either or both of Ga and Sn.

[0355] Furthermore, as shown in FIG37B, the thickness of the region in the metal oxide 531b that does not overlap with the conductor 542 is sometimes thinner than the thickness of the region that overlaps with the conductor 542. This thinner region is formed by removing a portion of the region on the top surface of the metal oxide 531b that does not overlap with the conductors 542a and 542b during the formation of the conductors 542a and 542b. Here, when a conductive film for conductor 542 is deposited on the top surface of the metal oxide 531b, a low-resistance region is sometimes formed near the interface with the conductive film. Therefore, by removing the low-resistance region on the top surface of the metal oxide 531b located between the conductors 542a and 542b, the formation of a channel in this region can be suppressed.

[0356] One embodiment of the present invention includes a small-sized transistor, which can provide a display device with high resolution. Furthermore, by including a transistor with a large on-state current, a display device with high brightness can be provided. Furthermore, by including a transistor with a high operating speed, a display device with high operating speed can be provided. Furthermore, by including a transistor with stable electrical characteristics, a display device with high reliability can be provided. Furthermore, by including a transistor with a small off-state current, a display device with low power consumption can be provided.

[0357] A detailed structure of the transistor 500 of a display device that can be used in one embodiment of the present invention will be described.

[0358] The conductor 505 is configured to include a region overlapping with the metal oxide 531 and the conductor 560. Furthermore, the conductor 505 is preferably disposed in an insulator 516.

[0359] Conductor 505 includes conductor 505a, conductor 505b, and conductor 505c. Conductor 505a contacts the bottom surface and sidewall of the opening provided in insulator 516. Conductor 505b is disposed in a recess formed in conductor 505a. Here, the top surface of conductor 505b is lower than the top surface of conductor 505a and the top surface of insulator 516. Conductor 505c contacts the top surface of conductor 505b and the side surface of conductor 505a. Here, the height of the top surface of conductor 505c is approximately the same as the height of the top surface of conductor 505a and the height of the top surface of insulator 516. In other words, conductor 505b is surrounded by conductor 505a and conductor 505c.

[0360] Conductors 505a and 505c are preferably made of conductive materials that suppress the diffusion of impurities such as hydrogen atoms, hydrogen molecules, water molecules, nitrogen atoms, nitrogen molecules, nitrogen oxide molecules (e.g., N2O, NO, or NO2), or copper atoms. Alternatively, conductive materials that suppress the diffusion of oxygen (e.g., at least one of oxygen atoms and oxygen molecules) are preferably used.

[0361] By using a conductive material that inhibits hydrogen diffusion as conductors 505a and 505c, impurities such as hydrogen contained in conductor 505b can be prevented from diffusing to the metal oxide 531 via insulator 524. Furthermore, by using a conductive material that inhibits oxygen diffusion as conductors 505a and 505c, oxidation of conductor 505b and a decrease in conductivity can be prevented. For example, titanium, titanium nitride, tantalum, tantalum nitride, ruthenium, or ruthenium oxide are preferably used as conductive materials that inhibit oxygen diffusion. Therefore, conductor 505a can be a single layer or a stack of the aforementioned conductive materials. For example, titanium nitride can be used as conductor 505a.

[0362] Furthermore, the conductor 505b is preferably made of a conductive material with tungsten, copper, or aluminum as its main components. For example, tungsten can be used for the conductor 505b.

[0363] Here, conductor 560 is sometimes used as the first gate electrode (also called the top gate electrode). Furthermore, conductor 505 is sometimes used as the second gate electrode (also called the bottom gate electrode). In this case, in transistor 500, the Vth of transistor 500 can be controlled by changing the potential supplied to conductor 505 independently of the potential supplied to conductor 560. In particular, by supplying a negative potential to conductor 505, the Vth of transistor 500 can be made greater than 0V and the off-state current can be reduced. Therefore, compared to not supplying a negative potential to conductor 505, when a negative potential is supplied to conductor 505, the drain current when the potential supplied to conductor 560 is 0V can be reduced.

[0364] The conductor 505 is preferably larger than the channel forming region in the metal oxide 531. In particular, as shown in FIG37C, the conductor 505 is preferably a region extending to the outside of the end of the metal oxide 531 that intersects with the channel width direction. That is, preferably, the conductor 505 and the conductor 560 overlap with an insulator on the outside of the side of the metal oxide 531 in the channel width direction.

[0365] In the transistor 500, by having the above structure, a region can be formed around the channel of the metal oxide 531 by the electric field of the conductor 560 used as the first gate electrode and the electric field of the conductor 505 used as the second gate electrode.

[0366] As shown in FIG37C, the conductor 505 is extended to be used as wiring. However, one embodiment of the present invention is not limited to this, and the conductor used as wiring may also be provided under the conductor 505.

[0367] The insulator 514 is preferably a barrier insulating film used to inhibit impurities such as water or hydrogen from entering the transistor 500 from the substrate side. Therefore, the insulator 514 is preferably an insulating material that has the function of inhibiting the diffusion of impurities such as hydrogen atoms, hydrogen molecules, water molecules, nitrogen atoms, nitrogen molecules, nitrogen oxide molecules (e.g., N2O, NO or NO2, etc.) or copper atoms (making it difficult for the aforementioned impurities to permeate). Alternatively, it is preferable to use an insulating material that has the function of inhibiting the diffusion of oxygen (e.g., at least one of oxygen atoms and oxygen molecules, etc.) (making it difficult for the aforementioned oxygen to permeate).

[0368] For example, it is preferable to use aluminum oxide or silicon nitride as the insulator 514. Thus, the insulator 514 can, for example, suppress the diffusion of impurities such as water or hydrogen from the side closer to the substrate than the insulator 514 to the transistor 500 side. Alternatively, the insulator 514 can, for example, suppress the diffusion of oxygen contained in the insulator 524, etc., to the side closer to the substrate than the insulator 514.

[0369] The dielectric constant of insulators 516, 580, and 581, which are used as interlayer films, is preferably lower than that of insulator 514. In one embodiment of the present invention, by using a material with a low dielectric constant as the interlayer film, parasitic capacitance generated between wirings can be reduced. For example, silicon oxide, silicon oxynitride, silicon oxynitride, silicon nitride, fluorine-added silicon oxide, carbon-added silicon oxide, carbon and nitrogen-added silicon oxide, or porous silicon oxide are suitably used as insulators 516, 580, and 581.

[0370] Insulators 522 and 524 are used as gate insulators.

[0371] Here, in the insulator 524 that is in contact with the metal oxide 531, it is preferable to remove the oxygen by heating. In this specification, the oxygen removed by heating is sometimes referred to as excess oxygen. For example, silicon oxide or silicon oxynitride can be appropriately used as the insulator 524. In the transistor 500, by providing an oxygen-containing insulator 524 in contact with the metal oxide 531, oxygen vacancies in the metal oxide 531 can be reduced, thereby improving the reliability of the transistor 500.

[0372] Specifically, as the insulator 524, it is preferable to use an oxide material in which a portion of the oxygen is removed by heating. The oxide in which oxygen is removed by heating refers to an oxide film in which the amount of oxygen removed, converted to oxygen atoms in TDS (Thermal Desorption Spectroscopy) analysis, is 1.0 × 10¹⁸ atoms / cm³ or more, preferably 1.0 × 10¹⁹ atoms / cm³ or more, further preferably 2.0 × 10¹⁹ atoms / cm³ or more, or 3.0 × 10²⁰ atoms / cm³ or more. Furthermore, the surface temperature of the film during the above TDS analysis is preferably in the range of 100°C or higher and 700°C or lower, or 100°C or higher and 400°C or lower.

[0373] As shown in FIG37C, sometimes the thickness of the region in insulator 524 that does not overlap with insulator 554 and metal oxide 531b is thinner than the thickness of other regions. In insulator 524, the region that does not overlap with insulator 554 and metal oxide 531b preferably has a thickness sufficient to allow the aforementioned oxygen to diffuse.

[0374] Similar to insulator 514, insulator 522 is preferably used as a barrier insulating film to prevent impurities such as water or hydrogen from mixing into transistor 500 from the substrate side. For example, the hydrogen permeability of insulator 522 is preferably lower than that of insulator 524. In one embodiment of the present invention, for example, by surrounding insulator 524, metal oxide 531, and insulator 550 with insulator 522, insulator 554, and insulator 574, impurities such as water or hydrogen can be prevented from entering transistor 500 from the outside.

[0375] Furthermore, the insulator 522 preferably has the function of inhibiting the diffusion of oxygen (e.g., at least one of oxygen atoms and oxygen molecules) (making it difficult for the aforementioned oxygen to permeate). For example, the oxygen permeability of the insulator 522 is preferably lower than that of the insulator 524. By enabling the insulator 522 to inhibit the diffusion of oxygen and impurities, the diffusion of oxygen contained in the metal oxide 531 to the substrate side can be reduced. In addition, the reaction between the conductor 505 and the oxygen contained in the insulator 524 and the metal oxide 531 can be suppressed.

[0376] The insulator 522 is preferably an insulator containing an oxide of one or both of aluminum and hafnium as insulating materials. For example, aluminum oxide, hafnium oxide, or oxides containing aluminum and hafnium (hafnium aluminate) are preferred as insulators. When such a material is used to form the insulator 522, the insulator 522 serves as a layer to suppress the release of oxygen from the metal oxide 531 and the entry of impurities such as hydrogen from the periphery of the transistor 500 into the metal oxide 531.

[0377] Alternatively, the insulator 522 may be made by adding aluminum oxide, bismuth oxide, germanium oxide, niobium oxide, silicon oxide, titanium oxide, tungsten oxide, yttrium oxide, or zirconium oxide to the insulator. Alternatively, the insulator may be subjected to nitriding treatment. Alternatively, silicon oxide, silicon oxynitride, or silicon nitride may be laminated on the insulator.

[0378] As the insulator 522, for example, a single layer or a multilayer of so-called high-k materials such as alumina, hafnium oxide, tantalum oxide, zirconium oxide, lead zirconate titanate (PZT), strontium titanate (SrTiO3), or (Ba,Sr)TiO3 (BST) can be used as the insulator. When miniaturizing and increasing the integral size of transistors, problems such as leakage current sometimes occur due to the thinning of the gate insulator. In the transistor 500, by using a high-k material as the insulator used as the gate insulator, the gate potential during transistor operation can be reduced while maintaining the physical thickness.

[0379] Furthermore, insulators 522 and 524 may also have a multilayer structure with two or more layers. In this case, it is not limited to a multilayer structure made of the same material, but may also be a multilayer structure made of different materials. For example, an insulator identical to insulator 524 may be provided under insulator 522.

[0380] The metal oxide 531 includes a metal oxide 531a, a metal oxide 531b on the metal oxide 531a, and a metal oxide 531c on the metal oxide 531b. In the metal oxide 531, when the metal oxide 531a is disposed below the metal oxide 531b, the diffusion of impurities from the structure formed below the metal oxide 531a to the metal oxide 531b can be suppressed. In the metal oxide 531, when the metal oxide 531c is disposed on the metal oxide 531b, the diffusion of impurities from the structure formed above the metal oxide 531c to the metal oxide 531b can be suppressed.

[0381] Furthermore, the metal oxide 531 is preferably a stacked structure having oxide layers with different atomic ratios of each metal atom. For example, when the metal oxide 531 contains at least indium (In) and element M, the atomic ratio of element M to other elements in the constituent elements of metal oxide 531a is preferably greater than the atomic ratio of element M to other elements in the constituent elements of metal oxide 531b. Furthermore, the atomic ratio of element M to In in metal oxide 531a is preferably greater than the atomic ratio of element M to In in metal oxide 531b. Here, the metal oxide 531c can be a metal oxide that can be used for metal oxide 531a or metal oxide 531b.

[0382] Preferably, the energy of the conduction band bottom of metal oxides 531a and 531c is higher than that of metal oxide 531b. In other words, the electron affinity of metal oxides 531a and 531c is preferably lower than that of metal oxide 531b. In this case, metal oxide 531c is preferably a metal oxide that can be used for metal oxide 531a. Specifically, the ratio of the number of atoms of element M in the constituent elements of metal oxide 531c to other elements is preferably greater than the ratio of the number of atoms of element M in the constituent elements of metal oxide 531b to other elements. Furthermore, the ratio of the number of atoms of element M in metal oxide 531c to In is preferably greater than the ratio of the number of atoms of element M in metal oxide 531b to In.

[0383] Here, in the junction of metal oxides 531a, 531b, and 531c, the energy level of the conduction band bottom changes gradually. In other words, the above situation can also be expressed as the energy level of the conduction band bottom at the junction of metal oxides 531a, 531b, and 531c changing continuously or continuously joining. For this purpose, it is preferable to reduce the defect state density of the mixed layer formed at the interface between metal oxides 531a and 531b and the interface between metal oxides 531b and 531c.

[0384] Specifically, by including a common element (as the main component) in addition to oxygen in metal oxides 531a and 531b, and in metal oxides 531b and 531c, a mixed layer with low defect state density can be formed. For example, when metal oxide 531b is an In-Ga-Zn oxide, In-Ga-Zn oxide, Ga-Zn oxide, or gallium oxide can be used as metal oxides 531a and 531c. Furthermore, metal oxide 531c can have a stacked structure. For example, a stacked structure of In-Ga-Zn oxide and Ga-Zn oxide on the In-Ga-Zn oxide can be used, or a stacked structure of In-Ga-Zn oxide and gallium oxide on the In-Ga-Zn oxide can be used. In other words, a stacked structure of In-Ga-Zn oxide and an oxide that does not contain In can also be used as metal oxide 531c.

[0385] Specifically, for metal oxide 531a, an In:Ga:Zn ratio of 1:3:4 or 1:1:0.5 is acceptable. Furthermore, for metal oxide 531b, an In:Ga:Zn ratio of 4:2:3 or 3:1:2 is acceptable. Furthermore, for metal oxide 531c, an In:Ga:Zn ratio of 1:3:4, 4:2:3, 2:1, or 2:5 is acceptable. Furthermore, as specific examples of metal oxide 531c having a stacked structure, examples include stacked structures of In:Ga:Zn=4:2:3 [atomic ratio] and Ga:Zn=2:1 [atomic ratio], stacked structures of In:Ga:Zn=4:2:3 [atomic ratio] and Ga:Zn=2:5 [atomic ratio], or stacked structures of In:Ga:Zn=4:2:3 [atomic ratio] and gallium oxide, etc.

[0386] At this time, the main carrier pathway of metal oxide 531 is metal oxide 531b. By giving metal oxides 531a and 531c the above-described structure, the defect state density at the interface between metal oxides 531a and 531b, and at the interface between metal oxides 531b and 531c, can be reduced. Therefore, in metal oxide 531, the influence of interface scattering on carrier conduction is reduced, thereby allowing transistor 500 to obtain a large on-state current and high frequency characteristics. Furthermore, when metal oxide 531c has a stacked structure, it can reduce the defect state density at the interface between metal oxides 531b and 531c and suppress the diffusion of constituent elements contained in metal oxide 531c to the insulator 550 side. More specifically, when an oxide that does not contain In is stacked on top of metal oxide 531c, the metal oxide 531c can suppress In diffusion to the insulator 550 side. Insulator 550 is used as a gate insulator. Therefore, the diffusion of In within the insulator 550 leads to poor characteristics of the transistor 500. Thus, in one embodiment of the invention, by having the metal oxide 531c have a multilayer structure, a highly reliable display device can be provided.

[0387] Conductors 542 (conductors 542a and conductors 542b) serving as source and drain electrodes are provided on the metal oxide 531b. As conductor 542, it is preferred to use a metal element selected from aluminum, chromium, copper, silver, gold, platinum, tantalum, nickel, titanium, molybdenum, tungsten, hafnium, vanadium, niobium, manganese, magnesium, zirconium, beryllium, indium, ruthenium, iridium, strontium, and lanthanum, an alloy containing the aforementioned metal elements, or an alloy combining the aforementioned metal elements. For example, it is preferred to use tantalum nitride, titanium nitride, tungsten, nitrides containing titanium and aluminum, nitrides containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, oxides containing strontium and ruthenium, or oxides containing lanthanum and nickel. In addition, tantalum nitride, titanium nitride, nitrides containing titanium and aluminum, nitrides containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, oxides containing strontium and ruthenium, or oxides containing lanthanum and nickel are conductive materials that are not easily oxidized or that maintain conductivity even when absorbing oxygen, so they are preferred.

[0388] By forming the conductor 542 in contact with the metal oxide 531, the oxygen concentration near the conductor 542 in the metal oxide 531 sometimes decreases. Furthermore, a metal compound layer comprising the metal contained in the conductor 542 and components of the metal oxide 531 sometimes forms near the conductor 542 in the metal oxide 531. In this case, the carrier concentration in the region near the conductor 542 of the metal oxide 531 increases, and the resistance of that region decreases.

[0389] Here, the region between conductors 542a and 542b is formed in a manner that overlaps with the opening of insulator 580. Therefore, in transistor 500, conductor 560 can be self-aligned between conductors 542a and 542b.

[0390] Insulator 550 is used as a gate insulator. Insulator 550 is preferably disposed in contact with the top surface of metal oxide 531c. Insulator 550 may be silicon oxide, silicon oxynitride, silicon oxynitride, silicon nitride, fluorine-added silicon oxide, carbon-added silicon oxide, silicon oxide with added carbon and nitrogen, or porous silicon oxide. In particular, silicon oxide and silicon oxynitride have thermal stability and are therefore preferred.

[0391] Similar to insulator 524, it is preferable to reduce the concentration of impurities such as water or hydrogen in insulator 550. The thickness of insulator 550 is preferably 1 nm or more and 20 nm or less.

[0392] In the transistor 500, a metal oxide may also be disposed between the insulator 550 and the conductor 560. Preferably, this metal oxide is used to suppress the diffusion of oxygen from the insulator 550 to the conductor 560. Thus, the metal oxide can suppress the oxidation of the conductor 560 caused by oxygen in the insulator 550.

[0393] This metal oxide is sometimes used as part of the gate insulator. Therefore, when silicon oxide or silicon oxynitride is used for the insulator 550, it is preferable to use a metal oxide that is a high-k material with a high relative permittivity as the metal oxide. By making the gate insulator have a stacked structure of insulator 550 and the metal oxide, a stacked structure with thermal stability and a high relative permittivity can be formed. Therefore, in the transistor 500, the gate potential applied during transistor operation can be reduced while maintaining the physical thickness of the gate insulator. In addition, the equivalent oxide thickness (EOT) of the insulator used as the gate insulator can be reduced.

[0394] Specifically, the metal oxide can be one or more metal oxides selected from hafnium, aluminum, gallium, yttrium, zirconium, tungsten, titanium, tantalum, nickel, germanium, and magnesium. In particular, it is preferred to use aluminum oxide, hafnium oxide, or an oxide containing aluminum and hafnium (hafnium aluminate) as an insulator containing one or both of aluminum and hafnium.

[0395] Although the conductor 560 has a two-layer structure in Figure 37, it can also have a single-layer structure or a stacked structure of three or more layers.

[0396] As a conductor 560a, it is preferable to use a conductor that has the function of suppressing the diffusion of impurities such as hydrogen atoms, hydrogen molecules, water molecules, nitrogen atoms, nitrogen molecules, nitrogen oxide molecules (e.g., N2O, NO or NO2, etc.) or copper atoms. Furthermore, it is preferable to use a conductive material that has the function of suppressing the diffusion of oxygen (e.g., at least one of oxygen atoms and oxygen molecules, etc.).

[0397] When the conductor 560a has the function of inhibiting oxygen diffusion, it can prevent the oxygen contained in the insulator 550 from oxidizing the conductor 560b and causing a decrease in conductivity. As a conductive material with the function of inhibiting oxygen diffusion, tantalum, tantalum nitride, ruthenium, or ruthenium oxide are preferably used, for example.

[0398] Preferably, a conductive material with tungsten, copper, or aluminum as its main component is used as the conductor 560b. Furthermore, since the conductor 560 is also used for wiring, a conductor with high conductivity is preferred. For example, a conductive material with tungsten, copper, or aluminum as its main component can be used. Additionally, the conductor 560b can have a multilayer structure. For example, it can have a multilayer structure of titanium or titanium nitride with the aforementioned conductive material.

[0399] As shown in Figures 37A and 37C, in the region of the metal oxide 531b that does not overlap with the conductor 542, i.e., in the channel-forming region of the metal oxide 531, the side surface of the metal oxide 531 is covered by the conductor 560. Therefore, the electric field of the conductor 560, which is used as the first gate electrode, can easily influence the side surface of the metal oxide 531. This improves the on-state current and frequency characteristics of the transistor 500.

[0400] Insulator 554, for example, like insulator 514, is preferably used as a barrier insulating film to prevent impurities such as water or hydrogen from mixing into transistor 500 from the side of insulator 580. For example, the hydrogen permeability of insulator 554 is preferably lower than that of insulator 524. Furthermore, as shown in Figures 37B and 37C, insulator 554 is preferably in contact with the side surface of metal oxide 531c, the top and side surface of conductor 542a, the top and side surface of conductor 542b, the side surfaces of metal oxides 531a and 531b, and the top surface of insulator 524. By adopting this structure, insulator 554 can prevent hydrogen contained in insulator 580 from entering metal oxide 531 from the top or side surface of conductors 542a, conductor 542b, metal oxides 531a, 531b, and insulator 524.

[0401] Furthermore, insulator 554 also has the function of inhibiting the diffusion of oxygen (e.g., at least one of oxygen atoms and oxygen molecules) (making it difficult for the aforementioned oxygen to permeate). For example, the oxygen permeability of insulator 554 is preferably lower than that of insulator 580 or insulator 524.

[0402] The insulator 554 is preferably deposited by sputtering. By depositing the insulator 554 using sputtering in an oxygen-containing atmosphere, oxygen can be added to the vicinity of the region of the insulator 524 in contact with the insulator 554. Thus, the insulator 554 can supply oxygen from this region to the metal oxide 531. Here, by making the insulator 554 have the function of inhibiting oxygen diffusion upwards, oxygen can be prevented from diffusing from the metal oxide 531 to the insulator 580. Furthermore, by making the insulator 522 have the function of inhibiting oxygen diffusion downwards, oxygen can be prevented from diffusing from the metal oxide 531 to the substrate side. In this way, oxygen is supplied to the channel-forming region in the metal oxide 531. This reduces oxygen vacancies in the metal oxide 531 and suppresses the constant-on state of the transistor.

[0403] As an insulator 554, for example, an insulator containing an oxide of one or both of aluminum and hafnium can be deposited. Note that as an insulator containing an oxide of one or both of aluminum and hafnium, aluminum oxide, hafnium oxide, or an oxide containing aluminum and hafnium (hafnium aluminate) are preferably used.

[0404] By covering insulators 524, 550, and metal oxide 531 with an insulator 554 that blocks hydrogen, insulator 580 is separated from insulators 524, metal oxide 531, and 550. Thus, insulator 554 can suppress the entry of impurities such as hydrogen from the outside of transistor 500. Therefore, transistor 500 can be endowed with good electrical characteristics and reliability.

[0405] The insulator 580 is preferably disposed on the insulator 524, the metal oxide 531, and the conductor 542, with the insulator 554 as a secondary component. For example, the insulator 580 is preferably made of silicon oxide, silicon oxynitride, silicon oxynitride, fluorine-added silicon oxide, carbon-added silicon oxide, silicon oxide with carbon and nitrogen added, or porous silicon oxide. In particular, silicon oxide and silicon oxynitride are preferred because they have thermal stability. In particular, for example, materials such as silicon oxide, silicon oxynitride, or porous silicon oxide tend to form regions containing oxygen that is released by heating, which is also preferred.

[0406] Preferably, the concentration of impurities such as water or hydrogen in the insulator 580 is reduced. In addition, the top surface of the insulator 580 can also be planarized.

[0407] Insulator 574 is preferably a barrier insulating film used in the same way as insulator 514 to prevent impurities such as water or hydrogen from mixing into insulator 580 from above. As insulator 574, for example, an insulator that can be used for insulator 514 or insulator 554 can be used.

[0408] Preferably, an insulator 581, which serves as an interlayer film, is provided on the insulator 574. Similar to the insulator 524, it is preferable that the concentration of impurities such as water or hydrogen in the insulator 581 is reduced.

[0409] Conductors 545a and 545b are disposed in openings formed in insulators 581, 574, 580, and 554. Furthermore, conductors 545a and 545b are arranged such that conductor 560 is sandwiched between them. Additionally, the top surfaces of conductors 545a and 545b can be on the same plane as the top surface of insulator 581.

[0410] Furthermore, an insulator 541a is provided in contact with the inner wall of the opening of insulators 581, 574, 580, and 554. A first conductor 545a is formed in contact with the side of insulator 541a. Conductor 542a is located at least a portion of the bottom of the opening and is in contact with conductor 545a. Similarly, an insulator 541a is provided in contact with the inner wall of the opening of insulators 581, 574, 580, and 554. A first conductor 545b is formed in contact with the side of insulator 541b. Conductor 542b is located at least a portion of the bottom of the opening and is in contact with conductor 545b.

[0411] Conductors 545a and 545b are preferably made of conductive materials with tungsten, copper, or aluminum as the main components. In addition, conductors 545a and 545b may also have a laminated structure.

[0412] When a multilayer structure is adopted as the conductor 545, the conductor that contacts the metal oxide 531a, metal oxide 531b, conductor 542, insulator 554, insulator 580, insulator 574, and insulator 581 is preferably a conductor that has the function of suppressing the diffusion of impurities such as water or hydrogen. For example, tantalum, tantalum nitride, titanium, titanium nitride, ruthenium, or ruthenium oxide are preferably used. For example, a conductive material that has the function of suppressing the diffusion of impurities such as water or hydrogen can be used as a single layer or in a multilayer. By using the conductive material, conductors 545a and 545b can prevent oxygen added to insulator 580 from being absorbed by conductors 545a and 545b. In addition, impurities such as water or hydrogen can be prevented from entering the metal oxide 531 from the layer above insulator 581 through conductors 545a and 545b.

[0413] As insulators 541a and 541b, for example, an insulator suitable for insulator 554 can be used. Because insulators 541a and 541b are disposed in contact with insulator 554, impurities such as water or hydrogen can be prevented from entering the metal oxide 531 from insulator 580 through conductors 545a and 545b. Furthermore, insulators 541a and 541b can prevent oxygen contained in insulator 580 from being absorbed by conductors 545a and 545b.

[0414] Note that, although not shown, the conductor used for wiring can be configured to contact the top surfaces of conductor 545a and conductor 545b. The conductor used for wiring is preferably a conductive material with tungsten, copper, or aluminum as its main component. Furthermore, the conductor can have a multilayer structure. For example, it can have a multilayer structure of titanium or titanium nitride with the aforementioned conductive material. The conductor can also be formed by embedding it in an opening in an insulator.

[0415] <Materials for the Construction of Transistors> The following describes the materials that can be used to construct transistors.

[0416] [Substrate] The substrate for forming the transistor 500 can be an insulating substrate, a semiconductor substrate, or a conductive substrate. Examples of insulating substrates include glass substrates, quartz substrates, sapphire substrates, stabilized zirconia substrates (e.g., yttrium-stabilized zirconia substrates), or resin substrates. Examples of semiconductor substrates include semiconductor substrates made of silicon or germanium, or compound semiconductor substrates made of silicon carbide, silicon germanium, gallium arsenide, indium phosphide, zinc oxide, or gallium oxide. Furthermore, examples of semiconductor substrates having insulating regions within the aforementioned semiconductor substrates (e.g., SOI (Silicon On Insulator) substrates). Examples of conductive substrates include graphite substrates, metal substrates, alloy substrates, or conductive resin substrates. Additionally, examples of substrates containing metal nitrides or metal oxides can be used. Furthermore, examples include insulating substrates incorporating conductors or semiconductors, semiconductor substrates incorporating conductors or insulators, and conductive substrates incorporating semiconductors or insulators. Additionally, substrates incorporating components can also be used. Examples of components incorporating components on the substrate include capacitors, resistors, switching elements, light-emitting elements, and memory elements.

[0417] [Insulator] As an insulator, there are, for example, oxides, nitrides, oxynitrides, nitrogen oxides, metal oxides, metal oxynitrides or metal nitrogen oxides, etc., which have insulating properties.

[0418] For example, when miniaturizing and hyper-integrating transistors, problems such as leakage current sometimes occur due to the thinning of the gate insulator. By using a high-k material as the insulator used as the gate insulator, it is possible to achieve low voltage during transistor operation while maintaining the physical thickness. On the other hand, by using a material with a relatively low permittivity as the insulator used as the interlayer film, parasitic capacitance generated between wirings can be reduced. Therefore, it is preferable to select the insulator material according to the function.

[0419] Examples of insulators with relatively high permittivity include gallium oxide, hafnium oxide, zirconium oxide, oxides containing aluminum and hafnium, oxynitrides containing aluminum and hafnium, oxides containing silicon and hafnium, oxynitrides containing silicon and hafnium, or nitrides containing silicon and hafnium.

[0420] Insulators with relatively low permittivity include, for example, silicon oxide, silicon oxynitride, silicon oxynitride, silicon nitride, silicon oxide with added fluorine, silicon oxide with added carbon, silicon oxide with added carbon and nitrogen, silicon oxide or resin with pores, etc.

[0421] By surrounding a transistor using an oxide semiconductor with an insulator (e.g., insulator 514, insulator 522, insulator 554, and insulator 574) that has the function of suppressing the permeation of impurities such as hydrogen and oxygen, the electrical characteristics of the transistor can be stabilized. As an insulator that has the function of suppressing the permeation of impurities such as hydrogen and oxygen, insulators containing boron, carbon, nitrogen, oxygen, fluorine, magnesium, aluminum, silicon, phosphorus, chlorine, argon, gallium, germanium, yttrium, zirconium, lanthanum, neodymium, hafnium, or tantalum can be used, either as a single layer or in a stack. Specifically, as an insulator that has the function of suppressing the permeation of impurities such as hydrogen and oxygen, metal oxides such as aluminum oxide, magnesium oxide, gallium oxide, germanium oxide, yttrium oxide, zirconium oxide, lanthanum oxide, neodymium oxide, hafnium oxide, or tantalum oxide, or metal nitrides such as aluminum nitride, titanium aluminum nitride, titanium nitride, silicon oxynitride, or silicon nitride can be used.

[0422] The insulator used as the gate insulator is preferably an insulator having a region containing oxygen that is removed by heating. For example, by employing a structure in which silicon oxide or silicon oxynitride having a region containing oxygen that is removed by heating is contacted with the metal oxide 531, the oxygen vacancies contained in the metal oxide 531 can be filled.

[0423] [Conductor] As a conductor, it is preferable to use a metallic element selected from aluminum, chromium, copper, silver, gold, platinum, tantalum, nickel, titanium, molybdenum, tungsten, hafnium, vanadium, niobium, manganese, magnesium, zirconium, beryllium, indium, ruthenium, iridium, strontium, and lanthanum, an alloy containing the above-mentioned metallic elements, or an alloy combining the above-mentioned metallic elements. For example, it is preferable to use tantalum nitride, titanium nitride, tungsten, nitrides containing titanium and aluminum, nitrides containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, oxides containing strontium and ruthenium, or oxides containing lanthanum and nickel. In addition, tantalum nitride, titanium nitride, nitrides containing titanium and aluminum, nitrides containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, oxides containing strontium and ruthenium, or oxides containing lanthanum and nickel are conductive materials that are not easily oxidized or materials that maintain conductivity even when absorbing oxygen, so they are preferred. In addition, as a conductor, semiconductors with high conductivity, such as polycrystalline silicon containing impurity elements such as phosphorus, or silicides such as nickel silicates can also be used.

[0424] As a conductor, multiple conductors formed from the above-described materials may be stacked. For example, a stacked structure combining materials containing the above-described metallic elements and conductive materials containing oxygen may also be used. Furthermore, a stacked structure combining materials containing the above-described metallic elements and conductive materials containing nitrogen may also be used. Additionally, a stacked structure combining materials containing the above-described metallic elements, conductive materials containing oxygen, and conductive materials containing nitrogen may also be used.

[0425] Furthermore, when a metal oxide is used in the channel forming region of a transistor, it is preferable to employ a laminated structure combining a material containing the aforementioned metal element and an oxygen-containing conductive material as the conductor used as the gate electrode. In this case, it is preferable to provide the oxygen-containing conductive material on the channel forming region side of the conductor. By providing the oxygen-containing conductive material on the channel forming region side, oxygen detached from the conductive material can be easily supplied to the channel forming region.

[0426] In particular, as the conductor used as the gate electrode, it is preferable to use a conductive material containing a metal element and oxygen contained in the metal oxide forming the channel. Furthermore, as the conductor, a conductive material containing the aforementioned metal element and nitrogen can also be used. For example, conductive materials containing nitrogen, such as titanium nitride or tantalum nitride, can also be used. In addition, indium tin oxide, indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium zinc oxide, or indium tin oxide with added silicon can be used. Furthermore, indium gallium zinc oxide containing nitrogen can also be used. By using the above-mentioned materials as the conductor, hydrogen contained in the metal oxide forming the channel can sometimes be trapped. Additionally, hydrogen entering from external insulators or the like can sometimes be trapped.

[0427] At least a portion of this embodiment may be implemented in combination with other embodiments described in this specification.

[0428] The structure shown in this embodiment can be implemented by appropriately combining it with the structures shown in other embodiments and examples.

[0429] Embodiment 5 In this embodiment, a metal oxide (hereinafter referred to as oxide semiconductor) that can be used in the OS transistor described in the above embodiments is explained.

[0430] <Classification of Crystal Structures> First, the classification of crystal structures in oxide semiconductors will be explained with reference to Figure 38A. Figure 38A is a diagram illustrating the classification of crystal structures in oxide semiconductors, typically IGZO (a metal oxide containing In, Ga, and Zn).

[0431] As shown in Figure 38A, oxide semiconductors are broadly classified into "Amorphous," "Crystalline," and "Crystal." Furthermore, "Amorphous" includes completely amorphous. "Crystalline" includes CAAC (c-axis-aligned crystalline), nc (nanocrystalline), and CAC (cloud-aligned composite) (excluding single crystal and poly crystal). The "Crystalline" classification does not include single crystal, poly crystal, or completely amorphous. The "Crystal" classification includes single crystal and poly crystal.

[0432] Furthermore, the structure in the thickened portion of the outer frame shown in Figure 38A is an intermediate state between "Amorphous" and "Crystal," belonging to a new crystalline phase. That is to say, this structure can be described as different from "Crystal" or the energy-unstable "Amorphous."

[0433] In addition, X-ray diffraction (XRD) spectroscopy can be used to evaluate the crystal structure of the film or substrate. Figure 38B shows the XRD spectrum of a CAAC-IGZO film classified as "Crystalline" obtained by GIXD (Grazing-Incidence XRD) measurement (the horizontal axis represents 2θ [deg.], and the vertical axis represents intensity in arbitrary units (au)). Furthermore, the GIXD method is also known as the thin film method or the Seemann-Bohlin method. Hereinafter, the XRD spectrum obtained by GIXD measurement shown in Figure 38B will be simply referred to as the XRD spectrum. Furthermore, the composition of the CAAC-IGZO film shown in Figure 38B is approximately In:Ga:Zn = 4:2:3 [atomic ratio]. Furthermore, the thickness of the CAAC-IGZO film shown in Figure 38B is 500 nm.

[0434] As shown in Figure 38B, peaks indicating clear crystallinity were detected in the XRD spectrum of the CAAC-IGZO film. Specifically, a peak indicating c-axis alignment was detected near 2θ=31° in the XRD spectrum of the CAAC-IGZO film. Furthermore, as shown in Figure 38B, the peak near 2θ=31° is asymmetrical about the angle at which the peak intensity was detected.

[0435] The crystal structure of a film or substrate can be evaluated using diffraction patterns observed by nano-beam electron diffraction (NBED). Figure 38C shows the diffraction pattern of a CAAC-IGZO film. Note that Figure 38C is the diffraction pattern observed by NBED with the electron beam incident in a direction parallel to the substrate. Furthermore, the composition of the CAAC-IGZO film shown in Figure 38C is approximately In:Ga:Zn = 4:2:3 [atomic ratio]. In addition, electron diffraction with a beam diameter of 1 nm is performed using nano-beam electron diffraction.

[0436] As shown in Figure 38C, multiple spots representing c-axis alignment were observed in the diffraction pattern of the CAAC-IGZO film.

[0437] [Structure of Oxide Semiconductors] Furthermore, when focusing on the structure of oxide semiconductors, the classification of oxide semiconductors sometimes differs from that in Figure 38A. For example, oxide semiconductors can be classified into single-crystal oxide semiconductors and other non-single-crystal oxide semiconductors. Examples of non-single-crystal oxide semiconductors include, for example, the aforementioned CAAC-OS and nc-OS. Furthermore, non-single-crystal oxide semiconductors include, for example, polycrystalline oxide semiconductors, a-like OS (amorphous-like oxide semiconductor), and amorphous oxide semiconductors.

[0438] Here, the details of CAAC-OS, nc-OS and a-like OS are explained.

[0439] [CAAC-OS] CAAC-OS is an oxide semiconductor comprising multiple crystalline regions with the c-axis aligned in a specific direction. Furthermore, the specific direction refers to the thickness direction of the CAAC-OS film, the normal direction of the formed surface of the CAAC-OS film, or the normal direction of the surface of the CAAC-OS film. Additionally, the crystalline region is a region with a periodic atomic arrangement. Note that when the atomic arrangement is considered as a lattice arrangement, the crystalline region is also a region with a consistent lattice arrangement. Moreover, CAAC-OS has a region where multiple crystalline regions are connected in the ab-plane direction. Note that sometimes this region exhibits distortion. Furthermore, distortion refers to the portion of the lattice arrangement direction that changes between regions with consistent lattice arrangement and other regions with consistent lattice arrangement in the region where multiple crystalline regions are connected. In other words, CAAC-OS refers to an oxide semiconductor with c-axis alignment but no obvious alignment in the ab-plane direction.

[0440] Furthermore, each of the aforementioned multiple crystalline regions is composed of one or more microcrystals (crystals with a maximum diameter of less than 10 nm). When a crystalline region is composed of a single microcrystal, the maximum diameter of that crystalline region is less than 10 nm. In addition, when a crystalline region is composed of multiple microcrystals, the maximum diameter of that crystalline region is sometimes around tens of nm.

[0441] In In-M-Zn oxides (element M is, for example, one or more selected from aluminum, gallium, yttrium, tin, and titanium), CAAC-OS tends to have a layered crystal structure (also called a layered structure) comprising a layer containing layers of indium (In) and oxygen (hereinafter, In layer) and a layer containing elements M, zinc (Zn), and oxygen (hereinafter, (M, Zn) layer). Furthermore, indium and element M can substitute for each other. Therefore, sometimes the (M, Zn) layer contains indium. Additionally, sometimes the In layer contains element M. Note that sometimes the In layer contains Zn. This layered structure is observed, for example, as a lattice image in high-resolution TEM (Transmission Electron Microscope) images.

[0442] For example, when performing structural analysis on a CAAC-OS film using an XRD apparatus, a peak representing c-axis alignment is detected at or near 2θ = 31° in out-of-plane XRD measurements using θ / 2θ scanning. Note that the position (2θ value) of the peak representing c-axis alignment sometimes varies depending on the type and composition of the metallic elements constituting CAAC-OS.

[0443] For example, multiple bright spots (spots) were observed in the electron diffraction pattern of the CAAC-OS film. Furthermore, when the spot of the incident electron beam passing through the sample (also known as the direct spot) is taken as the center of symmetry, one spot and other spots are observed at point-symmetric positions.

[0444] When observing the crystalline region of CAAC-OS from the specific direction described above, the lattice arrangement in this crystalline region is essentially a hexagonal lattice. However, the unit lattice of this arrangement is not limited to regular hexagons; there are cases where it is non-regular hexagonal. Furthermore, in the aforementioned distortions, CAAC-OS sometimes exhibits, for example, a pentagonal or heptagonal lattice arrangement. Moreover, it is difficult to observe a clear grain boundary near the distortion of CAAC-OS. In other words, in CAAC-OS, the distortion of the lattice arrangement inhibits the formation of grain boundaries. This may be because CAAC-OS can accommodate distortions due to the low density of oxygen atoms in the ab-plane direction or changes in the bonding distance between atoms caused by the substitution of metal elements.

[0445] Furthermore, a crystalline structure with clearly defined grain boundaries is called polycrystalline. Grain boundaries become recombination centers where carriers are trapped. Therefore, this can potentially lead to, for example, a decrease in the on-state current or a decrease in the field-effect mobility of the transistor. Therefore, CAAC-OS, which does not have clearly defined grain boundaries, is one of the crystalline oxides that provides an excellent crystalline structure for the semiconductor layer of the transistor. Note that CAAC-OS preferably has a structure containing Zn. For example, In-Zn oxides and In-Ga-Zn oxides are preferred because they can further suppress the formation of grain boundaries compared to In oxides.

[0446] CAAC-OS is an oxide semiconductor with high crystallinity and no clearly defined grain boundaries. Therefore, it can be said that in CAAC-OS, the decrease in electron mobility due to grain boundaries is less likely to occur. Furthermore, the crystallinity of oxide semiconductors can sometimes decrease due to one or more of the following: impurity incorporation or defect formation. Therefore, CAAC-OS can be considered an oxide semiconductor with few impurities and defects (e.g., oxygen vacancies). Therefore, oxide semiconductors containing CAAC-OS have stable physical properties. Thus, oxide semiconductors containing CAAC-OS exhibit high heat resistance and high reliability. Furthermore, CAAC-OS is also stable against high temperatures (so-called thermal budget) in the manufacturing process. Therefore, by using CAAC-OS in OS transistors, the process flexibility of the OS transistor can be expanded.

[0447] [nc-OS] In nc-OS, the atomic arrangement in tiny regions (e.g., regions larger than 1 nm and smaller than 10 nm, particularly regions larger than 1 nm and smaller than 3 nm) exhibits periodicity. In other words, nc-OS possesses tiny crystals. Furthermore, for example, the size of these tiny crystals is larger than 1 nm and smaller than 10 nm, particularly larger than 1 nm and smaller than 3 nm. Thus, these tiny crystals are also referred to as nanocrystals. Moreover, no regularity in crystal orientation is observed between different nanocrystals in nc-OS. Therefore, no alignment is observed in the overall film. Thus, sometimes nc-OS is indistinguishable from a-like OS and amorphous oxide semiconductors in certain analytical methods. For example, when performing structural analysis on nc-OS films using an XRD apparatus, no peaks indicating crystallinity are detected in out-of-plane XRD measurements using θ / 2θ scanning. Furthermore, when electron diffraction (also known as selected area electron diffraction) is performed on nc-OS films using an electron beam with a beam diameter larger than that of nanocrystals (e.g., 50 nm or more), a diffraction pattern resembling a halo pattern is observed. On the other hand, when electron diffraction (also known as nano-beam electron diffraction) is performed on nc-OS films using an electron beam with a beam diameter close to or smaller than that of nanocrystals (e.g., 1 nm or more and 30 nm or less), an electron diffraction pattern of multiple spots observed in a ring-shaped region centered on a direct spot is sometimes obtained.

[0448] [a-like OS] a-like OS is an oxide semiconductor with a structure intermediate between nc-OS and amorphous oxide semiconductors. a-like OS contains voids or low-density regions. That is, the crystallinity of a-like OS is lower than that of nc-OS and CAAC-OS. In addition, the hydrogen concentration in the film of a-like OS is higher than that in the films of nc-OS and CAAC-OS.

[0449] [Structure of Oxide Semiconductor] Next, the details of the above-mentioned CAC-OS will be explained. In addition, CAC-OS is related to the material composition.

[0450] [CAC-OS] CAC-OS refers, for example, to a composition in which elements contained in a metal oxide are unevenly distributed, wherein the size of the material containing the unevenly distributed elements is 0.5 nm or more and 10 nm or less, preferably 1 nm or more and 3 nm or approximately. Note that, below, the state in which one or more metal elements are unevenly distributed in a metal oxide and the regions containing those metal elements are mixed is also referred to as mosaic or patch-like, wherein the size of the region is 0.5 nm or more and 10 nm or less, preferably 1 nm or more and 3 nm or approximately.

[0451] Furthermore, CAC-OS refers to a structure in which the material is separated into a first region and a second region, forming a mosaic pattern, and the first region is distributed in the film (hereinafter also referred to as cloud-like). That is to say, CAC-OS refers to a composite metal oxide having a structure in which the first region and the second region are mixed.

[0452] Here, each of the atomic ratios of In, Ga, and Zn, the metal elements constituting the CAC-OS of the In-Ga-Zn oxide, is denoted as [In], [Ga], and [Zn]. For example, in the CAC-OS of the In-Ga-Zn oxide, a first region is a region where [In] is greater than [In] in the composition of the CAC-OS film. Furthermore, a second region is a region where [Ga] is greater than [Ga] in the composition of the CAC-OS film. Additionally, for example, a first region is a region where [In] is greater than [In] in the second region and [Ga] is less than [Ga] in the second region. Furthermore, a second region is a region where [Ga] is greater than [Ga] in the first region and [In] is less than [In] in the first region.

[0453] Specifically, the first region described above is, for example, a region whose main component is indium oxide or indium zinc oxide. Furthermore, the second region described above is, for example, a region whose main component is gallium oxide or gallium zinc oxide. In other words, the first region can be referred to as a region whose main component is In. Furthermore, the second region can be referred to as a region whose main component is Ga.

[0454] Note that it is sometimes difficult to observe the clear boundaries between the first region and the second region mentioned above.

[0455] For example, in the CAC-OS of In-Ga-Zn oxide, based on the EDX surface analysis (mapping) image obtained by Energy Dispersive X-ray spectroscopy (EDX), it can be confirmed that there is a non-uniformly distributed and mixed structure with regions (first region) mainly composed of In and regions (second region) mainly composed of Ga.

[0456] Therefore, when CAC-OS is used in a transistor, the complementary effect of the conductivity of the first region of CAC-OS and the insulation of the second region of CAC-OS allows CAC-OS to possess the switching function (controlling on / off function) of a transistor. In other words, CAC-OS has a conductive function in one part and an insulating function in another part, and a semiconductor function in the whole material. That is, by separating the conductive and insulating functions, each function can be maximized. Therefore, by using CAC-OS in a transistor, the transistor can achieve a large on-state current (Ion), high field-effect mobility (μ), and good switching operation.

[0457] Oxide semiconductors have various structures and properties. In one embodiment of the present invention, the oxide semiconductor may also include two or more of amorphous oxide semiconductors, polycrystalline oxide semiconductors, a-like OS, CAC-OS, nc-OS, and CAAC-OS.

[0458] <Transistor with oxide semiconductor> Next, we will explain the case where the above-mentioned oxide semiconductor is used as a transistor.

[0459] By using the above-mentioned oxide semiconductor as a transistor, a transistor with high field-effect mobility can be realized. In addition, a transistor with high reliability can be realized.

[0460] In particular, the semiconductor layer used as the channel for forming the transistor is preferably an oxide containing indium (In), gallium (Ga), and zinc (Zn) (also referred to as "IGZO"). Alternatively, an oxide containing indium (In), aluminum (Al), and zinc (Zn) (also referred to as "IAZO") may be used as the semiconductor layer. Alternatively, an oxide containing indium (In), aluminum (Al), gallium (Ga), and zinc (Zn) (also referred to as "IAGZO") may be used as the semiconductor layer.

[0461] Preferably, an oxide semiconductor with a low carrier concentration is used in the transistor. For example, the carrier concentration of the oxide semiconductor can be 1×10¹⁷ cm⁻³ or less, preferably 1×10¹⁵ cm⁻³ or less, more preferably 1×10¹³ cm⁻³ or less, further preferably 1×10¹¹ cm⁻³ or less, and even more preferably less than 1×10¹⁰ cm⁻³ and more than 1×10⁻⁹ cm⁻³. When the purpose is to reduce the carrier concentration in the oxide semiconductor, the impurity concentration in the oxide semiconductor can be reduced to reduce the defect state density in the oxide semiconductor. In this specification, the state of low impurity concentration and low defect state density is referred to as high purity nature or substantially high purity nature. In addition, sometimes an oxide semiconductor with a low carrier concentration is referred to as high purity nature or substantially high purity nature oxide semiconductor.

[0462] Because oxide semiconductors of high purity or essentially high purity have a low defect state density, they may have a low trap state density.

[0463] The charge trapped in the trap state of an oxide semiconductor takes a long time to disappear, and sometimes it acts like a fixed charge. Therefore, the electrical properties of the transistor that forms the channel formation region in an oxide semiconductor with a high trap state density are sometimes unstable.

[0464] Therefore, in order to stabilize the electrical properties of the transistor, it is effective to reduce the impurity concentration of the oxide semiconductor. To further reduce the impurity concentration of the oxide semiconductor, it is preferable to also reduce the impurity concentration of the adjacent film. Examples of impurities include hydrogen, nitrogen, alkali metals, alkaline earth metals, iron, nickel, or silicon.

[0465] <Impurities> Here, we explain the effects of various impurities in oxide semiconductors.

[0466] When an oxide semiconductor contains silicon or carbon, one of the elements in Group 14, defect states are formed in the oxide semiconductor. Therefore, the concentration of silicon or carbon in the oxide semiconductor (the concentration measured by secondary ion mass spectrometry (SIMS)) is set to 2 × 10¹⁸ atoms / cm³ or less, preferably 2 × 10¹⁷ atoms / cm³ or less.

[0467] When an oxide semiconductor contains an alkali metal or an alkaline earth metal, defect states are sometimes formed, thus creating carriers. Therefore, transistors using oxide semiconductors containing alkali metals or alkaline earth metals tend to have always-on characteristics. Therefore, the concentration of alkali metals or alkaline earth metals in the oxide semiconductor, as measured by SIMS, is preferably 1 × 10¹⁸ atoms / cm³ or less, and more preferably 2 × 10¹⁶ atoms / cm³ or less.

[0468] When an oxide semiconductor contains nitrogen, the carrier concentration increases due to the generation of electrons as carriers, making it prone to n-type conversion. As a result, transistors using nitrogen-containing oxide semiconductors tend to have always-on characteristics. Alternatively, when an oxide semiconductor contains nitrogen, trapped states sometimes form. As a result, the electrical properties of the transistor are sometimes unstable. Therefore, the nitrogen concentration in the oxide semiconductor, measured using SIMS, is set to be less than 5 × 10¹⁹ atoms / cm³, preferably less than 5 × 10¹⁸ atoms / cm³, more preferably less than 1 × 10¹⁸ atoms / cm³, and even more preferably less than 5 × 10¹⁷ atoms / cm³.

[0469] Hydrogen contained in an oxide semiconductor reacts with oxygen bonded to a metal atom to form water, thus sometimes creating oxygen vacancies in the oxide semiconductor. Furthermore, when hydrogen enters this oxygen vacancy, electrons as carriers are sometimes generated. Additionally, sometimes a portion of the hydrogen bonds with oxygen bonded to a metal atom, generating electrons as carriers. Therefore, transistors using oxide semiconductors containing hydrogen tend to have always-on characteristics. Thus, it is preferable to minimize the amount of hydrogen in the oxide semiconductor. Specifically, the hydrogen concentration in the oxide semiconductor, measured using SIMS, is set to be less than 1 × 10²⁰ atoms / cm³, preferably less than 1 × 10¹⁹ atoms / cm³, more preferably less than 5 × 10¹⁸ atoms / cm³, and even more preferably less than 1 × 10¹⁸ atoms / cm³.

[0470] By using oxide semiconductors with sufficiently reduced impurities in the channel formation region of the transistor, the transistor can have stable electrical characteristics.

[0471] The structure shown in this embodiment can be used in appropriate combination with the structures shown in other embodiments and examples.

[0472] Embodiment 6 In this embodiment, an electronic device to which an embodiment of the present invention can be applied will be described.

[0473] The semiconductor device according to one embodiment of the present invention can be used in the display section of an electronic device. Therefore, one embodiment of the present invention can realize an electronic device with high display quality. Alternatively, one embodiment of the present invention can realize an electronic device with extremely high precision. Alternatively, one embodiment of the present invention can realize an electronic device with high reliability.

[0474] Examples of electronic devices, such as semiconductor devices, that utilize one embodiment of the present invention include, for instance, television sets, display devices such as monitors, lighting equipment, desktop or laptop personal computers, word processors, and devices that reproduce data stored on DVDs (Digital Versatile DVDs). Devices that reproduce still or moving images on recording media such as Disc (Digital Disc), portable CD players, radios, tape recorders, stereo headphones, stereo systems, grandfather clocks, wall clocks, cordless telephone handsets, radio transceivers, car phones, mobile phones, portable information terminals, tablet terminals, portable game consoles, pinball machines and other stationary game consoles, calculators, electronic notebooks, e-book readers, electronic translators, voice input devices, cameras, digital still cameras, electric scrapers, microwave ovens and other high-frequency heating devices, electric rice cookers, electric washing machines, electric vacuum cleaners, water heaters, electric fans, hair dryers, air conditioning equipment such as air conditioners, humidifiers, dehumidifiers, etc., dishwashing machines, dish dryers, clothes dryers, quilt dryers, refrigerators, electric freezers, electric freezer-freezers, DNA preservation freezers, flashlights, chainsaws and other tools, smoke detectors or dialysis devices and other medical equipment, etc. Furthermore, examples include industrial equipment such as guide lights, signal lights, conveyor belts, elevators, escalators, industrial robots, energy storage systems, or energy storage devices used for power equalization and smart grids. Additionally, mobile vehicles propelled by fuel-powered engines or electric motors utilizing electricity from stored batteries are sometimes included in the category of electronic devices. Examples of such mobile vehicles include electric vehicles (EVs), hybrid electric vehicles (HVs) combining internal combustion engines and electric motors, plug-in hybrid electric vehicles (PHVs), tracked vehicles using tracks instead of wheels, motorized bicycles including electric-assisted bicycles, motorcycles, electric wheelchairs, golf carts, small or large boats, submarines, helicopters, airplanes, rockets, artificial satellites, space probes, planetary probes, or spacecraft.

[0475] An electronic device according to one embodiment of the present invention may also include a secondary battery (battery). Furthermore, it is preferable that the secondary battery can be charged via contactless power transmission.

[0476] As secondary batteries, examples include lithium-ion secondary batteries, nickel-metal hydride batteries, nickel-cadmium batteries, organic free radical batteries, lead-acid batteries, air secondary batteries, nickel-zinc batteries, or silver-zinc batteries.

[0477] An electronic device according to one embodiment of the present invention may also include an antenna. By receiving signals through the antenna, images and information can be displayed on the display unit. In addition, when the electronic device includes an antenna and a secondary battery, the antenna can be used for contactless power transmission.

[0478] An electronic device according to one embodiment of the present invention may also include a sensor (for example, the sensor has the function of measuring factors such as force, displacement, position, velocity, acceleration, angular velocity, rotational speed, distance, light, liquid, magnetism, temperature, chemical substance, sound, time, hardness, electric field, current, voltage, power, radiation, flow rate, humidity, tilt, vibration, odor, or infrared radiation, etc.).

[0479] An electronic device according to one embodiment of the present invention may have various functions. For example, it may have the following functions: displaying various information (e.g., still images, moving images, or text images) on a display unit; touch panel function; displaying calendar, date, or time, etc.; executing various software (programs); performing wireless communication function; or reading programs or data stored in a storage medium; etc.

[0480] Furthermore, an electronic device including multiple display units may have the function of primarily displaying image information in one part of the display units and primarily displaying text information in other parts of the display units, or it may have the function of displaying a three-dimensional image by displaying an image that takes parallax into account on multiple display units, etc. Furthermore, an electronic device having an image receiving unit may have the following functions: capturing still images; capturing moving images; automatically or manually correcting the captured images; storing the captured images in a recording medium (external or built into the electronic device); or displaying the captured images on a display unit; etc. However, the functions of the electronic device according to one embodiment of the present invention are not limited to these. The electronic device according to one embodiment of the present invention may have various functions.

[0481] A semiconductor device according to one embodiment of the present invention can display high-definition images. Therefore, it is particularly suitable for use in portable electronic devices, wearable electronic devices, or e-book readers. For example, it can be suitable for use in xR devices such as VR devices or AR devices.

[0482] Figure 39A is an external view of a camera 8000 equipped with a viewfinder 8100.

[0483] The camera 8000 includes a housing 8001, a display unit 8002, operation buttons 8003, and a shutter button 8004, etc. In addition, the camera 8000 is equipped with a detachable lens 8006. In the camera 8000, the lens 8006 and the housing can also be formed as one piece.

[0484] The camera 8000 can take pictures by pressing the shutter button 8004 or touching the display 8002, which is used as a touch panel.

[0485] The housing 8001 includes an insert with electrodes, which can be connected to the viewfinder 8100 and to a flash unit, etc.

[0486] The viewfinder 8100 includes a housing 8101, a display unit 8102, and buttons 8103, etc.

[0487] The housing 8101 is mounted to the camera 8000 by means of an inserter that fits into the camera 8000. The viewfinder 8100 can display, for example, images received from the camera 8000 on the display unit 8102.

[0488] Button 8103 is used, for example, as a power button, etc.

[0489] The semiconductor device according to one embodiment of the present invention can be used in the display unit 8002 of the camera 8000 and the display unit 8102 of the viewfinder 8100. Alternatively, the viewfinder 8100 can be built into the camera 8000.

[0490] Figure 39B is an external view of the head-mounted display 8200.

[0491] The head-mounted display 8200 includes a mounting section 8201, a lens 8202, a main body 8203, a display section 8204, and a cable 8205. In addition, a battery 8206 is built into the mounting section 8201.

[0492] The cable 8205 has the function of supplying power from the battery 8206 to the main body 8203. The main body 8203 includes, for example, a wireless receiver, and is capable of displaying received image information on the display unit 8204. In addition, the main body 8203 includes, for example, a camera, thereby allowing the use of information from the user's eye movements or eyelid movements as an input method.

[0493] Furthermore, for example, multiple electrodes may be provided at the location of the mounting part 8201 that is touched by the user to detect the current flowing through the electrodes according to the movement of the user's eyeballs, thereby realizing the function of recognizing the user's gaze. In addition, it may also have the function of monitoring the user's pulse based on the current flowing through the electrodes. The mounting part 8201 may include various sensors such as temperature sensors, pressure sensors, or acceleration sensors. The head-mounted display 8200 may also have the function of displaying the user's biometric information on the display part 8204 or the function of changing the image displayed on the display part 8204 in sync with the movement of the user's head.

[0494] The semiconductor device of one embodiment of the present invention can be used in the display unit 8204.

[0495] Figures 39C to 39E are external views of the head-mounted display 8300. The head-mounted display 8300 includes a housing 8301, a display unit 8302, a strap-shaped fixing tool 8304, and a pair of lenses 8305.

[0496] The user can see the display on the display unit 8302 through the lens 8305. For example, it is preferable to have the display unit 8302 curved in the head-mounted display 8300, because the user can experience a high degree of realism. Furthermore, for example, by seeing the images displayed on different areas of the display unit 8302 through the lens 8305, three-dimensional displays utilizing parallax can be performed. In addition, one embodiment of the present invention is not limited to a structure with one display unit 8302; for example, two display units 8302 may be provided, with one display unit for each of the user's eyes.

[0497] The semiconductor device according to one embodiment of the present invention can be used in the display unit 8302. The semiconductor device according to one embodiment of the present invention can also achieve extremely high resolution. For example, as shown in FIG39E, even when the display is magnified using the lens 8305, the pixels are not easily visible to the user. That is to say, the display unit 8302 can be used to enable the user to see images with a higher degree of realism.

[0498] Figure 39F is an external view of the goggle-type head-mounted display 8400. The head-mounted display 8400 includes a pair of housings 8401, a mounting part 8402, and a buffer member 8403. Each of the pair of housings 8401 is provided with a display part 8404 and a lens 8405. By displaying different images on the pair of display parts 8404, three-dimensional display utilizing parallax can be performed.

[0499] The user can see the display on the display unit 8404 through the lens 8405. The lens 8405 has a focus adjustment mechanism that can adjust the position of the lens 8405 according to the user's vision. The display unit 8404 is preferably square or a horizontally elongated rectangle. This can improve the realism.

[0500] The mounting part 8402 is preferably plastic and elastic so that it can be adjusted according to the user's face size without falling off. Additionally, a portion of the mounting part 8402 is preferably equipped with a vibration mechanism for use as bone conduction headphones. Thus, simply installing the device allows users to enjoy images and sound without the need for headphones or speakers. Furthermore, it may also have the function of wirelessly outputting audio data to the housing 8401.

[0501] The mounting part 8402 and the cushioning member 8403 are the parts that come into contact with the user's face (forehead or cheek, etc.). By ensuring that the cushioning member 8403 is in close contact with the user's face, light leakage can be prevented, thereby further enhancing the immersive experience. The cushioning member 8403 is preferably made of a soft material to ensure close contact with the user's face when the user wears the head-mounted display 8400. For example, materials such as rubber, silicone rubber, polyurethane, or sponge can be used. Furthermore, for example, when a component such as a cloth or leather (natural or synthetic leather) covering the surface of the sponge is used as the cushioning member 8403, gaps are less likely to form between the user's face and the cushioning member 8403, thus appropriately preventing light leakage. Additionally, using such a material not only provides a skin-friendly feel but also prevents the user from feeling cold when wearing the device in colder seasons, which is preferable. It is preferable that components such as the cushioning member 8403 or the mounting part 8402, which come into contact with the user's skin, have a detachable structure, making cleaning and replacement easier.

[0502] Figure 40A is a diagram showing an example of a television set. In the television set 7100, a display unit 7000 is assembled in a housing 7101. The structure in which the housing 7101 is supported by a bracket 7103 is shown here.

[0503] In FIG40A, a semiconductor device according to an embodiment of the present invention can be applied to the display unit 7000.

[0504] The television 7100 shown in FIG40A can be operated using the operation switch included in the housing 7101 or the separately provided remote control 7111. Alternatively, the television 7100 can be operated by including a touch sensor in the display unit 7000 and touching the display unit 7000 with a finger or the like. In addition, the remote control 7111 can also include a display unit that displays information output from the remote control 7111. By using the operation keys or touch panel included in the remote control 7111, the television 7100 can be operated to control the channel or volume. In addition, the images displayed on the display unit 7000 can be operated.

[0505] Furthermore, the television set 7100 may include, for example, a receiver and a modem. The receiver can be used to receive general television broadcasts. Moreover, the modem connects to a wired or wireless communication network to conduct one-way (from sender to receiver) or two-way (e.g., between sender and receiver or between receivers) information communication.

[0506] Figure 40B is a diagram showing an example of a laptop computer. The laptop computer 7200 includes a casing 7211, a keyboard 7212, a pointing device 7213, and an external connection port 7214, etc. A display unit 7000 is assembled in the casing 7211.

[0507] In FIG40B, a semiconductor device according to an embodiment of the present invention can be applied to the display unit 7000.

[0508] Figures 40C and 40D are diagrams showing an example of a digital signage.

[0509] The digital signage 7300 shown in Figure 40C includes a housing 7301, a display unit 7000, and a speaker 7303. It may also include LED lights, operation keys (including a power switch or operation switch), connection terminals, various sensors, or a microphone.

[0510] Figure 40D is a diagram showing a digital signage installed on a cylindrical column. The digital signage 7400 includes a display section 7000 disposed along the curved surface of the column 7401.

[0511] In Figures 40C and 40D, a semiconductor device according to an embodiment of the present invention can be applied to the display unit 7000.

[0512] In digital signage 7300 or digital signage 7400, the larger the display unit 7000, the more information it can provide at once. The larger the display unit 7000, the easier it is to attract attention, which can improve the effectiveness of advertising.

[0513] Furthermore, in the digital signage 7300 or digital signage 7400, it is preferable to use a touch panel in the display unit 7000. Therefore, not only can static or dynamic images be displayed on the display unit 7000, but users can also operate it intuitively. In addition, when used to provide information such as route information or traffic information, intuitive operation can improve ease of use.

[0514] As shown in Figures 40C and 40D, the digital signage 7300 or 7400 is preferably linked wirelessly with a user-owned smartphone or other information terminal device 7311 or 7411. For example, advertising information displayed on the display unit 7000 can be displayed on the screen of the information terminal device 7311 or 7411. Furthermore, the display on the display unit 7000 can be switched by operating the information terminal device 7311 or 7411.

[0515] Furthermore, the game can be executed on the digital signage 7300 or 7400 using the screen of the information terminal device 7311 or 7411 as the operating unit (controller). Thus, multiple users can participate in the game simultaneously and enjoy the experience.

[0516] Figure 40E is a diagram showing an example of an information terminal. The information terminal 7550 includes a housing 7551, a display unit 7552, a microphone 7557, a speaker unit 7554, a camera 7553, and an operation switch 7555, etc. A semiconductor device according to one embodiment of the present invention can be used in the display unit 7552. The display unit 7552 can be used as a touch panel. Furthermore, the information terminal 7550 may have an antenna and a battery inside the housing 7551. The information terminal 7550 can be used, for example, as a smartphone, mobile phone, tablet information terminal, tablet computer, or e-book reader terminal.

[0517] Figure 40F is a diagram showing an example of a watch-type information terminal. The information terminal 7660 includes a housing 7661, a display unit 7662, a watch strap 7663, a buckle 7664, an operation switch 7665, and input / output terminals 7666, etc. Additionally, the information terminal 7660 may have an antenna and battery, for example, inside the housing 7661. The information terminal 7660 can, for example, execute various applications such as mobile phone calls, email, article reading and writing, music playback, internet communication, or computer games.

[0518] Furthermore, in the information terminal 7660, the display unit 7662 includes a touch sensor, allowing operation via touchscreen using a finger or stylus. For example, by touching the icon 7667 displayed on the display unit 7662, an application can be launched. The operation switch 7665, in addition to time setting, may also have various functions such as power switch, wireless communication switch, setting or canceling silent mode, or setting or canceling power-saving mode. For example, the function of the operation switch 7665 can be set using the operating system assembled in the information terminal 7660.

[0519] Furthermore, the portable information terminal 7660 can perform short-range wireless communication according to communication standards. For example, hands-free calling can be conducted by communicating with a wireless headset. In addition, the information terminal 7660 can send and receive data with other information terminals via the input / output terminals 7666. It can also be charged via the input / output terminals 7666. Alternatively, charging can be performed wirelessly without using the input / output terminals 7666.

[0520] Figure 41A is an exterior view of a car 9700. Figure 41B is a view showing the driver's seat of the car 9700. The car 9700 includes a body 9701, wheels 9702, an instrument panel 9703, and lights 9704, etc. A display device according to one embodiment of the present invention can be used, for example, in the display section of a car 9700. For example, the display device according to one embodiment of the present invention can be used in each of the display sections 9710 to 9715 shown in Figure 41B.

[0521] Display units 9710 and 9711 are display devices installed on the windshield of an automobile. By using a conductive material with light transmittance to manufacture the electrodes in the display device, the display device of one embodiment of the present invention can be made into a so-called see-through display device that allows one to see to the other side. The see-through display device will not obstruct the view even when driving the automobile 9700. Therefore, the display device of one embodiment of the present invention can be installed on the windshield of the automobile 9700. In addition, when a transistor or the like for driving the display device is provided in the display device, it is preferable to use a transparent transistor, such as an organic transistor using an organic semiconductor material or an oxide semiconductor transistor.

[0522] Display unit 9712 is a display device installed on the pillar. For example, by displaying images captured by a camera unit installed on the vehicle body 9701 on display unit 9712, the field of vision obstructed by the pillar can be compensated. Display unit 9713 is a display device installed on the instrument panel 9703. For example, by displaying images captured by a camera unit installed on the vehicle body 9701 on display unit 9713, the field of vision obstructed by the instrument panel 9703 can be compensated. That is, in the automobile 9700, by displaying images captured by a camera unit installed on the vehicle body 9701 on display units 9712 and 9713, blind spots can be filled, thereby improving safety. In addition, by displaying images that compensate for unseen parts, safety can be confirmed more naturally and comfortably.

[0523] Additionally, Figure 42 shows the interior of a car 9700 with a long bench seat serving as both the driver's and passenger's seats. Display unit 9721 is a display device installed in the door section. For example, by displaying images captured by a camera unit installed in the vehicle body 9701 on display unit 9721, the view obstructed by the door can be compensated for. Display unit 9722 is a display device installed on the steering wheel. Display unit 9723 is a display device installed in the center of the long bench seat.

[0524] Display units 9714, 9715, or 9722 can provide users with various information, such as navigation information, vehicle speed, engine speed, driving distance, remaining fuel, gear status, or air conditioning settings. Furthermore, users can appropriately change the displayed content and arrangement of the display units. Additionally, one or more of display units 9710 to 9713, 9721, and 9723 can also display the aforementioned information. One or more of display units 9710 to 9715 and 9721 to 9723 can also be used as lighting equipment.

[0525] The structure shown in this embodiment can be appropriately combined with the structures shown in other embodiments and examples. [Example]

[0526] In this embodiment, a display device actually manufactured is described. This display device includes a high-resolution OLED display (also known as an organic EL display) with a resolution of 3207 ppi, using an oxide semiconductor FET with a channel length of 200 nm. This display device is preferably used, for example, in xR devices such as VR devices or AR devices. Preferably, a semiconductor device according to one embodiment of the present invention is used in the display device shown in this embodiment.

[0527] In this embodiment, OS transistors (transistors in which oxide semiconductors are included in the semiconductor layer forming the channel) are sometimes referred to as oxide semiconductor FETs or OSFETs. In addition, Si transistors (transistors in which silicon is included in the semiconductor layer forming the channel) are sometimes referred to as SiFETs.

[0528] In this embodiment, for example, detailed descriptions of the display device, pixels, and oxide semiconductor FETs can be appropriately referred to other embodiments. Therefore, in this embodiment, descriptions are sometimes appropriately omitted.

[0529] <Structure of Oxide Semiconductor FET> An oxide semiconductor FET (OSFET700) used in the manufactured display device will be described. Figure 43 shows the fabrication flow of the OSFET700. Figure 44 is a perspective view of the OSFET700. Figures 45A to 45D are STEM (Scanning Transmission Electron Microscope) images of the OSFET700 and its surrounding area within the pixels of the manufactured display device. Figure 45A is a planar STEM image of the OSFET700's periphery. Figures 45B and 45C are cross-sectional STEM images of the OSFET700 along its channel length. Figure 45D is a cross-sectional STEM image of the OSFET700 along its channel width.

[0530] First, a conductor 705 (corresponding to conductor 505 in FIG. 37) is formed in processes P01 and P02. The conductor 705 is used as the back gate electrode (BGE) of the OSFET 700. Next, an insulator 722 and an insulator 724 (corresponding to insulator 522 and insulator 524 in FIG. 37) are formed in process P03. Next, a metal oxide 731 and a conductor 742 (corresponding to metal oxide 531 and conductor 542 in FIG. 37) are formed in process P04. The metal oxide 731 is used as the active layer of the OSFET 700. In addition, the conductor 742 is used as the electrode (S / D metal) of each of the source and drain electrodes of the OSFET 700. Next, an insulator 754 (corresponding to insulator 554 and insulator 580 in FIG. 37) is formed in process P05. Next, insulator 750 (corresponding to insulator 550 in FIG. 37) is formed in processes P06 and P07. Insulator 750 is used as the gate insulating film (GI) of OSFET 700. Next, conductor 760 (corresponding to conductor 560 in FIG. 37) is formed in process P08. Conductor 760 is used as the gate electrode (TGE) of OSFET 700. Next, passivation film, interlayer film, via (sometimes called contact) and wiring (not shown) are formed in process P09.

[0531] In the active layer (metal oxide 731) of the OSFET700, IGZO with a CAAC structure (also known as CAAC-IGZO) is used. Additionally, tantalum nitride is used as the S / D metal (conductor 742). Note that the OSFET700 has a self-aligned structure that forms the channel simultaneously with the formation of the TGE (conductor 760). Furthermore, by also configuring the BGE (conductor 705), the controllability of the channel is improved.

[0532] In the manufactured display device, an oxide semiconductor is used for the backplane, and it has a structure in which each of the OSFET, capacitor, two-layer lead, pixel electrode and OLED is stacked on a Si substrate (sometimes referred to as OSFET\capacitor\two-layer lead\pixel electrode\OLED structure).

[0533] The semiconductor device 100B (see FIG16) of one embodiment of the present invention shown in Embodiment 2 is used as a pixel of a manufactured display device. The pixel has a structure of seven oxide semiconductor FETs and three capacitors (sometimes referred to as a 7Tr3C structure).

[0534] Furthermore, in the OSFET700 included in the pixels of the manufactured display device, the channel length is 200nm and the channel width is 130nm. In addition, the OSFET700 has a Trigate structure in which the top and sides of the active layer (metal oxide 731) are covered by TGE (conductor 760).

[0535] <Electrical Characteristics of Oxide Semiconductor FET> The evaluation results of the electrical characteristics of the manufactured oxide semiconductor FET (OSFET700) are explained.

[0536] [Id-Vg Characteristics] Figure 46 is a graph showing the evaluation results of the Id-Vg characteristics of the OSFET700. The evaluated OSFET700 has a channel length of 200 nm and a channel width of 130 nm. In the evaluation of the Id-Vg characteristics, the potential supplied to the back gate of the OSFET700 is equal to the potential supplied to the gate. In Figure 46, the horizontal axis represents the voltage between the source and the gate (also known as voltage Vg), and the vertical axis represents the current flowing between the source and the drain (also known as current Id). Figure 46 shows the current Id in the range of -4V to 4V for voltage Vg. In addition, Figure 46 shows the Id-Vg characteristics when the voltage between the source and the drain (also known as voltage Vd) is 0.1V and 1.2V, respectively. Curve 811 shows the Id-Vg characteristics when voltage Vd is 0.1V. Curve 812 shows the Id-Vg characteristics when voltage Vd is 1.2V.

[0537] As shown in Figure 46, the Id-Vg characteristics indicate that the OSFET700 is a normally off transistor with a sufficient on / off ratio. Furthermore, the S-value of the OSFET700 is 101 mV / decade. Additionally, the off-state current of the OSFET700 is very low, reaching the lower limit of measurement.

[0538] Note that during the operation of the display device, a high voltage is applied to the OSFET700 included in the pixel. As a result, the OSFET700 is designed with an equivalent oxide thickness (EOT) of 11 nm for GI (insulator 750).

[0539] [Vth Non-uniformity] Figure 47 is a cumulative frequency distribution diagram showing the evaluation results of Vth non-uniformity of the OSFET700. Figure 47 shows the Vth distribution of 72 OSFET700s. The structure (channel length and channel width, etc.) of the evaluated OSFET700 is the same as that of the OSFET700 whose Id-Vg characteristics are evaluated as shown in Figure 46. In the evaluation of Vth non-uniformity, the potential supplied to the back gate of the OSFET700 is equal to the potential supplied to the gate. Note that in this embodiment, in the Id-Vg characteristics shown in Figure 46, Vth is defined as the voltage Vg when the current Id = 6 × 10⁻⁸ A. In Figure 47, the horizontal axis represents Vth, and the vertical axis represents the cumulative frequency.

[0540] As shown in the cumulative frequency distribution diagram in Figure 47, the standard deviation σ, which is an indicator of Vth non-uniformity, is 93mV.

[0541] [Id-Vd Characteristics] Figure 48A is a graph showing the evaluation results of the Id-Vd characteristics of the OSFET700. The OSFET700 being evaluated is a three-gate type, in which three FETs with the same structure as the OSFET700 shown in Figure 46 are connected in series, as shown in Figure 6B. In the evaluation of the Id-Vd characteristics, the potential supplied to the back gate of the OSFET700 is equal to the potential supplied to the source. In Figure 48A, the horizontal axis represents the voltage Vd, and the vertical axis represents the current Id. Figure 48A shows the current Id in the range of 0V to 6V for voltage Vd. In addition, Figure 48A shows several Id-Vd characteristics evaluated by changing the voltage Vg. Curve 831 shows the Id-Vd characteristic when the voltage Vg is 2.000V. Curve 832 shows the Id-Vd characteristic when the voltage Vg is 1.975V. Curve 833 shows the Id-Vd characteristic at a voltage Vg of 1.950V. Curve 834 shows the Id-Vd characteristic at a voltage Vg of 1.925V. Furthermore, multiple Id-Vd characteristics measured at voltage Vg increments of 0.025V are also shown. Additionally, Figure 48B shows the Id-Vd characteristics of a SiFET used for comparative evaluation. In the evaluated SiFET, the channel length is 230nm and the channel width is 1600nm. Curve 835 shows the Id-Vd characteristic at a voltage Vg of 3.3V. Curve 836 shows the Id-Vd characteristic at a voltage Vg of 1.8V.

[0542] As shown in Figures 48A and 48B, the Id-Vd characteristics indicate that, compared to SiFET, OSFET exhibits sufficient saturation characteristics at any voltage Vg. Furthermore, as shown in Figure 48A, the Id-Vd characteristics in OSFET correspond to minute variations in voltage Vg, resulting in variations in current Id, thus allowing for fine control of the OLED's emission current.

[0543] [Vd Withstand Voltage] Figure 49 is a graph showing the evaluation results of the Vd withstand voltage of the OSFET700. The structure of the OSFET700 being evaluated is the same as that of the OSFET700 whose Id-Vg characteristics are being evaluated in Figure 46. In the evaluation of the Vd withstand voltage, the potential supplied to the back gate of the OSFET700 is equal to the potential supplied to the gate. In Figure 49, the horizontal axis represents the voltage Vd, and the vertical axis represents the current Id. Figure 49 shows the current Id of the voltage Vd in the range of 0V to 30V when the voltage Vg is 0V. Curve 841 represents the characteristics of the OSFET. In addition, curve 842 represents the characteristics of the SiFET being evaluated for comparison. The structure of the SiFET being evaluated is the same as that of the SiFET whose Id-Vd characteristics are being evaluated in Figure 48B.

[0544] In curve 841, the voltage Vd that sharply increases with current Id is the Vd breakdown voltage. The Vd breakdown voltage of the OSFET700 is approximately 20V, which is higher than that of the SiFET.

[0545] [Off-State Current] As shown in the Id-Vg characteristics in Figure 46, the off-state current of an oxide semiconductor FET is very low, making it difficult to measure using normal measurement methods. Therefore, the off-state current of the oxide semiconductor FET is quantitatively evaluated using the circuit shown in Figure 50. In Figure 50, the circuit section 851 is connected to the oxide semiconductor FET used as the evaluation object. 20,000 OSFETs 700, each with a channel length of 200 nm and a channel width of 130 nm, are connected in parallel as the oxide semiconductor FET used for evaluating the off-state current. Therefore, the virtual channel width of this oxide semiconductor FET is 2.6 mm. In the circuit section 852, a control circuit is used to evaluate the off-state current. In the circuit section 853, a signal used to evaluate the off-state current is output to the output terminal 855. In the input terminal group 854, a signal from the control circuit is input to evaluate the off-state current. The off-state current is evaluated by applying the potential shown in Figure 50 to each terminal of the circuit section 851.

[0546] Figure 51 is a graph showing the evaluation results of the off-state current of the oxide semiconductor FET. In Figure 51, the horizontal axis represents the reciprocal of temperature T, and the vertical axis represents the off-state current (also called current Ioff). Note that the off-state current on the vertical axis is a value converted to the channel width of OSFET700, 130 nm. Points 861 to 864 show the measured results of the off-state current at temperatures of 150°C, 125°C, 100°C, and 85°C. In addition, line 865 is the regression line obtained from points 861 to 864. According to line 865, the predicted off-state current at room temperature (27°C) is less than 1 × 10⁻²⁴ A. Therefore, the off-state current of the oxide semiconductor FET is very low.

[0547] <Display Result of Display Device> The display device manufactured in this embodiment includes a high-definition OLED display (display 871) with a resolution of 3207 ppi. Table 1 shows the specifications of display 871. As the transistors constituting the pixel and gate driver of display 871, oxide semiconductor FETs (OSFET700) are used.

[0548] [Table 1]

[0549] Figure 52 shows the display result of the display 871. As shown in Figure 52, a dense and clear image was obtained. In addition, a realistic moving image was also obtained in addition to the still image.

[0550] Figure 53 shows the display result of displaying white only on the right side (display surface 881) of the display 871. The brightness of the non-emitting area (black area) of the left half (display surface 882) of the display 871 is 0.002 cd / m2, and the brightness of the emitting area (white area) of the right half (display surface 881) of the display 871 is 5062 cd / m2. That is to say, the contrast ratio of the display 871 is black:white = 1:2,531,000. Because the contrast ratio of the display 871 is high, black appears clear, thus achieving a display that fully utilizes the characteristics of OLED.

[0551] Furthermore, the OLEDs included in the manufactured display device are manufactured using the SBS method, which involves separately coating red (R), green (G), and blue (B). OLEDs manufactured using the SBS method are sometimes referred to as SBS structures. By manufacturing OLEDs using the SBS method, the OLEDs between pixels are not connected, thereby reducing the power consumption of the display device.

[0552] Furthermore, the OLED included in the manufactured display device has an MML (Metal Mask Less) structure manufactured without using a metal mask. This MML structure is manufactured using photolithography. Therefore, the display 871 has a high aperture ratio of 60%.

[0553] Figure 54 is a chromaticity diagram showing the chromaticity of R, G, and B when viewed from the front or at an angle. Figure 54A shows the chromaticity of a display device manufactured using a white OLED and color filters. Points 892Ra, 892Ga, and 892Ba show the chromaticity of R, G, and B when viewed from the front. Points 892Rb, 892Gb, and 892Bb show the chromaticity of R, G, and B when viewed from a 60° angle. Points 892Rc, 892Gc, and 892Bc show the chromaticity of R, G, and B when viewed from a 60° angle opposite to the above. Figure 54B shows the chromaticity of a display device manufactured using an SBS type OLED. The labels at points 891Ra, 891Ga, and 891Ba illustrate the chromaticity of R, G, and B when the display device is viewed from the front. The labels at points 891Rb, 891Gb, and 891Bb illustrate the chromaticity of R, G, and B when the display device is viewed from a 60° tilt angle. The labels at points 891Rc, 891Gc, and 891Bc illustrate the chromaticity of R, G, and B when the display device is viewed from a 60° tilt angle opposite to the aforementioned directions. By using an OLED with SBS technology, the chromaticity variation caused by viewing angle is drastically improved compared to using a white OLED.

[0554] As can be seen from the above display results, the display device using the semiconductor device of one embodiment of the present invention can improve the display quality.

[0555] Note that electronic devices using the display devices shown in this embodiment (e.g., VR devices or AR devices, etc., xR devices) can also utilize thin clients or foveated rendering. By utilizing thin clients or foveated rendering, the power consumption of electronic devices using the display devices shown in this embodiment can be reduced.

[0556] In addition, Table 2 shows the results of comparing the number of masking elements, off-state current and Vd withstand voltage of oxide semiconductor FETs and SiFETs in the manufactured display devices.

[0557] [Table 2]

[0558] Because OSFET manufacturing does not require a doping process, the number of masks used in OSFET manufacturing is less than that of SiFET. Therefore, manufacturing costs are reduced due to the display device shown in this embodiment, etc. Furthermore, the off-state current of OSFET is very low, making it difficult to measure using normal electrical measurements; the off-state current of OSFET is significantly lower than that of SiFET. Additionally, the Vd breakdown voltage of OSFET is higher than that of SiFET. Therefore, display quality is improved by using the display device shown in this embodiment, etc.

[0559] Note that, for example, as shown in FIG32B, the display device shown in this embodiment may also have a structure in which SiFET and OSFET are stacked by stacking multiple layers. For example, SiFET can be used to manufacture the functional circuits (peripheral driving circuits, CPU, GPU and memory circuits, etc.) of the display device, and OSFET can be used to manufacture the pixels of the display device. Miniaturization of the display device is achieved by stacking OSFET layers on SiFET layers. [Simplified Explanation of the Diagram]

[0029] [Figure 1] is a diagram illustrating a semiconductor device. [Figure 2] is a diagram illustrating a semiconductor device. [Figure 3] is a diagram illustrating a semiconductor device. [Figure 4] is a diagram illustrating a semiconductor device. [Figure 5] is a diagram illustrating a semiconductor device. [Figures 6A] to [Figure 6C] are diagrams showing circuit symbols for transistors. [Figure 7] is a timing diagram illustrating an example of the operation of a semiconductor device. [Figure 8] is a diagram illustrating an example of the operation of a semiconductor device. [Figure 9] is a diagram illustrating an example of the operation of a semiconductor device. [Figure 10] is a diagram illustrating an example of the operation of a semiconductor device. [Figure 11] is a diagram illustrating an example of the operation of a semiconductor device. [Figure 12] is a diagram illustrating an example of the operation of a semiconductor device. [Figure 13] is a diagram illustrating an example of the operation of a semiconductor device. [Figure 14] is a timing diagram illustrating a driving method for a semiconductor device. [Figure 15] is a timing diagram illustrating a driving method for a semiconductor device. [Figure 16] is a diagram illustrating a semiconductor device. [Figure 17] is a timing diagram illustrating the operation of a semiconductor device. [Figure 18] is a diagram illustrating the operation of a semiconductor device. [Figure 19] is a diagram illustrating the operation of a semiconductor device. [Figure 20] is a diagram illustrating the operation of a semiconductor device. [Figure 21] is a diagram illustrating the operation of a semiconductor device. [Figure 22] is a diagram illustrating the operation of a semiconductor device. [Figure 23] is a diagram illustrating the operation of a semiconductor device. [Figure 24] is a timing diagram illustrating the driving method of a semiconductor device. [Figure 25] is a timing diagram illustrating the driving method of a semiconductor device. [Figure 26] is a flowchart illustrating the driving method of a semiconductor device. [Figure 27A] is a diagram illustrating a display device. [Figures 27B] to [Figure 27H] are diagrams illustrating examples of pixel structures. [Figures 28A] to [Figure 28D] are diagrams illustrating examples of light-emitting elements structures. [Figures 29A] to [Figure 29D] are diagrams illustrating examples of light-emitting elements structures. [Figures 30A] to [Figure 30D] are diagrams illustrating examples of light-emitting elements structures. [Figures 31A] and [Figure 31B] are diagrams illustrating examples of light-emitting elements structures. [Figures 32A] and [Figure 32B] are perspective views of a display device. [Fig. 33] is a cross-sectional view showing an example of a display device. [Fig. 34] is a cross-sectional view showing an example of a display device. [Fig. 35] is a cross-sectional view showing an example of a display device. [Fig. 36] is a cross-sectional view showing an example of a display device. [Fig. 37A] is a top view showing an example of a transistor structure. [Fig. 37B] and [Fig. 37C] are cross-sectional views showing examples of transistor structures. [Fig. 38A] is a diagram illustrating the classification of crystal structures. [Fig. 38B] is a diagram illustrating the XRD pattern of a CAAC-IGZO film. [Fig. 38C] is a diagram illustrating the nano-beam electron diffraction pattern of a CAAC-IGZO film. [Fig. 39A] to [Fig. 39F] are diagrams illustrating an example of an electronic device.[Figures 40A] to [40F] are diagrams illustrating an example of an electronic device. [Figures 41A] and [41B] are diagrams illustrating an example of an electronic device. [Figure 42] is a diagram illustrating an example of an electronic device. [Figure 43] is a diagram showing the process flow of a transistor. [Figure 44] is a three-dimensional schematic diagram of a transistor. [Figures 45A] to [45D] are STEM images of the transistor and its surroundings. [Figure 46] is a diagram showing the evaluation results of the Id-Vg characteristics of a transistor. [Figure 47] is a diagram showing the evaluation results of the Vth non-uniformity of a transistor. [Figures 48A] and [48B] are diagrams showing the evaluation results of the Id-Vd characteristics of a transistor. [Figure 49] is a diagram showing the evaluation results of the Vd withstand voltage of a transistor. [Figure 50] is a diagram showing the evaluation method of the off-state current of a transistor. [Figure 51] is a diagram showing the evaluation results of the off-state current of a transistor. [Figure 52] is a graph showing the evaluation results of the display device. [Figure 53] is a graph showing the evaluation results of the display device. [Figure 54A] and [Figure 54B] are graphs showing the evaluation results of the colorimetry of the display device.

Claims

1. A semiconductor device, comprising first and second transistors, first to fifth switches, first to third capacitors, and a display element, wherein, The first transistor includes a back gate, the gate of the first transistor is electrically connected to the first switch, the second switch and the first capacitor are included between the gate and the source of the first transistor, the back gate of the first transistor is electrically connected to the third switch, the second capacitor is included between the back gate and the source of the first transistor, the source of the first transistor is electrically connected to the fourth switch and the drain of the second transistor, the gate of the second transistor is electrically connected to the fifth switch, the third capacitor is included between the gate and the source of the second transistor, and the source of the second transistor is electrically connected to the display element.

2. The semiconductor device of claim 1, wherein the first switch has the function of enabling a first wiring to be in a conducting or non-conducting state with respect to the gate of the first transistor, the second switch has the function of enabling a gate of the first transistor to be in a conducting or non-conducting state with respect to the source of the first transistor, the third switch has the function of enabling a second wiring to be in a conducting or non-conducting state with respect to the back gate of the first transistor, the fourth switch has the function of enabling a third wiring to be in a conducting or non-conducting state with respect to the source of the first transistor, and the fifth switch has the function of enabling a fourth wiring to be in a conducting or non-conducting state with respect to the gate of the second transistor.

3. The semiconductor device as claimed in claim 1 or 2, wherein each of the first to fifth switches is a transistor.

4. The semiconductor device of claim 1 or 2, wherein at least one of the first transistor and the second transistor contains a metal oxide in the semiconductor layer forming the channel.

5. The semiconductor device of claim 4, wherein the metal oxide comprises at least one of indium and zinc.

6. The semiconductor device of claim 1 or 2, wherein the display element comprises an organic EL element in a series configuration.

7. A method for driving a semiconductor device, the semiconductor device comprising first and second transistors, first to fifth switches, first to third capacitors, and a display element, wherein, The first transistor includes a back gate. The gate of the first transistor is electrically connected to the first switch. A second switch and a first capacitor are included between the gate and the source of the first transistor. The back gate of the first transistor is electrically connected to the third switch. A second capacitor is included between the back gate and the source of the first transistor. The source of the first transistor is electrically connected to the fourth switch and the drain of the second transistor. The gate of the second transistor is electrically connected to the fifth switch. A third capacitor is included between the gate and the source of the second transistor. The source of the second transistor is electrically connected to the display element. The driving method of the semiconductor device includes first to fourth processes. In the first process, a first potential is supplied to the source of the first transistor via the fourth switch and to the gate of the first transistor via the second switch. A second potential higher than the first potential is supplied to the back gate of the first transistor via the third switch. In the second process… The third potential is supplied to the gate of the first transistor via the first switch, and the first potential is supplied to the source of the first transistor via the fourth switch. In the third process, the potential that turns the second transistor on is supplied to the gate of the second transistor via the fifth switch. In the fourth process, the potential that turns the second transistor off is supplied to the gate of the second transistor via the fifth switch. The first process begins after the fourth process begins, the third process begins after the fourth process ends, the first process ends before the third process begins, the second process begins after the first process ends, and the fourth process begins after both the second and third processes end.

8. A method for driving a semiconductor device as claimed in claim 7, wherein the first switch has the function of enabling a first wiring to be in a conducting or non-conducting state with respect to the gate of the first transistor, the second switch has the function of enabling a gate of the first transistor to be in a conducting or non-conducting state with respect to the source of the first transistor, the third switch has the function of enabling a second wiring to be in a conducting or non-conducting state with respect to the back gate of the first transistor, the fourth switch has the function of enabling a third wiring to be in a conducting or non-conducting state with respect to the source of the first transistor, and the fifth switch has the function of enabling a fourth wiring to be in a conducting or non-conducting state with respect to the gate of the second transistor.

9. A method for driving a semiconductor device as claimed in claim 7 or 8, wherein each of the first to fifth switches is a transistor.

10. A method of driving a semiconductor device as claimed in claim 7 or 8, wherein at least one of the first transistor and the second transistor contains a metal oxide in the semiconductor layer forming the channel.

11. A method for driving a semiconductor device as claimed in claim 10, wherein the metal oxide comprises at least one of indium and zinc.

12. A method for driving a semiconductor device as claimed in claim 7 or 8, wherein the display element comprises an organic EL element in a series configuration.

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