Composition for treating semiconductor substrate and method for treating semiconductor substrate

Abstract

This invention relates to a composition for processing semiconductor substrates, and more particularly to a composition for processing the edge portions of wafers coated with polysilazane. According to the composition for processing semiconductor substrates of the present invention, in terms of management, the composition quality can be maintained uniformly, and in terms of processing, the wafer interface can be processed uniformly. Furthermore, by improving the straightness of the boundary portions where polysilazane is removed, the product defect rate can be significantly reduced, and the production yield can be steadily increased.

Description

[Technical Field]

[0001] The present invention relates to a composition for processing a semiconductor substrate, and more particularly to a composition for processing the edge portion of a wafer coated with polysilazane. [Previous Technology]

[0002] Conventionally, to form silicon dioxide films in semiconductor manufacturing processes, physical vapor deposition (PVD), chemical vapor deposition (CVD), or sol-gel methods are used. Alternatively, methods can be employed such as forming polysiloxane or polysilazane films and then converting them into silicon dioxide films. Among these methods, the conversion of polysiloxane or polysilazane films into silicon dioxide films allows for the formation of high-quality silicon dioxide films through low-temperature sintering. Silicon dioxide films are used as insulating films, planarization films, and passivation films in semiconductor components such as liquid crystal display devices.

[0003] Methods for forming a silicon dioxide film typically include the steps of spin-coating a polysilazane solution onto a substrate, removing the solvent by heating, and converting the polysilazane into a silicon dioxide film by sintering. In the step of spin-coating the polysilazane solution onto the substrate, beads are formed at the edges of the substrate periphery, while the solution diffuses and coats the back side of the substrate. To prevent uneven coating thickness at the substrate periphery from the edge beads, edge bead removal (EBR) or edge rinsing is typically performed. Back rinsing is performed to remove polysilazane adhering to the back side of the substrate.

[0004] As described above, in the process of coating a polysilazane film on a substrate, it is sometimes necessary to peel off or remove unwanted polysilazane from the substrate or coating apparatus. It is known that the composition used in this process is, for example, a co-solvent mixture of propylene glycol monomethyl ether acetate (PGMEA).

[0005] However, with such a composition, it is difficult to fully peel off or remove the polysilazane, thus the boundary surface where the polysilazane is removed is prone to produce a film thickness hump. This film thickness hump can cause cracks or peeling during the sintering process of the film, which may result in defects in the product. In addition, the gelation of the waste liquid generated in the process may cause blockage of the coating equipment, so it is necessary to frequently carry out anti-blockage work on the internal equipment during the process. Furthermore, when gases such as silane, hydrogen, and ammonia generated in the waste liquid tank exceed the auto-ignition limit, the stability will be affected.

[0006] Therefore, there is a need for a composition for processing semiconductor substrates that has excellent solubility in the polysilazane to be removed and improves the straightness of the boundary surface for removing the polysilazane. [Summary of the Invention]

[0007] [The problem the invention aims to solve]

[0008] The present invention aims to provide a composition for effectively processing semiconductor substrates coated with polysilazane. [Means for solving the problem]

[0009] In order to solve the above-mentioned problems, the present invention provides a composition for processing a semiconductor substrate, comprising, relative to the total weight of the composition, 98 to 99.8% by weight of trimethylbenzene and a fluorinated surfactant.

[0010] According to one embodiment, the molecules of the above-mentioned fluorinated surfactants may be linear or branched.

[0011] For example, fluorinated surfactants may comprise compounds represented by one or more of the chemical formulas 1 to 4. [Chemical Formula 1][Chemical Formula 2][Chemical Formula 3][Chemical Formula 4] In chemical formulas 1 to 4, A is O, NR, ethylene oxide, (C1-10)alkyl or SR, wherein R is (C1-10)alkyl, Y is an integer from 1 to 10, N is an integer from 1 to 4, and L is H, C, (C1-2)alkoxy(C1-2)alkanol or (C1-2)alkanol.

[0012] Specifically, for example, the above-mentioned fluorinated surfactants are compounds represented by one or more of the chemical formulas 5 to 8. [Chemical Formula 5][Chemical Formula 6][Chemical Formula 7][Chemical Formula 8].

[0013] According to one embodiment, the present invention may contain 0.001 to 0.3% by weight of fluorinated surfactant relative to the total weight of the composition.

[0014] According to another embodiment of the present invention, a method for treating a semiconductor substrate with the above composition is provided.

[0015] Specific details of other embodiments of the present invention are included in the following detailed description. [Effects of the Invention]

[0016] The composition for processing semiconductor substrates according to the present invention can maintain uniform quality and uniformly process the wafer boundary surfaces. Furthermore, by improving the straightness of the boundary surfaces from which polysilazane is removed, the product defect rate can be significantly reduced, and the production yield can be steadily increased.

Implementation Method

[0018] The present invention can be modified in various ways and may have various embodiments, which will be exemplified and described in detail below with reference to the accompanying drawings. However, this is not intended to limit the invention to the specific embodiments, and it should be understood that all modifications, equivalents, and substitutions included within the spirit and technical scope of the invention are included. In describing the invention, detailed descriptions of relevant known technologies will be omitted if it is determined that such detailed descriptions may obscure the gist of the invention.

[0019] Unless otherwise stated in this specification, the expression "to" will be used to indicate that the corresponding numerical value is included. Specifically, for example, the expression "1 to 2" means not only including 1 and 2, but also including all numerical values ​​between 1 and 2.

[0020] Wafers coated with polysilazane are commonly used as semiconductor substrates. During the polysilazane coating process, beads are formed at the edge of the wafer. These polysilazane beads are then removed to improve product efficiency. In the prior art, there is a problem of film thickness bulging at the edge interface after edge bead removal (EBR).

[0021] The present invention aims to improve the straightness of the boundary surface of polysilazane removal by providing a composition for treating semiconductor substrates containing a single solvent or a very small amount of additives.

[0022] In the following, a composition for processing a semiconductor substrate according to an embodiment of the present invention will be described in more detail.

[0023] The present invention contains high-purity trimethylbenzene in a high content. For example, it may contain 98 to 99.8% by weight, such as more than 99% by weight, more than 99.1% by weight, more than 99.2% by weight, or, for example, less than 99.8% by weight or less than 99.5% by weight, relative to the total weight of the composition of the present invention.

[0024] When using solvent mixtures with low purity, the types and amounts of impurities tend to increase, making it difficult to maintain uniform quality. In contrast, the present invention, by including high-purity tricresyl in a high content, can uniformly maintain the quality of the composition. Furthermore, it can prevent edge bead removal performance problems during or after the removal of siloxane or silazane membranes.

[0025] Furthermore, the present invention also contains a small amount of fluorinated surfactant. The fluorinated surfactant is used to inhibit the penetration of the composition into the polysilazane layer during the initial stage of polysilazane dissolution. Subsequently, at the boundary where the dissolution reaction occurs, a portion of the fluorinated surfactant will be arranged at the boundary of the polysilazane.

[0026] This prevents the composition used to process the semiconductor substrate from penetrating into the polysilazane coating, thereby reducing film thickness bulging and improving the straightness of the boundary surface.

[0027] Fluorinated surfactants may contain molecules with linear or branched structures. In the reaction of the composition with polysilazane, branched fluorinated surfactants have the function of capturing moisture. By controlling the reactivity of polysilazane with moisture, the aggregation of polysilazane can be prevented, thereby improving process efficiency.

[0028] For example, fluorinated surfactants may contain one or more compounds of chemical formulas 1 to 4. [Chemical Formula 1][Chemical Formula 2][Chemical Formula 3][Chemical Formula 4] In chemical formulas 1 to 4, A is O, NR, ethylene oxide, (C1-10) alkyl or SR, wherein R is (C1-10) alkyl, Y is an integer from 1 to 10, N is an integer from 1 to 4, and L is H, C, (C1-2)alkoxy (C1-2)alkanol or (C1-2)alkanol.

[0029] Specifically, for example, fluorinated surfactants are compounds of one or more of chemical formulas 5 to 8. [Chemical Formula 5][Chemical Formula 6][Chemical Formula 7][Chemical Formula 8]

[0030] According to one example, the composition may contain 0.001 to 0.3% by weight of a fluorinated surfactant, for example, more than 0.001% by weight, more than 0.005% by weight, more than 0.01% by weight, or for example, less than 0.3% by weight, less than 0.2% by weight, less than 0.1% by weight, less than 0.05% by weight, less than 0.03% by weight.

[0031] According to another embodiment of the present invention, a method for processing a semiconductor substrate as described above is provided.

[0032] According to the present invention, film thickness bulging can be prevented when removing edge beads of polysilazane coating from the wafer, and the straightness of polysilazane boundary surface can be improved.

[0033] Embodiments of the present invention will now be described in detail to enable those skilled in the art to readily implement them. However, the present invention can be implemented in various different forms and is not limited to the embodiments described herein.

[0034] Examples and Comparative Examples

[0035] A composition for processing semiconductor substrates was prepared according to the composition in Table 1. The composition contains water in an amount of 100% by weight. Table 1 solvent (Unit: weight%) Fluorinated surfactants (ppm) Comparative Example 1 C8-C11 aromatic hydrocarbons 99 Comparative Example 2 TMB 99 Example 1 TMB 99 Chemical formula 5 100 Example 2 TMB 99 Chemical formula 5 300 Example 3 TMB 99 Chemical Formula 6 100 Example 4 TMB 99 Chemical Formula 6 300 Example 5 TMB 99 Chemical Formula 8 100 Example 6 TMB 99 Chemical Formula 8 300 Example 7 TMB 99 Chemical Formula 7 100 Example 8 TMB 99 Chemical Formula 7 300

[0036] Experimental Example 1: Edge Bead Removal (EBR)

[0037] On a semiconductor wafer substrate coated with polysilazane, EBR was performed using each composition, and the state of the boundary surface after removing the polysilazane was confirmed. The left side of Figure 1 is an observation photograph according to Comparative Example 1, and the right side is an observation photograph of the boundary surface according to Example 3.

[0038] Experiment 2: Safety Analysis

[0039] To confirm the safety of the composition, the sample after mixing with polysilazane was analyzed using a HACH turbidimeter.

[0040] Experiment 3: Whether or not bubbles are produced

[0041] Observe whether bubbles are generated in the composition during the EBR process. If bubbles are generated, record it as "O" and if no bubbles are generated, record it as "X".

[0042] The results based on the experimental examples are shown in Table 2 below. Table 2 EBR boundary surface() Security (Turbidity analysis @ 1 day) Whether or not bubbles are produced Height Boundary width (Tail) (Polysilazane condensate) (Turbidity unit (NTU)) Comparative Example 1 1470 >70 8.4 X Comparative Example 2 1580 >72 8.1 X Example 1 1120 <58 5.2 X Example 2 1020 <42 4.7 O Example 3 980 <35 5.1 X Example 4 920 <31 4.6 O Example 5 1050 <64 3.2 X Example 6 1010 <59 3.0 O Example 7 890 <37 3.5 X Example 8 870 <33 2.1 O

[0043] As shown in Table 2, in the comparative examples, it was confirmed that the EBR boundary was wide and the polysilazane had high aggregation, which reduced safety and therefore it was not suitable as a composition for semiconductor substrate processing.

[0044] On the other hand, in all embodiments, the EBR interface was confirmed to be in good condition and exhibit excellent stability. In particular, in Examples 1 to 8, which contained fluorinated surfactants, superior stability and EBR interface were confirmed compared to Comparative Examples 1 and 2, which used only a single solvent.

[0045] As described above, when the composition for processing semiconductor substrates according to the present invention is applied to the EBR process, the generation of bubbles can be minimized and the stability of the composition can be maintained. Furthermore, it has been confirmed that the EBR boundary surfaces can be processed uniformly, thereby significantly improving straightness.

[0046] The specific aspects of the present invention have been described in detail above. It will be apparent to those skilled in the art that the above-described specific techniques are merely preferred embodiments and do not limit the scope of the present invention. Those skilled in the art will be able to make various applications and modifications within the scope of the present invention based on the above description. Therefore, the essential scope of the present invention will be defined by the appended claims and their equivalents. [Simplified Explanation of the Diagram]

[0017] Figure 1 is a photograph showing the confirmation results of the EBR boundary surface state.

Claims

1. A composition for processing a semiconductor substrate, comprising: The composition comprises, relative to the total weight of the composition, 98 to 99.8% by weight of tricresylbenzene; and a fluorinated surfactant comprising one or more compounds of formulas 1 to 4: [Formula 1] [Formula 2] [Formula 3] [Formula 4] In formulas 1 to 4, A is O, NR, ethylene oxide, (C1-10) alkylene, or SR, wherein R is (C1-10) alkyl, Y is an integer from 1 to 10, in formula 1, L1 is H, C, (C1-2)alkoxy(C1-2)alkanol, or (C1-2)alkanol, and in formulas 2 to 4, L is a linking group selected from C, (C1-2)alkoxy(C1-2)alkanol, or (C1-2)alkanol.

2. The composition for processing a semiconductor substrate as described in claim 1, wherein, The fluorinated surfactant is one or more compounds of chemical formulas 5 to 8: [Chemical Formula 5] [Chemical Formula 6] [Chemical Formula 7] [Chemical Formula 8].

3. The composition for processing a semiconductor substrate as described in claim 1, wherein, The composition comprises, relative to the total weight of the composition, 0.001 to 0.3% by weight of the fluorinated surfactant.

4. A method for processing a semiconductor substrate, comprising: The step of cleaning a semiconductor substrate using the composition described in claim 1.

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