Display device with hardware that dims pixels

Abstract

An electronic device includes: a display device comprising a plurality of pixels forming an active area of ​​the display device, the active area of ​​the display device defining a rounded edge portion, wherein at least a portion of the plurality of pixels forming the rounded edge portion has a stepped relative brightness level determined by the hardware structure of the plurality of pixels, such that a first pixel located at a first position in the rounded edge portion has a first relative brightness level defined by a first pixel hardware structure and a second pixel located at a second position has a second relative brightness level defined by a second pixel hardware structure, the first relative brightness level being different from the second relative brightness level and the first pixel hardware structure being different from the second pixel hardware structure.

Description

Technical Field

[0001] This instruction manual is generally concerned with electronic devices having a display panel. Prior Technology

[0002] Electronic devices may include a display panel on which visual images can be displayed. For example, a user of an electronic device can view visual images on a flat panel display while watching a video or playing a video game. Many electronic devices are equipped with a large display that covers most of the front of the device. Electronic devices may include a bezel surrounding the active area of ​​the display. The active area of ​​the display may have rounded corners, such that a boundary between the active area and the bezel is rounded. Summary of the Invention

[0003] This invention discloses techniques for dimming pixels, for example, rounded corners of a display. An electronic device may include a display panel comprising a pixel array of light-emitting pixels. The light-emitting pixel array may include an active area defined by a contour. In some instances, the contour has rounded corners. The electronic device may include, for example, an internal window for positioning a sensor below the display.

[0004] For displays with rounded corners, internal windows, or both, the pixel portion outside the curved boundary can be darkened to approximate the smooth curve using square or rectangular pixels. The pixel circuitry of the darkened pixel includes a transistor connected to a diode connected to the anode electrode of the respective pixel OLED to route a portion of the current away from the OLED to achieve darkening.

[0005] The dimming level of a pixel can be controlled during design by adjusting the aspect ratio of the diode-connected transistor and during runtime by adjusting the bias voltage (VBIAS) of the diode-connected transistor, or both. In some instances, the aspect ratio and / or VBIAS of the diode-connected transistor can be varied for a sub-pixel of a single pixel. In some instances, the VBIAS of the diode-connected transistor can be varied for different display brightness settings.

[0006] As an additional description of the embodiments described below, the present invention describes the following embodiments.

[0007] Embodiment 1 relates to an electronic device, comprising: a display device including a plurality of pixels forming an active area of ​​the display device, the active area of ​​the display device defining a rounded edge portion, wherein at least a portion of the plurality of pixels forming the rounded edge portion has a stepped relative brightness level determined by the hardware structure of the plurality of pixels, such that a first pixel located at a first position in the rounded edge portion has a first relative brightness level defined by a first pixel hardware structure, and a second pixel located at a second position in the rounded edge portion has a second relative brightness level defined by a second pixel hardware structure, wherein the first relative brightness level is different from the second relative brightness level, and the first pixel hardware structure is different from the second pixel hardware structure.

[0008] Example 2 is an electronic device of Example 1, wherein in the display device, the first pixel is adjacent to the second pixel.

[0009] Example 3 is an electronic device according to any one of Examples 1 to 2, wherein: the first relative brightness level includes a first preset dimming brightness level that is darker relative to a first programmed brightness level programmed to the first pixel; and the second relative brightness level includes a second preset dimming brightness level that is darker relative to a second programmed brightness level programmed to the second pixel.

[0010] Example 4 is an electronic device of Example 3, wherein: the display device includes a central pixel forming a central region offset from the rounded edge portion of the display device; and each of the central pixels forming the central region of the display device is structured to emit a brightness level programmed to its respective central pixel.

[0011] Example 5 is an electronic device of Example 4, wherein: the center pixels form a continuous block of at least one hundred pixels offset from the rounded edge portion.

[0012] Example 6 is an electronic device according to any one of Examples 1 to 5, wherein: the first pixel includes a first organic light-emitting diode (OLED); and the second pixel includes a second OLED.

[0013] Example 7 is an electronic device according to any one of Examples 1 to 6, wherein: the first pixel includes: a first light-emitting diode (LED), a first resistive element, and a first driving transistor configured to drive a parallel current through the first LED and the first resistive element during light emission by the first LED; and the second pixel includes: a second LED, a second resistive element, and a second driving transistor configured to drive a parallel current through the second LED and the second resistive element during light emission by the second LED.

[0014] Example 8 is an electronic device of Example 7, wherein: the first resistive element has a first resistor that is proportional to a first resistor of the first LED; the second resistive element has a second resistor that is proportional to a second resistor of the second LED; and the first proportion is different from the second proportion.

[0015] Example 9 is an electronic device according to any one of Examples 7 to 8, wherein: the display device includes a central pixel forming a central region offset from the rounded edge portion of the display device; and each of the central pixels forming the central region of the display device includes a corresponding central pixel LED and a corresponding central pixel driving transistor configured to drive current through the corresponding central pixel LED but not drive current through a corresponding resistive element connected in parallel with the corresponding central pixel LED.

[0016] Example 10 is an electronic device according to any one of Examples 7 to 9, wherein: the first resistive element includes a transistor gate terminal with a first diode connection and a transistor connected to one of the transistor drain terminals of the transistor gate terminal with a first diode connection; and the second resistive element includes a transistor gate terminal with a second diode connection and a transistor connected to one of the transistor drain terminals of the transistor gate terminal with a second diode connection.

[0017] Example 11 is an electronic device of Example 10, wherein: the transistor connected to the first diode has a first resistor in a first ratio to the resistor of the first LED; the transistor connected to the second diode has a second resistor in a second ratio to the resistor of the second LED; and the first ratio is different from the second ratio.

[0018] Example 12 is an electronic device of Example 11, wherein: due to the first diode connected to the transistor having a first aspect ratio, the first diode connected to the transistor has the first resistance; and due to the second diode connected to the transistor having a second aspect ratio, the second diode connected to the transistor has the second resistance; and the first aspect ratio is different from the second aspect ratio.

[0019] Example 13 is an electronic device according to any one of Examples 10 to 12, wherein: the first pixel is a sub-pixel of a first composite pixel in the display device; the second pixel is a sub-pixel of a second composite pixel in the display device; and the first LED of the first pixel emits the same color as the second LED of the second pixel, such that the first pixel and the second pixel represent sub-pixels of the same color.

[0020] Example 14 is an electronic device of Example 13, wherein: the transistor drain terminal connected to the first diode is connected to a first bias voltage; and the transistor drain terminal connected to the second diode is connected to the first bias voltage.

[0021] Example 15 is an electronic device of Example 14, wherein: the display device is configured such that increasing the first bias voltage increases the first resistance of one of the transistors connected to the first diode and increases the second resistance of one of the transistors connected to the second diode.

[0022] Example 16 is an electronic device according to any one of Examples 14 to 15, wherein: the display device includes: a third pixel comprising: a third LED, a third resistive element comprising a transistor gate terminal including a third diode connection and a transistor connected to a transistor drain terminal of the transistor gate terminal of the transistor connected to ... The transistor is connected to the gate terminal of the transistor connected to the fourth diode, the transistor is connected to the drain terminal of the transistor connected to the fourth diode, and a fourth driving transistor, which are configured to drive a parallel current through the fourth LED and the transistor connected to the fourth diode during the emission of light by the fourth LED; the third pixel is a sub-pixel of the first composite pixel; the fourth pixel is a sub-pixel of the second composite pixel; the third LED of the third pixel emits the same color as the fourth LED of the fourth pixel, such that the third pixel and the fourth pixel represent sub-pixels of the same color; and the color emitted by the first pixel and the second pixel is different from the color emitted by the third pixel and the fourth pixel.

[0023] Example 17 is an electronic device of Example 16, wherein: the transistor drain terminal connected to the third diode is connected to a second bias voltage; the transistor drain terminal connected to the fourth diode is connected to the second bias voltage; and the second bias voltage is different from the first bias voltage.

[0024] Example 18 is an electronic device of Example 7, wherein: the first driving transistor is connected to the first LED via a first intermediate transistor connected in series between the first driving transistor and the first LED; and the second driving transistor is connected to the second LED via a second intermediate transistor connected in series between the second driving transistor and the second LED.

[0025] Example 19 relates to a display device comprising a plurality of light-emitting diodes (LEDs), the plurality of LEDs including: a first LED, the first LED including a first LED anode terminal and a first LED cathode terminal; a first driving transistor including a first driving transistor source terminal, a first driving transistor gate terminal and a first driving transistor drain terminal, the first driving transistor drain terminal being connected to the first LED anode terminal; and a first resistive element connected to the first driving transistor drain terminal, the display device being configured such that current flows during the first LED emission. The current flows through the first LED and the first resistive element; one of the plurality of LEDs, a second LED, the second LED including a second LED anode terminal and a second LED cathode terminal; a second driving transistor, which includes a second driving transistor source terminal, a second driving transistor gate terminal and a second driving transistor drain terminal, the second driving transistor drain terminal being connected to the second LED anode terminal; and a second resistive element, which is connected to the second driving transistor drain terminal, the display device being configured such that current flows through the second LED and the second resistive element during the second LED emission.

[0026] Example 20 is a display device according to Example 19, wherein: the first resistive element has a first resistor that is proportional to a first resistor of the first LED; the second resistive element has a second resistor that is proportional to a second resistor of the second LED; and the first ratio is different from the second ratio.

[0027] Example 21 is a display device of Example 20, wherein: the plurality of LEDs form a pixel array; the first LED is at least a portion of a first pixel as part of an edge of an active display area of ​​the pixel array; the second LED is at least a portion of a second pixel as part of an edge of the active display area of ​​the pixel array; and the first pixel is adjacent to the second pixel.

[0028] Example 22 is a display device according to Example 21, comprising: a set of third LEDs of the plurality of LEDs, each of the third LEDs in the set of third LEDs including a third LED anode terminal and a third LED cathode terminal; and a set of third driving transistors corresponding to the set of third LEDs, each of the third driving transistors in the set of third driving transistors including a third driving transistor source terminal, a third driving transistor gate terminal and a third driving transistor drain terminal, wherein: the drain terminal of each third driving transistor is connected to the anode terminal of the corresponding third LED from the set of third LEDs, and the drain terminal of each third driving transistor is connected to a source terminal of a resistive element during the emission of the corresponding third LED.

[0029] Example 23 is a display device of Example 22, wherein: the display device is configured such that: (i) during the emission of the first LED, current flows through the first resistive element; (ii) during the emission of the second LED, current flows through the second resistive element; and (iii) each of the respective third driving transistors has no current flowing through one of the source terminals of one of its resistive elements during the emission of the corresponding third LED, which results in: (i) the first LED emitting at a first preset dimming level relative to the set of third LEDs; and (ii) the second LED emitting at a second preset dimming level relative to the set of third LEDs.

[0030] Example 24 is a display device of Example 22, wherein: the set of third LEDs is formed from a continuous block of at least one hundred pixels offset from the edge of the active display area of ​​the pixel array.

[0031] Example 25 is a display device of Example 24, wherein: the edge of the functional display area of ​​the pixel array is a rounded edge of the functional display area of ​​the pixel array.

[0032] Example 26 is a display device according to any one of Examples 19 to 25, wherein: the first LED is an organic LED (OLED); and the second LED is an OLED.

[0033] Example 27 is a display device according to any one of Examples 19 to 26, wherein: the first resistive element includes a transistor connected to a first diode, a transistor gate connected to a first diode, and a transistor drain connected to a first diode; the transistor gate connected to the first diode is connected to the transistor drain connected to the first diode; the second resistive element includes a transistor connected to a second diode, a transistor gate connected to a second diode, and a transistor drain connected to a second diode; and the transistor gate connected to the second diode is connected to the transistor drain connected to the second diode.

[0034] Example 28 is a display device of Example 27, wherein: the transistor connected to the first diode has a first resistor in a first ratio to the resistor of the first LED; the transistor connected to the second diode has a second resistor in a second ratio to the resistor of the second LED; and the first ratio is different from the second ratio.

[0035] Example 29 is a display device of Example 28, wherein: due to the first diode connected to the transistor having a first aspect ratio, the first diode connected to the transistor has the first resistance; and due to the second diode connected to the transistor having a second aspect ratio, the second diode connected to the transistor has the second resistance; and the first aspect ratio is different from the second aspect ratio.

[0036] Example 30 is a display device of Example 28, wherein: the first LED is a sub-pixel of a first pixel in a pixel array; the second LED is a sub-pixel of a second pixel in the pixel array; and the first LED emits the same color as the second LED, such that the first LED and the second LED represent sub-pixels of the same color.

[0037] Example 31 is a display device of Example 30, wherein: the transistor drain terminal connected to the first diode is connected to a first bias voltage; and the transistor drain terminal connected to the second diode is connected to the first bias voltage.

[0038] Example 32 is a display device of Example 31, wherein: the display device is configured such that increasing the first bias voltage increases the first resistance of the transistor connected to the first diode and increases the second resistance of the transistor connected to the second diode.

[0039] Example 33 is a display device according to Example 31, comprising: a third LED among the plurality of LEDs, the third LED including a third LED anode terminal and a third LED cathode terminal; a third driving transistor including a third driving transistor source terminal, a third driving transistor gate terminal and a third driving transistor drain terminal, the third driving transistor drain terminal being connected to the third LED anode terminal; a third resistive element connected to the third driving transistor drain terminal, the display device being configured such that current flows through the third LED and the third resistive element during the third LED emission; a fourth LED among the plurality of LEDs, the fourth LED including a fourth LED anode terminal and a fourth LED cathode terminal; and a fourth driving transistor including a fourth driving transistor... The display device comprises a source terminal, a fourth driving transistor gate terminal, and a fourth driving transistor drain terminal, the fourth driving transistor drain terminal being connected to the anode terminal of the fourth LED; and a fourth resistive element connected to the fourth driving transistor drain terminal. The display device is configured such that during the emission of the fourth LED, current flows through the fourth LED and the fourth resistive element, wherein: the third LED is a sub-pixel of the first pixel in a pixel array; the fourth LED is a sub-pixel of the second pixel in the pixel array; the third LED emits the same color as the fourth LED, such that the first LED and the second LED represent sub-pixels of the same color; and the color emitted by the first LED and the second LED is different from the color emitted by the third LED and the fourth LED.

[0040] Example 34 is a display device of Example 33, wherein: the transistor drain terminal connected to the third diode is connected to a second bias voltage; the transistor drain terminal connected to the fourth diode is connected to the second bias voltage; and the second bias voltage is different from the first bias voltage.

[0041] Example 35 is a display device according to any one of Examples 19 to 34, wherein: the first driving transistor drain terminal is connected to the first LED anode terminal via a source terminal and a drain terminal of a first intermediate transistor; and the second driving transistor drain terminal is connected to the second LED anode terminal via a source terminal and a drain terminal of a second intermediate transistor.

[0042] Embodiment 36 is a display device comprising a plurality of light-emitting diodes (LEDs) forming a pixel array. The plurality of LEDs includes: a first LED, comprising a first LED anode terminal and a first LED cathode terminal, wherein the first LED is at least a portion of a first pixel that forms an edge of a display area within the pixel array; a first driving transistor comprising a first driving transistor source terminal, a first driving transistor gate terminal, and a first driving transistor drain terminal, the first driving transistor drain terminal being connected to the first LED anode terminal; and a first diode-connected transistor connected to the first driving transistor drain terminal. The display device is configured such that current flows during emission of the first LED. The display device is configured such that current flows through the first LED and the transistor connected to the first diode during the emission of the second LED; a second LED, comprising a second LED anode terminal and a second LED cathode terminal, wherein the second LED is at least a portion of a second pixel at the edge of the active display area of ​​the pixel array; a second driving transistor comprising a second driving transistor source terminal, a second driving transistor gate terminal and a second driving transistor drain terminal, the second driving transistor drain terminal being connected to the second LED anode terminal; and a transistor connected to the second diode, which is connected to the second driving transistor drain terminal, the display device being configured such that current flows through the second LED and the transistor connected to the second diode during the emission of the second LED.

[0043] Example 37 is a display device of Example 36, wherein: the transistor connected to the first diode has a first resistor in a first ratio to the resistor of the first LED; the transistor connected to the second diode has a second resistor in a second ratio to the resistor of the second LED; the first ratio is different from the second ratio; one drain terminal of the transistor connected to the first diode is connected to a first bias voltage; and one drain terminal of the transistor connected to the second diode is connected to the first bias voltage, wherein: the display device is configured such that increasing the first bias voltage increases the first resistance of the transistor connected to the first diode and increases the second resistance of the transistor connected to the second diode.

[0044] Example 38 is a display device according to any one of Examples 36 or 37, comprising: a set of third LEDs of the plurality of LEDs, each of the third LEDs in the set of third LEDs including a third LED anode terminal and a third LED cathode terminal; and a set of third driving transistors corresponding to the set of third LEDs, each of the third driving transistors in the set of third driving transistors including a third driving transistor source terminal, a third driving transistor gate terminal and a third driving transistor drain terminal, wherein: the drain terminal of each third driving transistor is connected to the anode terminal of the corresponding third LED from the set of third LEDs, and the drain terminal of each third driving transistor is not connected to a source terminal of a transistor connected to a diode during the emission of the corresponding third LED.

[0045] The disclosed technology can be used to improve the smoothness of rounded corners in the display area by darkening pixels located at or near the corners. Compared to other technologies used to darken pixels, the disclosed technology can reduce power consumption in the display SoC and DDIC. The disclosed technology can also improve the smooth appearance of rounded corners.

[0046] Details of one or more embodiments of the subject matter of this specification are set forth in the accompanying drawings and the following description. Other features, aspects, and advantages of the subject matter will become apparent from the description, drawings, and claims. Simple Explanation of the Diagram

[0047] Figure 1 is a diagram of an exemplary electronic device having a display panel and a frame.

[0048] Figure 2 is a diagram of a display system of an electronic device.

[0049] Figures 3A and 3B illustrate an example of a pixel with rounded corners on a display screen.

[0050] Figure 4 illustrates one example of a darkened pixel at the corner of a rounded display.

[0051] Figures 5A and 5B illustrate an example circuit of a pixel and a timing diagram of a pixel.

[0052] Figure 6 illustrates an exemplary circuit for one of the darkened pixels at the corner of a rounded display.

[0053] Figures 7A and 7B illustrate exemplary transistors for darkened pixels at the corners of a rounded display.

[0054] Figure 8 is a table showing the relationship between pixel brightness and the changes in bias voltage and transistor width versus length ratio.

[0055] The symbols and names of the same elements in various diagrams indicate the same elements. Implementation

[0056] Figure 1 is an illustration of a display panel 100 having a display area 104 and a border 108. The display panel 100 can be assembled into an electronic device, such as a smartphone, a television, a smartwatch, or a handheld game console. The display panel 100 includes an array of multiple light-emitting pixels. The display panel 100 can be, for example, an active-matrix organic light-emitting diode (OLED) panel or a light-emitting diode (LED) liquid crystal display (LCD) panel. The display panel 100 can be housed in a housing. The housing may be referred to as a casing.

[0057] Display panel 100 includes a top edge 112, right and left edges 118, and a bottom edge 114. Display panel 100 includes a bezel 108. The bezel 108 is the area between the edge of display panel 100 and the edge of display active area 104. The bezel 108 surrounds the array of light-emitting pixels of display panel 100. The bezel 108 may include driver circuitry for display panel 100, power supply lines, and signal lines between display control circuitry and integrated driver circuitry or pixels. Active area 104 is defined by contour 120. Contour 120 separates active area 104 from bezel 122.

[0058] Display panel 100 includes a sensor window, for example, display panel 100 defines a camera window 130. Camera window 130 is an area of ​​display panel 100 corresponding to a location of a sensor in an electronic device. For example, the sensor may be a camera. Camera window 130 is an area of ​​display panel 100 in which pixels are not active. Camera window 130 is defined by camera outline 140. Camera outline 140 separates camera window 130 from active area 104. Camera outline 140 may be referred to as an inner edge of active area 104.

[0059] The light intensity of a pixel can be determined by a grayscale value. Pixel light intensity can be represented as a grayscale value comprising integers from zero to 255, thereby representing an exemplary 8-bit grayscale display. Other grayscale value ranges can be used. For example, grayscale values ​​can be in the range of zero to 1023 for a 10-bit display, or in the range of zero to 65535 for a 16-bit display. Other possible grayscale value ranges may include a range from zero to one (with fractional values), and a range from zero percent (%) to 100%.

[0060] For a full-color display that spatially synthesizes colors, each pixel may contain multiple color channels or subpixels. In some instances, each pixel may contain one of a red, green, and blue subpixel. In some instances, each pixel may contain one of a cyan, magenta, and yellow subpixel. The light intensity of each subpixel can be represented using grayscale values ​​as described above (e.g., integers from zero to 255 for an 8-bit display).

[0061] Figure 2 is an illustration of a display system 200 of a display panel. For example, Figure 2 may illustrate a display system 200 of a display panel 100. The display system 200 is an OLED display system comprising an array 212 of light-emitting pixels. Each light-emitting pixel comprises an OLED. The OLED display is driven by a driver comprising a scan / emission driver 208 and a data driver 210. Generally, the scan / emission driver 208 selects a column of pixels in the display, and the data driver 210 provides a data signal (e.g., voltage data) to the pixels in the selected column to illuminate the selected OLED according to the image data. Signal lines (such as scan lines, emission lines, and data lines) can be used to control the pixels to display an image on the display. Although Figure 2 illustrates a display system 200 with a scan / emission driver 208 on one side, the scan / emission driver 208 can be placed on both the left and right sides of the display to improve driving performance (e.g., speed).

[0062] Display system 200 includes a pixel array 212 containing a plurality of light-emitting pixels, such as pixels P11 to P43. A pixel is a small element on a display that can change color based on image data supplied to the pixel. Individual pixels within the pixel array 212 can be individually addressed to produce various intensities of color. The pixel array 212 extends in a plane and includes columns and rows. A column extends horizontally across the array. For example, the first column of the pixel array 212 includes pixels P11, P12, and P13. A row extends vertically along the display. For example, the first row of the pixel array 212 includes pixels P11, P21, P31, and P41. For simplicity, only some pixels are shown in Figure 2. In practice, millions of pixels can exist in the pixel array 212. A larger number of pixels can result in higher image resolution.

[0063] Display system 200 includes a scan / emit driver 208 and a data driver 210. The scan / emit driver 208 is an integrated (i.e., stacked) column-line driver that supplies signals to the columns of pixel array 212. For example, the scan / emit driver 208 supplies scan signals S1 to S4 and transmit signals E1 to E4 to the pixel columns. The data driver 210 supplies signals to the rows of pixel array 212. For example, the data driver 210 supplies data signals D1 to D4 to the pixel rows.

[0064] Each pixel in pixel array 212 can be addressed by a horizontal scan line, an emission line, and a vertical data line. For example, pixel P11 can be addressed by scan line S1, emission line E1, and data line D1. In another example, pixel P32 can be addressed by scan line S3, emission line E3, and data line D2.

[0065] The display system 200 includes a controller 206 that receives display input data 202. The controller 206 may include a graphics controller and a timing controller. The controller generates signals for delivery to the display. The controller 206 provides input signals (e.g., clock signals, start pulses) to the scan / transmit driver 208 and provides image data to the data driver 210.

[0066] Scan / emit driver 208 and data driver 210 provide signals to pixels, enabling the pixels to reproduce images on the display. Scan / emit driver 208 and data driver 210 provide signals to pixels via scan lines, emit lines, and data lines. To provide signals to pixels, scan / emit driver 208 selects a scan line and controls the pixel's emission operation. Data driver 210 provides data signals to pixels addressable by the selected scan line to illuminate selected OLEDs according to image data.

[0067] Although Figure 2 illustrates an OLED display, the techniques used to reduce the size of the display's corner bezels are applicable to any flat panel display containing a pixel array. For example, the techniques for reducing the size of the display's corner bezels are applicable to light-emitting diode (LED) liquid crystal displays (LCDs) and plasma display panels (PDPs).

[0068] Figures 3A and 3B illustrate an example of pixels at the corners of a rounded display. Figure 3A illustrates a display panel 300 of a display system that dims pixels at the corners of a rounded display. The display panel 300 includes a pixel array 302. Figure 3B illustrates a detailed view of the upper right corner 132 of the display panel 300, which includes the upper right portion of the pixel array 302.

[0069] Although Figures 3A and 3B depict the upper right corner of the display panel 300, the techniques used to reduce the size of the display's corner bezels can also be applied to other corner areas of the display panel 300, such as the upper left corner. Figure 3B shows the upper right portion 320 of the pixel array 302 at the upper corner of the display panel 300.

[0070] Pixels typically have a square or rectangular shape. Therefore, when a display has a rounded outline, the shape of the outline of the affected area is not perfectly rounded. In fact, the outline has a jagged shape similar to a step. This causes non-smooth rounded edges on the display screen. To achieve a perceived smoother rounded shape, depending on the amount of pixels overlapping with the affected area, the illuminance of individual pixels at the rounded edges gradually decreases.

[0071] Contour 120 is a target contour that traces a smooth curve. The revealed technique can be used to illuminate pixels to approximate contour 120 using square or rectangular pixels. Contour 120 can be approximated by gradually darkening pixels at or near contour 120.

[0072] The pixels can be gradually darkened from inside to outside of contour 120. Referring to Figure 4, the directions of "inside" and "outside" are indicated by arrow 420. Generally speaking, "inside" refers to a direction away from contour 120 and towards the full-brightness pixels of the area of ​​effect. "Outside" refers to a direction away from contour 120 and towards an edge of the display panel (e.g., edge 118). Although Figure 4 shows an exemplary display corner (e.g., corner 132), the pixel darkening technique described with reference to Figure 4 can also be applied to an internal window of a display (e.g., camera window 130). Therefore, the disclosed technique can be applied to both the outer and inner edges of the area of ​​effect of a display.

[0073] In some instances, pixels entirely within the outline are fully bright, pixels entirely outside the outline are fully dark, and pixels along the outline are partially darkened in a gradual pattern. Figure 4 illustrates pixel darkening to various darkening levels, where each pixel is darkened using a shunt in a corresponding pixel circuit that reduces the amount of current flowing through the OLED. The shunt includes a resistive element, such as a diode-connected transistor. Refer to Figure 6 for a more detailed description of the shunt.

[0074] In some instances, not all pixels of the display contain a shunt. For example, pixels not located at or near a rounded edge may not contain a shunt. Referring to Figure 4, pixel 401 is located inside contour 120 and away from the edge. In some instances, pixel 401 is one of a set of pixels that does not contain a shunt with a transistor connected to a diode. In some instances, pixel 401 is part of a continuous block of at least one hundred pixels offset from the edge of pixel array 302. When pixel 401 is "on" (e.g., emitting light), pixel 401 does not dim due to the absence of a shunt. Therefore, pixel 401 can be referred to as a full-brightness pixel (although the computing device of the display in Figure 4 has the ability to dim pixel 401 by changing the operating time cycle of the light emitted by pixel 401 and / or the amount of current supplied to pixel 401 by a pixel-driving transistor).

[0075] Similarly, pixel 430 is positioned outside of contour 120 and away from the edge. In some embodiments, pixel 430 does not include a shunt. When pixel 430 is "on" (e.g., emitting light), pixel 430 does not dim due to the absence of a shunt. Therefore, pixel 430 can be referred to as a full-brightness pixel. However, due to its location outside contour 120, pixel 430 will typically be "off," for example, not emitting light. Pixel 430 may not be considered part of an active display area of ​​a display because it is typically "off" during normal operation of the display device. In some embodiments, a display device may be constructed using a design similar to that in FIG4, except that the display will not include pixels "outside" the ideal contour 120.

[0076] The edge of pixel array 302 is a rounded edge defined by contour 120. In the example of Figure 4, pixels 403, 404, 406, 408, and 412 are located at or near the edge defined by contour 120 (e.g., ideally, the contour travels through the pixels). The pixel circuitry of pixels 403, 404, 406, 408, and 412 each includes a shunt containing a diode-connected transistor. Differences in the physical properties of the diode-connected resistors result in different dimming levels for pixels 403, 404, 406, 408, and 412 relative to each other.

[0077] Pixels 403, 404, 406, 408, and 412 exhibit a gradual darkening from the inside out. Pixel 406 is approximately uniformly divided between the inside and outside of outline 120 and darkens by 50%. Pixels 403 and 404 are mostly inside outline 120 and darken by 10% and 30%, respectively. Pixels 408 and 412 are mostly outside outline 120 and darken by 70% and 90%, respectively.

[0078] Although shown in Figure 4 as having five dimming levels (e.g., 10%, 30%, 50%, 70%, 100%), other dimming level systems are possible. For example, pixel array 302 can have any suitable number of dimming levels, such as six, eight, ten, etc.

[0079] Figure 4 illustrates that the dimming level of each pixel is based on the fraction of the pixel's area inside or outside the outline. For example, the fraction of pixel 404 inside outline 120 is less than the fraction of pixel 403 inside outline 120. Therefore, pixel 404, which is dimmed by 30%, is dimmed more than pixel 403, which is dimmed by 10%. Similarly, the fraction of pixel 408 outside outline 120 is less than the fraction of pixel 412 outside outline 120. Therefore, pixel 408, which is dimmed by 70%, is dimmed less than pixel 412, which is dimmed by 90%.

[0080] In some instances, the dimming level of each pixel can be based on its proximity to the contour. For example, a pixel overlapping the contour can have a first dimming level. A pixel inside the contour and one pixel away from it can have a second dimming level, and a pixel inside the contour and two pixels away from it can have a third dimming level, and so on. Similarly, a pixel outside the contour and one pixel away from it can have a fourth dimming level, and a pixel outside the contour and two pixels away from it can have a fifth dimming level, and so on.

[0081] Figures 5A and 5B illustrate an exemplary circuit and a timing diagram of a full-illuminance pixel. Figure 5A is a diagram 500 of an LED and its corresponding driving circuit in a display system (for simplicity, it is sometimes referred to as pixel 500 below, although Figure 500 may also represent an LED and its corresponding driving circuit of a sub-pixel). For example, Figure 5A may show a more detailed view of a pixel in display system 200.

[0082] Pixel 500 is an active-matrix OLED (AMOLED) pixel. Pixel 500 receives a scan signal "GW (N)" and a reset scan signal "GI (N)". Pixel 500 receives a data voltage "DATA (k)" and a transmit signal "EM (N)". Pixel 500 receives a first supply voltage ELVDD and an initial reference voltage VINIT. Pixel 500 is connected to a common ground ELVSS.

[0083] Pixel 500 includes an organic light-emitting diode (OLED) 520. OLED 520 includes a layer of organic compound that emits light in response to a current IOLED. The organic layer is positioned between two electrodes: an anode and a cathode, such that the OLED includes an anode terminal A and a cathode terminal C. OLED 520 is driven by a current source circuit that receives a supply voltage ELVDD. The current source circuit drives OLED 520 to emit light.

[0084] Pixel 500 includes a storage capacitor CST, transistors T2 to T7, and an OLED driving transistor T1. The driving transistor T1 includes a source terminal S and a drain terminal D. The drain terminal D is connected to an anode terminal A of the OLED 520 (e.g., via an intermediate transistor, such that the drain terminal D of T1 is directly connected to a source terminal of the intermediate transistor via a conductor, and a drain terminal of the intermediate transistor is directly connected to the anode terminal A of the OLED 520). Pixel 500 is programmed using the following control signals: SCAN, EM, and DATA(k). The OLED current IOLED varies based on a voltage present across the LED driving transistor T1.

[0085] Figure 5B shows an exemplary timing diagram of pixel circuit operation of pixel 500. The voltage shown in Figure 5B is referred to as ground. During operation, pixel 500 undergoes an initialization phase, a programming phase, and an emission phase. During the initialization phase, OLED 520 is turned off in preparation for programming. OLED 520 is turned off by an EM signal turn-off 501 (e.g., by setting to a high level), which turns off T5 and T6 to prevent current flow to OLED 520. The pixel enters an initialization phase by receiving a reset signal GI(N) 502, which turns on T4 and sets G to VINIT.

[0086] The pixel then enters a programming stage by receiving a scan signal GW(N) 503. During the programming stage, the GW(N) signal is turned on, which in turn turns on T2, T3, and T7. Voltage data DATA(k) travels through T2, T1, and T3, thereby setting G to a value of DATA(k) minus at least one of the threshold voltages of T1. Therefore, when pixel 500 receives data voltage DATA(k) during a programming stage of a frame, this voltage is programmed to the "G" node of T1.

[0087] During the emission phase, the EM (N) signal is activated at 504, which in turn activates T5 and T6. Current from ELVDD flows through T1 and T6 to OLED 520, where the current level of OLED 520 is determined by G. Therefore, after pixel 500 has changed to one of the emission phases of the frame, current IOLED flows through OLED 520 based on a voltage set at the "G" node of the driving transistor (e.g., based on the received data voltage DATA (k)), causing OLED 520 to emit light when current IOLED flows through it. The intensity or brightness of the light depends on the amount of current IOLED applied. If a maximum current level (e.g., 100%) of IOLED flows through OLED 520, then OLED 520 will be illuminated at its "full" brightness.

[0088] A higher current typically results in brighter light. Therefore, the intensity of light emitted from the OLED 520 is based on DATA(k) of image data programmed to the "G" node and corresponding to individual pixels. During the emission phase following the programming / addressing phase, the storage capacitor CST maintains the pixel state, allowing pixel 500 to remain illuminated at approximately the programmed level.

[0089] Figure 6 illustrates an exemplary pixel circuit 600 for a darkened pixel at the corner of a rounded display. Circuit 600 includes a voltage divider. The shunt includes a resistive element, such as a diode-connected transistor T8. The diode-connected transistor T8 (e.g., via an intermediate transistor T6) is connected to the drain terminal D of the driving transistor T1. The shunt divides the current IOLED between transistor T8 and OLED 620. Therefore, during emission of OLED 620, current flows through OLED and through diode-connected transistor T8.

[0090] The gate electrode of transistor T8 is electrically shorted to the drain electrode. Transistor T8, connected to the diode, is in parallel with the OLED diode. The gate and drain electrodes are connected to the bias voltage VBIAS. The OLED emission current IOLED from the pixel circuitry is divided into IOLED1 and IOLED2. IOLED1 flows through OLED 620, illuminating the pixel. IOLED2 flows through transistor T8. For a given input current IOLED, a larger current flowing through transistor T8 results in a smaller current flowing through OLED 620.

[0091] The resistance of transistor T8 affects the amount of current IOLED2 flowing through transistor T8, and therefore the amount of current IOLED1 flowing through OLED 620. In one example, the resistance of transistor T8 is equal to the resistance of the OLED, and IOLED1 is equal to IOLED2. In another example, the resistance of transistor T8 is twice the resistance of OLED 620, and IOLED2 is half the resistance of IOLED1. A decrease in IOLED1 from full brightness causes OLED 620 to dim. In some examples, the OLED can be adjusted from a high brightness of approximately 500 nits to a low brightness of approximately 10 nits.

[0092] Several techniques can be used to control and / or adjust the resistance of transistor T8. A first technique involves controlling the resistance of transistor T8 based on the hardware characteristics of transistor T8. For example, transistor T8 can be designed to have a resistance that is a specified proportion of the resistance of an OLED. Transistor T8, connected to the drain terminal of driving transistor T1, causes the OLED brightness to dim according to a specified proportion of the resistance. Due to the hardware characteristics of transistor T8, the OLED dims to a preset dimming level. Compared to a full-brightness OLED with the same VBIAS, the preset dimming level can be expressed as a percentage dimming.

[0093] For example, a full-brightness OLED can be an OLED in which the drain terminal of the driving transistor T1 is not connected to the source terminal of a diode-connected transistor, and the shunt is turned off, in one pixel (e.g., pixel 600). A full-brightness OLED can also be an OLED in which the drain terminal of the driving transistor T1 is connected to the source terminal of a diode-connected transistor, but the shunt is turned off, in one pixel (e.g., pixel 600). For example, by setting VBIAS to a high value, the shunt is turned off as full current IOLED flows through OLED 620.

[0094] A computing device that is sending image data to a display panel can change the intensity of a given pixel by sending programmed different voltages to the G node of that pixel. Thus, a computing device can differentiate pixel intensities in software, as shown in Figure 4. However, since the image presented on the display panel can change from frame to frame, using software to darken pixels at the edges of a display involves recalculating the intensity level of these pixels for each frame. For example, for each frame, the computing device will initially have to identify the expected intensity (e.g., 80%) of an edge pixel and then darken that pixel intensity to achieve a soft "rounding" effect on the display edge (e.g., darkening the initial 80% intensity value by 50% to achieve a final 40% intensity value to be written to the G node). These repetitive calculations consume power and computing bandwidth. The technical implementation described in this invention, for example, utilizes the characteristics of a diode-connected transistor T8, which is attributed to the proportion of darkening of a pixel at a rounded edge in hardware. Therefore, the computing device only needs to program the raw image data to the pixels of the display panel, and any darkening at the edges is handled by the hardware.

[0095] In one example, transistor T8 may be designed to have a resistance that is two-thirds that of an OLED. The hardware characteristics of transistor T8 may include an aspect ratio. The aspect ratio is the ratio of the transistor's width to its length ("W / L ratio"). In some examples, the aspect ratio can be tuned separately for each pixel color. For example, pixel circuitry 600 may be a circuit for a sub-pixel of a pixel (e.g., a red, green, or blue sub-pixel). The transistor T8 for the red sub-pixel may have an aspect ratio different from that of the green, blue, or both sub-pixels. Figures 7A and 7B illustrate transistors with different aspect ratios.

[0096] One of the second techniques used to control the resistance of transistor T8 is adjusting the bias voltage VBIAS. A higher VBIAS induces a lower IOLED2 and results in a higher emission current IOLED1 through the OLED. Adjusting VBIAS causes a change in pixel brightness relative to a preset dimming level. In other words, adjusting VBIAS allows a computing device to change the preset dimming level specified by the aspect ratio of transistor T8.

[0097] In some instances, subpixels of a pixel can have different bias voltages. For example, a red subpixel can have a different VBIAS than the green, blue, or both subpixels. In some instances, VBIAS can be adjusted between a high level of approximately 2 V and a low level of approximately -5 V. In some instances, VBIAS can be adjusted during pixel operation.

[0098] To adjust the dimming level of pixels during operation, VBIAS can be adjusted based on the display brightness setting. For example, the DDIC of the display system can change the dimming of pixel 600 by increasing VBIAS. Increasing VBIAS can cause no current to flow through transistor T8. Therefore, T8 is turned off, and all OLED current flows through OLED 620, making IOLED equal to IOLED1. In some instances, VBIAS is a global parameter. For example, adjusting the VBIAS for a red sub-pixel can adjust the VBIAS for all red sub-pixels of the display panel. All subsystems in a display can receive the same VBIAS, allowing for a first VBIAS for all red sub-pixels, a second VBIAS for all green sub-pixels, and a third VBIAS for all blue sub-pixels.

[0099] Figures 7A and 7B illustrate exemplary transistors 700 and 750 for rounding the corners of a display screen to darken pixels. The physical dimensions of a transistor can be adjusted from a preset ratio to achieve a specific resistance of the transistor. The physical dimensions may include the width and length of the transistor, which affect the aspect ratio or W / L ratio of the transistor.

[0100] Transistor 700 includes a drain 702, a source 704, and a gate 710. Transistor 700 also includes a substrate 706 and an oxide 708. Gate 710 has a width W1 and a length L1. The aspect ratio of transistor 700 is W1 / L1.

[0101] Transistor 750 includes a drain 712, a source 714, and a gate 720. Transistor 750 also includes a substrate 716 and an oxide 718. The gate 720 has a width W2 and a length L2. The aspect ratio of transistor 750 is W2 / L2. The width W2 is the same as the width W1. The length L2 is longer than the length L1. Therefore, the aspect ratio W2 / L2 is less than the aspect ratio W1 / L1.

[0102] Transistors 700 and 750 can each be used in a shunt for a dimmed pixel. For example, transistors 700 and 750 can each be used as transistor T8 in pixel circuit 600 (e.g., for sub-pixels of the same color between two adjacent pixels at one edge of an active area of ​​a display). The aspect ratio W2 / L2 being smaller than the aspect ratio W1 / L1 causes transistor 750 to have a higher resistance than transistor 700. Therefore, compared to an equivalent second pixel circuit containing transistor 750 as transistor T8, a first pixel circuit containing transistor 700 as transistor T8 has a larger current flowing through transistor T8. Therefore, compared to a second pixel circuit containing transistor 750, a first pixel circuit containing transistor 700 has less current flowing through the OLED and is dimmed by a larger amount. Therefore, compared to the preset dimming level of the second pixel circuit, the preset dimming level of the first pixel circuit is thus darker or less bright.

[0103] Figure 8 is a table 800 illustrating the change in pixel brightness caused by variations in bias voltage and the transistor width-to-length ratio. As discussed above, the resistance of transistor T8 can be adjusted using two techniques. The first technique involves adjusting the physical dimensions, including the transistor's W / L ratio. The second technique involves adjusting the bias voltage VBIAS.

[0104] The configuration 801 of Table 800 includes an increased W / L ratio and the same VBIAS. Increasing the W / L ratio reduces the resistance through transistor T8, thereby increasing IOLED2 and decreasing IOLED1. Therefore, for a first pixel having a W / L ratio greater than that of a second pixel and the same VBIAS as the second pixel, the first pixel will have a lower OLED brightness. For example, referring back to FIG4, pixel 406 has a brightness (darker) that is 50% lower than that of pixel 404 (darker by 30%). This can be attributed to pixel 406 having a shunt with a diode-connected transistor T8 having a W / L ratio greater than that of the diode-connected transistor T8 of pixel 404.

[0105] The configuration 802 of Table 800 includes a reduced W / L ratio and the same VBIAS. Reducing the W / L ratio increases the resistance through transistor T8, thereby reducing IOLED2 and increasing IOLED1. Therefore, for a first pixel having a lower W / L ratio than a second pixel and the same VBIAS as the second pixel, the first pixel will have a higher OLED brightness. For example, referring back to FIG4, pixel 406 has a higher brightness (darker than 70%) than pixel 408 (darker than 50%). This can be attributed to pixel 406 having a shunt with a diode-connected transistor T8 having a lower W / L ratio than the shunt of pixel 408.

[0106] The configuration 803 in Table 800 includes an increased VBIAS and the same W / L ratio. Increasing VBIAS increases the resistance through transistor T8, thereby decreasing IOLED2 and increasing IOLED1. Therefore, for a first pixel having a VBIAS greater than that of a second pixel and a W / L ratio the same as that of the second pixel, the first pixel will have a higher OLED brightness.

[0107] The configuration 804 in Table 800 includes a reduced VBIAS and the same W / L ratio. Reducing VBIAS reduces the resistance through transistor T8, thereby increasing IOLED2 and decreasing IOLED1. Therefore, for a first pixel having a lower VBIAS than a second pixel and the same W / L ratio as the second pixel, the first pixel will have a lower OLED brightness.

[0108] The objects and embodiments of operation described in this specification can be implemented in any suitable electronic device, such as a personal computer, a mobile phone, a smart computer, a smartwatch, a smart TV, a mobile audio or video player, a game console, or one or more of these devices.

[0109] Electronic devices may include various components, such as a memory, a processor, a display, and an input / output unit. The input / output unit may include, for example, a transceiver capable of communicating with one or more networks to send and receive data. The display may be any suitable display for displaying images, including, for example, a cathode ray tube (CRT), a liquid crystal display (LCD), or a light-emitting diode (LED) display.

[0110] The various implementations of the systems and technologies described herein can be implemented in digital electronic circuits, integrated circuits, specially designed ASICs (Application-Specific Integrated Circuits), computer hardware, firmware, software, and / or combinations thereof. These various implementations may include implementations that can execute and / or interpret one or more computer programs on a programmable system comprising at least one programmable processor, which may be dedicated or general-purpose, coupled to receive data and instructions from a storage system, at least one input device, and at least one output device, and to transfer data and instructions to the storage system, at least one input device, and at least one output device.

[0111] The embodiment may be implemented as one or more computer program products, for example, one or more modules of computer program instructions encoded on a computer-readable medium for execution by a data processing device or for controlling the operation of a data processing device. The computer-readable medium may be a machine-readable storage device, a machine-readable storage substrate, a memory device, a composition of materials that implements a machine-readable propagation signal, or a combination thereof. The term "data processing device" encompasses all devices, apparatuses, and machines for processing data, including, for example, a programmable processor, a computer, or multiple processors or computers. In addition to hardware, the device may also include program code that creates an execution environment for one of the computer programs discussed, such as program code constituting processor firmware, a protocol stack, a database management system, an operating system, or a combination thereof. A propagation signal is an artificially generated signal, for example, an electrical, optical, or electromagnetic signal generated by a machine to encode information for transmission to a suitable receiver device.

[0112] A computer program (also known as a program, software, software application, instruction code, or code) may be written in any programming language (including compiled or interpreted languages) and may be deployed in any form (including as a standalone program or as a module, component, subroutine, or other unit suitable for use in a computing environment). A computer program does not necessarily correspond to a file in a file system. A program may be stored in a portion of a file that stores other programs or data (e.g., stored in one or more instruction codes in a markup language file), stored in a single file dedicated to the program in question, or stored in multiple coordinating files (e.g., a file that stores one or more modules, subroutines, or portions of code). A computer program may be deployed to execute on a single computer or on multiple computers located at one location or distributed across multiple locations and interconnected by a communication network.

[0113] A processor suitable for executing a computer program includes, for example, both general-purpose and special-purpose microprocessors, and any one or more processors of any kind of digital computer. Generally speaking, a processor will receive instructions and data from a read-only memory or a random access memory, or both.

[0114] A computer may include a processor for executing instructions and one or more memory devices for storing instructions and data. Generally, a computer will also include one or more mass storage devices (e.g., magnetic disks, magneto-optical disks, or optical disks) for storing data, or be operatively coupled to receive data from or transfer data to or from such mass storage devices, or both. However, a computer may not have such devices. Computer-readable media suitable for storing computer program instructions and data includes all forms of non-volatile memory, media, and memory devices, including, for example: semiconductor memory devices, such as EPROM, EEPROM, and flash memory devices; magnetic disks, such as internal hard disk drives or removable disks; magneto-optical disks; and CD-ROM and DVD-ROM discs. The processor and memory may be supplemented by or integrated into dedicated logic circuitry.

[0115] While this specification contains numerous details of specific embodiments, these should not be construed as limiting the scope of what can be claimed, but rather as descriptions of features specific to particular embodiments. Specific features described in the context of separate embodiments may also be implemented in combination in a single embodiment. Conversely, various features described in the context of a single embodiment may be implemented individually or in any suitable sub-combination in multiple embodiments. Moreover, although features may be described above as functioning in a particular combination and even initially claimed, in some cases, one or more features from a claimed combination may be omitted from the combination, and the claimed combination may pertain to a sub-combination or a variation thereof.

[0116] 100: Display panel 104: Display the area of ​​effect 108: Border 112: Top edge 114: Bottom edge 118: Right and left edges 120: Outline 122: Border 130: Camera Window 132: Top right corner 140: Camera Outline 200: Display System 202: Display input data 206: Controller 208: Scan / Emit Driver 210: Data Drive 212: pixel array 300: Display panel 302: Pixel Array 320: Upper right part 401: pixels 403: pixels 404: pixels 406: pixels 408: pixels 412: pixels 420: Arrow 430: pixels 500: Graph / pixel 501: EM signal off 502: Reset signal GI (N) 503: Scan signal GW (N) 504: EM (N) signal is on 520: Organic Light Emitting Diode (OLED) 600: Pixel Circuit 620: Organic Light Emitting Diode (OLED) 700: Transistor 702: Jiji 704: Source 706:Substrate 708: Oxide 710: Gate 712: Jiji 714: Source 716:Substrate 718: Oxides 720: Gate 750: Transistor 800: Table 801: Configuration 802: Configuration 803: Configuration 804: Configuration A: Anode terminal C: Cathode terminal CST: Storage Capacitor D: Extremes D1 to D4: Data Signals DATA (k): Data voltage E1 to E4: Transmitted signals ELVDD: First supply voltage ELVSS: Common Grounding EM (N): Transmitted signal G: Node GI (N): Reset scan signal GW (N): Scan signal IOLED: Organic Light Emitting Diode (OLED) Current / Input Current IOLED1: Current IOLED2: Current L1: Length L2: Length S: source terminal S1 to S4: Scan signals T1: Organic Light Emitting Diode (OLED) Driver Transistor T2 to T7: Transistors T8: Transistor connected to diode VBIAS: Bias voltage VINIT: Initial reference voltage W1: Width W2: Width

Claims

1. An electronic device comprising: A display device includes a plurality of pixels forming an active area of ​​the display device, the active area defining a rounded edge portion, wherein at least a portion of the plurality of pixels forming the rounded edge portion has stepped relative brightness levels determined by hardware structures of the plurality of pixels, such that a first pixel located at a first position in the rounded edge portion has a first relative brightness level defined by a first pixel hardware structure, and a second pixel located at a second position in the rounded edge portion has a second relative brightness level defined by a second pixel hardware structure, the first relative brightness level being different from the second relative brightness level. The first pixel includes: a first light-emitting diode (LED), a first resistive element having a first adjustable resistor, and a first driving transistor configured to drive a parallel current through the first LED and the first resistive element having the first adjustable resistor during light emission by the first LED. The display device is configured to increase a first bias voltage to increase the first adjustable resistance of the first resistive element.

2. The electronic device of claim 1, wherein in the display device, the first pixel is adjacent to the second pixel.

3. The electronic device as claimed in claim 1, wherein: The first relative brightness level includes a first preset dimming brightness level that is darker relative to a first programmed brightness level programmed to the first pixel; and the second relative brightness level includes a second preset dimming brightness level that is darker relative to a second programmed brightness level programmed to the second pixel.

4. The electronic device as claimed in claim 3, wherein: The display device includes a central pixel forming a central region offset from the rounded edge portion of the display device; and each of the central pixels forming the central region of the display device is structured to emit a brightness level to its respective central pixel.

5. The electronic device as claimed in claim 4, wherein: These center pixels form a continuous block of at least one hundred pixels offset from the rounded edge portion.

6. The electronic device as claimed in claim 1, wherein: The first pixel includes a first organic light-emitting diode (OLED); and the second pixel includes a second OLED.

7. The electronic device as claimed in claim 1, wherein: The second pixel includes: a second LED, a second resistive element having a second adjustable resistor, and a second driving transistor configured to drive current through the second LED and the second resistive element having the second adjustable resistor in parallel during light emission by the second LED.

8. The electronic device as claimed in item 7, wherein: The first resistive element includes a transistor gate terminal with a first diode connection and a transistor connected to one of the transistor drain terminals of the transistor gate terminal with a first diode connection; and the second resistive element includes a transistor gate terminal with a second diode connection and a transistor connected to one of the transistor drain terminals of the transistor gate terminal with a second diode connection.

9. The electronic device as claimed in item 8, wherein: The transistor connected to the first diode has a first resistor that is proportional to a first resistor of the first LED; the transistor connected to the second diode has a second resistor that is proportional to a second resistor of the second LED; and the first proportion is different from the second proportion.

10. The electronic device as claimed in claim 9, wherein: The first diode-connected transistor has the first resistance because it has a first aspect ratio in its physical dimensions; and the second diode-connected transistor has the second resistance because it has a second aspect ratio in its physical dimensions; and the first aspect ratio is different from the second aspect ratio.

11. The electronic device as claimed in claim 8, wherein: The transistor drain terminal connected to the first diode is connected to a first bias voltage; and the transistor drain terminal connected to the second diode is connected to the first bias voltage.

12. The electronic device as claimed in claim 7, wherein: The display device includes: a third pixel comprising: a third LED, a third resistive element having a third adjustable resistor, and a third driving transistor configured to drive current in parallel through the third LED and the third resistive element having the third adjustable resistor during light emission by the third LED; and a fourth pixel comprising: a fourth LED, a fourth resistive element having a fourth adjustable resistor, and a fourth driving transistor configured to drive current in parallel through the fourth LED and the fourth resistive element having the fourth adjustable resistor during light emission by the fourth LED; the third pixel is a sub-pixel of a first composite pixel; the fourth pixel is a sub-pixel of a second composite pixel; the third LED of the third pixel emits the same color as the fourth LED of the fourth pixel, such that the third pixel and the fourth pixel represent sub-pixels of the same color; and the color emitted by the first pixel and the second pixel is different from the color emitted by the third pixel and the fourth pixel.

13. The electronic device as claimed in claim 12, wherein: The third resistive element includes a third diode-connected transistor, the third diode-connected transistor including a third diode-connected transistor gate terminal and a third diode-connected transistor drain terminal connected to the third diode-connected transistor gate terminal and to a second bias voltage; the fourth resistive element includes a fourth diode-connected transistor, the fourth diode-connected transistor including a fourth diode-connected transistor gate terminal and a fourth diode-connected transistor drain terminal connected to the fourth diode-connected transistor gate terminal and to the second bias voltage; and the second bias voltage is different from the first bias voltage.

14. The electronic device as claimed in claim 1, wherein: The display device includes a center pixel forming a central region offset from the rounded edge portion of the display device; and each of the center pixels forming the central region of the display device includes a corresponding center pixel LED and a corresponding center pixel driving transistor configured to drive current through the corresponding center pixel LED but not drive current through a corresponding resistive element connected in parallel with the corresponding center pixel LED.

15. The electronic device as claimed in claim 1, wherein: The first pixel is a sub-pixel of a first composite pixel in the display device; the second pixel is a sub-pixel of a second composite pixel in the display device; and the first LED of the first pixel emits the same color as the second LED of the second pixel, such that the first pixel and the second pixel represent sub-pixels of the same color.

16. The electronic device as claimed in claim 1, wherein: The first resistive element includes a first diode-connected transistor, the first diode-connected transistor including a first diode-connected transistor gate terminal and a first diode-connected transistor drain terminal connected to the first diode-connected transistor gate terminal; and the display device is configured to increase the first bias voltage to increase the first adjustable resistance of the first diode-connected transistor.

17. The electronic device as claimed in claim 1, wherein: The first driving transistor system is connected to the first LED via a first intermediate transistor connected in series between the first driving transistor and the first LED.

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