Method for manufacturing semiconductor device

TWI939766BActive Publication Date: 2026-09-21BEIJING NAURA MICROELECTRONICS EQUIP CO LTD
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Patent Information

Application Number
TW113124006
Authority / Receiving Office
TW · TW
Patent Type
Patents
Current Assignee / Owner
Priority Date
2023-06-29
Filing Date
2024-06-27
Publication Date
2026-09-21
Estimated Expiration
2044-06-26

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Abstract

This application belongs to the field of semiconductor technology, specifically disclosing a method for manufacturing a semiconductor device, comprising: forming a first stacked structure and a second stacked structure spaced apart from each other on a substrate, the first stacked structure and the second stacked structure respectively comprising alternating stacked first semiconductor layers and second semiconductor layers; filling an isolation wall and a sacrificial layer between the first stacked structure and the second stacked structure, the sacrificial layer being located on both sides of the isolation wall to separate the isolation wall from the first stacked structure and the second stacked structure respectively, the sacrificial layer having a high etch selectivity relative to the first semiconductor layer or the second semiconductor layer; removing one of the first semiconductor layer and the second semiconductor layer and the sacrificial layer; and forming a gate structure around the other.
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Citation Information

Patent Citations

  • Semiconductor structure and forming method thereof

    CN113903808A