Apparatus and method for dry etching of aluminum gallium arsenide optical waveguides using argon gas plasma

TWI939928BActive Publication Date: 2026-09-21THE HONG KONG UNIV OF SCI & TECH
View PDF 4 Cites 0 Cited by

Patent Information

Application Number
TW114101863
Authority / Receiving Office
TW · TW
Patent Type
Patents
Current Assignee / Owner
Priority Date
2024-01-17
Filing Date
2025-01-16
Publication Date
2026-09-21
Estimated Expiration
2045-01-15

AI Technical Summary

Technical Problem

Current methods for etching aluminum gallium arsenide (AlGaAs) waveguides suffer from inconsistency, reproducibility issues, and surface roughness due to the use of volatile reactive gases, which are sensitive to equipment conditions and aluminum content, making it difficult to achieve smooth sidewalls and precise patterning for high-aspect ratio structures.

Method used

A dry etching method using argon ions (Ar+) in an inductively coupled plasma reactive ion etching (ICP-RIE) process to physically bombard the AlGaAs film, avoiding volatile etching byproducts and ensuring smooth, sloped sidewalls without the need for reactive gases.

Benefits of technology

The method achieves consistent, reproducible etching of AlGaAs waveguides with sloped sidewalls, suitable for high-aspect ratio structures, reducing surface roughness and enabling precise patterning for photonic integrated circuits.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure TWG2TB001912045_001
    Figure TWG2TB001912045_001
  • Figure TWG2TB001912045_002
    Figure TWG2TB001912045_002
  • Figure TWG2TB001912045_003
    Figure TWG2TB001912045_003
Patent Text Reader

Abstract

This invention provides a dry etching method for fabricating aluminum gallium arsenide (AlGaAs) optical waveguides. The method includes the following steps: providing at least one aluminum gallium arsenide-on-insulator substrate, comprising a substrate layer, a buried layer formed on the substrate layer, an adhesive interlayer formed on the buried layer, and an aluminum gallium arsenide layer formed on the adhesive interlayer; forming a photomask film on the aluminum gallium arsenide layer; forming a photoresist film on the photomask film; transferring a pattern to the photoresist film; etching the photomask film to transfer the pattern from the photoresist film to the photomask film; and etching the aluminum gallium arsenide layer using inductively coupled plasma reactive ion etching (ICP-RIE) in conjunction with argon plasma to form a waveguide structure comprising a trapezoidal top and a horizontally extending bottom, wherein the trapezoidal top has positively inclined sidewalls. During the etching process, the physical bombardment of the aluminum gallium arsenide layer uses only argon ions (Ar⁺) to pattern the waveguide structure.
Need to check novelty before this filing date? Find Prior Art

Description

Apparatus and method for dry etching aluminum gallium arsenide optical waveguides using argon plasma The present invention relates to dry etching technology, and more particularly to a device and method for dry etching an aluminum gallium arsenide optical waveguide using argon plasma. Aluminum gallium arsenide (AlGaAs) has excellent electronic and optical properties, high second-order optical nonlinearity, and high third-order optical nonlinearity. It has become a highly promising integrated photonic substrate in the fields of lasers, semiconductor optical amplifiers, nonlinearity, and quantum photonics. x Ga 1-x Aluminum content in As compound semiconductors x can adjust the energy gap and optical properties of the material. The optical properties regulated by x include: (1) refractive index, (2) linear absorption (optical transparency), (3) two-photon nonlinear absorption, (4) second-order nonlinear polarizability and (5) third-order nonlinear susceptibility Furthermore, AlGaAs with varying aluminum contents (e.g., from GaAs to AlAs) also have similar lattice constants, allowing for the growth of multilayer structures with varying compositions on a substrate. Using an AlGaAs layer with a lower aluminum content as the waveguide core enables total internal reflection, while the outer cladding can be made of an AlGaAs layer with a higher aluminum content. This allows for the design and fabrication of more complex multilayer waveguide structures for laser and phase matching applications. Relevant researchers have used the high optical nonlinearity and multifunctional properties of AlGaAs to realize a variety of second-order nonlinear optical frequency conversions, such as second harmonic generation and difference frequency generation, on an AlGaAs-based integrated photonic substrate. The selection of x is primarily based on avoiding two-photon absorption losses at 1550nm and linear absorption losses at 775nm. Various photon pair generation techniques have also been demonstrated on integrated photonic substrates utilizing nonlinear optical parametric conversion processes. According to current literature reports, most nonlinear and quantum photonic research based on AlGaAs requires smooth waveguide sidewalls to minimize scattering losses at the excitation wavelength and the generated wavelength. In addition, due to the strict requirements for phase matching in the nonlinear optical frequency conversion process, high-precision patterning is very important. A key step to ensure high-precision patterning and the formation of a smooth waveguide sidewall profile is the etching process of transferring the pattern from the mask layer to the component film. For components with multi-layer AlGaAs structures, the etching process also needs to achieve a uniform etching rate between layers with different aluminum content to ensure a consistent etching profile. Currently, several methods have been developed in the field to pattern AlGaAs waveguides with different aluminum contents x, including wet etching and chlorine-based inductively coupled plasma reactive ion etching (ICP-RIE). Wet etching etches AlGaAs isotropically, resulting in curved waveguide sidewalls and making it impossible to achieve high aspect ratio structures such as narrow waveguides and narrow coupling gaps. The latter method usually involves reactive compound gases, including different amounts of BCl 3. Cl 2. SiCl 4. CH 4 and H 2. In addition, argon and N can also be used The degree of anisotropy can be controlled by mixing reactive and inert gases. This mixture of reactive and inert gases can balance the effects of physical bombardment and chemical etching. However, these etching recipes are very sensitive to equipment conditions and therefore lack consistency and reproducibility. In addition, these methods are also highly sensitive to etching parameters, such as the need for 10% to 13% N 2 gas mixing ratio is needed to ensure anisotropic profile yield and minimize the roughness of the etched bottom. Due to the above challenges, there is currently no standardized etching recipe for aluminum gallium arsenide in the optoelectronics field. For example, the research group at the University of California, Santa Barbara (UCSB) used Cl 2 / N 2 gas mixture, the research group of the Technical University of Denmark (DTU) used only BCl 3, while the research group of the University of Glasgow (UofG) used SiCl 4 / Ar / N 2. The chemical etching process of these reactive gases is inevitably affected by the aluminum content because AlCl 3. GaCl 2 and GaCl 3 and other volatile by-products. Therefore, there is a need to develop a method that can generate a sloped waveguide profile with smooth sidewalls while avoiding the generation of non-volatile etching byproducts that may increase surface roughness. In order to solve the above-mentioned shortcomings and unmet needs in the prior art, the present invention provides a device and method to achieve the solution. This invention provides an ICP-RIE dry etching method for etching aluminum gallium arsenide waveguides using only argon ions (Ar+), resulting in a sloped waveguide profile and smooth waveguide sidewalls. The solution provided utilizes only the physical bombardment of Ar+ ions to pattern the waveguides, avoiding the generation of non-volatile etching byproducts that can cause waveguide roughness. Based on the provided solution, the present invention discloses a method comprising dry etching an aluminum gallium arsenide film to form optical waveguides and other integrated optical components with sloped waveguide sidewalls. A dielectric mask is first deposited on the aluminum gallium arsenide film and patterned. The dielectric mask pattern defines the contours of the optical waveguide through a plurality of grooves. Areas of the aluminum gallium arsenide film not covered by the dielectric mask are removed through a dry etching process. During the dry etching process, the aluminum gallium arsenide film is etched using argon plasma generated in an inductively coupled plasma reactive ion etching (ICP) chamber. This process involves three steps to ignite and stabilize the argon plasma. According to a first aspect of the present invention, a dry etching method for fabricating an AlGaAs optical waveguide is provided. The method comprises the following steps: providing at least one AlGaAs-on-insulator substrate, comprising a substrate layer, a buried layer formed on the substrate layer, an adhesive interposer formed on the buried layer, and an AlGaAs layer formed on the adhesive interposer; forming a mask layer on the AlGaAs layer; forming a photoresist film on the mask layer; transferring a pattern to the photoresist film; etching the mask layer to transfer the pattern on the photoresist film to the mask layer; and etching the AlGaAs layer using inductively coupled plasma reactive ion etching (ICP-RIE) and argon plasma to form a waveguide structure, the waveguide structure comprising a trapezoidal top and a horizontally extending bottom, the trapezoidal top having positively sloped sidewalls, wherein during the formation of the waveguide structure, the AlGaAs layer is physically bombarded using only argon ions (Ar+) to pattern the waveguide. Furthermore, due to its high second- and third-order optical nonlinearities, AlGaAs is a promising semiconductor photonic substrate for generating photon pairs via spontaneous parametric down-conversion (SPDC) or spontaneous four-wave mixing (SFWM). The present invention demonstrates the ability to fabricate high-Q microresonators on an AlGaAs-on-insulator (AlGaAsOI) substrate. Furthermore, the present invention provides a waveguide directional coupler structure and a method for its fabrication. The following description describes, as a preferred example, an apparatus and method for dry etching aluminum gallium arsenide optical waveguides using argon plasma. It will be apparent to those skilled in the art that modifications may be made to the examples herein, including the addition and / or substitution of features, without departing from the scope and spirit of the present invention. To avoid obscuring the present invention, some specific details are omitted below; however, this disclosure is written to enable those skilled in the art to practice the teachings herein without undue experimentation. There are some works or literatures that have made contributions in related fields; however, there are still some shortcomings or trade-offs that need to be addressed, as described below. There are related works or literatures that discuss methods for dry etching of multilayer III-V compound semiconductors, where the III-V compound semiconductors may include gallium arsenide and indium phosphide. For example, dry etching involves switching between different etching steps using different reactive gases. In one of the works, methane (CH 4) and hydrogen (H 2) and in another step using CH 4. H 2 and chlorine (Cl 2). However, the gas mixture in this work was designed to selectively etch specific III-V compound semiconductors. Therefore, it may not be possible to etch aluminum gallium arsenide with different aluminum contents. In addition, the use of methane during the etching process is known to have the disadvantage of polymer redeposition. Previous work and literature have discussed methods for fabricating GaAs nanowires. One study disclosed a method for fabricating a thin metal mesh and using it as an anode for electrochemical wet etching of GaAs thin films. When a bias is applied, free hole carriers are generated at the metal-semiconductor interface in areas covered by the mesh, oxidizing the semiconductor. The oxidized areas can be etched with an appropriately selected etchant, resulting in an anisotropic wet etch pattern, which allows for atypical wet etching characteristics. However, this process requires a metal mask, which can be a major complication in patterning AlGaAs waveguides. In this work, the metal mask is a large, all-metal mesh containing periodically arranged holes for patterning the nanowires. However, the patterns of photonic integrated circuits are typically much more complex than a periodically arranged metal mesh. Therefore, metal masks for photonic integrated circuits may not be continuous thin film structures, making it difficult to apply a bias across the entire metal mask. In addition, there are other related works or literature discussing various laser diode designs and related manufacturing methods. Some methods disclose the use of, for example, NH 4OH、H 2O 2. Wet chemical etching with chemicals such as HCl to pattern the aluminum gallium arsenide film. There is a related work or literature that uses ICP-RIE method to pattern AlGaAs waveguide. An undisclosed ratio of Cl 2 and nitrogen (N 2) to etch AlGaAs films. Due to the choice of reactant gases, etching is accomplished through a chemical reaction. Therefore, when this method is used to etch AlGaAs films with varying aluminum compositions, distorted results are unavoidable. There is a related work or literature that uses ICP-RIE method to pattern AlGaAs waveguide. In the publication, the use of BCl 3 and N Various mixtures of 2. Pure BCl with a silicon support 3-gas can provide a trade-off with smooth sidewalls and anisotropic waveguide profiles. However, due to the low concentration of etchant in the narrow gap region, significant loading effects and anisotropic profiles will appear in the narrow coupling region. There is a related work or literature that uses ICP-RIE method to pattern AlGaAs waveguides. In their publication, they used BCl A mixture of 3 and Ar. Furthermore, the use of chromium as a photomask in an aluminum gallium arsenide etching method has been reported. However, if the chromium is not completely removed, the chromium approach can lead to absorption losses of light propagating in the waveguide. In view of the above challenges or existing defects, the present invention provides a novel technical solution. In the present invention, a method for dry etching an AlGaAs-on-insulator film on SiO2 is provided. The AlGaAs film can be dry-etched by physical bombardment using ICP-RIE using only argon ions (Ar+) to knock out atoms in areas of the film that are not protected by the dielectric mask. This method eliminates the need for using volatile reactive gases (e.g., BCl 3. Cl 2. SiCl 4. CH 4. H 2 or other gases in different amounts). Under the condition of excluding volatile reactive gases, aluminum gallium arsenide with various aluminum contents can be uniformly etched without carefully adjusting the relationship between different reactive gas contents (such as adjusting BCl 3 and Cl 2). Therefore, the present invention provides a simplified method for dry etching aluminum gallium arsenide thin films, eliminating the need to consider the type of reactant gas and the complex interactions between the reactant gas and its etching byproducts. By reducing the degree of process freedom, the complexity of adjusting the aluminum gallium arsenide film dry etching process is significantly simplified. The solution provided by the present invention can be applied to the patterning of photonic integrated circuits on AlGaAs-on-insulator thin films with sloped waveguide profiles. The solution provided by the present invention has potential wafer-level scalability and is relatively easy to adopt. The solution provided by the present invention can also be applied to the patterning process of other multilayer AlGaAs thin films with varying aluminum contents. Figure 1 illustrates a flow chart of a process for patterning an AlGaAs thin film using dry etching, according to some embodiments of the present invention. As shown in Figure 1 , the process includes steps S10, S20, and S30. Step S10 involves providing an AlGaAs-on-insulator (OIS) film. Step S20 involves mask patterning. Step S30 involves dry etching the AlGaAs thin film. Figure 2 illustrates a cross-sectional view of various layers in an aluminum gallium arsenide-on-insulator substrate during a photomask patterning process for an aluminum gallium arsenide thin film according to some embodiments of the present invention. The diagram of Figure 2 includes stages (a), (b), (c), (d), and (e), which involve transferring the photomask pattern to a silicon dioxide mask layer. In stage (a) of FIG. 2 , step S10 involves preparing an AlGaAs-on-insulator substrate. AlGaAs-on-insulator substrate 100 includes substrate layer 102, buried layer 104, bonding interposer 106, and AlGaAs layer 108. Substrate layer 102 may comprise silicon, sapphire, gallium arsenide (GaAs), or silicon carbide (SiC). Buried layer 104 is formed on substrate layer 102 and may comprise a buried oxide layer, a nitride layer, or a combination of oxide and nitride layers. Bonding interposer 106 is formed on buried layer 104 and may comprise divinylsiloxane benzocyclobutene (DVS-BCB), bauxite, silicon dioxide (SiO₂), or a polymer-based adhesive. AlGaAs layer 108 is formed on bonding interposer 106. The AlGaAs layer 108 may be formed by using techniques such as ALD (Atomic Layer Deposition) assisted molecular bonding, BCB (benzocyclobutene-bonded) bonding, or other bonding processes. In stages (b), (c), (d), and (e) of FIG. 2 , step S20 is performed, which involves a mask patterning process. After preparing the AlGaAs-on-insulator substrate 100, the process can begin with depositing a dielectric mask film (e.g., silicon dioxide or silicon nitride) on the AlGaAs-on-insulator substrate 100, and then proceed to the mask patterning process. As shown in stage (b) of Figure 2 , a mask layer 110 is formed on the aluminum gallium arsenide layer 108. In some embodiments, the mask layer 110 is made of tetraethoxysilane (TEOS) silicon, has a thickness of approximately 3000 Å, and is formed by plasma-enhanced chemical vapor deposition (PECVD). In some embodiments, the mask layer 110 can also be a silicon layer, a silicon nitride layer, or a combination thereof formed by PECVD. As shown in stage (c) of Figure 2 , a photoresist layer 112 is formed on the mask layer 110. In some embodiments, the photoresist layer can be made of AZ-7908 material with a thickness of approximately 9000 Å and is spin-coated on the mask layer 110 at a speed of 4000 rpm. After spin coating, a soft bake can be performed at 90°C for 60 seconds. As shown in stage (d) of Figure 2, the desired pattern is transferred to the photoresist layer 112. In some embodiments, the pattern transfer is performed using an I-line (e.g., 365nm) lithography stepper with an exposure dose of 240-320 mJ / cm². Subsequently, the exposed photoresist layer 112 undergoes a post-exposure bake at 110°C for 60 seconds. The baked photoresist layer 112 can be immersed in a tetramethylammonium hydroxide (TMAH) solution for 60 seconds. Here, the patterning process of the mask layer 110 is not limited to using I-line lithography and the photoresist layer (AZ-7908). In some embodiments, other lithography methods / materials (e.g., electron beam lithography (EBL)) and resist materials (e.g., hydrosilicone (HSQ)) can also be used to perform the patterning process of the mask layer 110. As shown in stage (e) of FIG2 , the pattern of the photoresist layer 112 can be transferred to the mask layer 110. Before entering the etching chamber, the O 2 plasma to clean the etching chamber to reduce the possibility of particle contamination falling onto the sample surface. In some embodiments, pattern transfer is performed by dry etching; for example, RIE is applied to the mask layer 110. In the dry etching parameter setting of the mask layer 110, CHF 3 / O The dry etching is performed using a gas mixture of 2=87 / 1.5 sccm and a chamber pressure of 68 mTorr. The RIE power can be set to 85 W. After the dry etching is completed, the AlGaAs layer 108 is exposed from the mask layer 110. Figure 3 illustrates a flow chart of a process for transferring a mask pattern from a mask to an AlGaAs layer according to some embodiments of the present invention. After the dry etching in stage (e) of Figure 2, the next step is to pattern the AlGaAs layer using an ICP-RIE process. As shown in stage (a) of FIG3 , after the dry etching (eg RIE) process of the mask layer 110, the photoresist layer 112 is degraded. In some embodiments, the photoresist layer 112 can be completely removed before the ICP-RIE process, which can be done using O 2 plasma ashing for removal. In some embodiments, other methods / means may also be used to remove the photoresist layer 112 (for example, using a buffered oxide etchant (BOE)). Before placing the AlGaAs-on-insulator substrate 100 with the mask layer 110 into the ICP-RIE chamber, the ICP-RIE chamber is first subjected to an O 2 plasma ashing for 10 minutes. 2. Plasma cleaning. Before the actual etching operation, the ICP-RIE chamber can be etched for at least 10 minutes (without sample) to ensure the reproducibility of the results. As shown in stage (b) of Figure 3 , a three-step process is used to ignite the argon plasma to achieve the desired etching settings. The chamber pressure is initially set to 18 mTorr for 10 seconds, then reduced to 10 mTorr for 5 seconds, and finally reduced to 4 mTorr before the dry etching process begins. A higher initial chamber pressure facilitates stable plasma ignition, while the gradual reduction in pressure ensures plasma stability. For example, if the chamber pressure is directly set to 4 mTorr and the process begins, stable plasma ignition will not be achieved. In some embodiments, during the dry etching process in stage (b) of Figure 3 , the AlGaAs layer 108 of the AlGaAs-on-insulator substrate 100 is physically bombarded using only argon ions (Ar+). This avoids the generation of non-volatile etching byproducts that could cause surface roughness in the AlGaAs layer 108. In some embodiments, during the dry etching process, argon plasma is used as the sole etching gas, and no other substances are used to etch the AlGaAs layer 108, thereby ensuring that the process does not generate byproducts that could cause surface roughness. After a dry etching process using argon plasma, the AlGaAs layer 108 includes a bottom portion with a horizontally extending profile and a trapezoidal top portion connected to the bottom portion. In some embodiments, the AlGaAs layer 108 may have sloped sidewalls that continue the sidewall profile of the mask layer 110, forming a continuous profile along the sides of the trapezoidal shape. In some embodiments, the sidewall profile of the mask layer 110 includes a vertical portion that is disconnected from the sloped sidewalls of the AlGaAs layer 108 within the trapezoidal shape. 4 shows a schematic diagram of an ICP-RIE process chamber 200 for dry etching an aluminum gallium arsenide layer according to some embodiments of the present invention. The ICP-RIE process chamber 200 includes gas inlets 202 and 204, a radio frequency (RF) coil 206, a first radio-frequency (RF) power source 208, a substrate holder 216, a second RF power source 218, a liquid inlet 220, a port 222, a liquid outlet 224, a valve 226, and a load seal 228. The interior of the ICP-RIE process chamber 200 can be supplied with oxygen and argon gases through gas inlets 202 and 204, respectively. A first RF power source 208 can drive an RF coil 206 at a frequency of 13.56 MHz to generate plasma for etching or O₂ cleaning. A sample 212 is fixed or attached to a silicon carrier wafer 214 (e.g., a 6-inch silicon carrier wafer) for etching. Sample 212 may include the aforementioned structure of an aluminum gallium arsenide-on-insulator substrate 100 with a mask layer 110. The generated plasma 210 can etch the sample 212 or clean the process chamber. The plasma is accelerated and directed toward a substrate holder 216 driven by a second RF power source 218. The substrate holder 216 can be cooled to 20°C by deionized water supplied through a liquid inlet 220 and a liquid outlet 224. Helium gas can be supplied through a port 222 to the back of the silicon carrier wafer 214 for cooling. The chamber pressure of the ICP-RIE process chamber 200 can be adjusted via valve 226. Samples 212 to be etched can enter and exit the ICP-RIE process chamber 200 through a load lock 228, which maintains a high vacuum and low humidity environment within the chamber. This is a critical setup detail because moisture can negatively impact the AlGaAs etching process, especially AlGaAs with a high aluminum content, which is more susceptible to oxidation. Figure 5 shows a table of parameters for a dry etching process according to some embodiments of the present invention. In some embodiments, the etching process parameters are set as follows: the RF coil power is set to 750 watts to generate plasma within the chamber; the RF lower electrode power is set to 100 watts to control ion energy and assist in the etching process. Both the RF coil power and the RF lower electrode power are set at a frequency of 13.56 MHz. The chamber pressure is maintained at 4 mTorr to maintain appropriate plasma characteristics. The argon flow rate is 25 sccm, and the oxygen flow rate is 60 sccm to assist in the plasma generation process and the etching reaction. The temperature of the substrate holder (e.g., substrate holder 216) is controlled at 20°C to prevent sample damage. Prior to etching, the chamber may be purged with oxygen for 600 seconds to minimize process contamination. The etching process itself lasts for 270 seconds, during which the sample is exposed to the plasma to achieve the desired etching process. These parameters are primarily used to facilitate the smooth execution of the aforementioned process, thereby achieving the desired etching results. The dry etching process described above can form an AlGaAs layer with an inverted trapezoidal morphology, which can be used as a waveguide. The physical properties of this waveguide will be further described below. Figure 6 shows a scanning electron microscope (SEM) image, with (a) showing the sidewalls of an AlGaAs waveguide and (b) showing a cross-section of the AlGaAs waveguide. Figure 6 shows the dielectric mask layer 300 and the sidewalls of the etched AlGaAs waveguide 302. Using an etch rate of approximately 870 Å / s, the etched AlGaAs waveguide 302 achieves a positive slope with an angle ranging from 66° to 68°. The sloped profile of the etched AlGaAs waveguide 302 facilitates the deposition of the upper cladding layer and avoids the formation of voids. Figure 7 shows SEM images of waveguide cross-sections, with (a) showing a BCB-bonded (benzocyclobutene-bonded) AlGaAs-on-insulator substrate and (b) showing an ALD-bonded (atomic layer deposition) AlGaAs-on-insulator substrate. These BCB-bonded and ALD-bonded substrates can be processed identically to form waveguides, taking the same amount of time. Both samples exhibit similar waveguide slope angles, demonstrating that the process recipe achieves similar results even when applied to AlGaAs-on-insulator substrates with different bonding interlayers. Consequently, even when using the same pure argon plasma process on AlGaAs substrates with different substrate types, these AlGaAs layers consistently achieve waveguide structures with positive tilt angles between 66° and 68°. Figure 8 shows SEM images of a dry-etched SiO2 mask (a) and a dry-etched AlGaAs-on-insulator waveguide sidewall (b). In some embodiments, the dielectric mask includes a top portion 304 and a bottom portion 306, wherein the sidewalls of the bottom portion 306 are nearly vertical. The etched AlGaAs waveguide includes a top portion 308 and a bottom portion 310, with the bottom portion 310 serving as a base for the top portion 308. The sidewalls of the top portion 308 have a positive slope. As can be seen from the figure, the specific sidewall slope of the AlGaAs layer in the etched waveguide is formed after the ICP-RIE step using argon plasma, rather than by performing RIE etching on the dielectric mask hard film during the pattern transfer process. Figure 9 shows cross-sectional SEM images of a single AlGaAs waveguide (a) and an AlGaAs waveguide coupler (b). The width of groove 311 is approximately 2.06 µm, while the width of groove 312 is approximately 399 nm. The slope angle of the waveguide sidewalls remains consistently within a range of 66°-68°, indicating that the slope angle of the waveguide sidewalls is independent of the groove width. The aforementioned manufacturing process is suitable for the manufacture of waveguides, especially on a substrate of aluminum gallium arsenide on insulator. The geometry of the waveguide is controlled by a dry etching process, and the waveguide formed has a tilted profile. Aluminum gallium arsenide is an ideal material for the manufacture of waveguides. Its high second-order and third-order optical nonlinear properties make it particularly suitable for applications such as spontaneous parametric down-conversion (SPDC) and spontaneous four-wave mixing (SFWM). The waveguide structure produced by the process can achieve efficient light conduction and coupling, and its structure is optimized to support both -quasi phase matching and modal phase matching. In addition, the method provided by the present invention can achieve high reliability and can simultaneously manufacture dual-channel waveguides, and the difference between the channels is kept within an acceptable range. 10A shows a schematic cross-sectional view of a waveguide directional coupler 400 according to some embodiments of the present invention; FIG10B shows a graph of the modal field amplitudes of simulated transverse electric (TE) polarization and transverse magnetic (TM) polarization of the waveguide directional coupler of FIG10A according to some embodiments of the present invention. The waveguide directional coupler 400 is made using an aluminum gallium arsenide on insulator substrate. The waveguide directional coupler 400 includes a buried oxide layer 410, an adhesive layer 412, an aluminum gallium arsenide layer 414, and a cladding layer 416. The adhesive layer 412 is deposited on the buried oxide layer 410 and may include a metal oxide, such as Al 2O 3. Aluminum gallium arsenide layer 414 is located on top of adhesive layer 412, thereby forming a dual channel of waveguide directional coupler 400. For example, a dual channel waveguide can be formed by etching the aluminum gallium arsenide layer. The two channels are optically coupled to each other to create a waveguide directional coupler. In some embodiments, aluminum gallium arsenide layer 414 is made of Al 0.5 Ga 0.5 The cladding layer 416 covers the aluminum gallium arsenide layer 414 and may include silicon oxide, such as SiO 2. The cladding layer 416 is conformal to the top surface of the AlGaAs layer 414, and these layers together form a waveguide structure. Specifically, the aluminum gallium arsenide layer 414 includes a bottom portion 418 with a height of approximately 230 nm and a top portion 420 with a height of approximately 370 nm. The bottom portion 418 serves as a base for the top portion 420, which has a trapezoidal shape. The top portion 420 extends from the bottom portion 418 and has sidewalls with a positive slope angle of approximately 66°. The top portion 420 is fabricated into two waveguide channels, with a spacing of approximately 350 nm between the channels. The top surface width of each channel is approximately 900 nm. The cladding layer 416 is approximately 300 nm high and extends into the gap between the two waveguide channels in the top portion 420. The morphological features of the top portion 420 help prevent the formation of voids when the cladding layer 416 covers the aluminum gallium arsenide layer 414. In some embodiments, the height of the bottom portion 418 ranges from approximately 230 nm to 350 nm, and the height of the top portion 420 ranges from approximately 250 nm to 370 nm, with a positive slope angle ranging from approximately 66° to 68°. Figure 10C shows a schematic diagram of the manufacturing process of the waveguide directional coupler. The manufacturing process includes at least six steps. The first step is to deposit a mask, which is the same or similar to the above description. The second step is to perform I-line line exposure using I-line lithography technology, which is configured to make a dual-channel structure. The third step is to etch the mask to form a mask with a double-stripe pattern. The fourth step is to etch the aluminum gallium arsenide layer using Ar+ ions (such as Ar plasma) to pattern it. The fifth step is to remove the mask and expose the top surface of the aluminum gallium arsenide layer. The sixth and final step is to deposit a cladding layer and use the formed cladding layer to cover the waveguide channel of the aluminum gallium arsenide layer. The following summarizes the differences between the technical solution provided by the present invention and the prior art. Related research and literature discloses a dry etching method that uses a reaction gas containing CH₄, H₂, and Cl₂ to etch multilayer III-V compound semiconductors. This gas mixture contains methane, which can easily cause polymer redeposition, leading to unavoidable roughness on the waveguide sidewalls. The solution provided by the present invention does not involve any methane gas, thus avoiding the possibility of polymer redeposition. Related research and literature disclose methods that require the use of a metal mask. However, this metal mask can complicate the manufacturing process and, if not completely removed, can affect the optical performance of the resulting waveguide. The solution provided by the present invention eliminates the need for a metal mask and instead utilizes a silicon dioxide mask. Even if the silicon dioxide mask is not completely removed, it will not adversely affect the optical performance of the resulting waveguide. Related research and literature disclose wet etching of multilayer aluminum gallium arsenide using various chemistries. This method produces an aluminum gallium arsenide waveguide with an isotropic sidewall profile. However, this isotropic sidewall profile is unsuitable for designing directional couplers with narrow coupling gaps. The present invention provides a solution by dry etching using argon plasma to achieve an anisotropic waveguide sidewall profile. Related research and literature discloses an ICP-RIE method using Cl₂ and N₂ to pattern AlGaAs waveguides. The etching process using the gas mixture is a chemical reaction, requiring adjustment based on the aluminum content. The solution provided by the present invention utilizes only physical bombardment from Ar⁺ ions. Consequently, etching results can be highly similar for AlGaAs films with varying aluminum contents. In related research or literature, a method of patterning AlGaAs waveguides using an ICP-RIE method containing BCl₃ and N₂ is disclosed. The manufactured components show obvious local loading effects, wherein the narrow coupling gap shows a shallower etching depth, and the coupling gap also shows an isotropic profile. In the present invention, the proposed method can reduce the local loading effect because it does not rely on chemical reactions. The solution provided by the present invention is to produce an aluminum gallium arsenide waveguide with a bevel profile through etching. The inclined waveguide profile can expand the lateral distribution of the waveguide mode. This expanded mode distribution combined with the waveguide slab layer can enhance the mode overlap between adjacent waveguides. Therefore, this inclined waveguide geometry can achieve effective optical coupling between waveguides at near-visible light wavelengths (e.g., about 775 nm) without the need for an extremely narrow coupling gap. A comparison between the method disclosed in the present invention and other related prior arts can be provided by the table shown in FIG11 . Spatially related terms, such as "on," "below," "over," and similar terms, are defined relative to the elements or planes depicted in the drawings. These terms are for illustrative purposes only and do not limit actual arrangements; they simply describe the effects achievable by the embodiments. It is important to note that although the various structures in the diagrams are depicted as roughly rectangular, actual shapes may vary due to manufacturing conditions. These variations may include curved edges, rounded corners, or differences in thickness. Straight lines and right angles shown in the diagrams are for convenience in illustrating layers and features and do not reflect actual shapes. In this specification, the terms "a," "an," and "the" should be interpreted as including both the singular and plural forms, unless the context clearly requires the singular form. In addition, in the description of the embodiments, an element "on" or "on" another element may refer to the situation where the two elements are in direct contact or the situation where one or more intervening elements are present. The above description of the present invention is for the purpose of illustration and description, and is not intended to be exhaustive or to limit the present invention to the precise form disclosed. Many modifications and variations are apparent to those skilled in the art. The selected embodiments and their descriptions are intended to best explain the principles of the present invention and its practical applications, so that those skilled in the art can understand the various implementation forms of the present invention and make various appropriate modifications according to specific usage requirements. S10, S20, S30: Step 100: AlGaAs-on-insulator substrate 102: Substrate layer 104: Buried layer 106: Adhesive interposer 108: AlGaAs layer 110: Mask layer 112: Photoresist layer 200: ICP-RIE process chamber 202, 204: Gas inlet 206: RF coil 208: First RF power supply 210: Plasma 212: Sample 214: Silicon carrier wafer 216: Substrate fixture 2 18: Second RF power supply 220: Liquid inlet 222: Port 224: Liquid outlet 226: Valve 228: Loading sealed chamber 300: Dielectric mask layer 302: Etched AlGaAs waveguide 304, 308, 420: Top 306, 310, 418: Bottom 311, 312: Groove 400: Waveguide directional coupler 410: Buried oxide layer 412: Adhesion layer 414: AlGaAs layer 416: Cladding layer Embodiments of the present invention will be further described in detail below with reference to the accompanying drawings, in which: FIG1 illustrates a flow chart of a process method for patterning an AlGaAs thin film using dry etching according to some embodiments of the present invention; FIG2 illustrates a cross-sectional view of various layers in an AlGaAs-on-insulator substrate during a mask patterning process for an AlGaAs thin film according to some embodiments of the present invention; FIG3 illustrates a flow chart of a process for transferring a mask pattern from a mask to an AlGaAs layer according to some embodiments of the present invention; FIG4 illustrates a schematic diagram of an ICP-RIE process chamber for dry etching an AlGaAs layer according to some embodiments of the present invention; FIG5 illustrates a parameter table for a dry etching process according to some embodiments of the present invention; FIG6 illustrates a scanning electron microscope (SEM) image, wherein portion (a) illustrates a sidewall of an AlGaAs waveguide and portion (b) illustrates a cross-section of the AlGaAs waveguide; FIG7 illustrates an SEM image of a waveguide cross-section, wherein portion (a) illustrates a BCB (benzocyclobutene) bonded AlGaAs-on-insulator substrate and portion (b) illustrates an ALD (atomic layer deposition) bonded AlGaAs-on-insulator substrate; Figure 8 shows an SEM image, wherein part (a) is a dry-etched silicon dioxide mask, and part (b) is a dry-etched waveguide sidewall of aluminum gallium arsenide on insulator; Figure 9 shows a cross-sectional SEM image, wherein part (a) is a single waveguide made of aluminum gallium arsenide, and part (b) is a waveguide coupler made of aluminum gallium arsenide; Figure 10A shows a cross-sectional schematic diagram of a waveguide directional coupler according to some embodiments of the present invention; Figure 10B shows a curve diagram of the modal field amplitude of simulated transverse electric (TE) polarization and transverse magnetic (TM) polarization of the waveguide directional coupler of Figure 10A according to some embodiments of the present invention; Figure 10C shows a schematic diagram of the manufacturing process of the waveguide directional coupler; and Figure 11 shows a table showing the comparison results of the method disclosed in the present invention and other related existing technologies. S10, S20, S30: Steps

Claims

1. A method for fabricating an aluminum gallium arsenide optical waveguide using dry etching, comprising: A gallium aluminum arsenide on insulator substrate is provided, comprising a substrate layer, a buried layer formed on the substrate layer, an adhesive interlayer formed on the buried layer, and a gallium aluminum arsenide layer formed on the adhesive interlayer; a photomask layer is formed on the gallium aluminum arsenide layer; a photoresist film is formed on the photomask layer; a pattern is transferred to the photoresist film; and the photomask layer is etched to transfer the pattern on the photoresist film to the photomask layer. The aluminum gallium arsenide layer is etched using inductively coupled plasma reactive ion etching (ICP-RIE) and argon plasma to form a waveguide structure. The waveguide structure includes a trapezoidal top and a horizontally extending bottom. The trapezoidal top has positively inclined sidewalls. During the formation of the waveguide structure, the aluminum gallium arsenide layer is physically bombarded using only argon ions (Ar+) to pattern it. No additional etching gas is used during the argon plasma etching of the aluminum gallium arsenide layer, thereby avoiding the generation of byproducts on the aluminum gallium arsenide layer that cause surface roughness.

2. The method of claim 1, wherein no methane gas is used during the argon plasma etching of the aluminum gallium arsenide layer.

3. The method of claim 2, wherein argon plasma etching of the aluminum gallium arsenide layer achieves anisotropic waveguide sidewall profiles.

4. The method of claim 1, wherein the photomask film is made of tetraethoxysilane (TEOS) silicon oxide, silicon nitride, or a combination thereof, and contains no metallic material.

5. The method of claim 1, wherein the positively inclined sidewall has a positive angle ranging from 66° to 68°.

6. The method of claim 1, wherein the waveguide structure formed by etching the aluminum gallium arsenide layer includes a dual-channel waveguide, and the two channels of the dual-channel waveguide are optically coupled to each other for use as a waveguide directional coupler.

7. The method of claim 6, wherein the positive tilt angle of the positive tilt sidewalls of the two channels of the dual-channel waveguide is in the range of 66° to 68°.

8. The method of claim 1, wherein the aluminum gallium arsenide layer is an Al0.5Ga0.5As layer.

9. The method of claim 1, wherein the step of providing the aluminum gallium arsenide-on-insulator substrate comprises: A BCB (benzocyclobutene-bonded) type aluminum gallium arsenide-on-insulator (AGI) substrate and an ALD (atomic layer deposition) type AAI substrate are provided, wherein the etching step includes: etching the AAI layer of the BCB-bonded AAI substrate using only argon ions (Ar+) for a first time duration; and etching the AAI layer of the ALD-bonded AAI substrate using only argon ions (Ar+) for a second time duration equal to the first time duration; wherein the waveguide structures formed by the AAI layers of the BCB-bonded and ALD-bonded AAI substrates both have a positive tilt angle between 66° and 68°.

10. The method of claim 1, wherein the argon plasma etching of the aluminum gallium arsenide layer is performed at an argon flow rate of 25 standard cubic centimeters (sccm) per minute.

11. The method of claim 1, wherein the duration of the argon plasma etching of the aluminum gallium arsenide layer is 270 seconds.

12. The method as described in claim 1, further comprising: Remove the photomask film from the aluminum gallium arsenide layer; And to form a coating layer and cover the aluminum gallium arsenide layer.

13. The method of claim 1, wherein the transfer of the pattern to the photoresist film is achieved by I-line lithography.

Citation Information

Patent Citations

  • Etching process for semiconductors

    CN102893378A

  • Semiconductor devices, semiconductor device stacks with germanium-rich device layers and doped transition layers and fabricating method thereof

    TW201709534A

  • Methods of forming a semiconductor device

    TW202246572A

  • Semiconductor laser array and its manufacturing method, optical integrated unit and optical pickup

    US20040062285A1