An electronic device and a synchronization method

TWI940018BActive Publication Date: 2026-09-21MEDIATEK INC
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Patent Information

Application Number
TW114110509
Authority / Receiving Office
TW · TW
Patent Type
Patents
Current Assignee / Owner
Priority Date
2024-03-22
Filing Date
2025-03-20
Publication Date
2026-09-21
Estimated Expiration
2045-03-19

AI Technical Summary

Technical Problem

Existing OLED display devices face high production costs and high power consumption, particularly in low-power applications, which affect battery life and operational efficiency.

Method used

Implementing a display controller that can be fully powered off when not in use, with synchronization maintained through an additional clock signal, and using a multiplexer to switch between synchronization and clock signals based on power consumption needs, ensuring efficient power management.

Benefits of technology

Significantly reduces power consumption of the display controller while maintaining synchronization, thereby extending battery life and improving operational efficiency in low-power modes.

✦ Generated by Eureka AI based on patent content.

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Abstract

An electronic device includes a display controller, a clock generator, a multiplexer, and a processor. The display controller includes an interface through which it provides a synchronization signal. The clock generator generates a clock signal. The multiplexer outputs a synchronization signal or a clock signal as an output signal. When the processor needs to reduce the power consumption of the display controller, the processor controls the multiplexer to output a clock signal as an output signal.
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Description

Technical Field

[0001] This disclosure generally relates to an electronic device and a synchronization method thereof, and more specifically, it relates to a synchronization method for synchronizing an electronic device with a display driver chip at low power consumption. Prior Technology

[0002] As a self-emissive display device, Organic Light Emitting Diode (OLED) devices do not require an external light source. Therefore, OLED devices can be driven at low voltages and are easy to manufacture into thin and lightweight designs. Furthermore, OLED devices offer advantages such as wide viewing angles, high contrast, and high response times. Consequently, OLED devices are widely used in various fields, such as displays for mobile phones, televisions, and computers, as well as foldable displays.

[0003] Currently, most OLED devices use Low Temperature Poly-silicon (LTPS) thin-film transistor (TFT) panels. After improvements over the past few years, LTPS display panels have become the most mature and mainstream TFT panel solution on the market due to their advantages of high resolution, high response speed, and high brightness. Although LTPS display panels are popular in the market, they have disadvantages such as high production costs and high power consumption.

[0004] Therefore, LTPO (Low Temperature Polycrystalline Oxide) display panels have been developed, which combine LTPS display technology and indium gallium zinc oxide (IGZO) display technology. LTPO allows for more efficient power consumption by dynamically adjusting the screen refresh rate according to the displayed content. More specifically, LTPO can operate at a low refresh rate when displaying static content (such as images or text), but at a higher refresh rate when displaying dynamic content (such as video or games).

[0005] MIPI (Mobile Industry Processor Interface) is a standardized specification for data communication interfaces in mobile devices such as mobile phones, cameras, electronic displays, embedded systems, radios, IoT devices, and many other components requiring high bandwidth, low power consumption, and low electromagnetic interference. MIPI DSI (Display Serial Interface) is a specific subset of the MIPI standard, focusing on the interface between the display module and the processor in mobile devices. MIPI DSI operates in two main modes: Command Mode and Video Mode. Command Mode is designed for low-power operation and does not require frequent screen updates. In contrast, Video Mode continuously transmits primitive data, ensuring smooth video playback and dynamic content display, and uses a horizontal sync pulse (HSYNC) to maintain signal synchronization.

[0006] However, when the display panel is operating in low-power applications, its power consumption should be minimized as much as possible to extend battery life. Summary of the Invention

[0007] The following summary is illustrative only and is not intended to be limiting in any way. That is, it provides an overview to introduce the concepts, key points, benefits, and advantages of the novel and non-obvious techniques described herein. Selected embodiments are further described in the detailed description below. Therefore, the following summary is neither intended to identify the essential features of the claimed subject matter nor to define the scope of the claimed subject matter.

[0008] This document provides the electronic device and synchronization method. Because the display controller can be fully power-off when its power consumption needs to be reduced, its power consumption can be nearly eliminated. Furthermore, even if the display controller is fully deactivated, synchronization between the electronic device and the display driver chip can still be maintained through an additional clock signal, thus ensuring proper synchronization between the electronic device and the display driver chip.

[0009] In a first aspect, the present invention provides an electronic device comprising: a display controller having an interface, a clock generator, a multiplexer, and a processor. The display controller is used to provide a synchronization signal through the interface. The clock generator is used to generate a clock signal. The multiplexer is used to output a synchronization signal or a clock signal as an output signal. When the processor needs to reduce the power consumption of the display controller, the processor controls the multiplexer to output a clock signal as an output signal.

[0010] In some embodiments, the output signal is provided to a display driver chip, which is configured to drive a display panel.

[0011] In some embodiments, when the processor does not need to reduce the power consumption of the display controller, the processor controls the multiplexer to output the synchronization signal as the output signal; wherein the synchronization signal generated by the display controller is synchronized with the display driver chip.

[0012] In some embodiments, when the processor does not need to reduce the power consumption of the display controller, the display controller is in startup mode and generates the synchronization signal.

[0013] In some embodiments, when the processor needs to reduce the power consumption of the display controller, the display controller is in a non-boot mode to reduce the power consumption; wherein, when the display controller is in the non-boot mode, the display controller stops generating the synchronization signal.

[0014] In some embodiments, the display controller, the clock generator, the multiplexer, and the processor are integrated into a single package.

[0015] In some embodiments, the display controller and the processor are integrated in a single package, and the clock generator and the package are integrated on a single PCB.

[0016] In some embodiments, the synchronization signal is a level synchronization signal.

[0017] In some embodiments, the interface is an action industry processor interface.

[0018] In some embodiments, when the processor needs to reduce the power consumption of the display controller, the processor operates in always-on display mode or standby desktop mode.

[0019] In a second aspect, the present invention provides a synchronization method for synchronizing an electronic device with a display driver chip, wherein the electronic device includes a display controller, and the method includes: determining whether it is necessary to reduce the power consumption of the display controller; when it is determined that it is necessary to reduce the power consumption of the display controller, not activating the display controller (i.e., the display controller is disabled); generating a clock signal; and providing the clock signal to the display driver chip.

[0020] In some embodiments, the clock signal is generated by a clock generator.

[0021] In some embodiments, the clock generator and the display controller are integrated into a single package.

[0022] In some embodiments, the clock generator and the display controller are integrated on a single PCB.

[0023] In some embodiments, the synchronization method further includes: activating the display controller when it is determined that there is no need to reduce the power consumption of the display controller; generating a synchronization signal using the display controller; and providing the synchronization signal to the display driver chip.

[0024] In some embodiments, the synchronization signal is a level synchronization signal.

[0025] In some embodiments, the synchronization signal is provided to the display driver chip via a mobile industry processor interface.

[0026] In some embodiments, the synchronization method further includes: not starting the display controller when it is determined that the power consumption of the display controller needs to be reduced.

[0027] In some embodiments, the synchronization signal is not generated when the display controller is not activated.

[0028] In some embodiments, when it is determined that the power consumption of the display controller needs to be reduced, the electronic device operates in an always-on display mode or a standby desktop mode.

[0029] The present invention has been provided by way of example and is not intended to be limiting. Other embodiments and advantages are described in the following detailed description. The invention is defined by the claims. Simple Explanation of the Diagram

[0030] The accompanying drawings (in which the same numerals denote the same components) illustrate embodiments of the present invention. The included drawings are used to provide a further understanding of embodiments of the present disclosure, and are incorporated in and constitute a part of the present disclosure. The drawings illustrate implementations of embodiments of the present disclosure and, together with the description, serve to explain the principles of the embodiments of the present disclosure. It is understood that the drawings are not necessarily drawn to scale, as some components may be shown out of proportion to actual dimensions in order to clearly illustrate the concepts of the embodiments of the present disclosure. Figure 1 is a block diagram of an electronic device according to an embodiment of the present disclosure. Figure 2 is a block diagram of an electronic device according to another embodiment of the present disclosure. Figure 3 is a block diagram of an electronic device according to yet another embodiment of the present disclosure. Figure 4 is a flowchart illustrating a synchronization method according to an embodiment of the present disclosure. In the following detailed description, numerous specific details are set forth for illustrative purposes so that those skilled in the art may more thoroughly understand the embodiments of the invention. However, it will be apparent that one or more embodiments may be practiced without these specific details, and different embodiments or different features disclosed in different embodiments may be combined as needed, and should not be limited to the embodiments illustrated in the accompanying drawings. Implementation

[0031] The following description illustrates preferred embodiments of the present invention. These embodiments are merely illustrative of the technical features of the invention and are not intended to limit the scope of the invention. Certain terms are used throughout this specification and the claims to refer to specific components. Those skilled in the art will understand that manufacturers may use different terms to refer to the same components. This specification and the claims do not distinguish components by differences in name, but by differences in function. The scope of the invention should be determined with reference to the appended claims. The terms "comprising" and "including" used in the following description and claims are open-ended terms and should be interpreted as "comprising, but not limited to...". Furthermore, the term "coupled" refers to an indirect or direct electrical connection. Therefore, if a device is described as coupled to another device, it means that the device can be directly electrically connected to the other device, or indirectly electrically connected to the other device through other devices or connection means. The terms "basically" or "roughly" used in this text refer to a technical problem that can be solved and the desired technical effect achieved by someone with ordinary knowledge in the relevant technical field, within an acceptable range. For example, "roughly equal to" refers to a method that, without affecting the correctness of the result, is acceptable to someone with ordinary knowledge in the relevant technical field, with a certain margin of error compared to "exactly equal to".

[0032] This invention provides a low-power display timing synchronization between a system-on-a-chip (SOC) and a display driver chip. Figure 1 is a block diagram of an electronic device according to an embodiment of this disclosure. As shown in Figure 1, the electronic device 100 includes a display controller 110 and a processor 120. The display controller 110 includes an interface 111 through which it provides a synchronization signal SYNC to the display driver chip (also described as a display driver or display driver integrated circuit) 10, so that the display controller 110 synchronizes with the display driver chip (also described as a display driver or display driver integrated circuit).

[0033] According to certain embodiments of this disclosure, interface 111 may be a mobile industry processor interface (MIPI). As shown in Figure 1, display driver chip 10 is configured to drive a display panel (not shown in Figure 1). According to one embodiment of this disclosure, the synchronization signal SYNC may be a horizontal synchronization (HSYNC) signal.

[0034] According to one embodiment of this disclosure, the display driver chip 10 can be configured to drive a video mode panel. According to another embodiment of this disclosure, the display driver chip 10 can be configured to drive an LTPS panel. According to another embodiment of this disclosure, the display driver chip 10 can be configured to drive an LTPO panel. According to another embodiment of this disclosure, the display driver chip 10 can be configured to drive an OLED panel. According to other embodiments of this disclosure, the display driver chip 10 can be configured to drive any type of developed or undeveloped panel.

[0035] Processor 120 determines whether it is necessary to reduce the power consumption of display controller 110. According to some embodiments of this disclosure, processor 120 executes a display driver to control display controller 110 to drive display driver chip 10, thereby driving the panel. According to one embodiment of this disclosure, when processor 120 does not need to reduce the power consumption of display controller 110, display controller 110 provides a SYNC signal to display driver chip 10 through interface 111. According to another embodiment, when electronic device 100 needs to reduce the power consumption of display controller 110, display controller 110 operates in a low-power mode to reduce overall power consumption.

[0036] However, when the display controller 110 operates in low-power mode, due to specification requirements, the display controller 110 must still provide a synchronization signal SYNC to the display driver chip 10 for synchronization. In other words, when the display controller 110 operates in low-power mode, the display controller 110 is not turned off (or disconnected) to provide the synchronization signal SYNC. Therefore, when the electronic device 100 needs to reduce the power consumption of the display controller 110, the power consumption of the display controller 110 can be further reduced.

[0037] Figure 2 is a block diagram of an electronic device according to another embodiment of the present disclosure. Compared with the electronic device 100 in Figure 1, the electronic device 200 further includes a clock generator 210 and a multiplexer 220. The clock generator 210 is used to generate a clock signal CLK. The multiplexer 220 is used to output a synchronization signal SYNC or the clock signal CLK as an output signal SOUT according to the mode signal MD.

[0038] According to one embodiment of this disclosure, when the processor 120 operates in normal mode, the processor 120 sets the mode signal MD to select the synchronization signal SYNC as the output signal SOUT. According to another embodiment of this disclosure, when the processor 120 needs to reduce the power consumption of the display controller 110, the processor 120 sets the mode signal MD to select the clock signal CLK as the output signal SOUT.

[0039] According to one embodiment of this disclosure, when the processor 120 does not need to reduce the power consumption of the display controller 110, the mode signal MD is in a first state. When the mode signal MD is in the first state, the multiplexer 220 outputs a synchronization signal SYNC as an output signal SOUT. According to another embodiment of this disclosure, when the processor 120 needs to reduce the power consumption of the display controller 110, the mode signal MD is in a second state. When the mode signal MD is in the second state, the multiplexer 220 outputs a clock signal CLK as an output signal SOUT.

[0040] According to one embodiment of this disclosure, since the processor 120 selects the clock signal CLK as the output signal SOUT when the processor 120 needs to reduce the power consumption of the display controller 110, the display controller 110 stops generating the synchronization signal SYNC and can turn off the power to reduce power consumption as much as possible. In other words, when the processor 120 needs to reduce the power consumption of the display controller 110, the display controller 110 is in a deactivated mode (also described as a disabled mode) to turn off the power. When the processor 120 does not need to reduce the power consumption of the display controller 110, the display controller 110 is in an activated mode to perform maximum functionality.

[0041] According to one embodiment of this disclosure, when the display controller 110 is in a non-startup mode, the power consumption of the display controller 110 is almost eliminated (that is, the display controller 110 consumes almost no power).

[0042] According to one embodiment of this disclosure, when the processor 120 does not need to reduce the power consumption of the display controller 110, the electronic device 200 can drive the display panel driven by the display driver chip 10 to display dynamic content, such as video or games. According to another embodiment of this disclosure, when the processor 120 needs to reduce the power consumption of the display controller 110, the electronic device 200 can drive the display panel driven by the display driver chip 10 to display static content, such as images or text.

[0043] According to some embodiments of this disclosure, when the processor 120 needs to reduce the power consumption of the display controller 110, the processor 120 can operate in Always On Display (AOD) mode (also commonly referred to as always-on display mode or all-day full-screen always-on display mode). AOD mode is a feature of smartphones that allows the smartphone to continue displaying limited information even when it is in sleep mode. According to some embodiments of this disclosure, when the processor 120 needs to reduce the power consumption of the display controller 110, the processor 120 can operate in main screen idle mode (also often referred to as standby desktop mode). According to some embodiments of this disclosure, when the processor 120 needs to reduce the power consumption of the display controller 110, the electronic device 100 can operate as an e-book (i.e., the user uses the electronic device 100 to read e-books or ePub readers).

[0044] As shown in Figure 2, the display controller 110 and processor 120 are integrated in the first package 230. The first package 230, clock generator 210, and multiplexer 220 can be mounted on a printed circuit board (PCB) 240. In other words, the clock generator 210 and display controller 110 are physically separate.

[0045] According to one embodiment of this disclosure, the display controller 110 and processor 120 can be integrated as a system-on-a-chip (SoC). According to another embodiment of this disclosure, the display controller 110 and processor 120 can be integrated as a system-in-package (SiP). According to yet another embodiment of this disclosure, the display controller 110 and processor 120 can be integrated as a three-dimensional integrated circuit (3D IC).

[0046] Figure 3 is a block diagram of an electronic device according to yet another embodiment of the present disclosure. Compared with the electronic device 200 in Figure 2, the electronic device 300 shows that the controller 110, processor 120, clock generator 210 and multiplexer 220 are integrated in a second package 310.

[0047] According to one embodiment of this disclosure, the clock generator 210 integrated with the display controller 110, the processor 120 and the multiplexer 220 may be a clock source of the second package 310, wherein the clock source is configured to generate a general purpose input / output (GPIO) clock signal.

[0048] According to some embodiments of this disclosure, since the display controller 110, processor 120, clock generator 210, and multiplexer 220 are integrated in the second package 310, the clock signal CLK can be output through the pins of the second package 310. Then, the multiplexer 220 selects either the clock signal CLK or the synchronization signal SYNC as the output signal SOUT according to the mode signal MD.

[0049] According to other embodiments of this disclosure, the display controller 110, processor 120, clock generator 210, and multiplexer 220 can be integrated in the same package, such as a system-on-a-chip (SoC), system-in-package (SIP), or 3D integrated circuit (3D IC). Therefore, when the processor 120 does not need to reduce the power consumption of the display controller 110, the electronic device 300 provides a synchronization signal SYNC to the display driver chip 10; and when the processor 120 needs to reduce the power consumption of the display controller 110, the electronic device 300 provides a clock signal CLK to the display driver chip 10 to allow the display controller 110 to be completely powered down.

[0050] Figure 4 is a schematic flowchart of a synchronization method according to an embodiment of the present disclosure. In the following description, the synchronization method 400 will be further described in detail with reference to the electronic device 200 in Figure 2 and the electronic device 300 in Figure 3.

[0051] Determine whether it is necessary to reduce the power consumption of the display controller 110 (step S410). According to one embodiment of this disclosure, when it is necessary to reduce the power consumption of the display controller 110, the display panel driven by the display driver chip 10 displays static content, such as images or text. According to another embodiment of this disclosure, when it is not necessary to reduce the power consumption of the display controller 110, the display panel driven by the display driver chip 10 displays dynamic content, such as videos or games.

[0052] Then, a clock signal CLK is generated (step S420). According to one embodiment of this disclosure, as shown in Figure 2, the clock signal CLK is generated by a clock generator 210, and the clock generator 210 is separate from the first package 230 integrating the display controller 110 and the processor 120. According to another embodiment of this disclosure, as shown in Figure 3, the display controller 110, the processor 120, and the clock generator 210 are integrated in a second package 310, and the clock generator 210 in Figure 3 is a clock source in the electronic device 300 for generating clock signals for general purpose input / output (GPIO).

[0053] When it is determined that the power consumption of the display controller 110 needs to be reduced, the display controller 110 is not started (or alternatively described as disabled) (step S430) so that the power consumption of the display controller 110 is almost eliminated. According to one embodiment of this disclosure, when the display controller 110 is disabled, the display controller 110 is completely powered off to (almost) eliminate the power consumption of the display controller 110. According to another embodiment of this disclosure, when the display controller 110 is disabled, the display controller 110 operates in a low-power mode to reduce the power consumption of the display controller 110.

[0054] After generating the clock signal CLK, the multiplexer 220 provides the clock signal CLK to the display driver chip 10 (step S440). As shown in Figures 2 and 3, the multiplexer 220 selects the clock signal CLK as the output signal SOUT according to the mode signal MD, and provides the output signal SOUT to the display driver chip 10. According to some embodiments of this disclosure, the mode signal MD is used to indicate that the electronic device 200 or the electronic device 300 operates in a low-power mode or a normal mode.

[0055] Referring to step S410, when it is determined that there is no need to reduce the power consumption of the display controller 110, the display controller 110 is activated (step S450). According to one embodiment of this disclosure, when there is no need to reduce the power consumption of the display controller 110, the display panel driven by the display driver chip 10 displays dynamic content, such as video or games.

[0056] After the display controller 110 is started, the display controller 110 generates a synchronization signal SYNC (step S460). After the synchronization signal SYNC is generated, the multiplexer 220 provides the synchronization signal SYNC to the display driver chip 10 (step S470) for synchronization.

[0057] This document provides an electronic device and a synchronization method. Since the display controller 110 can be fully powered off when it is necessary to reduce power consumption, its power consumption can be virtually eliminated. Furthermore, even when the display controller is completely disabled, synchronization between the electronic device and the display driver chip can be maintained via an additional clock signal, ensuring that synchronization between the electronic device and the display driver chip is properly maintained.

[0058] The use of ordinal terms such as “first,” “second,” and “third” in the scope of a patent application to modify patent elements does not in itself indicate any priority, order, or sequence of one patent element relative to another, or the temporal order of the execution of method actions, but is merely used as a marker to distinguish one patent element with the same name from another element with the same name.

[0059] While the embodiments and advantages of the present invention have been described in detail, it should be understood that various changes, substitutions, and modifications can be made to the present invention without departing from the spirit and scope defined by the appended claims. For example, new embodiments can be derived by combining several parts of different embodiments. The described embodiments are for illustrative purposes only and are not intended to limit the invention. The scope of protection of the present invention is defined by the appended claims. Those skilled in the art can make various modifications and refinements without departing from the spirit and scope of the present invention.

[0060] 100, 200, 300: Electronic devices 210: Clock Generator 220: Multiplexer 230: First Package 310: Second Package 240: Printed Circuit Board 110: Display Controller 111: Interface 120: Processor 10: Display driver chip CLK: Clock signal SYNC: Synchronization signal MD: Mode signal SOUT: Output signal 400: Synchronization Method S410, S420, S430, S440, S450, S460, S470: Steps

Claims

1. An electronic device comprising: A display controller with an interface for providing synchronization signals via that interface; A clock generator is used to generate clock signals; A multiplexer is configured to output the synchronization signal or the clock signal as an output signal; and a processor is configured to control the multiplexer to output the clock signal as the output signal when the processor needs to reduce the power consumption of the display controller; wherein the output signal is provided to a display driver chip configured to drive a display panel; wherein when the processor does not need to reduce the power consumption of the display controller, the processor controls the multiplexer to output the synchronization signal as the output signal; wherein the synchronization signal generated by the display controller is used to synchronize the display controller with the display driver chip.

2. The electronic device as claimed in claim 1, wherein, When the processor does not need to reduce the power consumption of the display controller, the display controller is in startup mode and generates the synchronization signal.

3. The electronic device as claimed in claim 1, wherein, When the processor needs to reduce the power consumption of the display controller, the display controller is in a non-boot mode to reduce the power consumption; wherein, when the display controller is in the non-boot mode, the display controller does not generate the synchronization signal.

4. The electronic device as claimed in claim 1, wherein, The display controller, the clock generator, the multiplexer, and the processor are integrated into a single package.

5. The electronic device as claimed in claim 1, wherein, The display controller and the processor are integrated in one package, and the clock generator and the package are integrated on one PCB.

6. The electronic device as claimed in claim 1, wherein, The synchronization signal is a level synchronization signal.

7. The electronic device as claimed in claim 1, wherein, This interface is the mobile industry processor interface.

8. The electronic device as claimed in claim 1, wherein, When the processor needs to reduce the power consumption of the display controller, the processor operates in always-on display mode or standby desktop mode.

9. A synchronization method for synchronizing an electronic device with a display driver chip, wherein, The electronic device includes a display controller, and the method includes: determining whether it is necessary to reduce the power consumption of the display controller; when it is determined that it is necessary to reduce the power consumption of the display controller, not activating the display controller; generating a clock signal; and providing the clock signal to the display driver chip; wherein the synchronization method further includes: activating the display controller when it is determined that it is not necessary to reduce the power consumption of the display controller; generating a synchronization signal using the display controller; and providing the synchronization signal to the display driver chip.

10. The synchronization method as described in claim 9, wherein, The clock signal is generated by a clock generator.

11. The synchronization method as described in claim 10, wherein, The clock generator and the display controller are integrated into a single package.

12. The synchronization method as described in claim 10, wherein, The clock generator and the display controller are integrated on a single PCB.

13. The synchronization method as described in claim 9, wherein, The synchronization signal is a level synchronization signal.

14. The synchronization method as described in claim 9, wherein, The synchronization signal is provided to the display driver chip via the mobile industry processor interface.

15. The synchronization method as described in claim 9, wherein, The synchronization method also includes: when it is determined that the power consumption of the display controller needs to be reduced, the display controller is not started.

16. The synchronization method as described in claim 15, wherein, This synchronization signal is not generated when the display controller is not started.

17. The synchronization method as described in claim 9, wherein, When it is determined that the power consumption of the display controller needs to be reduced, the electronic device operates in either always-on display mode or standby desktop mode.

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