Power conversion apparatus, method, and system

Abstract

An apparatus includes: a bootstrap capacitor update pulse generation circuit configured to generate an update pulse to turn on the low-side switch once the off-time of a low-side switch of a power converter exceeds a predetermined threshold; and a logic gate configured to receive the update pulse and a low-side pulse width modulation (PWM) signal, and generate a drive signal applied to a gate of the low-side switch of the power converter.

Description

Technical Field

[0001] The present invention generally relates to the field of power converters, and in a particular embodiment, to a technique and mechanism for maintaining the voltage of a bootstrap capacitor in a buck power converter. Prior Technology

[0002] In power conversion systems, bootstrap capacitors are commonly used to establish a floating voltage higher than an input voltage. This technique is particularly useful in circuits that require a higher voltage to drive high-side switches. For example, a driver integrated circuit (IC) is configured to drive a power converter that includes two power switches connected in series between an input voltage bus and ground, and an inductor connected between a common node of the two power switches and an output voltage bus. The driver IC receives its operating voltage from a bias voltage source. In a typical system configuration, the driver IC includes a high-side driver and a low-side driver responsible for driving the high-side and low-side switches, respectively. A bootstrap capacitor is placed between a bias voltage node and a common node of the high-side and low-side switches. This configuration provides the required floating voltage for the high-side driver. During operation, when the low-side power switch is turned on, the bias voltage charges the bootstrap capacitor, thus supplementing the floating voltage required for operation.

[0003] However, a significant problem arises when the low-side switch is prolongedly turned off. Some control methods adjust the switching frequency or temporarily and completely halt the switching. In such cases, the controller reduces or stops the low-side switch from being on, effectively shutting off the recharge path required to recharge the bootstrap capacitor. When this recharge path remains inactive for an extended period, the bootstrap capacitor cannot draw sufficient charge from its bias voltage, leading to depletion of the floating voltage supply required by the high-side driver. This results in an insufficient power supply from the bootstrap capacitor, potentially causing the high-side switch to lose the necessary gate drive voltage, which can lead to circuit instability, reduced efficiency, or high-side driver malfunction. It is desirable to have a simple bootstrap capacitor recharge control device through which the bootstrap capacitor can be fully charged, thereby providing a consistent high-side drive power supply. This invention addresses this need. Summary of the Invention

[0004] Technical advantages are typically achieved through embodiments of a bootstrap capacitor update control device as described in this invention.

[0005] According to one embodiment, an apparatus includes: a bootstrap capacitor update pulse generation circuit configured to generate an update pulse to turn on the low-side switch once the off-time of a low-side switch of a power converter exceeds a predetermined threshold; and a logic gate configured to receive the update pulse and a low-side pulse width modulation (PWM) signal, and generate a drive signal applied to a gate of the low-side switch of the power converter.

[0006] Depending on the situation, in the aforementioned configuration, the power converter is a buck converter, comprising: a high-side switch and the low-side switch connected in series between an input voltage bus and ground; an inductor connected in series between a common node of the high-side switch and the low-side switch and an output voltage bus; and an output capacitor connected between the output voltage bus and ground.

[0007] Depending on the situation, in any of the aforementioned states, the logic gate is an OR gate, and the bootstrap capacitor update pulse generation circuit is a timer configured to measure the duration after the low-side switch is turned off, and generates the update pulse once the turn-off time of the low-side switch exceeds the predetermined threshold value, wherein the low-side gate drive signal is fed to a first input of the OR gate, one output of the timer is fed to a second input of the OR gate, and one output of the OR gate is applied to the gate of the low-side switch through a low-side driver.

[0008] Depending on the situation, in any of the aforementioned states, the logic gate is an OR gate, and the bootstrap capacitor update pulse generation circuit is a counter configured to count the number of clock cycles after the low-side switch is turned off, and generates the update pulse once the turn-off time of the low-side switch exceeds the predetermined threshold value, wherein the low-side gate drive signal is fed to a first input of the OR gate, one output of the counter is fed to a second input of the OR gate, and one output of the OR gate is applied to the gate of the low-side switch through a low-side driver.

[0009] Depending on the circumstances, in any of the aforementioned states, the predetermined threshold value can be dynamically adjusted, and the predetermined threshold value is negatively correlated with one of the currents flowing through the power converter.

[0010] Depending on the circumstances, in any of the aforementioned states, the width of the update pulse can be dynamically adjusted, and the width of the update pulse is negatively correlated with the slope of a current flowing through the power converter.

[0011] Depending on the circumstances, in any of the aforementioned states, the width of one of the update pulses is dynamically adjustable, and the width of the update pulse is proportional to the difference between one of the output voltages of the power converter and one of the set values ​​of the power converter.

[0012] Depending on the circumstances, in any of the aforementioned states, the width of one of the update pulses can be dynamically adjusted, and the width of the update pulse is negatively correlated with one of the compensation voltages of the power converter.

[0013] According to another embodiment, a method includes: configuring a power conversion system to operate in a discontinuous conduction mode, wherein the power conversion system includes a power converter connected between an input voltage bus and an output voltage bus and a controller electrically coupled to the power converter; configuring a bootstrap capacitor update control device to measure an off-time of a low-side switch of the power converter; and configuring the bootstrap capacitor update control device to generate an update pulse to turn on the low-side switch of the power converter once the off-time of the low-side switch exceeds a predetermined threshold value.

[0014] Depending on the circumstances, in the aforementioned example, the method further includes: configuring one of the timers in the bootstrap capacitor update control device to measure the duration after the low-side switch is turned off; configuring the bootstrap capacitor update control device to generate the update pulse once the off time of the low-side switch exceeds the predetermined threshold value; and resetting the timer once the low-side switch is turned on.

[0015] Depending on the situation, in any of the aforementioned states, the bootstrap capacitor update control device includes an OR gate and the timer, wherein a low-side PWM signal is fed to a first input of the OR gate, an output of the timer is fed to a second input of the OR gate, and an output of the OR gate is applied to a gate of the low-side switch through a low-side driver.

[0016] Depending on the circumstances, in any of the aforementioned states, the method further includes: configuring a counter in the bootstrap capacitor update control device to count the number of clock cycles after the low-side switch is turned off; configuring the bootstrap capacitor update control device to generate the update pulse once the off time of the low-side switch exceeds the predetermined threshold value; and resetting the counter once the low-side switch is turned on.

[0017] Depending on the situation, in any of the aforementioned states, the bootstrap capacitor update control device includes an OR gate and the counter, wherein a low-side PWM signal is fed to a first input of the OR gate, an output of the counter is fed to a second input of the OR gate, and an output of the OR gate is applied to a gate of the low-side switch through a low-side driver.

[0018] Depending on the circumstances, in any of the aforementioned states, the method further includes dynamically adjusting the predetermined threshold value based on one of the currents flowing through the power converter.

[0019] Depending on the circumstances, in any of the aforementioned states, the method further includes dynamically adjusting the width of one of the update pulses based on the slope of one of the currents flowing through the power converter.

[0020] Depending on the circumstances, in any of the aforementioned states, the method further includes dynamically adjusting the width of one of the update pulses based on one of the compensation signals of the power converter.

[0021] Depending on the circumstances, in any of the aforementioned states, the method further includes: determining a first width of the update pulse based on the slope of a current flowing through the power converter; and determining a second width of the update pulse based on a compensation signal of the power converter, wherein the first width and the second width are used to alternately set the width of the update pulse.

[0022] According to another embodiment, a system includes: a power converter connected between an input voltage bus and an output voltage bus; and a controller electrically coupled to the power converter, wherein the controller includes a bootstrap capacitor update control device, and wherein the bootstrap capacitor update control device is configured to measure an off-time of a low-side switch of the power converter, and the bootstrap capacitor update control device is configured to generate an update pulse to turn on the low-side switch of the power converter once the off-time of the low-side switch exceeds a predetermined threshold value.

[0023] Depending on the situation, in the aforementioned configuration, the power converter includes: a high-side switch and a low-side switch connected in series between the input voltage bus and ground; an inductor connected in series between a common node of the high-side switch and the low-side switch and the output voltage bus; and an output capacitor connected between the output voltage bus and ground.

[0024] Depending on the situation, in any of the aforementioned states, the bootstrap capacitor update control device includes an OR gate and a timer, wherein a low-side PWM signal is fed to a first input of the OR gate, an output of the timer is fed to a second input of the OR gate, and an output of the OR gate is applied to a gate of the low-side switch through a low-side driver.

[0025] The features described in the context of one embodiment can be used in conjunction with other embodiments. For example, each of the optional features described above in the context of the device can be used in conjunction with the system. Each of the optional features described above in the context of the method can be used in conjunction with the system. Each of the optional features described above in the context of the device can be used in conjunction with the method.

[0026] The foregoing has provided a fairly broad overview of the features and technical advantages of this invention to facilitate a better understanding of the detailed description thereof below. Further features and advantages of this invention, which form the subject matter of the claims of this invention, will be described below. Those skilled in the art will understand that the disclosed concepts and specific embodiments can be readily used as a basis for modifying or designing other structures or procedures for carrying out the same purpose of this invention. Those skilled in the art will also recognize that such equivalent constructions do not depart from the spirit and scope of this invention as set forth in the appended claims. Simple Explanation of the Diagram

[0027] To gain a more complete understanding of the invention and its advantages, reference is now made to the following description taken in conjunction with the accompanying drawings, in which:

[0028] Figure 1 illustrates a block diagram of a power conversion system according to various embodiments of the present invention;

[0029] Figure 2 illustrates a schematic diagram of one of the power converters shown in Figure 1 according to various embodiments of the present invention;

[0030] Figure 3 illustrates a schematic diagram of one first embodiment of the bootstrap capacitor update control device shown in Figure 2 according to various embodiments of the present invention;

[0031] Figure 4 illustrates various signals associated with the bootstrap capacitor update control device shown in Figure 3 according to various embodiments of the present invention;

[0032] Figure 5 illustrates a schematic diagram of a second embodiment of the bootstrap capacitor update control device shown in Figure 2 according to various embodiments of the present invention;

[0033] Figure 6 illustrates various signals associated with the bootstrap capacitor update control device shown in Figure 5 according to various embodiments of the present invention;

[0034] Figure 7 illustrates a schematic diagram of a third embodiment and a fourth embodiment of the bootstrap capacitor update control device shown in Figure 2 according to various embodiments of the present invention;

[0035] Figure 8 illustrates a schematic diagram of a fifth embodiment of the bootstrap capacitor update control device shown in Figure 2 according to various embodiments of the present invention;

[0036] Figure 9 illustrates a schematic diagram of a sixth embodiment of the bootstrap capacitor update control device shown in Figure 2 according to various embodiments of the present invention;

[0037] Figure 10 illustrates a schematic diagram of a seventh embodiment of the bootstrap capacitor update control device shown in Figure 2 according to various embodiments of the present invention; and

[0038] Figure 11 illustrates a flowchart of one method for controlling the power conversion system shown in Figure 1 according to various embodiments of the present invention.

[0039] Unless otherwise indicated, corresponding numbers and symbols in different figures generally refer to corresponding components. These figures are drawn to clearly illustrate the relevant configurations of these embodiments and are not necessarily drawn to scale. Implementation

[0040] Cross-reference of related applications This patent application claims priority to U.S. Application No. 18 / 958,586, filed November 25, 2024, entitled "Bootstrap Capacitor Refresh Control Apparatus and Method," and is specifically a continuation of that U.S. application, which is hereby incorporated herein by reference as if reproduced in its entirety.

[0041] The following describes in detail the making and use of embodiments of the present invention. However, it should be understood that the concepts disclosed herein can be embodied in a variety of specific contexts, and the specific embodiments discussed herein are merely illustrative and not intended to limit the scope of the invention. Furthermore, it should be understood that various changes, substitutions, and modifications may be made herein without departing from the spirit and scope of the invention as defined by the appended claims.

[0042] Furthermore, features derived from one or more of the following embodiments may be combined to create alternative embodiments not explicitly described, and features suitable for such combinations should be understood to be within the scope of this invention. Therefore, it is intended that the appended claims cover any such modifications or embodiments.

[0043] This invention will be described with respect to an embodiment in a specific context (i.e., a bootstrap capacitor update control device for maintaining the voltage of a bootstrap capacitor in a buck converter). However, the invention can also be applied to various power converters. Various embodiments will be explained in detail below with reference to the accompanying drawings.

[0044] Figure 1 illustrates a block diagram of a power conversion system according to various embodiments of the present invention. The power conversion system includes a power converter 100 and a controller 200. As shown in Figure 1, the power converter 100 is connected between an input voltage bus VIN and an output voltage bus Vo. A load (not shown) is coupled to the output voltage bus Vo. In some embodiments, the load may be a processor (e.g., a central processing unit).

[0045] In some embodiments, the power converter 100 is implemented as a buck power converter. The buck power converter comprises two power switches and an output filter. The two power switches include a high-side power switch and a low-side power switch connected in series between the input voltage bus VIN and ground. The high-side and low-side power switches are controlled to regulate the output voltage of the buck power converter. The power converter 100 also includes a gate driver circuitry for controlling the high-side and low-side power switches, thereby optimizing the speed and efficiency of switching operation. The power converter 100 may further include other critical components, such as current sensing, temperature sensing, and the like. The detailed structure of the power converter 100 will be described below with reference to Figure 2.

[0046] In alternative embodiments, the power converter 100 may be implemented as any suitable power conversion topology, such as an inductor-inductor-capacitor (LLC) converter, a switched capacitor converter, a hybrid switched capacitor converter, a full-bridge power converter, a half-bridge power converter, a boost converter, a buck-boost converter, any combination thereof, and the like.

[0047] As shown in Figure 1, controller 200 is electrically coupled to power converter 100. Specifically, controller 200 is configured to generate PWM signals QHP and QLP to control power converter 100. In operation, controller 200 generates PWM signals QHP and QLP to regulate the output voltage Vo based on the output voltage Vo.

[0048] In some embodiments, the controller 200 may be a system controller or a system control device. The controller 200 may be implemented as a microprocessor, a digital signal processor, or the like.

[0049] In some embodiments, the controller 200 includes a bootstrap capacitor update control device. In some embodiments, the bootstrap capacitor update control device includes a bootstrap capacitor update pulse generation circuit and a logic gate. In some embodiments, the bootstrap capacitor update pulse generation circuit is implemented as a timer. The logic gate is implemented as an OR gate. In an alternative embodiment, the bootstrap capacitor update pulse generation circuit is implemented as a counter.

[0050] It should be noted that the block diagram shown in Figure 1 is merely an example and should not unduly limit the scope of the invention patent application. Those skilled in the art will recognize many variations, alternatives, and modifications. For example, depending on different design requirements, power switches, drivers, and controllers may be integrated into a single semiconductor package.

[0051] In operation, in order to maintain the voltage across the bootstrap capacitor, the bootstrap capacitor update control device is configured to generate a low-side turn-on pulse once the low-side switch turn-off time exceeds a predetermined threshold value.

[0052] At least seven control methods can be used to maintain the voltage across the bootstrap capacitor. These seven control methods will be described in detail below with reference to Figures 3 through 10.

[0053] In a first embodiment of one of the control methods, the bootstrap capacitor update pulse generation circuit includes a timer. The timer is configured to measure the off-time of the low-side switch. Once the off-time of the low-side switch exceeds a predetermined threshold value, the bootstrap capacitor update pulse generation circuit is configured to generate a bootstrap capacitor update pulse to turn on the low-side switch. Turning on the low-side switch results in the bias voltage charging the bootstrap capacitor, thus replenishing it. The detailed operating principle of the first embodiment will be described below with reference to Figures 3 and 4.

[0054] In a second embodiment of one of the control methods, the bootstrap capacitor update pulse generation circuit includes a counter. The counter is configured to count clock cycles while the low-side switch remains off. Once the number of clock cycles exceeds a predetermined threshold, the bootstrap capacitor update pulse generation circuit is configured to generate a bootstrap capacitor update pulse to turn on the low-side switch. Turning on the low-side switch results in a bias voltage charging the bootstrap capacitor, thus replenishing it. The detailed operating principle of the second embodiment will be described below with reference to Figures 5 and 6.

[0055] In a third embodiment of one of the control methods, the bootstrap capacitor update pulse generation circuit includes a timer or a counter. Once the off-time of the low-side switch exceeds a predetermined threshold, the bootstrap capacitor update pulse generation circuit is configured to generate a bootstrap capacitor update pulse to turn on the low-side switch. In operation, the predetermined threshold is dynamically adjustable. More specifically, the predetermined threshold is adjusted based on the current flowing through the power converter 100. The detailed operating principle of the third embodiment will be described below with reference to Figure 7.

[0056] In one of the control methods, a fourth embodiment, the bootstrap capacitor update pulse generation circuit includes a timer or a counter. Once the off-time of the low-side switch exceeds a predetermined threshold, the bootstrap capacitor update pulse generation circuit is configured to generate a bootstrap capacitor update pulse to turn on the low-side switch. In operation, the width of the bootstrap capacitor update pulse is dynamically adjustable. More specifically, the width of the bootstrap capacitor update pulse is adjusted based on the slope of the current flowing through the power converter 100. The detailed operating principle of the fourth embodiment will be described below with reference to Figure 7.

[0057] In a fifth embodiment of one of the control methods, the bootstrap capacitor update pulse generation circuit includes a timer or a counter. Once the off-time of the low-side switch exceeds a predetermined threshold, the bootstrap capacitor update pulse generation circuit is configured to generate a bootstrap capacitor update pulse to turn on the low-side switch. In operation, the width of the bootstrap capacitor update pulse is dynamically adjustable. More specifically, the width of the bootstrap capacitor update pulse is adjusted based on the output voltage of the power converter 100. The detailed operating principle of the fifth embodiment will be described below with reference to Figure 8.

[0058] In a sixth embodiment of the control method, the bootstrap capacitor update pulse generation circuit includes a timer or a counter. Once the off-time of the low-side switch exceeds a predetermined threshold, the bootstrap capacitor update pulse generation circuit is configured to generate a bootstrap capacitor update pulse to turn on the low-side switch. In operation, the width of the bootstrap capacitor update pulse is dynamically adjustable. More specifically, the width of the bootstrap capacitor update pulse is adjusted based on a compensation (comp) signal of the power converter 100. The detailed operating principle of the sixth embodiment will be described below with reference to Figure 9.

[0059] In a seventh embodiment of the control method, the bootstrap capacitor update pulse generation circuit includes a timer or a counter. Once the off-time of the low-side switch exceeds a predetermined threshold, the bootstrap capacitor update pulse generation circuit is configured to generate a bootstrap capacitor update pulse to turn on the low-side switch. In operation, the width of the bootstrap capacitor update pulse is dynamically adjustable. More specifically, the width of the bootstrap capacitor update pulse is adjusted based on a combination of one of the fourth, fifth, and sixth embodiments. The detailed operating principle of the seventh embodiment will be described below with reference to Figure 10.

[0060] Figure 2 illustrates a schematic diagram of one of the power converters shown in Figure 1 according to various embodiments of the present invention. The power converter 100 is a buck converter. The buck converter includes a high-side switch QH, a low-side switch QL, an output inductor L1, and an output capacitor Co. As shown in Figure 2, the high-side switch QH and the low-side switch QL are connected in series between the input voltage bus VIN and ground. The output inductor L1 is connected between a common node (SW) of the high-side switch QH and the low-side switch QL and the output voltage bus Vo. The output capacitor Co is connected between the output voltage bus Vo and ground.

[0061] The power converter 100 further includes a high-side driver 201, a low-side driver 202, a bootstrap capacitor CBS, and a diode D1. Diode D1 and bootstrap capacitor CBS are connected in series between a bias voltage Vb and a common node of QH and QL. The positive supply terminal of the high-side driver 201 is connected to the common node of diode D1 and bootstrap capacitor CBS. The negative supply terminal of the high-side driver 201 is connected to the common node of QH and QL. The positive supply terminal of the low-side driver 202 is connected to the bias voltage Vb. The negative supply terminal of the low-side driver 202 is connected to ground.

[0062] A high-side driver 201 is configured to receive a high-side PWM signal QHP from the controller 200. Based on the received signal, the high-side driver 201 generates a high-side gate drive signal QH_G that is applied to the gate of the high-side switch QH through the high-side driver 201.

[0063] A bootstrap capacitor update control device 203 is configured to receive a low-side PWM signal QLP1 from a controller 200. Based on the low-side PWM signal QLP1, the bootstrap capacitor update control device 203 is configured to generate a modified low-side PWM signal QLP that is fed into a low-side driver 202. Based on the received signal, the low-side driver 202 generates a low-side gate drive signal QL_G for the low-side switch QL.

[0064] During operation, when the high-side switch QH is turned on and the low-side switch QL is turned off, a current flows from the input voltage VIN through the output inductor L1 to the load. The output inductor L1 resists sudden changes in current by storing energy in its magnetic field. The output capacitor Co supplies current to the load, thus smoothing the output voltage Vo. When the high-side switch QH is turned off and the low-side switch QL is turned on, the output inductor L1 releases its stored energy to maintain current flow to the load. The output capacitor Co continues to smooth the output voltage. In operation, the duty cycle (the ratio of the on-time of the high-side switch QH to the total switching cycle) is used to control the output voltage Vo. By adjusting the duty cycle, the output voltage Vo can be adjusted to a predetermined level.

[0065] According to one embodiment, the switches (e.g., switches QH and QL) may be metal-oxide-semiconductor field-effect transistor (MOSFET) devices. Alternatively, the switches may be any controllable switches, such as insulated-gate bipolar transistor (IGBT) devices, integrated-gate commutated thyristor (IGCT) devices, gate-to-turn thyristor (GTO) devices, silicon-controlled rectifier (SCR) devices, junction-gate field-effect transistor (JFET) devices, MOS-controlled thyristor (MCT) devices, gallium nitride (GaN)-based power devices, silicon carbide (SiC)-based power devices, and the like.

[0066] It should be noted that although Figure 2 shows switches QH and QL implemented as single n-type transistors, those skilled in the art will recognize that many variations, modifications, and alternatives are possible. For example, depending on different applications and design requirements, switches QH and QL may be implemented as p-type transistors. Furthermore, the switches shown in Figure 2 may be implemented as multiple switches connected in parallel. Additionally, a capacitor may be connected in parallel with a switch to achieve zero-voltage switching (ZVS) / zero-current switching (ZCS).

[0067] Figure 3 illustrates a schematic diagram of a first embodiment of a bootstrap capacitor update control device shown in Figure 2 according to various embodiments of the present invention. The bootstrap capacitor update control device 203 includes a logic gate 304 and a timer 302. In some embodiments, the logic gate 304 is an OR gate. The timer 302 is implemented as any suitable timer. The timer 302 serves as a bootstrap capacitor update pulse generation circuit. As shown in Figure 3, a low-side PWM signal QLP1 generated by the controller is fed to a first input of the OR gate 304 and an input of the timer 302. The output of the timer 302 is fed to a second input of the OR gate 304. The output of the OR gate 304 is applied to the gate of the low-side switch QL through a low-side driver 202.

[0068] During operation, as QH and QL switch in each cycle, the voltage across the bootstrap capacitor is maintained at a sufficient level. The low-side PWM signal QLP1 is routed via OR gate 304 and delivered to the gate of QL via low-side driver 202. Timer 302 is triggered by the falling edge of the low-side PWM signal QLP1. Because the low-side switch QL turns on before reaching a predetermined threshold, timer 302 is reset at the end of each PWM cycle, thereby preventing it from generating an update pulse.

[0069] Under light load conditions (such as during discontinuous mode operation), timer 302 generates an update pulse to turn on the low-side switch QL when the off-time of QL exceeds a predetermined threshold. More specifically, timer 302 is triggered by the falling edge of the low-side PWM signal QLP1 when the low-side switch QL is off. If the low-side switch QL remains off for a sufficient time to exceed the predetermined threshold, the output of timer 302 generates an update pulse to turn on the low-side switch QL through OR gate 304 and low-side driver 202. This process enables bootstrap capacitor update control device 203 to measure the duration since the low-side switch was off, and thus issue an update pulse once this off-time of the low-side switch QL exceeds the predetermined threshold.

[0070] Figure 4 illustrates various signals associated with the bootstrap capacitor update control device shown in Figure 3 according to various embodiments of the present invention. The horizontal axis represents the time interval. There are three columns. The first column represents the gate drive signal (QH_G) of the high-side switch QH. The second column represents the gate drive signal (QL_G) of the low-side switch QL. The third column represents the output signal of the timer.

[0071] At time t1, the gate drive signal QH_G of the high-side switch changes from a logic low state to a logic high state. In response to this change, the high-side switch QH is turned on. From t1 to t2, the current flowing through inductor L1 increases linearly.

[0072] At t2, the high-side switch QH is turned off, and the low-side switch QL is turned on. From t2 to t3, the current flowing through inductor L1 decreases linearly. As shown in Figure 3, at t3, the low-side switch QL is turned off. From t3 onwards, the power conversion system operates in discontinuous conduction mode. From t3 to t4, both the high-side switch QH and the low-side switch QL are turned off. At t3, a timer measures the turn-off time of the low-side switch QL starting from the falling edge of the low-side gate drive signal QL_G.

[0073] At t4, the turn-off time of the low-side switch QL reaches a predetermined threshold value TOFFTH. The output of timer 302 generates an update pulse TRF. Referring back to Figure 3, the update pulse TRF is applied to the gate of the low-side switch QL through OR gate 304 and low-side driver 202. Therefore, from t4 to t5, the low-side gate drive signal QL_G is in a logic high state. From t4 to t5, the low-side switch QL is turned on. Once the low-side switch QL is turned on, the bootstrap capacitor CBS is compensated by the bias voltage Vb, and the timer is reset. After t5, the procedure described above is repeated.

[0074] Figure 5 illustrates a schematic diagram of a second embodiment of the bootstrap capacitor update control device shown in Figure 2 according to various embodiments of the present invention. The second embodiment is similar to the first embodiment shown in Figure 3, except that the timer is replaced by a counter. As shown in Figure 5, the low-side PWM signal QLP1 generated by the controller is fed to a first input of an OR gate 504 and an input of a counter 502. The output of the counter 502 is fed to a second input of the OR gate 504. The output of the OR gate 504 is applied to the gate of the low-side switch QL through the low-side driver 202.

[0075] Under light load conditions (such as during discontinuous mode operation), if the off time of the low-side switch QL exceeds a predetermined threshold, counter 502 can generate an update pulse to turn on QL. More specifically, when the low-side switch QL is off, counter 502 begins counting clock cycles. Once the number of clock cycles reaches a predetermined value, the output of counter 502 generates an update pulse TRF to turn on the low-side switch QL through OR gate 304 and low-side driver 202.

[0076] In some embodiments, counter 502 utilizes a clock operation. A predetermined number is determined by dividing a predetermined threshold value by the clock's time period.

[0077] Figure 6 illustrates various signals associated with the bootstrap capacitor update control device shown in Figure 5 according to various embodiments of the present invention. The horizontal axis represents the time interval. There are three columns. The first column represents the gate drive signal (QH_G) of the high-side switch QH. The second column represents the gate drive signal (QL_G) of the low-side switch QL. The third column represents the output signal of the counter.

[0078] At time t1, the gate drive signal QH_G of the high-side switch changes from a logic low state to a logic high state. In response to this change, the high-side switch QH is turned on. From t1 to t2, the current flowing through inductor L1 increases linearly.

[0079] At t2, the high-side switch QH is turned off, and the low-side switch QL is turned on. From t2 to t3, the current flowing through inductor L1 decreases linearly. As shown in Figure 5, at t3, the low-side switch QL is turned off. From t3 onwards, the power conversion system operates in discontinuous conduction mode. From t3 to t4, both the high-side switch QH and the low-side switch QL are turned off. At t3, the counter begins counting clock cycles starting from the falling edge of the low-side gate drive signal QL_G.

[0080] At t4, the clock cycle count reaches a predetermined number NOFFTH. The counter output generates an update pulse TRF. Referring back to Figure 5, the update pulse TRF is applied to the gate of the low-side switch QL through the OR gate 504 and the low-side driver 202. Therefore, from t4 to t5, the low-side gate drive signal QL_G is in a logic high state. From t4 to t5, the low-side switch QL is turned on. Once the low-side switch QL is turned on, the bootstrap capacitor CBS is replenished by the bias voltage Vb, and the counter is reset. After t5, the procedure described above is repeated.

[0081] Figure 7 illustrates a third embodiment and a fourth embodiment of the bootstrap capacitor update control device shown in Figure 2 according to various embodiments of the present invention. As shown in Figure 7, the bootstrap capacitor update control device 203 is configured to receive a current IL flowing through the power converter 100. In the third embodiment, the current is used to dynamically adjust a predetermined threshold value. Furthermore, in the fourth embodiment, a slope of the current is used to dynamically adjust the width of the update pulse.

[0082] In a third embodiment, the predetermined threshold (e.g., a time threshold of a timer) is dynamically adjustable. In some embodiments, the predetermined threshold is inversely proportional to a current flowing through the power converter 100. For example, under light load conditions, the current flowing through the power converter 100 is in the range of 1 mA to 100 mA. The predetermined threshold at 1 mA is approximately 100 times larger than the predetermined threshold at 100 mA. In an alternative embodiment, the predetermined threshold is negatively correlated with the current flowing through the power converter 100. For example, as the current flowing through the power converter 100 increases, the update pulse width decreases, and as the current flowing through the power converter 100 decreases, the update pulse width increases.

[0083] In the fourth embodiment, the update pulse width is dynamically adjustable. In some embodiments, this pulse width is negatively correlated with the slope of the current flowing through the power converter 100. In other words, as the slope of the current increases, the update pulse width decreases, and as the slope of the current decreases, the update pulse width increases.

[0084] One advantage of dynamically adjusting the pulse width is that reducing the pulse width as the current slope increases helps minimize the impact of turning on the low-side switch on the output voltage. Conversely, increasing the pulse width at a higher slope enables full recharging of the bootstrap capacitor CBS.

[0085] Figure 8 illustrates a schematic diagram of a fifth embodiment of the bootstrap capacitor update control device shown in Figure 2 according to various embodiments of the present invention. As shown in Figure 8, the bootstrap capacitor update control device 203 is configured to receive the output voltage Vo of the power converter 100. The output voltage Vo is used to dynamically adjust the width of the update pulse.

[0086] In some embodiments, the pulse width is proportional to the difference between the output voltage of the power converter 100 and a set value. Under light load conditions, the output voltage may exceed this set value. Upon detection of an increased output voltage, the pulse width is increased to ensure full recharging of the bootstrap capacitor.

[0087] Figure 9 illustrates a schematic diagram of a sixth embodiment of the bootstrap capacitor update control device shown in Figure 2 according to various embodiments of the present invention. As shown in Figure 9, the bootstrap capacitor update control device 203 is configured to receive a compensation signal COMP from the power converter 100. The compensation signal is used to dynamically adjust the width of the update pulse.

[0088] In some embodiments, a compensation signal is tapped at one output of an error amplifier. An inverting input of the error amplifier is connected to the output of the power converter 100 via a resistor divider. A non-inverting input of the error amplifier is configured to receive a predetermined reference. A compensation network is coupled between the output of the error amplifier and ground.

[0089] The width of the update pulse is dynamically adjustable. In some embodiments, the width of the update pulse is negatively correlated with the voltage of the compensation signal. In other words, as the voltage of the compensation signal increases, the width of the update pulse decreases, and as the voltage of the compensation signal decreases, the width of the update pulse increases.

[0090] Figure 10 illustrates a schematic diagram of a seventh embodiment of the bootstrap capacitor update control device shown in Figure 2 according to various embodiments of the present invention. As shown in Figure 10, the bootstrap capacitor update control device 203 is configured to receive the current IL flowing through the power converter 100, the output voltage Vo, and the compensation signal COMP. In some embodiments, a first width of the update pulse is determined based on the slope of the current flowing through the power converter 100. A second width of the update pulse is determined based on the compensation signal of the power converter 100. To further improve the performance of the bootstrap capacitor update control device 203, the width of the update pulse is set alternately using the first width and the second width.

[0091] Figure 11 illustrates a flowchart of one method for controlling the power conversion system shown in Figure 1 according to various embodiments of the present invention. This flowchart shown in Figure 11 is merely an example and should not unduly limit the scope of the invention. Those skilled in the art will recognize numerous variations, alternatives, and modifications. For example, the steps illustrated in Figure 11 may be added, removed, replaced, reconfigured, and repeated.

[0092] At step 1102, a power conversion system is configured to operate in a discontinuous conduction mode, wherein the power conversion system includes a power converter connected between an input voltage bus and an output voltage bus and a controller electrically coupled to the power converter.

[0093] At step 1104, the bootstrap capacitor update control device is configured to measure the turn-off time of one of the low-side switches of the power converter.

[0094] In step 1106, the bootstrap capacitor update control device is configured to generate an update pulse to turn on the low-side switch of the power converter once the off-time of the low-side switch exceeds a predetermined threshold value.

[0095] The method further includes: configuring one of the timers in the bootstrap capacitor update control device to measure the duration after the low-side switch is turned off; configuring the bootstrap capacitor update control device to generate an update pulse once the low-side switch is turned off for a predetermined threshold value; and resetting the timer once the low-side switch is turned on.

[0096] In some embodiments, the bootstrap capacitor update control device includes an OR gate and a timer, wherein a low-side PWM signal is fed to a first input of the OR gate, an output of the timer is fed to a second input of the OR gate, and an output of the OR gate is applied to a gate of a low-side switch through a low-side driver.

[0097] The method further includes: configuring a counter in the bootstrap capacitor update control device to count the number of clock cycles after the low-side switch is turned off; configuring the bootstrap capacitor update control device to generate an update pulse once the low-side switch is turned off for more than a predetermined threshold; and resetting the counter once the low-side switch is turned on.

[0098] In some embodiments, the bootstrap capacitor update control device includes an OR gate and a counter, wherein a low-side PWM signal is fed to a first input of the OR gate, an output of the counter is fed to a second input of the OR gate, and an output of the OR gate is applied to a gate of a low-side switch through a low-side driver.

[0099] The method further includes dynamically adjusting a predetermined threshold value based on the current flowing through one of the power converters.

[0100] The method further includes dynamically adjusting the width of one of the update pulses based on the slope of one of the currents flowing through one of the power converters.

[0101] The method further includes dynamically adjusting the width of one of the update pulses based on a compensation signal from one of the power converters.

[0102] The method further includes: determining a first width of an update pulse based on the slope of a current flowing through a power converter; and determining a second width of an update pulse based on a compensation signal of a power converter, wherein the first width and the second width are used to alternately set the width of the update pulse.

[0103] Although this description has been detailed, it should be understood that various changes, alternatives, and modifications can be made without departing from the spirit and scope of the invention as defined by the appended claims. Furthermore, the scope of the invention is not intended to be limited to the specific embodiments described herein, as it will be readily apparent to those skilled in the art that, according to the invention, procedures, machines, manufacturing processes, material compositions, components, methods, or steps (currently existing or to be developed) that can perform substantially the same functions or achieve substantially the same results as the corresponding embodiments described herein can be utilized. Accordingly, the appended claims are intended to include such procedures, machines, manufacturing processes, material compositions, components, methods, or steps within their scope.

[0104] 100: Power Converter 200: Controller 201: High-side driver 202: Low-side driver 203: Bootstrap Capacitor Replacement Control Equipment 302: Timer 304: Logic gate 502: Counter 504: OR gate 1102: Steps 1104: Steps 1106: Steps CBS: Bootstrap Capacitor Co: Output capacitor COMP: Compensation signal D1: Dipolar IL: Current L1: Output inductor QH: High-side switch QH_G: High-side gate drive signal QHP: High-side PWM signal QL: Low-side switch QL_G: Low-side gate drive signal QLP: PWM signal QLP1: Low-side PWM signal SW: Common Node TRF: Update Pulse Vb: Bias voltage VIN: Input voltage bus / Input voltage Vo: Output voltage bus / output voltage

Claims

1. A power conversion device, comprising: A bootstrap capacitor refresh pulse generation circuit is configured to generate a refresh pulse to turn on the low-side switch once the off-time of a low-side switch of a power converter exceeds a predetermined threshold value; and a logic gate is configured to receive the refresh pulse and a low-side pulse width modulation (PWM) signal, and logically combine the refresh pulse and the low-side PWM signal to generate a drive signal applied to the gate of the low-side switch of the power converter.

2. The device of claim 1, wherein the power converter is a step-down converter, comprising: A high-side switch and a low-side switch are connected in series between an input voltage bus and ground; an inductor is connected in series between a common node of the high-side switch and the low-side switch and an output voltage bus; and an output capacitor is connected between the output voltage bus and ground.

3. The equipment as requested in item 1 or 2, wherein: The logic gate is an OR gate; and the bootstrap capacitor update pulse generation circuit is a timer configured to measure the duration after the low-side switch is turned off, and generates the update pulse once the turn-off time of the low-side switch exceeds the predetermined threshold value, wherein: the low-side PWM signal is fed to a first input of the OR gate; an output of the timer is fed to a second input of the OR gate; and an output of the OR gate is applied to the gate of the low-side switch through a low-side driver.

4. The equipment as requested in item 1 or 2, wherein: The logic gate is an OR gate; and the bootstrap capacitor update pulse generation circuit is a counter configured to count the number of clock cycles after the low-side switch is turned off, and generates the update pulse once the turn-off time of the low-side switch exceeds the predetermined threshold value, wherein: the low-side PWM signal is fed to a first input of the OR gate; one output of the counter is fed to a second input of the OR gate; and one output of the OR gate is applied to the gate of the low-side switch through a low-side driver.

5. The equipment as requested in item 1 or 2, wherein: The predetermined threshold value is dynamically adjustable, and the predetermined threshold value is negatively correlated with one of the currents flowing through the power converter.

6. The equipment as requested in item 1 or 2, wherein: The width of one of the update pulses is dynamically adjustable, and the width of the update pulse is negatively correlated with the slope of one of the currents flowing through the power converter.

7. The equipment as requested in item 1 or 2, wherein: The width of one of the update pulses is dynamically adjustable, and the width of the update pulse is proportional to the difference between the output voltage of one of the power converters and the set value of one of the power converters.

8. The equipment as requested in item 1 or 2, wherein: The width of one of the update pulses is dynamically adjustable, and the width of the update pulse is negatively correlated with one of the compensation voltages of the power converter.

9. The equipment as requested in item 1 or 2, wherein: The first width of the update pulse is determined based on the slope of a current flowing through the power converter; and the second width of the update pulse is determined based on a compensation signal of the power converter, wherein the width of the update pulse is alternately set using the first width and the second width.

10. A power conversion method, comprising: A power conversion system is configured to operate in a discontinuous conduction mode, wherein the power conversion system includes a power converter connected between an input voltage bus and an output voltage bus and a controller electrically coupled to the power converter; a bootstrap capacitor update control device is configured to measure the off-time of a low-side switch of the power converter; and the bootstrap capacitor update control device is configured to generate an update pulse to turn on the low-side switch of the power converter once the off-time of the low-side switch exceeds a predetermined threshold value, and the update pulse and a low-side pulse width modulation (PWM) signal are logically combined to generate a drive signal applied to a gate of the low-side switch of the power converter.

11. The method of claim 10, further comprising: Configure one of the timers in the bootstrap capacitor update control device to measure the duration after the low-side switch is turned off; configure the bootstrap capacitor update control device to generate the update pulse once the off time of the low-side switch exceeds the predetermined threshold value; and reset the timer once the low-side switch is turned on.

12. The method of claim 11, wherein the bootstrap capacitor update control device includes an OR gate and the timer, and wherein: The low-side PWM signal is fed into a first input of the OR gate; an output of the timer is fed into a second input of the OR gate; and an output of the OR gate is applied to the gate of the low-side switch through a low-side driver.

13. The method of claim 10, further comprising: Configure one of the counters in the bootstrap capacitor update control device to count the number of clock cycles after the low-side switch is turned off; configure the bootstrap capacitor update control device to generate the update pulse once the off time of the low-side switch exceeds the predetermined threshold value; and reset the counter once the low-side switch is turned on.

14. The method of claim 13, wherein the bootstrap capacitor update control device includes an OR gate and the counter, and wherein: The low-side PWM signal is fed to a first input of the OR gate; an output of the counter is fed to a second input of the OR gate; and an output of the OR gate is applied to the gate of the low-side switch through a low-side driver.

15. The method of any one of claims 10 to 14, further comprising: The predetermined threshold value is dynamically adjusted based on the current flowing through one of the power converters.

16. The method of any one of claims 10 to 14, further comprising: The width of the update pulse is dynamically adjusted based on the slope of one of the currents flowing through the power converter.

17. The method of any one of claims 10 to 14, further comprising: The width of one of the update pulses is dynamically adjusted based on the difference between the output voltage of one of the power converters and the set value of one of the power converters.

18. The method of any one of claims 10 to 14, further comprising: The width of one of the update pulses is dynamically adjusted based on the compensation signal of one of the power converters.

19. The method of any one of claims 10 to 14, further comprising: The first width of the update pulse is determined based on the slope of a current flowing through the power converter; and the second width of the update pulse is determined based on a compensation signal of the power converter, wherein the first width and the second width are used to alternately set the width of the update pulse.

20. A power conversion system, comprising: A power converter connected between an input voltage bus and an output voltage bus; A controller electrically coupled to the power converter, wherein the controller includes a bootstrap capacitor update control device, and wherein: the bootstrap capacitor update control device is configured to measure the off-time of a low-side switch of the power converter; and the bootstrap capacitor update control device is configured to generate an update pulse to turn on the low-side switch of the power converter once the off-time of the low-side switch exceeds a predetermined threshold value, and logically combine the update pulse and a low-side pulse width modulation (PWM) signal to generate a drive signal applied to a gate of the low-side switch of the power converter.

21. The system of claim 20, wherein the power converter comprises: A high-side switch and a low-side switch are connected in series between the input voltage bus and ground; an inductor is connected in series between a common node of the high-side switch and the low-side switch and the output voltage bus; and an output capacitor is connected between the output voltage bus and ground.

22. The system of claim 20 or 21, wherein the bootstrap capacitor update control device includes an OR gate and a timer, and wherein: A low-side PWM signal is fed into a first input of the OR gate; an output of the timer is fed into a second input of the OR gate; and an output of the OR gate is applied to the gate of the low-side switch through a low-side driver.

23. The system of claim 20 or 21, wherein the bootstrap capacitor update control device includes an OR gate and a counter, and wherein: A low-side PWM signal is fed into a first input of the OR gate; an output of the counter is fed into a second input of the OR gate; and an output of the OR gate is applied to the gate of the low-side switch through a low-side driver.

24. The system as requested in item 20 or 21, wherein: The predetermined threshold value is dynamically adjustable, and the predetermined threshold value is negatively correlated with one of the currents flowing through the power converter.

25. The system as requested in item 20 or 21, wherein: The width of one of the update pulses is dynamically adjustable, and the width of the update pulse is negatively correlated with the slope of one of the currents flowing through the power converter.

26. The system as requested in item 20 or 21, wherein: The width of one of the update pulses is dynamically adjustable, and the width of the update pulse is proportional to the difference between the output voltage of one of the power converters and the set value of one of the power converters.

27. The system as described in request item 20 or 21, wherein: The width of one of the update pulses is dynamically adjustable, and the width of the update pulse is negatively correlated with one of the compensation voltages of the power converter.

28. The system as requested in item 20 or 21, wherein: The first width of one of the update pulses is negatively correlated with the slope of one of the currents flowing through one of the power converters; and the second width of one of the update pulses is negatively correlated with one of the compensation signals of the power converters, wherein the width of one of the update pulses is set alternately using the first width and the second width.

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