Electrostatic discharge protection device

TWI940277BActive Publication Date: 2026-09-21VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION
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Patent Information

Application Number
TW114132848
Authority / Receiving Office
TW · TW
Patent Type
Patents
Current Assignee / Owner
Filing Date
2025-08-28
Publication Date
2026-09-21
Estimated Expiration
2045-08-27

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    Figure TWG2TB001912394_003
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Abstract

An electrostatic discharge protection device is provided, comprising a substrate, a first well region, a second well region, a plurality of first doped regions, a second doped region, and a polycrystalline silicon layer. The first and second well regions are formed on the substrate, separated by an insulating layer, and each well region has a first doping type. A first doped region is formed on the first well region, and a second doped region is formed on the second well region. The first doped region has a second doping type different from the first doping type, and the second doped region has the first doping type. The polycrystalline silicon layer is formed on the first well region and is isolated from the first doped region.
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Claims

1. An electrostatic discharge protection device, comprising: One base; A first well region and a second well region are formed on the substrate, wherein the first well region and the second well region are separated by an insulating layer, and the first well region and the second well region have a first doping type; a third well region is formed on the substrate, wherein, in a top view, the third well region is a straight line coupled to the first well region and the second well region; a plurality of first doped regions and a second doped region, wherein the first doped regions are formed in the first well region, the second doped region is formed in the second well region, and the first doped regions have a second doping type different from the first doping type, and the second doped region has the first doping type; and a polycrystalline silicon layer is formed on the first well region and is isolated from the first doped regions.

2. The electrostatic discharge protection device as claimed in claim 1, wherein the first doping type is N-type and the second doping type is P-type.

3. The electrostatic discharge protection device as claimed in claim 2 further includes a fourth well region formed on the substrate and having the first doping type, wherein the fourth well region is separated from the second well region through the insulating layer and the first well region.

4. The electrostatic discharge protection device as claimed in claim 3, wherein the fourth well zone surrounds the first well zone and is coupled between the first well zone and the second well zone.

5. The electrostatic discharge protection device as claimed in claim 1, wherein the first doping type is P-type and the second doping type is N-type.

6. The electrostatic discharge protection device as claimed in claim 5 further includes a high-voltage well region formed on the substrate, and the second well region is located within the high-voltage well region.

7. The electrostatic discharge protection device as claimed in claim 6 further includes a fourth well region formed on the substrate and having the first doping type, wherein the fourth well region is separated from the second well region through the insulating layer and the first well region, and the fourth well region is located within the high-voltage well region.

8. The electrostatic discharge protection device as claimed in claim 7, wherein, at a downward angle, the fourth well zone surrounds the first well zone and is coupled between the first well zone and the second well zone.

9. The electrostatic discharge protection device as claimed in claim 1 further includes a plurality of conductive structures configured to couple one of the first doped regions, the second doped region, and the polycrystalline silicon layer to a first voltage node, and to couple the other of the first doped regions to a second voltage node, wherein the first voltage node and the second voltage node have different voltage levels.

Citation Information

Patent Citations

  • Trench metal oxide semiconductor device and manufacuring method thereof

    TW201931478A

  • Drain-extended MOS ESD protection structure

    US6624487B1