Camera equipment, electronic devices

Abstract

This invention relates to a camera device, electronic machine, and manufacturing method that can reduce manufacturing costs. The imaging device of the present invention includes: a first semiconductor element having an imaging element that generates pixel signals; and a second semiconductor element having a first signal processing circuit and a second signal processing circuit for processing pixel signals embedded therein by means of an embedded member; wherein the first signal processing circuit has a structure having at least one more layer than the second signal processing circuit. The imaging device further includes: a first wiring connecting the first semiconductor element and the first signal processing circuit, and a second wiring connecting the first signal processing circuit and the second signal processing circuit. The present invention can be applied to imaging devices.

Description

[Technical Field] This invention relates to a camera device, electronic machine, and manufacturing method, for example, to a camera device, electronic machine, and manufacturing method applied to a camera device comprising a plurality of chips, and preferably to such a device, electronic machine, and manufacturing method. [Previous Technology] The camera device is made high-resolution, 4k×2k ultra-high resolution, and even has a super slow motion function. Along with this, the number of pixels increases, resulting in a high frame rate and high grayscale. Since the transmission rate is calculated as pixel count × frame rate × grayscale, for example, with 4k × 2k = 8 M pixels, a frame rate of 240 f / s, and 14-bit grayscale, the result is 8 M × 240 f / s × 14 bit = 26 Gbps. After signal processing at the back end of the camera sensor, since the output is RGB for color coordination, a higher transmission speed is required when the speed is 26 G × 3 = 78 Gbps. If high-speed transmission is achieved with fewer connection terminals, the signal rate per connection terminal increases, making it more difficult to achieve impedance matching for high-speed transmission paths. Furthermore, the clock frequency increases, resulting in greater losses and thus increased power consumption. To avoid this, the number of connection terminals can be increased to divide the transmission and slow down the signal rate. However, since increasing the number of connection terminals is necessary for configuring the terminals for connecting the camera element to the subsequent signal processing circuits or memory circuits, the package size of each circuit becomes larger. Furthermore, the substrates for electrical wiring required by downstream signal processing circuits or memory circuits also need to be multilayered with finer wiring density, resulting in longer wiring paths and increased power consumption. If the package of each circuit becomes larger, the mounting substrate itself also becomes larger, and ultimately the camera device that houses the camera elements becomes larger. Therefore, as a technology for miniaturizing the structure of camera devices, the industry has proposed a technology that stacks camera elements with signal processing circuits or memory circuits by means of WoW (Wafer on Wafer) bonding in the wafer state (see Patent Document 1). Because WoW (Worm-of-Ware) stacking technology allows for the connection of more fine wires to semiconductors, the transmission speed of each wire becomes low, thus reducing power consumption. [Previous Art Documents] [Patent Documents] [Patent Document 1] Japanese Patent Application Publication No. 2014-099582 [Summary of the Invention] [The problem the invention aims to solve] However, in the case of WoW, the wafers of the stacked wafers only need to be of the same size. But if the wafers that make up the wafers are of different sizes, then the size must be made consistent with the largest wafer size, which will reduce the number of finished products for each circuit and may lead to increased costs. Furthermore, in the yield of each wafer in the stack, the defective wafers of each wafer and the wafers of other wafers in the stack are all considered defective. The overall wafer yield of the stack becomes the product of the yields of each wafer, which may lead to a deterioration in yield and an increase in cost. Furthermore, the industry has also proposed a technology to form small bumps and connect chips of different sizes. In this case, since chips of different sizes that have passed the quality selection are connected by bumps, the impact on the yield difference of each wafer and the yield of each chip is relatively small. However, due to the difficulty in forming small bumps and the limitation on connection pitch, the number of connection terminals may not exceed the number of WoW (Wolf-Wear). Furthermore, since connections are made during the assembly process, a larger number of connection terminals may lead to a lower yield rate and increased costs. Additionally, because the connections in the assembly process are made one by one, the time spent on connections increases, potentially increasing process costs. This invention was made in view of the above-described situation, and it is able to reduce the manufacturing cost of the camera device. [Technical Means for Solving the Problem] A first imaging device according to one aspect of the present invention comprises: a first semiconductor element having an imaging element that generates pixel signals; and a second semiconductor element having a first signal processing circuit and a second signal processing circuit for processing the aforementioned pixel signals embedded by means of an embedded member; wherein the aforementioned first signal processing circuit has a structure having at least one more layer than the aforementioned second signal processing circuit. One aspect of the present invention is a first electronic device comprising the aforementioned first camera device. A second imaging device according to one aspect of the present invention comprises: a first semiconductor element having an imaging element that generates pixel signals; a second semiconductor element having a first signal processing circuit and a second signal processing circuit for processing the aforementioned pixel signals embedded by means of an embedded member; and wiring that connects the aforementioned first signal processing circuit and the aforementioned second signal processing circuit; wherein the aforementioned wiring connects a terminal disposed on the lowest wiring layer of the aforementioned first signal processing circuit to a terminal disposed on the lowest wiring layer of the aforementioned second signal processing circuit. The second electronic device of one embodiment of the present invention includes the aforementioned second camera device. One aspect of the present invention is a method for manufacturing an imaging device, which includes: a first semiconductor element having an imaging element that generates pixel signals at pixel units; a second semiconductor element having a first signal processing circuit and a second signal processing circuit for processing the aforementioned pixel signals embedded by an embedded member; and wiring connecting the aforementioned first signal processing circuit and the aforementioned second signal processing circuit; and the manufacturing method includes: a step of transferring the aforementioned first signal processing circuit and the aforementioned second signal processing circuit to the aforementioned first semiconductor element; a step of forming a first film on the aforementioned first signal processing circuit and the aforementioned second signal processing circuit; a step of exposing a portion of a first terminal of the wiring layer disposed on the bottommost layer of the aforementioned first signal processing circuit and a portion of a second terminal of the wiring layer disposed on the bottommost layer of the aforementioned second signal processing circuit; and a step of forming the aforementioned wiring that connects the aforementioned first terminal and the aforementioned second terminal. In one embodiment of the present invention, a first imaging device and a first electronic device include: a first semiconductor element having an imaging element that generates pixel signals; and a second semiconductor element having embedded components to embed a first signal processing circuit and a second signal processing circuit for processing pixel signals. The first signal processing circuit has a structure with at least one more layer than the second signal processing circuit. In one embodiment of the present invention, a second imaging device and a second electronic device include: a first semiconductor element having an imaging element that generates pixel signals; a second semiconductor element having embedded components for embedding a first signal processing circuit and a second signal processing circuit for processing pixel signals; and wiring connecting the first signal processing circuit and the second signal processing circuit. The wiring connects terminals of the lowest wiring layer of the first signal processing circuit to terminals of the lowest wiring layer of the second signal processing circuit. An imaging device is manufactured according to a manufacturing method of one embodiment of the present invention. The imaging device includes: a first semiconductor element having an imaging element that generates pixel signals at pixel units; a second semiconductor element having a first signal processing circuit and a second signal processing circuit for processing pixel signals embedded by an embedded member; and wiring connecting the first signal processing circuit and the second signal processing circuit. The manufacturing method includes: a step of transferring the first signal processing circuit and the second signal processing circuit to the first semiconductor element; a step of forming a first film on the first signal processing circuit and the second signal processing circuit; a step of exposing a portion of a first terminal of the bottommost wiring layer of the first signal processing circuit and a second terminal of the bottommost wiring layer of the second signal processing circuit; and a step of forming wiring connecting the first terminal and the second terminal. Furthermore, camera devices and electronic machines can be independent devices or internal modules that constitute a device.

Implementation Method

Claims

1. An imaging device comprising: a first semiconductor element including an imaging element that generates pixel signals; and a second semiconductor element having a first signal processing circuit and a second signal processing circuit for processing the pixel signals embedded therein by means of an embedded member; wherein the first signal processing circuit has a structure having at least one more layer than the second signal processing circuit; wherein the distance between the terminals of the first semiconductor element and the terminals of the first signal processing circuit is shorter than the distance between the terminals of the first semiconductor element and the terminals of the second signal processing circuit; and the imaging device further comprising a first wiring connecting the first semiconductor element and the first signal processing circuit.

2. The camera device of claim 1, further comprising a second wiring that connects the aforementioned first signal processing circuit and the aforementioned second signal processing circuit.

3. The camera device of claim 2, wherein the first wiring connects the terminal of the first semiconductor element to the first terminal of the first signal processing circuit; and the second wiring connects the second terminal of the first signal processing circuit (which is different from the first terminal) to the third terminal of the second signal processing circuit.

4. The camera device of claim 1, wherein the aforementioned layer is an oxide film.

5. The camera device as claimed in claim 1, wherein the aforementioned first signal processing circuit is a memory circuit and the aforementioned second signal processing circuit is a logic circuit.

6. The camera device of any one of claims 1 to 5, wherein the aforementioned structure of at least one layer includes an expansion layer.

7. An electronic device comprising a camera device, the camera device comprising: a first semiconductor element comprising an imaging element that generates pixel signals; and a second semiconductor element having a first signal processing circuit and a second signal processing circuit for processing the pixel signals embedded therein by means of an embedded member; wherein the first signal processing circuit has a structure having at least one more layer than the second signal processing circuit; wherein the distance between the terminals of the first semiconductor element and the terminals of the first signal processing circuit is shorter than the distance between the terminals of the first semiconductor element and the terminals of the second signal processing circuit; the camera device further comprising a first wiring connecting the first semiconductor element and the first signal processing circuit.

8. The electronic device of claim 7, wherein the aforementioned structure of at least one layer includes an expansion layer.

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