Methods for forming trench structures in substrates

TWI940602BActive Publication Date: 2026-10-01APPLIED MATERIALS INC
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Patent Information

Application Number
TW111117412
Authority / Receiving Office
TW · TW
Patent Type
Patents
Current Assignee / Owner
Priority Date
2022-01-20
Filing Date
2022-05-10
Publication Date
2026-10-01
Estimated Expiration
2042-05-09

AI Technical Summary

Technical Problem

Conventional trench formation processes in semiconductor substrates result in damaged trench surfaces due to etching, leading to increased defect density and reduced charge mobility, particularly in optoelectronic devices.

Method used

A method involving dry oxide processing to form a passivation layer on trench surfaces, using a low-temperature epitaxial layer with dopants, achieving high conformality and selective removal of the oxide layer to create a homogeneous passivation region without additional material interfaces, and a low thermal budget to repair trench damage.

Benefits of technology

The method significantly reduces surface defects, minimizes noise generation and device leakage, and maintains optical transparency while repairing trench surfaces up to high aspect ratios, enhancing device performance.

✦ Generated by Eureka AI based on patent content.

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Patent Text Reader

Abstract

A method for forming a trench structure with a passivated surface. In some embodiments, the method for forming a trench structure may include the steps of: etching a trench into a substrate material of a substrate; forming an oxide layer on the surface of the trench using a dry oxide treatment at a temperature less than about 450 degrees Celsius; selectively removing the oxide layer from the surface of the trench; and forming a passivation layer on the surface of the trench using a low-temperature treatment less than about 450 degrees Celsius to form a homogeneous passivated region as part of the substrate material.
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Description

Technical Field

[0001] Embodiments of this principle are generally related to semiconductor processing of semiconductor substrates. Prior Technology

[0002] For semiconductor devices, trenches are typically formed in the substrate as part of the structure. During trench formation, the trench walls or surfaces are often damaged by etching. Damaged trench surfaces reduce the efficiency of devices utilizing the trenches. The inventors found that conventional processes are limited by the fact that even after pre-cleaning, damage and contaminants often remain on the trench surfaces. Damaged surfaces can lead to increased defect density and reduced charge mobility in devices such as optoelectronic devices.

[0003] Accordingly, the inventors provide an improved treatment for repairing damaged trench surfaces to substantially reduce performance loss caused by poor passivation surfaces. Summary of the Invention

[0004] This article provides methods and structures for improving trench structures.

[0005] In some embodiments, a method for forming a trench structure in a substrate may include the following steps: etching a trench into a substrate material of the substrate; forming an oxide layer on the surface of the trench using a dry oxide treatment; selectively removing the oxide layer from the surface of the trench; and forming a passivation layer on the surface of the trench to form a homogeneous passivation region as part of the substrate material.

[0006] In some embodiments, the method may further include an epitaxial layer formed from a single crystal having or not having dopant material for charge formation, wherein the passivation layer is a polymorphic layer having or not having dopant material for charge formation, the passivation layer being formed using a low-temperature process of less than about 450 degrees Celsius, wherein the dry oxide process has a controllable oxide thickness of about 1 nm to about 15 nm, wherein the dry oxide process is performed in a plasma oxide chamber, wherein the dry oxide process is performed at a temperature of less than about 450 degrees Celsius, the trench is etched to a high aspect ratio of greater than about 75:1, wherein the oxide layer has at least 95% conformability on the surface of the trench for an aspect ratio of greater than about 100:1, and / or wherein selective removal of the oxide layer is accomplished using an oxide ratio of greater than 50:1 selectively applied to the substrate material.

[0007] In some embodiments, a method of forming a trench structure in a substrate may include the following steps: etching a trench having a high aspect ratio into a substrate material; repairing damage to the surface of the trench caused by etching the trench; forming an epitaxial layer on the surface of the trench to form a homogeneous passivation region as part of the substrate material; using an additional dopant to dope the epitaxial layer to process a passivation charge region; and performing a charge diffusion process to embed the additional dopant into the substrate material.

[0008] In some embodiments, the method may further include etching the trench to a high aspect ratio greater than about 75:1, wherein the homogeneous passivation region is formed by epitaxy of a single crystal or by oxidizing an amorphous doped material, repairing the surface of the deep trench by the following steps: forming a dry oxide layer on the surface of the trench; and selectively removing the dry oxide layer from the surface of the trench, wherein forming the dry oxide layer is a process having a controllable oxide thickness of about 1 nm to about 15 nm, wherein the dry oxide layer is formed in a plasma oxidation chamber, wherein the dry oxide layer has at least 95% conformability on the surface of the trench for a high aspect ratio greater than about 100:1, and / or wherein the selective removal of the dry oxide layer is accomplished using an oxide ratio greater than 50:1 selectively applied to the substrate material.

[0009] In some embodiments, a non-transitory computer-readable medium has instructions stored thereon that, when executed, cause a method for forming a trench structure in a substrate to be performed. The method may include the steps of: etching a trench into a substrate material of the substrate; forming an oxide layer on the surface of the trench using a dry oxide treatment; selectively removing the oxide layer from the surface of the trench; and forming a passivation layer on the surface of the trench to form a homogeneous passivation region as part of the substrate material.

[0010] In some embodiments, the method of computer-readable media may further include the steps of: etching the trench to a high aspect ratio greater than about 75:1; wherein the oxide layer has at least 95% conformability on the surface of the trench for an aspect ratio greater than about 100:1; and / or wherein selective removal of the oxide layer is accomplished using an oxide ratio greater than 5:1 selectively applied to the substrate material.

[0011] Other and further embodiments are disclosed below. Simple Explanation of the Diagram

[0012] Embodiments of the principles briefly summarized above and discussed in more detail below can be understood by referring to illustrative examples of the principles depicted in the accompanying drawings. However, the drawings illustrate only typical embodiments of these principles and should not be considered as limiting the scope, as other equivalent embodiments are permissible.

[0013] Figure 1 illustrates a method for forming a trench structure in a substrate according to some embodiments of this principle.

[0014] Figure 2A depicts a cross-sectional view of a trench after etching, according to some embodiments based on this principle.

[0015] Figure 2B depicts a cross-sectional view of a trench after dry oxidation treatment according to some embodiments based on this principle.

[0016] Figure 2C depicts a cross-sectional view of a trench after selective oxide removal treatment according to some embodiments of this principle.

[0017] Figure 2D depicts a cross-sectional view of a trench after the passivation region has been formed, according to some embodiments of this principle.

[0018] Figure 2E depicts a cross-sectional view of a trench after optional gas doping treatment in the passivation region, according to some embodiments of this principle.

[0019] Figure 2F depicts a cross-sectional view of the trench after a change in the working function, according to some embodiments of this principle.

[0020] Figure 3 illustrates an integration tool based on some embodiments of this principle.

[0021] Figure 4A depicts the first processing of the second method according to some embodiments of this principle.

[0022] Figure 4B depicts a second processing of the second method according to some embodiments of this principle.

[0023] For ease of understanding, the same reference numerals are used as much as possible to represent common elements in the drawings. The drawings are not drawn to scale and may be simplified for clarity. Elements and features of one embodiment may be advantageously incorporated into other embodiments without further description. Implementation

[0024] These methods provide a high-performance trench formation solution that significantly reduces damage found in conventionally formed trenches, such as etching-related crystal damage and chemical mechanical polishing (CMP)-related crystal damage. Surface defects that severely impact performance and lead to noise generation and device leakage can be minimized. Furthermore, this principle of trench formation utilizes the homogeneous film properties to reduce dangling bonds on the trench surface without adding additional material interfaces to the trench. When the trench is used in optoelectronic devices, the homogeneous layer also has the advantage of no optical loss compared to heterogeneous layers with high optical loss. Another benefit is that a low thermal budget of less than 450 degrees Celsius can be used to form damage-free trench structures. Compared to conventional techniques with thickness limitations of 1 nm to 2 nm, this principle of method also allows for the repair of greater damage thicknesses (e.g., approximately 1 nm to approximately 15 nm or greater). This technique can also be used to repair damage on trenches with low aspect ratios up to those with high aspect ratios greater than 100:1.

[0025] Although trenches are used in the following examples for simplicity, other structures can benefit from the methods of this principle, and therefore the use of trenches in the examples is not intended to be limiting. For example, the techniques of this principle can also be used in planar structures. Figure 1 is a method 100 for forming trenches 204 in a substrate 202 according to some embodiments. In block 102, an etching process forms trenches 204 into the substrate 202, as depicted in view 200A of Figure 2A. The etching process typically uses a hard masking layer 212 to protect the area from the etching process. In some embodiments, the aspect ratio of the trench 204 is at least about 50:1. In some embodiments, the aspect ratio of the trench 204 is at least about 75:1. In some embodiments, the aspect ratio of the trench 204 is at least about 100:1. As a side effect of the etching process, damage 208 occurs on the surface 206 of the trench 204. Damage 208 may include crystal damage to the substrate material, contaminants or residues from the etching process, and / or dangling bonds in the substrate material, etc. The hard masking layer 212 is removed after the etching process is completed.

[0026] In block 104, an oxide layer 216 is formed on substrate 202 using a dry oxidation process. As depicted in view 200B of FIG2B, the top surface of field 214 or substrate 202 and the surface 206 of trench 204 undergo a dry oxidation process to form oxide layer 216, which partially consumes material from substrate 202, including damaged portions. The dry oxidation process can be performed at temperatures below 450 degrees Celsius, producing less contamination and residue compared to wet oxidation. Furthermore, dry oxidation can be used for aspect ratio structures with substantially higher aspect ratios than wet oxidation (e.g., aspect ratios less than 50:1) (e.g., aspect ratios greater than 100:1). In some embodiments, the dry oxidation process is performed using a plasma oxidation chamber with or without a remote plasma source. The dry oxidation process helps to embed oxygen into the surface 206 of trench 204 to repair damage to surface 206 and reduce stress-induced leakage current (SILC) and interface trap density (Dit).

[0027] Dry oxidation can also be controlled to provide oxide layers 216 of varying thicknesses. Parameters such as exposure time, plasma density, and temperature can help determine the oxidation rate. The thickness is then controlled by the duration of the dry oxidation process. In conventional methods, such as wet oxidation, the oxidation process is self-limiting (wet oxidation is self-terminating) and the oxide layer thickness cannot be adjusted. Wet oxidation typically stops at a thickness of 1 nm to 2 nm at the saturation point. Dry oxidation does not have a saturation point and is not self-limiting, allowing thicknesses at any position to be obtained. In some embodiments, for trenches with an aspect ratio greater than 100:1, dry oxidation can achieve greater than 95% conformability in trench 204, thereby enabling scaling of trench isolation structures using this principle.

[0028] In block 106, oxide layer 216 is selectively removed from surface 206 of trench 204 and field 214 of substrate 202, as depicted in view 200C of FIG2C. In some embodiments, a plasma-based chamber may be used to selectively remove oxide layer 216 with a selectivity ratio, for example, greater than 50:1 (e.g., oxide on Si or SiGe). The selective removal of oxide layer 216 removes all of oxide layer 216 without damaging any underlying material of substrate 202 or generating contaminants / residues, leaving an undamaged surface of trench 204.

[0029] In block 108, a passivation region 210 is formed on surface 206 of substrate 202, including the surface of trench 204 and / or the surface of field 214 of substrate 202, as depicted in view 200D of FIG2D. In some embodiments, the passivation region 210 is formed of a homogeneous material similar to the material of substrate 202. The passivation region 210 is formed from a single crystal of a material having dopant material 222 (showing P-type material but not implying limitation) to form positive or negative charges on substrate 202 (e.g., silicon doped with boron, gallium, phosphorus, arsenic, etc.) and can be manufactured by two methods. The first method is a low-temperature epitaxial growth process using a temperature less than approximately 450 degrees Celsius. The second method involves a two-part process. The first part is forming an amorphous doped material layer 402 on field 214, as depicted in view 400A of FIG4A. The subsequent second part includes material processing, such as oxidation or heat treatment 404, to drive the dopant to diffuse from the amorphous doped material layer 402 into the surface of substrate 202, as depicted in view 400B of FIG4B. The amorphous doped material layer 402 becomes an oxide layer 402A. The passivation region 210 is formed as a monocrystalline material below field 214.

[0030] Essentially, the homogeneous single-crystal layer becomes part or an extension of the substrate material and does not form an interface between the passivation region 210 and the substrate 202, eliminating the interfaces commonly found in conventional processes for forming heterogeneous passivation regions. When photons pass through the passivation region 210, the passivation region 210 also experiences no optical loss because the photons pass through the material of the substrate 202 without any degradation or path alteration (refractive). The formation of the homogeneous passivation region also serves to repair dangling bonds on the surface 206 of the trench 204 caused during the trench etching process. In some embodiments, a portion of the passivation region 210 on the field 214 of the substrate 202 may be removed, leaving only a portion of the passivation region 210 in the trench 204. In some embodiments, the passivation region 210 may also be a heterogeneous material incorporating substances such as Ge or carbon for processing energy bands, photosensitivity, etc., and has a gradient transition from the material of the substrate 202 to the passivation region 210 without any interface forming therebetween.

[0031] Optionally, in some embodiments, the passivation region 210 may be formed without a dopant, followed by the introduction of a dopant via gas 220, as depicted in view 200E of FIG2E. In a further alternative embodiment, a dopant may be used to form the passivation region 210, followed by enhancement using additional dopant by exposure to a gas. The substrate 202 is exposed to gas 220, including dopant 222B embedded in the passivation region 210 on the surface 206 of the field 214 and trench 204 of the substrate 202. The dopant 222B in FIG2E (as shown) has a positive charge for simplicity and is not intended to be limiting. The dopant 222B may also have a negative charge (not shown). Gas 220 may also incorporate substances such as Ge, carbon, etc., for material processing purposes such as composition, energy band, photosensitivity, etc. The density and / or type of dopant 222B may be adjusted to provide a given additive or subtractive charge potential required for the trench 204.

[0032] In block 110, the operating function of the passivation region 210 can be modified, as depicted in view 200F of FIG2F. The dopant 222 is further embedded into the material of the substrate 202 by a dopant diffusion process 224. In some embodiments, the dopant diffusion process 224 may be a millisecond annealing process using a high-power and high-temperature laser (e.g., 700°C to 900°C) to pulse the substrate 202 in the millisecond range without heating the substrate to a high temperature. In some embodiments, the dopant diffusion process 224 may be an oxidation process, wherein the dopant or component diffuses from the passivation region 210 into the substrate 202 when the material composition of the passivation region 210 is changed to an oxide. This process is the same as, and can be combined with, the second method mentioned in block 108 for forming the passivation region 210. The dopant diffusion process 224 creates abrupt charge boundaries in the material of the substrate 202, which, in contrast to conventional techniques for forming large gradient charge regions, increases the effective area of ​​adjacent devices. In some embodiments, the abrupt charge boundary or abrupt charge passivation region has a positive or negative charge formation of approximately 3e18 / cm³ to approximately 3e21 / cm³.

[0033] The methods described herein can be performed in separate processing chambers, which can be configured independently or provided as part of a cluster tool, such as the integrated tool 300 (i.e., the cluster tool) described below with reference to FIG. 3. An advantage of using the integrated tool 300 is the absence of vacuum interruptions, thus eliminating the need for degassing and pre-cleaning of the substrate prior to processing within the chambers. For example, in some embodiments, the methods of the invention discussed above can be advantageously performed within the integrated tool, such that there are limited or no vacuum interruptions between processing stages, thereby limiting or preventing substrate contamination. The integrated tool 300 includes a vacuum-sealed processing platform 301, a factory interface 304, and a system controller 302. The processing platform 301 includes multiple processing chambers, such as 314A, 313B, 314C, 314D, 314E, and 314F, operatively coupled to vacuum substrate transfer chambers (transfer chambers 303A, 303B). The plant interface 304 is operatively coupled to the transfer chamber 303A via one or more loading gate chambers (two loading gate chambers, such as 306A and 306B shown in Figure 3).

[0034] In some embodiments, the fab interface 304 includes at least one docking station 307 and at least one fab interface robot 338 to facilitate the transfer of semiconductor substrates. The docking station 307 is configured to accept one or more front-opening wafer pods (FOUPs). The embodiment of FIG3 shows four FOUPs, such as 305A, 305B, 305C, and 305D. The fab interface robot 338 is configured to transfer substrates from the fab interface 304 to the processing platform 301 via loading gate chambers (e.g., 306A and 306B). Each of the loading gate chambers 306A and 306B has a first port coupled to the fab interface 304 and a second port coupled to the transfer chamber 303A. The loading gate chambers 306A and 306B are coupled to a pressure control system (not shown) to evacuate and ventilate the loading gate chambers 306A and 306B to facilitate the passage of substrates between the vacuum environment of the transfer chamber 303A and the substantially atmospheric (e.g., atmospheric pressure) environment of the fab interface 304. The transfer chambers 303A and 303B each have a vacuum robot 342A and 342B disposed within them. Vacuum robot 342A is capable of transferring substrate 321 between loading gate chambers 306A and 306B, processing chambers 314A and 314F, and cooling station 340 or pre-cleaning station 342. Vacuum robot 342B is capable of transferring substrate 321 between cooling station 340 or pre-cleaning station 342 and processing chambers 314B, 314C, 314D, and 314E.

[0035] In some embodiments, processing chambers 314A, 314B, 314C, 314D, 314E, and 314F are coupled to transfer chambers 303A and 303B. Processing chambers 314A, 314B, 314C, 314D, 314E, and 314F may include, for example, atomic layer deposition (ALD) processing chambers, physical vapor deposition (PVD) processing chambers, chemical vapor deposition (CVD) chambers, annealing chambers, etc. As described above, the chambers may include any chamber suitable for performing all or part of the methods described herein, such as dry oxide removal chambers or pre-cleaning chambers and epitaxial growth chambers, as well as etching and deposition chambers. In some embodiments, one or more optional service chambers (shown as 316A and 316B) may be coupled to transfer chamber 303A. Service chambers 316A and 316B may be configured to perform other substrate processing, such as degassing, orientation, substrate metering, cooling, etc.

[0036] System controller 302 controls the operation of tool 300 by directly controlling processing chambers 314A, 314B, 314C, 314D, 314E, and 314F, or alternatively by controlling a computer (or controller) associated with processing chambers 314A, 314B, 314C, 314D, 314E, and 314F and tool 300. During operation, system controller 302 can collect and provide feedback from the various chambers and systems to optimize the performance of tool 300. System controller 302 typically includes a central processing unit (CPU) 330, memory 334, and support circuitry 332. CPU 330 can be any type of general-purpose computer processor suitable for use in an industrial environment. Support circuitry 332 is conventionally coupled to CPU 330 and may include cache, clock circuitry, input / output subsystems, power supply, etc. For example, the software routines described above can be stored in memory 334, and when executed by CPU 330, CPU 330 is converted into a special purpose computer (system controller) 302. The software routines can also be stored and / or executed by a second controller (not shown) located remotely at the end of tool 300.

[0037] Embodiments based on these principles can be implemented in hardware, firmware, software, or any combination thereof. Embodiments can also be implemented using instructions stored on one or more computer-readable media, which can be read and executed by one or more processors. The computer-readable media may include any mechanism for storing or transferring information in a machine-readable form (e.g., a computing platform or a "virtual machine" running on one or more computing platforms). For example, the computer-readable media may include any suitable form of volatile or non-volatile memory. In some embodiments, the computer-readable media may include non-transitory computer-readable media.

[0038] While the foregoing describes embodiments of this principle, other and further embodiments of this principle may be designed without departing from its basic scope.

[0039] 100: Method Blocks 102-110 200A~200F: Views 202:Substrate 204: Trench 206: Surface 208: Damaged 210: Passivation region 212: Hard mask layer 214: Field 216: Oxide layer 220: Gas 222: Dopant 222B: Dopant 224: Dopant diffusion treatment 300: Integration Tools 301: Processing Platform 302: System Controller 303A~303B: Transfer Chambers 304: Factory Interface 305A~305D:FOUP 306A~306B: Loading gate chamber 314A~314F: Processing chambers 316A~316B: Service Chambers 321:Substrate 330: CPU 332: Support Circuit 334: Memory 338: Factory Interface Robot 340: Cooling Station 342: Pre-cleaning station 342A~342B: Vacuum Robots 400A~400B: Views 402: Amorphous doped material layer 402A: Oxide layer 404: Oxidation or heat treatment

[0040] Domestic storage information (please note in order of storage institution, date, and number) none Overseas storage information (please note in the order of storage country, institution, date, and number) none

Claims

1. A method for forming a trench structure in a substrate, comprising the steps of: etching a trench into a substrate material of the substrate; forming an oxide layer on the surface of the trench using a dry oxide treatment; selectively removing the oxide layer from the surface of the trench; and forming a passivation layer on the surface of the trench to form a homogeneous passivation region as part of the substrate material.

2. The method as described in claim 1, wherein the passivation layer is an epitaxial layer formed from a single crystal having or not having dopant material for charge formation.

3. The method as described in claim 1, wherein the passivation layer is a polymorphic layer having or not having a dopant material for charge formation.

4. The method as described in claim 1 further includes the step of: forming the passivation layer using a low-temperature treatment of less than about 450 degrees Celsius.

5. The method as described in claim 1, wherein the dry oxide treatment has a controllable oxide thickness of about 1 nm to about 15 nm.

6. The method as described in claim 1, wherein the dry oxide treatment is performed in a plasma oxidation chamber.

7. The method as described in claim 1, wherein the dry oxide treatment is performed at a temperature less than approximately 450 degrees Celsius.

8. The method as described in claim 1 further includes the step of: etching the trench to a depth-to-width ratio greater than approximately 75:

1.

9. The method as claimed in claim 1, wherein the oxide layer has at least 95% conformability on the surface of the trench for an aspect ratio greater than about 100:

1.

10. The method as described in claim 1, wherein the selective removal of the oxide layer is accomplished by using an oxide ratio greater than 50:1 to selectively remove the substrate material.

11. A method for forming a trench structure in a substrate, comprising the steps of: etching a trench having a high aspect ratio into a substrate material; repairing damage to the surface of the trench caused by etching the trench; forming an epitaxial layer on the surface of the trench to form a homogeneous passivation region as part of the substrate material; doping the epitaxial layer with an additional dopant to process a passivation charge region; and performing a charge diffusion process to embed the additional dopant into the substrate material.

12. The method as described in claim 11, wherein the homogeneous passivation region is formed by epitaxy of a single crystal or by oxidation of an amorphous doped material.

13. The method as described in claim 11 further includes the step of: etching the trench to an aspect ratio greater than approximately 75:1 for the height.

14. The method as described in claim 11 further includes the following steps: repairing the surface of the deep trench by the following steps: forming a dry oxide layer on the surface of the trench; and selectively removing the dry oxide layer from the surface of the trench.

15. The method as described in claim 14, wherein forming the dry oxide layer is a process having a controllable oxide thickness of about 1 nm to about 15 nm.

16. The method as described in claim 14, wherein the dry oxide layer is formed in a plasma oxidation chamber.

17. The method as described in claim 14, wherein the dry oxide layer has at least 95% conformability on the surface of the trench for an aspect ratio greater than about 100:

1.

18. The method as described in claim 14, wherein the selective removal of the dry oxide layer is accomplished by using an oxide ratio greater than 50:1 to selectively apply to the substrate material.

19. A non-transitory computer-readable medium having instructions stored thereon, which, when executed, cause a method for forming a trench structure in a substrate to be performed, the method comprising the steps of: etching a trench into a substrate material of the substrate; forming an oxide layer on the surface of the trench using a dry oxide treatment; selectively removing the oxide layer from the surface of the trench; and forming a passivation layer on the surface of the trench to form a homogeneous passivation region as part of the substrate material.

20. The non-transitory computer-readable medium as claimed in claim 19, wherein the method further comprises the steps of: etching the trench to a high aspect ratio greater than about 75:1; wherein the oxide layer has at least 95% conformability on the surface of the trench for an aspect ratio greater than about 100:1; or wherein selective removal of the oxide layer is accomplished using an oxide ratio greater than 5:1 selectively applied to the substrate material.

Citation Information

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