Method for manufacturing protective wafers and semiconductor devices for semiconductor processing

Abstract

The present invention addresses the problem of providing a semiconductor processing protective sheet that suppresses warping of a semiconductor wafer when attached to a semiconductor wafer generating residual stress, and also suppresses leakage of components from the wafer during storage, as well as a method for manufacturing a semiconductor device using the semiconductor processing protective sheet. The technical method involves a semiconductor processing protective sheet having, sequentially, a substrate, an intermediate layer on the substrate, and an adhesive layer. When the shear storage modulus of the intermediate layer at 60°C is set to G'(60°C) and the shear storage modulus of the intermediate layer at 80°C is set to G'(80°C), G'(60°C) and G'(80°C) satisfy the following formula: the residual stress of the intermediate layer after maintaining at 65°C for 300 seconds is less than 10000 Pa.

Description

[Technical Field]

[0001] This invention relates to a protective sheet for semiconductor processing and a method for manufacturing a semiconductor device. In particular, it relates to a protective sheet suitable for use in semiconductor processing to suppress warping of semiconductor wafers and to suppress leakage from the wafer, and a method for manufacturing a semiconductor device using the protective sheet. [Previous Technology]

[0002] Most electronic devices are equipped with semiconductor devices, which contain semiconductor chips obtained by wafering semiconductor wafers on which circuits are formed. The semiconductor wafers on which circuits are formed have circuit protection layers formed, such as passivation films and bump-forming passivation films, to protect the circuits from external environmental influences. These circuit protection layers mechanically and chemically protect the circuits formed on the semiconductor wafers.

[0003] Furthermore, with the rapid development of miniaturization and multifunctionality of electronic devices, semiconductor wafers are also required to be miniaturized, height-reduced, and high-density. Miniaturization and height reduction of wafers are generally achieved by grinding the back side of the semiconductor wafer after forming circuits on the surface of the semiconductor wafer to adjust the thickness of the wafer.

[0004] During the back-side grinding of semiconductor wafers, a protective sheet called back grinding tape is attached to the wafer surface to prevent contamination of the wafer surface during grinding and to support the semiconductor wafer. Although the application of this protective sheet improves the grinding quality, residual stress is generated in the protective sheet due to its attachment.

[0005] Because the semiconductor wafer has high rigidity before back-side grinding, residual stress is offset. However, by thinning the semiconductor wafer through back-side grinding, the rigidity of the semiconductor wafer is reduced, thus the residual stress becomes significant, and the protective film and the semiconductor wafer warp together.

[0006] Furthermore, in semiconductor wafers with circuit protection layers, residual stress is generated during the formation of the circuit protection layer. After back-side grinding, the residual stress in the protection layer and the residual stress in the semiconductor wafer tend to increase the warping of the semiconductor wafer. Warping of the semiconductor wafer leads to problems such as the semiconductor wafer becoming easily damaged and difficult to transfer to the next step.

[0007] For this type of problem, for example, Patent Document 1 discloses a surface protective sheet with high stress-relieving properties on the substrate to suppress warping of semiconductor wafers. [Prior Art Documents] [Patent Documents]

[0008] [Patent Document 1] International Publication No. 2016 / 063827 [Summary of the Invention]

[0009] [The problem the invention aims to solve]

[0010] Patent Document 1 eliminates residual stress generated by the substrate by imparting stress-relieving properties to the substrate, thereby suppressing the warping of the semiconductor wafer. However, the protective sheet described in Patent Document 1 cannot eliminate residual stress generated by the semiconductor wafer itself, as is the case with a circuit protection layer formed on the semiconductor wafer. As a result, when residual stress is generated by the semiconductor wafer itself, there is a problem that the warping of the semiconductor wafer cannot be suppressed.

[0011] Regarding this problem, the inventors discovered that by controlling the residual stress of a layer with high stress mitigation properties, the warpage of semiconductor wafers can be reduced. However, it was found that controlling only the residual stress significantly increases the problem of components oozing from the protective film.

[0012] Specifically, protective films attached to semiconductor wafers are typically manufactured as long strips and stored in rolls until use. Within the roll, protective films are deposited in radial directions with the protective films in contact. Therefore, due to storage conditions and the load applied to the protective films, components constituting the protective films may leach out. If these leached components come into contact with the protective films, they become contaminated and unusable, and may even render the entire roll unusable.

[0013] In view of the above, the object of the present invention is to provide a semiconductor processing protective sheet that, when attached to a semiconductor wafer with residual stress, suppresses warping of the semiconductor wafer and also suppresses leakage of components from the wafer during storage, and a method for manufacturing a semiconductor device using the semiconductor processing protective sheet. [Method for solving the problem]

[0014] The present invention is as follows. [1] A protective sheet for semiconductor processing, which is a protective sheet for semiconductor processing having a substrate, an intermediate layer on the substrate and an adhesive layer in sequence. When the shear storage modulus of the intermediate layer at 60°C is set to G'(60°C) and the shear storage modulus of the intermediate layer at 80°C is set to G'(80°C), G'(60°C) and G'(80°C) satisfy the following formula, and the residual stress of the intermediate layer after being maintained at 65°C for 300 seconds is 10000Pa or less. [Formula 1] [2] The protective sheet for semiconductor processing described in [1] has a tensile storage modulus of the substrate multiplied by the thickness of the substrate of 8.0×105N / m or less. [3] The protective sheet for semiconductor processing described in [1] or [2] has a loss tangent of 0.6 or more in the intermediate layer at 65°C.

[0015] [4] A method for manufacturing a semiconductor device includes the steps of attaching a semiconductor processing protective sheet, as described in any one of [1] to [3], to a semiconductor wafer that generates residual stress, and reducing the rigidity of the semiconductor wafer to which the semiconductor processing protective sheet is attached. [Effects of the Invention]

[0016] According to the present invention, a semiconductor processing protective sheet can be provided that, when attached to a semiconductor wafer in which residual stress is generated, suppresses warping of the semiconductor wafer and suppresses leakage of components from the sheet during storage, and a method for manufacturing a semiconductor device using the semiconductor processing protective sheet is provided.

Implementation Method

[0018] The present invention will now be described in detail using drawings based on specific embodiments. First, the main terms used in this specification will be explained.

[0019] Wafer individualization refers to the process of dividing a wafer into individual circuits to obtain wafers.

[0020] The “surface” of a wafer refers to the surface on which circuits, electrodes, etc. are formed, while the “back side” of a wafer refers to the surface on which circuits, etc. are not formed. As an electrode, it can also be a convex electrode such as a bump.

[0021] "(meth)acrylate" is used to refer to both "acrylate" and "methacrylate", and other similar terms are the same.

[0022] "Energy line" refers to ultraviolet rays, electron rays, etc., with ultraviolet rays being preferred.

[0023] "Weight average molecular weight", unless otherwise specified, refers to the converted value of polystyrene determined by gel permeation chromatography (GPC). The determination is performed using, for example, a high-speed GPC apparatus "HLC-8120GPC" manufactured by Tosoh Corporation, with high-speed columns "TSK Guard column HXL-H", "TSK Gel GMHXL", and "TSK Gel G2000 HXL" connected in sequence (all of which are manufactured by Tosoh Corporation), at a column temperature of 40°C and a liquid feed rate of 1.0 mL / min, using a differential refractometer as the detector.

[0024] A release sheet is a sheet in which an adhesive layer or protective film is formed into a film that can be peeled off. The sheet is not limited to a certain thickness and is also used to include the concept of a film.

[0025] The mass ratios in the description of compositions such as intermediate layer compositions are based on the active ingredient (solid content) and, unless otherwise specified, do not include solvents.

[0026] (1. Protective Sheet for Semiconductor Processing) Regarding the protective sheet 1 for semiconductor processing of this embodiment, as shown in FIG1, it has a structure in which an intermediate layer 20 and an adhesive layer 30 are sequentially deposited on a substrate 10. The protective sheet for semiconductor processing is not limited to the structure shown in FIG1, and may have other layers as long as the effects of the present invention can be obtained. For example, in order to protect the adhesive layer 30 before it is attached to the substrate, a release tab may be provided on the main surface 30a of the adhesive layer 30.

[0027] The semiconductor processing protective sheet of this embodiment is suitable for use on semiconductor wafers that generate residual stress before the semiconductor processing protective sheet is attached. Examples of such semiconductor wafers include, for instance, semiconductor wafers with circuit protection layers formed such as various passivation films.

[0028] As shown in FIG2, the semiconductor processing protective sheet 1 of this embodiment is used on the main surface 30a of the circuit protection layer 51 formed on the circuit surface 50a of the semiconductor wafer 50, to which the adhesive layer 30 is attached.

[0029] When a semiconductor wafer with a circuit protection layer is thermally cured with the coating composition for the circuit protection layer, residual stress is generated on the semiconductor wafer. However, due to the high rigidity of the semiconductor wafer before back-side grinding, this residual stress is offset by the rigidity of the semiconductor wafer itself.

[0030] However, after the semiconductor wafer is ground, its rigidity decreases because the thickness of the semiconductor wafer becomes thinner. Therefore, when the semiconductor wafer is ground without attaching a protective sheet for semiconductor processing, as shown in FIG3A, warping Wa occurs due to residual stress generated solely by the semiconductor wafer.

[0031] In the back-side grinding of semiconductor wafers, to ensure the uniformity of grinding and prevent contamination of the circuit surface by grinding debris, etc., as described above, a semiconductor processing protective sheet is attached to the circuit surface to temporarily protect the circuit surface from the impact of grinding. Therefore, attaching a semiconductor processing protective sheet to the circuit surface during the back-side grinding of semiconductor wafers has significant advantages.

[0032] When the semiconductor processing protective sheet 1 is attached to the semiconductor wafer 50, the attachment is performed while applying tension (stretching the semiconductor processing protective sheet 1). As a result, residual stress RS is generated in the attached semiconductor processing protective sheet 1. In the semiconductor processing protective sheet, the substrate is generally more rigid than the constituent elements other than the substrate, and thus resists tension. Therefore, residual stress is mainly generated in the substrate.

[0033] That is, after the semiconductor wafer is attached to the protective sheet for semiconductor processing, in addition to the residual stress generated by the semiconductor wafer, the substrate of the protective sheet for semiconductor processing also generates residual stress. The residual stress generated by the substrate and the residual stress generated by the semiconductor wafer are offset by the rigidity of the semiconductor wafer.

[0034] However, after grinding the semiconductor wafer to which the conventional semiconductor processing protective sheet 100 is attached and residual stress is generated, as shown in FIG3B, since both the residual stress generated in the substrate and the residual stress generated in the semiconductor wafer are significantly increased, the warpage Wb generated in the semiconductor wafer 50 is greater than the warpage Wa shown in FIG3A.

[0035] The greater the warpage generated on the semiconductor wafer 50, the more it affects the operability of the semiconductor wafer during transport. Therefore, since the warpage Wb shown in Figure 3B is a composite warpage caused by residual stress generated on the semiconductor wafer and warpage caused by residual stress generated on the substrate, it is highly likely to affect the operability of the semiconductor wafer. That is, if the warpage that does not affect the operability of the semiconductor wafer is set as W, then Wb > W.

[0036] Because the semiconductor processing protective sheet 1 of this embodiment has the characteristics described later, the semiconductor wafer 50 attached to the semiconductor processing protective sheet 1 enjoys the advantages mentioned above for attachment via the semiconductor processing protective sheet. Even if the thickness decreases due to polishing, as shown in FIG3C, the composite warpage Wc can be reduced to a level that does not affect the operability of the semiconductor wafer. That is, if the warpage that does not affect the operability of the semiconductor wafer is set to W, then Wc < W.

[0037] Preferably, by relieving the residual stress generated on the substrate, the residual stress generated on the semiconductor wafer is partially relieved. Thus, the semiconductor wafer 50 to which the semiconductor processing protective sheet 1 is attached enjoys the aforementioned advantages of being attached via the semiconductor processing protective sheet. As shown in FIG. 3D, compared to the case where the semiconductor processing protective sheet is not attached, the warpage Wa of the semiconductor wafer is further reduced. That is, Wd < Wa.

[0038] Therefore, in this embodiment, in order to reduce the warpage of the semiconductor wafer, the physical properties of the intermediate layer are adjusted so that the warpage is reduced to a level that does not affect the operability of the semiconductor wafer. Details are described below.

[0039] However, the protective sheet 1 for semiconductor processing is usually made into a long strip with a very long length relative to the short side. Because the long strip is not easy to handle during transportation or storage, it is usually rolled into a sheet roll 11 as shown in FIG4 before use.

[0040] A sheet roll is formed by laminating a protective sheet for semiconductor processing in the radial direction of the sheet roll, and then contacting it along the circumference of the sheet roll. Due to the storage environment of the sheet roll, the load applied to the protective sheet for semiconductor processing in the sheet roll, etc., the components contained in the protective sheet for semiconductor processing may decompose from their intended state, causing changes and leakage. Since the ends of the sheet roll for semiconductor processing protective sheets are exposed to the outside in the width direction, if leakage occurs, it can be observed from the ends of the sheet.

[0041] The inventors have discovered that the composition of the intermediate layer, whose properties have been adjusted to reduce the warpage of the aforementioned semiconductor wafer, tends to easily leak out. That is, when the properties of the intermediate layer are controlled with an emphasis on reducing the warpage of the semiconductor wafer, leakage occurs during storage in sheet rolls. If such leakage occurs, the semiconductor processing protective sheet located near the location where leakage occurs becomes contaminated, rendering the semiconductor processing protective sheet unusable.

[0042] Therefore, while reducing the warpage of the semiconductor wafer, it is necessary to prevent leakage from the protective film used in semiconductor processing. Since the aforementioned leakage usually originates from the intermediate layer, the physical properties of the intermediate layer are adjusted to suppress leakage. Details are described later.

[0043] (2. Intermediate Layer) The intermediate layer is a layer disposed between the substrate and the adhesive layer. In this embodiment, the intermediate layer is a layer with high stress mitigation properties that receives residual stress from the substrate and can mitigate such residual stress within the intermediate layer. As shown in FIG5, the substrate 10 after the semiconductor processing protective sheet 1 is attached shrinks due to residual stress, but since most of the residual stress is mitigated in the intermediate layer, the warpage of the semiconductor wafer 50 is suppressed. The intermediate layer can be a single-layer structure or composed of two or more layers.

[0044] The thickness of the intermediate layer 20 can be arbitrarily set within the range that achieves the effects of the present invention. In this embodiment, the thickness of the intermediate layer 20 is preferably 50 μm or more and 500 μm or less. Furthermore, the thickness of the intermediate layer refers to the total thickness of the intermediate layer. For example, the thickness of an intermediate layer composed of multiple layers refers to the total thickness of all the layers constituting the intermediate layer.

[0045] In this embodiment, in order to reduce the warpage of the semiconductor wafer and suppress the leakage of components from the protective sheet for semiconductor processing, the intermediate layer has the following physical properties.

[0046] (2.1. Slope of Shear Storage Modulus for Temperature Change) In this embodiment, when the shear storage modulus of the intermediate layer at 60°C is set as G'(60°C) and the shear storage modulus of the aforementioned intermediate layer at 80°C is set as G'(80°C), G'(60°C) and G'(80°C) satisfy the following formula. The shear storage modulus (G') is one of the indicators of the ease (hardness) of deformation of the intermediate layer. [Formula 2]

[0047] The left side of the above equation shows the proportion of the change in the common logarithm of the shear storage modulus (G') from 60°C to 80°C. That is, the left side of the above equation shows the slope of the shear storage modulus (G') from 60°C to 80°C.

[0048] Therefore, the above formula shows that when the temperature of the intermediate layer changes from 60°C to 80°C, the shear storage modulus (G') of the intermediate layer decreases, and the decrease is preferably small.

[0049] By using the slope of the shear storage modulus (G') within the range described above, the hardness of the intermediate layer becomes an appropriate range, which can suppress the exudation of the components of the intermediate layer.

[0050] The slope of the shear storage modulus (G') is preferably -0.02 or higher, and more preferably -0.015 or higher. On the other hand, the upper limit of the slope of the shear storage modulus (G') is only required to be within the range that can suppress the leakage of components from the intermediate layer, for example, -0.005.

[0051] Furthermore, the shear storage modulus of the intermediate layer at 65°C is preferably set to G'(65°C) within the range of 0.01 to 0.1 Pa.

[0052] The shear storage modulus (G') can be determined by well-known methods. For example, a sample with an intermediate layer of a predetermined size is subjected to strain at a predetermined frequency within a predetermined temperature range using a dynamic viscoelasticity measuring device, and the elastic modulus is measured. The shear storage modulus can be calculated from the measured elastic modulus.

[0053] (2.2 Residual stress after maintaining at 65°C for 300 seconds) In this embodiment, the residual stress in the intermediate layer after maintaining at 65°C for 300 seconds is less than 10,000 Pa. The residual stress received from the substrate is rapidly relieved within the intermediate layer, and almost reaches stability after 300 seconds. Furthermore, protective sheets for semiconductor processing are typically attached to semiconductor wafers at a temperature of around 65°C.

[0054] Therefore, by ensuring that the stress remaining in the intermediate layer after maintaining at 65°C for 300 seconds is within the aforementioned range, the residual stress received from the attached substrate is sufficiently mitigated within the intermediate layer. Furthermore, "the residual stress of the intermediate layer after maintaining at 65°C for 300 seconds" refers to the residual stress of the intermediate layer measured after maintaining the temperature of the intermediate layer at 65°C for 300 seconds.

[0055] The residual stress of the intermediate layer after maintaining at 65°C for 300 seconds is preferably below 6000 Pa, and more preferably below 5000 Pa. Furthermore, the residual stress of the intermediate layer after maintaining at 65°C for 300 seconds is preferably above 1 Pa, and more preferably above 50 Pa.

[0056] In this embodiment, the residual stress of the intermediate layer after being maintained at 65°C for 300 seconds can be measured in the following manner. A sample of a predetermined size is formed from the material constituting the intermediate layer. Using a dynamic viscoelasticity measuring device, the sample is twisted at 65°C, and shear strain is applied to the sample. The shear stress is measured 300 seconds after the strain is applied, and the measured shear stress is taken as the residual stress of the intermediate layer after being maintained at 65°C for 300 seconds.

[0057] (2.3 Loss Tangent at 65°C) In this embodiment, the loss tangent (tanδ) of the intermediate layer at 65°C is preferably 0.6 or higher. The loss tangent is defined as "loss modulus / storage modulus" and is a value measured by a dynamic viscoelasticity measuring device based on the response to stress applied to an object. By having the loss tangent of the intermediate layer at 65°C within the above-mentioned range, the residual stress received from the substrate is consumed as heat, thus suppressing the warpage of the semiconductor wafer.

[0058] The loss tangent of the intermediate layer at 65°C is preferably 0.8 or higher, more preferably 0.9 or higher, and especially preferably 1.0 or higher. Furthermore, the loss tangent of the intermediate layer at 65°C is preferably 3.0 or lower.

[0059] The loss tangent of the intermediate layer at 65°C can be determined by a well-known method. For example, by making the intermediate layer into a sample of a predetermined size, the elastic modulus is measured by applying strain to the sample at a predetermined frequency within a predetermined temperature range using a dynamic viscoelasticity measuring device, and the loss tangent at 65°C can be calculated from the measured elastic modulus.

[0060] (2.3 Intermediate Layer Composition) The composition of the intermediate layer is not particularly limited as long as it has the above-described physical properties. In this embodiment, the intermediate layer is preferably composed of a resin-containing composition (intermediate layer composition). The intermediate layer composition preferably contains the components shown below.

[0061] (2.3.1 Ethyl carbamate (meth)acrylate) Ethyl carbamate (meth)acrylate is a compound having at least a (meth)acrylic group and an ethyl carbamate bond, and has the property of being polymerized by energy beam irradiation. In this embodiment, ethyl carbamate (meth)acrylate imparts flexibility to the intermediate layer and is used as a component to impart properties that reduce residual stress.

[0062] Ethyl carbamate (meth)acrylate can be monofunctional or polyfunctional. In this embodiment, polyfunctional ethyl carbamate (meth)acrylate is preferred, and from the viewpoint of keeping the residual stress of the intermediate layer within the above-mentioned range, difunctional ethyl carbamate (meth)acrylate is preferred.

[0063] Ethyl carbamate (meth)acrylate can be an oligomer, a polymer, or a mixture thereof. In this embodiment, ethyl carbamate (meth)acrylate oligomer is preferred.

[0064] Ethyl carbamate (meth)acrylate is, for example, a terminal isocyanate ethyl carbamate prepolymer obtained by reacting a polyol compound with a polyvalent isocyanate compound, and then reacting it with a (meth)acrylate having hydroxyl groups. Furthermore, ethyl carbamate (meth)acrylate can be used in one or more combinations.

[0065] The content of ethyl carbamate (meth)acrylate in the intermediate layer composition is preferably 20% by mass or more, more preferably 25% by mass or more, and more preferably 30% by mass or more. Furthermore, the content of ethyl carbamate (meth)acrylate in the intermediate layer composition is preferably 70% by mass or less, more preferably 65% ​​by mass or less, and more preferably 50% by mass or less.

[0066] (2.3.2 Polymerizable Monomer) The polymerizable monomer is a polymerizable compound other than the ethyl carbamate (meth)acrylate mentioned above, preferably a compound capable of polymerizing with other components via irradiation by an energy line. In this embodiment, the polymerizable monomer is a compound having one reactive unsaturated double bond.

[0067] Examples of polymerizable monomers include (meth)acrylates having alkyl groups having 1 to 30 carbon atoms; (meth)acrylates having functional groups such as hydroxyl, amide, amino, and epoxy groups; (meth)acrylates having an alicyclic structure; (meth)acrylates having an aromatic structure; (meth)acrylates having a heterocyclic structure; and vinyl compounds such as styrene, hydroxyethyl vinyl ether, hydroxybutyl vinyl ether, N-vinylmethylamine, N-vinylpyrrolidone, and N-vinylcaprolactam.

[0068] Examples of (meth)acrylates having alkyl groups having 1 to 30 carbon atoms include methyl (meth)acrylate, ethyl (meth)acrylate, n-propyl (meth)acrylate, isopropyl (meth)acrylate, n-butyl (meth)acrylate, isobutyl (meth)acrylate, tributyl (meth)acrylate, n-pentyl (meth)acrylate, n-hexyl (meth)acrylate, 2-ethylhexyl (meth)acrylate, n-octyl (meth)acrylate, nonyl (meth)acrylate, decyl (meth)acrylate, undecyl (meth)acrylate, dodecyl (meth)acrylate, tridecyl (meth)acrylate, tetradecyl (meth)acrylate, hexadecyl (meth)acrylate, octadecyl (meth)acrylate, and eicosyl (meth)acrylate.

[0069] Examples of (meth)acrylates having functional groups include, for example, hydroxyl-containing (meth)acrylates such as 2-hydroxyethyl (meth)acrylate, 2-hydroxypropyl (meth)acrylate, 3-hydroxypropyl (meth)acrylate, 2-hydroxybutyl (meth)acrylate, 3-hydroxybutyl (meth)acrylate, and 4-hydroxybutyl (meth)acrylate; and (meth)acrylamide, N,N-dimethyl (meth)acrylamide, N-butyl (meth)acrylamide, and N-hydroxymethyl (meth)acrylamide. Compounds containing amide groups, such as methacrylamide, N-hydroxymethylpropane (meth)acrylamide, N-methoxymethyl (meth)acrylamide, and N-butoxymethyl (meth)acrylamide; methacrylic esters containing primary amides, secondary amides, and tertiary amides; and epoxy-containing methacrylic esters, such as glycidyl (meth)acrylate, methyl glycidyl (meth)acrylate, and allyl glycidyl ether.

[0070] Examples of (meth)acrylates having an alicyclic structure include isocamphene methacrylate, dicyclopentyl methacrylate, dicyclopentenyl methacrylate, dicyclopentyloxy methacrylate, cyclohexyl methacrylate, trimethylcyclohexyl methacrylate, and adamantane methacrylate.

[0071] Examples of (meth)acrylates having an aromatic structure include phenyl hydroxypropyl (meth)acrylate, benzyl (meth)acrylate, and 2-hydroxy-3-phenoxypropyl (meth)acrylate.

[0072] Examples of (meth)acrylates having a heterocyclic structure include tetrahydrofuran methacrylate and morphofrin methacrylate.

[0073] In this embodiment, the polymerizable monomer is preferably a (meth)acrylate containing an alkyl group having 1 to 30 carbon atoms or a (meth)acrylate having an alicyclic structure. From the viewpoint of keeping the residual stress of the intermediate layer within the above-mentioned range, a (meth)acrylate containing an alkyl group having 4 to 14 carbon atoms is preferred, and as a (meth)acrylate having an alicyclic structure, isoborneol (meth)acrylate and trimethylcyclohexyl (meth)acrylate are preferred.

[0074] Furthermore, when the intermediate layer composition contains a crosslinking agent, (meth)acrylates having functional groups that can react with the crosslinking agent are less desirable. This is because the crosslinked structure formed through the crosslinking reaction may increase the residual stress of the intermediate layer. For example, intermediate layer compositions containing polyisocyanate-based crosslinking agents and hydroxyl (meth)acrylates are less desirable.

[0075] The proportion of polymerizable monomers in the composition for the intermediate layer is preferably 20% by mass or more, and more preferably 30% by mass or more. Furthermore, the proportion of polymerizable monomers in the composition for the intermediate layer is preferably 80% by mass or less, and more preferably 70% by mass or less.

[0076] Furthermore, in a total of 100 parts by mass of ethyl carbamate (meth)acrylate and polymerizable monomer, the mass ratio of ethyl carbamate (meth)acrylate to polymerizable monomer (ethyl carbamate (meth)acrylate / polymerizable monomer) is preferably 20 / 80 to 80 / 20, and more preferably 30 / 70 to 70 / 30.

[0077] (2.3.3 Photopolymerization Initiator) When the intermediate layer composition contains the above-mentioned ethyl carbamate (meth)acrylate and polymerizable monomer, it is preferable that the intermediate layer composition contains a photopolymerization initiator. By containing a photopolymerization initiator, polymerization proceeds reliably, and an intermediate layer with the above-mentioned properties can be easily obtained.

[0078] Examples of photopolymerization initiators include, for example, benzoin compounds, acetophenone compounds, phosphonium oxychloride compounds, titanium dioxide compounds, thioxanthone compounds, peroxide compounds, and photosensitizers such as amines and quinones. Specifically, examples include, 1-hydroxycyclohexylphenyl ketone, 2-hydroxy-2-methyl-1-phenyl-propane-1-one, benzoin, benzoin methyl ether, benzoin ethyl ether, benzoin isopropyl ether, and 2,2-dimethoxy-1,2-diphenylethane-1-one. One or more of these photopolymerization initiators can be used.

[0079] The amount of photopolymerization initiator is preferably 0.05 to 15 parts by mass and 0.5 to 10 parts by mass relative to the total of 100 parts by mass of ethyl carbamate (meth)acrylate and polymerizable monomers.

[0080] (2.3.4 Chain Transfer Agent) The interlayer composition preferably contains a chain transfer agent. The chain transfer agent can initiate a chain transfer reaction and can regulate the progress of the curing reaction of the interlayer composition. By containing a chain transfer agent, even after curing, components with shorter molecular chains are more likely to remain, resulting in a more flexible cross-linked structure in the cured polymer. As a result, residual stress applied to the interlayer can be adequately mitigated, and the residual stress in the interlayer is easily kept within the aforementioned range.

[0081] Examples of chain transfer agents include, for example, thiol-containing compounds. Examples of thiol-containing compounds include nonyl mercaptan, 1-dodecanethiol, 1,2-ethanedithiol, 1,3-propanedithiol, triazine thiol, triazine dithiol, triazine trithiol, 1,2,3-propane trithiol, tetraethylene glycol-bis(3-mercaptopropionate), trimethylolpropane-3-mercaptopropionate, neopentyl tert-(3-mercaptopropionic acid) ester, and tetrathioethyl tert-(3-mercaptopropionic acid) ester. Neopentyl terephthalate, hexa(3-mercaptopropionic acid) dinepentyl terephthalate, tris(3-mercaptopropoxy)-ethyl]-triisocyanate, 1,4-bis(3-mercaptobutoxy)butane, tetra(3-mercaptobutyric acid) neopentyl terephthalate, 1,3,5-tris(3-mercaptobutoxyethyl)-1,3,5-triazine-2,4,6-(1H,3H,5H)-trione. One or more chain transfer agents can be used.

[0082] The amount of chain transfer agent is preferably 0.1 to 10 parts by mass or more, or 0.3 to 5 parts by mass, relative to 100 parts by mass of the total amount of ethyl carbamate (meth)acrylate and polymerizable monomer.

[0083] (2.3.5. Polyfunctional acrylates) The intermediate layer composition preferably contains polyfunctional acrylates. Polyfunctional acrylates are compounds having two or more (meth)acrylic groups. By containing polyfunctional acrylates in the intermediate layer composition, the three-dimensional network structure (cross-linked structure) formed by the polymerization of ethyl carbamate (meth)acrylate and polymerizable monomers via energy line irradiation can be reinforced. As a result, leakage of components from the intermediate layer of the semiconductor processing protective film can be suppressed.

[0084] Furthermore, the definition of polyfunctional acrylates overlaps with the definition of ethyl carbamate (meth)acrylates. The overlapping portion with ethyl carbamate (meth)acrylates is included in ethyl carbamate (meth)acrylates. For example, although polyfunctional ethyl carbamate (meth)acrylates contain more than two (meth)acrylic groups, they are included in ethyl carbamate (meth)acrylates.

[0085] In this embodiment, the number of (meth)acrylic groups in the polyfunctional acrylate is preferably 2 to 20, and more preferably 2 to 8.

[0086] Examples of multifunctional acrylates include diethylene glycol di(meth)acrylate, ethylene glycol di(meth)acrylate, tetraethylene glycol di(meth)acrylate, neopentyl glycol di(meth)acrylate, 1,6-hexanediol di(meth)acrylate, trimethylolpropane tri(meth)acrylate, neopentyl tetra(meth)acrylate, neopentyl tetra(meth)acrylate, and dinepentyl tetra(meth)acrylate. Diethylene glycol di(meth)acrylate, neopentyl tetra(meth)acrylate, and dinepentyl tetra(meth)acrylate are preferred. Furthermore, multifunctional acrylates can be used alone or in combination of two or more types.

[0087] The amount of the polyfunctional acrylate is preferably 0.01 to 10 parts by mass and 0.5 to 5 parts by mass relative to 100 parts by mass of the total amount of ethyl carbamate (meth)acrylate and polymerizable monomer.

[0088] In this embodiment, when the chain transfer agent is a mercapto-containing compound, the ratio of the number of mercapto groups in the chain transfer agent to the number of (meth)acrylic groups in the polyfunctional acrylate is preferably in the range of 8:1 to 1:1. By ensuring that the ratio of the number of mercapto groups to the number of (meth)acrylic groups is within the above-mentioned range, it is easier to make the residual stress of the intermediate layer after 300 seconds and the slope of the shear storage modulus (G') of the intermediate layer fall within the above-mentioned range.

[0089] (3. Substrate) As a substrate, there are no particular restrictions as long as it is made of a material capable of supporting a semiconductor wafer. Examples include various resin films used as substrates for back-side grinding tapes. The substrate may be a single-layer film composed of a single resin film or a multilayer film composed of multiple resin films.

[0090] (3.1 Substrate Properties) In this embodiment, the substrate properties are adjusted within the range that allows for the achievement of the effects of the present invention. In this embodiment, the rigidity of the substrate is preferably below a predetermined value. If the rigidity of the substrate is too high, the residual stress generated by the substrate in the intermediate layer may not be completely mitigated, and the residual stress in the intermediate layer tends to exceed the above-mentioned range. As a result, in addition to warping caused by residual stress generated by the semiconductor wafer itself, warping caused by residual stress in the intermediate layer occurs. Therefore, this leads to defects such as easy breakage of the semiconductor wafer and deterioration of operability during semiconductor wafer handling.

[0091] In this embodiment, the rigidity of the substrate is evaluated by the product of the tensile storage modulus of the substrate and the thickness of the substrate. Preferably, the product of the tensile storage modulus of the substrate and the thickness of the substrate is 8.0 × 10⁵ N / m or less. Furthermore, preferably, the product of the tensile storage modulus of the substrate and the thickness of the substrate is 7.5 × 10⁵ N / m or less.

[0092] On the other hand, the product of the tensile storage modulus of the substrate and the thickness of the substrate is preferably 5.0 × 10³ N / m or more, and preferably 1.2 × 10⁵ N / m or more. When the rigidity of the substrate is at or above a predetermined value, the residual stress of the substrate can be eliminated by the intermediate layer, and the warping caused by the residual stress generated by the semiconductor wafer can be suppressed by the rigidity of the substrate.

[0093] That is, by regulating the stress relief capability of the intermediate layer and the stress resistance capability of the rigidity of the substrate, even when residual stress is generated in the semiconductor wafer, the warping of the semiconductor wafer after back-side grinding can be suppressed.

[0094] The preferred range of the thickness of the substrate varies depending on the tensile storage modulus of the substrate. In this embodiment, it is preferred to be 15 μm or more and 200 μm or less, or 40 μm or more and 150 μm or less.

[0095] (3.2 Material of the Substrate) When the thickness of the substrate is within the range described above, it is preferable to use a material in which the product of the tensile storage modulus of the substrate and the thickness of the substrate is within the range described above. In this embodiment, examples include polyesters such as polyethylene terephthalate, polyethylene naphthalate, polyethylene terephthalate, and fully aromatic polyesters, as well as polyamide, polycarbonate, polyacetal, modified polyphenylene oxide, polyphenylene sulfide, polyurethane, polyetherketone, and biaxially extended polypropylene. Among these, polyester is preferred, and polyethylene terephthalate is even more preferred.

[0096] (4. Adhesive Layer) The adhesive layer is attached to the circuit surface of the semiconductor wafer, protecting the circuit surface until it is peeled off, and supporting the semiconductor wafer. The adhesive layer may consist of one layer (single layer) or multiple layers (two or more). When the adhesive layer has multiple layers, these multiple layers may be the same or different from each other, and there are no particular restrictions on the combination of layers constituting such multiple layers.

[0097] There is no particular limitation on the thickness of the adhesive layer, but it is preferably 1 μm to 50 μm, and more preferably 2 μm to 30 μm. Furthermore, the thickness of the adhesive layer refers to the overall thickness of the adhesive layer. For example, the thickness of an adhesive layer composed of multiple layers means the total thickness of all the layers constituting the adhesive layer.

[0098] The composition of the adhesive layer is not particularly limited as long as it has adhesiveness sufficient to protect the circuit surface of the semiconductor wafer. In this embodiment, the adhesive layer is preferably composed of, for example, acrylic adhesives, urethane adhesives, rubber adhesives, silicone adhesives, etc.

[0099] Furthermore, the adhesive layer is preferably formed of an energy line curing adhesive. Because the adhesive layer of the semiconductor processing protective sheet is formed of an energy line curing adhesive, it adheres to the semiconductor wafer with high adhesion when attached, and the adhesion can be reduced by irradiating the energy line when peeling it off from the semiconductor wafer. Therefore, while properly protecting the circuitry of the semiconductor wafer, it can prevent damage to the circuitry on the surface of the semiconductor wafer and prevent adhesive transfer onto the semiconductor wafer when peeling off the semiconductor processing protective sheet.

[0100] In this embodiment, the energy-line curing adhesive is preferably composed of an adhesive composition containing an acrylic adhesive. As an acrylic adhesive, an acrylic polymer is preferred.

[0101] As an acrylic polymer, any well-known acrylic polymer is acceptable. In this embodiment, a functionalized acrylic polymer is preferred. The functionalized acrylic polymer may be a homopolymer formed from one type of acrylic monomer, a copolymer formed from multiple types of acrylic monomers, or a copolymer formed from one or multiple types of acrylic monomers and monomers other than acrylic monomers.

[0102] In this embodiment, the functionalized acrylic polymer is preferably an acrylic copolymer formed by copolymerization of (meth)acrylate and functionalized monomer.

[0103] As alkyl methacrylates, examples include methyl methacrylate, ethyl methacrylate, n-propyl methacrylate, isopropyl methacrylate, n-butyl methacrylate, isobutyl methacrylate, tributyl methacrylate, n-pentyl methacrylate, n-hexyl methacrylate, 2-ethylhexyl methacrylate, isooctyl methacrylate, and n-octyl methacrylate.

[0104] The functional group-containing monomer is a monomer containing a reactive functional group. The reactive functional group is a functional group that can react with other compounds such as crosslinking agents described later. Examples of functional groups in the functional group-containing monomer include hydroxyl, carboxyl, and epoxy groups, with hydroxyl being preferred.

[0105] As hydroxyl-containing monomers, examples include hydroxyalkyl esters of (meth)acrylates such as hydroxymethyl methacrylate, 2-hydroxyethyl methacrylate, 2-hydroxypropyl methacrylate, 3-hydroxypropyl methacrylate, 2-hydroxybutyl methacrylate, 3-hydroxybutyl methacrylate, and 4-hydroxybutyl methacrylate; and non-(meth)acrylate unsaturated alcohols (unsaturated alcohols without a (meth)acrylic acid backbone) such as vinyl alcohols and allyl alcohols.

[0106] The adhesive composition preferably contains an energy-curing compound having an energy-curing group. As the energy-curing compound having an energy-curing group, it is preferable to have one or more compounds selected from isocyanate groups, epoxy groups and carboxyl groups, and compounds having isocyanate groups are more preferred.

[0107] Examples of compounds having an isocyanate group include, for example, 2-methacryloxyethyl isocyanate, meta-isopropenyl-α,α-dimethylbenzyl isocyanate, methacryloxyisocyanate, allyl isocyanate, 1,1-(bisacryloxymethyl)ethyl isocyanate; diisocyanate compounds or polyisocyanate compounds, acryloxymonoisocyanate compounds obtained by reacting with hydroxyethyl (meth)acrylate; acryloxymonoisocyanate compounds obtained by reacting diisocyanate compounds or polyisocyanate compounds with polyol compounds and hydroxyethyl (meth)acrylate, etc. Isocyanates are based on the addition reaction of hydroxyl groups in functionalized acrylic polymers.

[0108] The adhesive composition preferably contains a crosslinking agent. The crosslinking agent, for example, is one that reacts with functional groups to crosslink the resins contained in the functionalized acrylic polymer with each other.

[0109] As crosslinking agents, examples include isocyanate-based crosslinking agents (crosslinking agents having isocyanate groups) such as toluene diisocyanate, hexamethylene diisocyanate, xylylene diisocyanate, and adducts of such diisocyanates; epoxy-based crosslinking agents (crosslinking agents having glycidyl groups) such as ethylene glycol glycidyl ether; aziridine-based crosslinking agents (crosslinking agents having aziridine groups) such as hexa[1-(2-methyl)-aziridinyl] triphosphatriazine; metal chelate-based crosslinking agents (crosslinking agents having metal chelate structures) such as aluminum chelates; and isocyanurate-based crosslinking agents (crosslinking agents having isocyanuric acid backbones).

[0110] From the viewpoint of improving the adhesion of the adhesive layer by enhancing the cohesive force of the adhesive, and from the viewpoint of easy availability, isocyanate-based crosslinking agents are preferred.

[0111] The adhesive composition may further include a photopolymerization initiator. By including a photopolymerization initiator in the adhesive composition, the curing reaction can be sufficiently carried out even when irradiated with a relatively low-energy beam such as ultraviolet light.

[0112] Examples of photopolymerization initiators include photoinitiators such as benzoin compounds, acetophenone compounds, phosphine oxide compounds, dichotomagnetic compounds, thioxanone compounds, and peroxide compounds, as well as photosensitizers such as amines and quinones. Specifically, examples include α-hydroxycyclohexylphenyl ketone, benzoin, benzoin methyl ether, benzoin ethyl ether, benzoin isopropyl ether, benzyl diphenyl sulfide, benzyl dimethyl ketal, tetramethylthiuram monosulfide, azobisisobutyronitrile, bibenzyl, biacetyl, β-chloranthraquinone, and 2,4,6-trimethylbenzoyl diphenylphosphine oxide.

[0113] (5. Method for manufacturing a protective sheet for semiconductor processing) The method for manufacturing the protective sheet for semiconductor processing according to this embodiment is not particularly limited as long as the intermediate layer and the adhesive layer can be deposited on one side of the substrate to form a protective sheet, and well-known methods can be used.

[0114] First, as a composition for forming an intermediate layer, an intermediate layer composition containing, for example, the above-mentioned components, is prepared, or a composition for which the intermediate layer composition is diluted with a solvent or the like is prepared (hereafter referred to as an intermediate layer coating agent). Similarly, as an adhesive composition for forming an adhesive layer, an adhesive composition containing, for example, the above-mentioned components, is prepared, or a composition for which the adhesive composition is diluted with a solvent or the like is prepared (hereafter referred to as an adhesive layer coating agent).

[0115] Examples of organic solvents that can be used include methyl ethyl ketone, acetone, ethyl acetate, tetrahydrofuran, dioxane, cyclohexane, n-hexane, toluene, xylene, n-propanol, isopropanol, etc.

[0116] Next, the intermediate layer is coated onto the substrate using a known method such as spin coating, spray coating, bar coating, knife coating, roller coating, blade coating, mold coating, gravure coating, etc., to form a coating film, and this coating film is then cured on the substrate to form the intermediate layer. In this embodiment, the curing of the coating film is preferably carried out by irradiation with an energy beam. Examples of energy beams include ultraviolet light and electron beams, with ultraviolet light being preferred.

[0117] Furthermore, in this embodiment, it is preferable to irradiate the coating film with energy lines multiple times to harden it. In this way, it is possible to control the appropriate degree of hardening of the intermediate layer and easily set the residual stress of the intermediate layer within the aforementioned range.

[0118] Specifically, it is preferable to irradiate the coated film with energy lines multiple times while it is in an oxygen-barrier state.

[0119] Furthermore, when the energy line is ultraviolet, the conditions for the first ultraviolet irradiation are that the ultraviolet irradiation intensity is preferably 30~500mW / cm2, preferably 50~340mW / cm2, and the ultraviolet irradiation amount is preferably 100~2500mJ / cm2, preferably 150~2000mJ / cm2.

[0120] The conditions for the second ultraviolet irradiation are preferably greater than those for the first irradiation, in terms of illuminance and irradiation intensity.

[0121] On the intermediate layer formed by hardening in this way, an adhesive layer is coated with a coating agent in a known manner and heated to dry, thereby manufacturing a semiconductor processing protective sheet on which an intermediate layer and an adhesive layer are sequentially formed on a substrate.

[0122] Furthermore, a protective sheet for semiconductor processing can also be manufactured as described below. That is, on the release surface of one release sheet, a coating film formed by coating agent for coating intermediate layer is hardened on the release sheet in the manner described above to form an intermediate layer.

[0123] An adhesive layer is coated onto the release surface of the other release sheet, and then heated and dried to form an adhesive layer on the release sheet. Next, an intermediate layer on one release sheet is bonded to a substrate, and the release sheet is removed. Then, the intermediate layer and the adhesive layer on the other release sheet are bonded together to manufacture a semiconductor processing protective sheet in which an intermediate layer, an adhesive layer, and a release sheet are sequentially disposed on a substrate. The release sheet can be appropriately peeled off before use of the semiconductor processing protective sheet.

[0124] The obtained semiconductor processing protective sheet is fitted to the dimensions of the semiconductor wafer to be bonded. Its width is adjusted by cutting both sides in the width direction, and then wound with a predetermined tension using a winding device to form a sheet roll. The semiconductor processing protective sheet is stored in the sheet roll state until use.

[0125] (6. Method for manufacturing a semiconductor device) As a method for manufacturing a semiconductor device using the semiconductor processing protective sheet of the present embodiment, there are no particular limitations as long as the following steps are included: the step of attaching the stored semiconductor processing protective sheet of the present embodiment to a semiconductor wafer that generates residual stress, and the step of reducing the rigidity of the semiconductor wafer to which the semiconductor processing protective sheet is attached.

[0126] In this embodiment, the manufactured protective sheet for semiconductor processing is wound up and stored as a sheet roll for a predetermined period. By controlling the properties of the intermediate layer to the range described above, leaching of components from the stored protective sheet for semiconductor processing is suppressed. Therefore, even when the protective sheet for semiconductor processing is used, since no leaching occurs on the sheet roll, the sheet roll can be used effectively.

[0127] A protective sheet for semiconductor processing, rolled from a sheet, is attached to a semiconductor wafer. As a step of attaching the protective sheet for semiconductor processing to the semiconductor wafer, it is preferable to attach the protective sheet for semiconductor processing of this embodiment to the semiconductor wafer, for example, on the side of the semiconductor wafer where the circuit is formed.

[0128] Furthermore, as a step to reduce the rigidity of the semiconductor wafer, for example, grinding the semiconductor wafer to reduce its thickness.

[0129] The following is an example of a method for manufacturing a semiconductor device using a protective sheet for semiconductor processing according to this embodiment. Figures 2 to 5 are used to illustrate a method for manufacturing a semiconductor device from a semiconductor wafer that generates residual stress.

[0130] First, as shown in Figure 4, a roll of sheet material is prepared for winding and storing the protective sheet for semiconductor processing. As mentioned above, the occurrence of leakage can be suppressed because the physical properties of the intermediate layer are modulated.

[0131] Next, prepare a semiconductor wafer. Any known type of semiconductor wafer is acceptable. Furthermore, the thickness of the semiconductor wafer before polishing is typically about 500~1000 μm. Furthermore, the thickness of the semiconductor wafer after polishing is preferably 100~300 μm.

[0132] In this embodiment, the semiconductor wafer that generates residual stress is the semiconductor wafer with the circuit protection layer formed as described above. The circuit protection layer is usually formed by coating a composition constituting the circuit protection layer and then thermally curing it. During thermal curing, the composition shrinks, and a force that causes the semiconductor wafer to bend on the circuit surface side is generated, i.e., residual stress. Therefore, as shown in FIG2, residual stress RS1 is generated on the circuit protection layer 51 of the semiconductor wafer after the circuit protection layer is formed. Furthermore, the circuit surface on which the semiconductor processing protective sheet of this embodiment is attached may also be formed with bumps, pillar electrodes, or other convex electrodes.

[0133] Next, before grinding the back side of the semiconductor wafer, as shown in FIG2, a semiconductor processing protective sheet 1, rolled from a sheet, is attached to the circuit-side surface of the semiconductor wafer 50 on which the circuit protection layer 51 is formed, i.e., the surface 51a of the circuit protection layer 51, to protect the circuit surface from adverse effects caused by grinding. At this time, the semiconductor processing protective sheet 1 is attached to the circuit surface while being stretched. Therefore, after attachment, the semiconductor processing protective sheet 1, especially on a high-rigidity substrate, generates residual stress RS2 acting in the shrinkage direction of the substrate.

[0134] As shown in FIG. 5, the residual stress RS2 in the substrate 10 is canceled out by shrinking the substrate 10. Due to the deformation of the substrate 10, residual stress RS2 is generated in the intermediate layer 20 formed on the substrate. However, in this embodiment, since the intermediate layer has the above-mentioned characteristics, most of the residual stress in the intermediate layer is mitigated, and becomes less than the above-mentioned value. Furthermore, when a convex electrode is formed on the circuit surface, the intermediate layer can mitigate the residual stress while adequately following the step of the circuit surface to protect the convex electrode.

[0135] Next, the back side of the semiconductor wafer with the semiconductor processing protective sheet 1 attached is ground. As the semiconductor wafer becomes thinner, its rigidity decreases, leading to warping due to residual stress. When the substrate rigidity is low, as shown in FIG3C, warping can be reduced to a level that does not affect the operability of the semiconductor wafer. When the substrate rigidity is high, as shown in FIG3D, warping due to residual stress generated by the semiconductor wafer can also be partially suppressed. Therefore, it becomes easier to transport to the next step, preventing damage to the semiconductor wafer.

[0136] The back-side-polished semiconductor wafer is individually wafered using a known method to obtain a plurality of semiconductor wafers. The obtained semiconductor wafers are mounted onto a substrate using a predetermined method to obtain a semiconductor device.

[0137] The above description pertains to embodiments of the present invention. However, the present invention is not limited to any of the above-described embodiments, and various modifications can be made within the scope of the present invention. [Examples]

[0138] The invention is described in more detail below using examples, but the invention is not limited to these examples.

[0139] The measurement and evaluation methods in this embodiment are as follows.

[0140] (Residual stress of the intermediate layer) As described later, the intermediate layer is coated onto a predetermined film with a coating agent and then cured by ultraviolet irradiation to obtain an intermediate layer with a thickness of approximately 400 μm. This intermediate layer is then laminated to prepare a sample for measurement with a thickness of approximately 1 mm.

[0141] Residual stress was measured using an Anton Paar MCR302 rheometer. The measurement conditions were as follows. The sample was clamped from above and below by parallel plates, and shear stress was applied to the sample under the conditions of a measurement temperature of 65°C, a spacing of 1 mm, a strain of 100%, and an angular frequency of 1 Hz, and maintained for a predetermined time. The shear stress value of the intermediate layer after a 300-second relaxation time was taken as the residual stress value.

[0142] (Shear storage modulus (G') of the intermediate layer) The sample for measuring the shear storage modulus was prepared in the same manner as the sample for measuring residual stress. The shear storage modulus (G') was measured using an Anton Paar MCR302 rheometer. The measurement conditions were as follows. The sample was clamped from above and below by parallel plates, and shear stress was applied to the sample at a measurement temperature of 0~100°C, a spacing of 1 mm, a strain of 0.05~0.5%, and an angular frequency of 1 Hz. The shear storage modulus (G') at 60°C and the shear storage modulus (G') at 80°C were calculated from these values.

[0143] (Loss Tangent of Intermediate Layer) The sample for loss tangent measurement was prepared in the same manner as the sample for residual stress measurement. The loss tangent (tanδ) was measured using an Anton Paar MCR302 rheometer. The measurement conditions were as follows. The sample was clamped from above and below by parallel plates, and shear stress was applied to the sample at a measurement temperature of 0~100°C, a spacing of 1 mm, a strain of 0.05~0.5%, and an angular frequency of 1 Hz. The loss tangent (tanδ) at 65°C was calculated from these values.

[0144] (Wafer Warpage Evaluation) Two LINTEC LC2850 wafers (25μm thick) were attached to a 12-inch silicon wafer as a simulated circuit protection layer. The wafer was heated to 180°C for 3 hours and then slowly cooled to room temperature. This silicon wafer was then used as the silicon wafer with the simulated circuit protection layer. A widely used back-side polishing tape was applied to the protective layer side of this silicon wafer, and polishing was performed until the thickness reached 250μm. After polishing, the back-side polishing tape was peeled off, and a warpage of approximately 9.0 mm was observed. That is, as shown in Figure 3A, the warpage Wa caused by residual stress generated in the semiconductor wafer is approximately 9.0 mm.

[0145] On the side of the silicon wafer with the analog circuit protection layer formed thereon, the semiconductor processing protective sheet prepared in the examples and comparative examples was attached at 65°C, and the opposite side of the side with the semiconductor processing protective sheet attached was ground until the thickness became 250 μm. That is, the thickness of the silicon wafer after grinding was 200 μm.

[0146] The silicon wafer is placed on a flat plate with the attachment surface (analog circuit protection layer) of the semiconductor processing protective sheet facing upwards. The maximum distance between the back side of the silicon wafer and the flat plate is measured to evaluate the warpage of the silicon wafer. That is, this warpage is a composite warpage caused by residual stress generated by the semiconductor wafer and warpage caused by residual stress generated by the substrate of the semiconductor processing protective sheet. In this embodiment, the difference between the composite warpage and the warpage caused by residual stress generated solely by the semiconductor wafer (9.0 mm) is calculated. Samples with a warpage difference of 5.0 mm or less are judged as "OK", and samples with a warpage difference of more than 5.0 mm are judged as "NG".

[0147] (Evaluation of Exudation from Semiconductor Processing Protective Sheets) The semiconductor processing protective sheets produced in the Examples and Comparative Examples were cut into 330mm wide pieces using a cutting machine. Using core-fixing tape, the cut semiconductor processing protective sheets were wound into rolls on a 3-inch diameter plastic spool to obtain semiconductor processing protective sheet rolls. The obtained semiconductor processing protective sheet rolls were stored at 40°C for 72 hours. After storage, the presence of exudation from the ends of the semiconductor processing protective sheets was evaluated. Samples without exudation were judged as "OK," and samples with exudation were judged as "NG."

[0148] (Example 1) A coating agent for intermediate layer was prepared by mixing 3.4 parts by mass of photopolymerization initiator (Irgacure 1173, BASF), 1.0 part by mass of chain transfer agent (KarenzMT PE1, Showa Denko Co., Ltd.), and 0.5 parts by mass of UV curable resin (A-400, Shin-Nakamura Chemical Co., Ltd.) relative to a total of 100 parts by mass of 50 parts by mass of ethyl carbamate acrylate oligomer (CN9021 NS, manufactured by Arkema Co., Ltd.), 35 parts by mass of isoborneol acrylate, and 15 parts by mass of dodecyl acrylate.

[0149] The obtained intermediate layer coating agent was applied to a PET film (manufactured by Toray Industries, Inc., 75 μm thick) to a thickness of 400 μm using a blade coating method to form an intermediate layer composition layer. Immediately after coating, the formed intermediate layer composition layer was laminated with a PET-based release film (manufactured by Lintec Corporation, SP-PET752150, 75 μm thick) to isolate the intermediate layer composition layer from oxygen. Next, the intermediate layer composition layer was irradiated with ultraviolet light using a high-pressure mercury lamp at an illuminance of 80 mW / cm² and an irradiation dose of 300 mJ / cm², and then irradiated with ultraviolet light using a metal halide lamp at an illuminance of 330 mW / cm² and an irradiation dose of 1260 mJ / cm² to harden the intermediate layer composition layer, forming an intermediate layer with a thickness of 400 μm on the PET film.

[0150] Furthermore, the tensile storage modulus of the PET film of the substrate is 4.0 × 10⁹ N / m². Therefore, the product of the tensile storage modulus of the substrate and the thickness of the substrate (75 μm) is 3.0 × 10⁵ (N / m).

[0151] Next, relative to 100 parts by weight of the acrylic copolymer (2EHA / HEA-MOI%=80 / 20 / / 80%, Mw=800,000), 1.5 parts by weight of trimethylolpropane addition toluene diisocyanate (Tosoh, coronate L) as a crosslinking agent and 2.2 parts by weight of 2,2-dimethoxy-2-phenylacetophenone (BASF, Irgacure 651) as a photopolymerization initiator were added, and toluene was added to adjust the solid content concentration to 30%. The mixture was stirred for 30 minutes to prepare the coating agent for the adhesive layer.

[0152] Next, the prepared adhesive layer is coated onto a PET release film (Lintec Corporation, SP-PET382150, 38 μm thick) with a coating agent and dried to form an adhesive layer with a thickness of 10 μm, thus producing an adhesive sheet.

[0153] The release film disposed on the substrate with the intermediate layer obtained above is removed, and the intermediate layer and the adhesive layer of the adhesive sheet are bonded together to manufacture a protective sheet for semiconductor processing.

[0154] (Example 2) Except for using the intermediate layer coating agent described below, a protective sheet for semiconductor processing was prepared in the same manner as in Example 1: 50 parts by mass of ethyl carbamate acrylate oligomer (CN9021 NS, manufactured by Arkema Co., Ltd.), 35 parts by mass of isoborneol acrylate, and 15 parts by mass of dodecyl acrylate, totaling 100 parts by mass, were mixed with 3.4 parts by mass of photopolymerization initiator (manufactured by BASF, Irgacure 1173), 1.0 part by mass of chain transfer agent (KarenzMT PE1, manufactured by Showa Denko Co., Ltd.), and 1.0 part by mass of UV curing resin (A-400, manufactured by Shin-Nakamura Chemical Industry Co., Ltd.).

[0155] (Example 3) Except for using the intermediate layer coating agent described below, a protective sheet for semiconductor processing was prepared in the same manner as in Example 1: 50 parts by mass of ethyl carbamate acrylate oligomer (CN9021 NS, manufactured by Arkema Co., Ltd.), 35 parts by mass of isoborneol acrylate, and 15 parts by mass of dodecyl acrylate, totaling 100 parts by mass, were mixed with 3.4 parts by mass of photopolymerization initiator (Irgacure 1173, manufactured by BASF), 1.0 part by mass of chain transfer agent (KarenzMT PE1, manufactured by Showa Denko Co., Ltd.), and 1.5 parts by mass of UV curing resin (A-400, manufactured by Shin-Nakamura Chemical Industry Co., Ltd.).

[0156] (Example 4) Except for using the intermediate layer coating agent described below, a protective sheet for semiconductor processing was prepared in the same manner as in Example 1: 50 parts by mass of ethyl carbamate acrylate oligomer (CN9021 NS, manufactured by Arkema Co., Ltd.), 35 parts by mass of isoborneol acrylate, and 15 parts by mass of dodecyl acrylate, totaling 100 parts by mass, were mixed with 3.4 parts by mass of photopolymerization initiator (Irgacure 1173, manufactured by BASF), 1.0 part by mass of chain transfer agent (KarenzMT PE1, manufactured by Showa Denko Co., Ltd.), and 0.45 parts by mass of UV curing resin (A-DPH-6E, manufactured by Shin-Nakamura Chemical Industry Co., Ltd.).

[0157] (Comparative Example 1) Except for using the following intermediate layer coating agent, a protective sheet for semiconductor processing was prepared in the same manner as in Example 1: 50 parts by mass of ethyl carbamate acrylate oligomer (CN9021 NS, manufactured by Arkema Co., Ltd.), 35 parts by mass of isoborneol acrylate, and 15 parts by mass of dodecyl acrylate, totaling 100 parts by mass, were mixed with 3.4 parts by mass of photopolymerization initiator (Irgacure 1173, manufactured by BASF) and 1.0 parts by mass of chain transfer agent (KarenzMT PE1, manufactured by Showa Denko Co., Ltd.).

[0158] (Comparative Example 2) Except for using the following intermediate layer coating agent, a protective sheet for semiconductor processing was prepared in the same manner as in Example 1: 50 parts by mass of ethyl carbamate acrylate oligomer (CN9021 NS, manufactured by Arkema Co., Ltd.), 35 parts by mass of isoborneol acrylate, and 15 parts by mass of dodecyl acrylate, totaling 100 parts by mass, were mixed with 3.4 parts by mass of photopolymerization initiator (Irgacure 1173, manufactured by BASF), 1.0 part by mass of chain transfer agent (KarenzMT PE1, manufactured by Showa Denko Co., Ltd.), and 3.0 parts by mass of UV curing resin (A-400, manufactured by Shin-Nakamura Chemical Industry Co., Ltd.).

[0159] The obtained samples (Examples 1-4 and Comparative Examples 1 and 2) were subjected to the above-described measurements and evaluations. The results are shown in Table 1.

[0160] [Table 1] substrate Intermediate layer Sheet roll wafer thickness Stretch storage of substrate Module and substrate product of thickness Residual stress after 300 seconds at 65°C Loss tangent at 65℃ slope * Evaluation of seepage from the ends of the sheet Warp Warpage difference ** evaluate (mm) (N / m) (Pa) (Pa / ℃) (mm) (mm) Example 1 75 3.0×10 5 1370 1.03 -0.0253 OK 9.5 +0.5 OK Example 2 75 3.0×10 5 7070 0.93 -0.0192 OK 12.0 +3.0 OK Example 3 75 3.0×10 5 9800 0.72 -0.0158 OK 13.0 +4.0 OK Example 4 75 3.0×10 5 3980 1.04 -0.0265 OK 11.0 +2.0 OK Comparative Example 1 75 3.0×10 5 108 1.23 -0.0312 NG 9.0 +0.0 OK Comparative Example 2 75 3.0×10 5 42200 0.37 -0.0078 OK 17.5 +8.5 NG Warpage Difference = Warpage before peeling of protective film for semiconductor processing - Warpage after peeling of protective film for semiconductor processing

[0161] As can be confirmed from Table 1, when the slope of the shear storage modulus (G') changes from 60°C to 80°C is within the above range, and when the residual stress of the intermediate layer after maintaining 65°C for 300 seconds is within the above range, it can simultaneously suppress the warping of the wafer that generates residual stress and suppress the leakage of components from the protective sheet for semiconductor processing. [Simplified Explanation of the Diagram]

[0017] Figure 1 is a cross-sectional schematic diagram showing an example of a protective sheet for semiconductor processing according to this embodiment. Figure 2 is a cross-sectional schematic diagram showing the state of the protective sheet for semiconductor processing according to this embodiment attached to the circuit surface of a semiconductor wafer. Figure 3A is a cross-sectional schematic diagram showing a semiconductor wafer after back-side grinding without the protective sheet for semiconductor processing attached. Figure 3B is a cross-sectional schematic diagram showing a semiconductor wafer after back-side grinding with a conventional protective sheet for semiconductor processing attached. Figure 3C is a cross-sectional schematic diagram showing a semiconductor wafer after back-side grinding with the protective sheet for semiconductor processing according to this embodiment attached. Figure 3D is a cross-sectional schematic diagram showing a semiconductor wafer after back-side grinding with the protective sheet for semiconductor processing according to this embodiment attached. Figure 4 is an oblique view schematic diagram showing an example of the protective sheet for semiconductor processing according to this embodiment being wound into a sheet roll. Figure 5 is a cross-sectional schematic diagram illustrating that the residual stress in the intermediate layer of the protective sheet for semiconductor processing according to this embodiment is low.

Claims

1. A protective sheet for semiconductor processing, comprising a substrate, an intermediate layer on the substrate, and an adhesive layer in sequence, wherein the composition of the intermediate layer used to form the intermediate layer contains ethyl carbamate (meth)acrylate, a polymerizable monomer, and a polyfunctional acrylate, wherein when the shear storage modulus of the intermediate layer is set to G'(60°C) before 60°C and the shear storage modulus of the intermediate layer is set to G'(80°C) before 80°C, G'(60°C) and G'(80°C) satisfy the following formula, wherein the residual stress of the intermediate layer after being maintained at 65°C for 300 seconds is less than 10000 Pa, [Formula 1].

2. A protective sheet for semiconductor processing used on a semiconductor wafer with a circuit protection layer, comprising a substrate, an intermediate layer on the substrate and an adhesive layer in sequence, wherein the shear storage modulus of the intermediate layer before 60°C is set to G'(60°C) and the shear storage modulus of the intermediate layer before 80°C is set to G'(80°C), and G'(60°C) and G'(80°C) satisfy the following formula, wherein the residual stress of the intermediate layer after being maintained at 65°C for 300 seconds is 1370 Pa or more and 10000 Pa or less, [Formula 2].

3. The protective sheet for semiconductor processing as claimed in claim 1 or 2, wherein the product of the tensile storage modulus of the aforementioned substrate and the thickness of the aforementioned substrate is 8.0 × 10⁵ N / m or less.

4. The protective sheet for semiconductor processing as claimed in claim 1 or 2, wherein the loss tangent of the aforementioned intermediate layer is 0.6 or more before 65°C.

5. A method for manufacturing a semiconductor device, comprising: attaching a semiconductor processing protective sheet, as described in any one of claims 1 to 4, to a semiconductor wafer that generates residual stress; and reducing the rigidity of the semiconductor wafer to which the aforementioned semiconductor processing protective sheet is attached.

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