Semiconductor cleaning using plasma-free precursors

Abstract

An exemplary semiconductor processing method may include providing one or more deposition precursors to a semiconductor processing chamber. A substrate may be disposed within a processing region of the semiconductor processing chamber. This method may include depositing a silicon-containing material on the substrate and on one or more components of the semiconductor processing chamber. This method may include providing a fluorine-containing precursor to the processing region. The fluorine-containing precursor may be plasma-free when provided to the processing region. This method may include contacting the silicon-containing material on one or more components of the semiconductor processing chamber with the fluorine-containing precursor. This method may include removing at least a portion of the silicon-containing material on one or more components of the semiconductor processing chamber with the fluorine-containing precursor.

Description

Semiconductor Cleaning Using Plasma - Free Precursors This case claims the priority benefit of U.S. Patent Application No. 17 / 976,573, titled "SEMICONDUCTOR CLEANING USING PLASMA - FREE PRECURSORS", filed on October 28, 2022, the entire content of which is incorporated herein by reference. The present invention relates to semiconductor cleaning operations. More specifically, the present invention relates to methods for cleaning semiconductor surfaces or components. Integrated circuits are fabricated by processes that create complex patterned material layers on a substrate surface. Creating patterned materials on a substrate requires controlled methods for the formation and removal of exposed materials. After a deposition process has been performed in a chamber, the chamber components will include residual materials from the deposition process. Chamber cleaning operations can remove residues from the chamber; however, this process erodes the chamber components over time. Accordingly, there is a need for improved systems and methods that can be used to produce high - quality devices and structures. These and other needs are addressed by the present invention. Example semiconductor processing methods can include providing one or more deposition precursors to a semiconductor processing chamber. A substrate can be disposed in a processing region of the semiconductor processing chamber. The method can include depositing a silicon - containing material on the substrate and on one or more components of the semiconductor processing chamber. The method can include providing a fluorine - containing precursor to the processing region. The fluorine - containing precursor is plasma - free when provided to the processing region. The method can include contacting the silicon - containing material on one or more components of the semiconductor processing chamber with the fluorine - containing precursor. The method can include removing at least a portion of the silicon - containing material on one or more components of the semiconductor processing chamber with the fluorine - containing precursor. In some embodiments, the one or more deposition precursors include a silicon - containing precursor. The silicon - containing precursor can be a silicon - and - oxygen - containing material or a silicon - and - nitrogen - containing material. The fluorine - containing precursor can be or include hydrofluoric acid (HF), ammonium fluoride (NH 4 F), ammonium bifluoride (NH 4 HF 2 ), HF - pyridine, tetrafluorohydrazine (N 2 F 4 ), tetra - methylammonium fluoride ((CH 3 ) 4 NF), tetra - n - butylammonium fluoride ((C 4 H 9 ) 4 NF), N 2 H 5 F, N 2 H 5 F 2 , or hydrazinium fluorides. This method may include providing a co-reactant and a fluorine-containing precursor to a processing zone. The co-reactant may weaken the bonds in the fluorine-containing precursor. The co-reactant may be or include water or steam (H 2 O), alcohol, diol, ammonia (NH 3 ), amine, trifluoroacetic acid, hydrogen, helium, or argon. This method may include generating a fluorine-containing plasma from the fluorine-containing precursor in the processing zone. This method may include providing an activation precursor and a fluorine-containing precursor to the processing zone. This method may include contacting a silicon-containing material deposited on one or more components of a semiconductor processing chamber with the activation precursor. The activation precursor may weaken the bonds in the silicon-containing material. The activation precursor may be or include water or steam (H 2 O), alcohol, diol, ammonia (NH 3 ), amine, trifluoroacetic acid, hydrogen, helium, or argon. The temperature in the semiconductor processing chamber may be maintained at less than or about 700 °C. The pressure in the semiconductor processing chamber may be maintained at less than or about 10 Torr. Some embodiments of the present invention encompass a semiconductor processing method. This method may include i) providing one or more deposition precursors to a semiconductor processing chamber. A substrate may be disposed in a processing zone of the semiconductor processing chamber; this method may include ii) depositing a silicon-containing material on the substrate and on one or more components of the semiconductor processing chamber. This method may include iii) providing a fluorine-containing precursor and a co-reactant to the processing zone. The co-reactant may weaken the bonds in the fluorine-containing precursor. This method may include iv) contacting the silicon-containing material on one or more components of the semiconductor processing chamber with the fluorine-containing precursor. This method may include v) removing at least a portion of the silicon-containing material on one or more components of the semiconductor processing chamber with the fluorine-containing precursor. This method may include vi) repeating operations i) to v) at least three cycles. In some embodiments, the substrate is disposed on a substrate support in the processing zone. A fluorine-containing precursor may be provided to the processing zone below the substrate support. This method may include providing water or steam (H 2 O), alcohol, diol, ammonia (NH 3 ) one or more of an amine, or trifluoroacetic acid, and a fluorine-containing precursor. This method may include providing one or more of hydrogen, helium, or argon and a fluorine-containing precursor in operation iii). The fluorine-containing precursor may be ammonia-free (NH 3 ). The temperature in the semiconductor processing chamber may be maintained between about 150 °C and about 650 °C. Some embodiments of the present invention encompass semiconductor processing methods. This method may include providing a silicon-containing precursor to a semiconductor processing chamber. A substrate may be disposed in a processing region of the semiconductor processing chamber. This method may include depositing a silicon-containing material on the substrate and on one or more components of the semiconductor processing chamber. The silicon-containing material may include a silicon and oxygen-containing material or a silicon and nitrogen-containing material. This method may include activating the silicon-containing material. This activation may weaken the bonds in the silicon-containing material. This method may include providing a fluorine-containing precursor to the processing region. This method may include contacting the silicon-containing material on one or more components of the semiconductor processing chamber with the fluorine-containing precursor. This method may include removing at least a portion of the silicon-containing material with the fluorine-containing precursor. In some embodiments, depositing the silicon-containing material and removing a portion of the silicon-containing material may be performed simultaneously. The fluorine-containing precursor provided to the processing region may be maintained as non-plasma. This technology can provide many benefits compared to conventional systems and technologies. For example, this processing can produce a chamber coating capable of sustaining hundreds of wafer cycles or more. Additionally, the operation of embodiments of the present invention can overcome the reduction in removal rate over time while protecting chamber components from erosion. These and other embodiments and their many advantages and features will be described in more detail in conjunction with the following specification and accompanying drawings. Deposition operations in semiconductor processing can be included to form any number of materials on a substrate. For example, materials can be deposited on a substrate to create semiconductor structures and to facilitate patterning or removal of materials on the substrate. As a non-limiting example, a deposition operation can include forming a silicon-containing material on a substrate. Deposition of the silicon-containing material can be performed in any number of ways, including by thermal-activated deposition and plasma-enhanced deposition. Irrespective of the mechanism, many deposition operations deposit materials not only on the substrate being processed but also on one or more chamber components. For example, in the processing region, deposition can occur on the substrate and on the pedestal or support on which the substrate sits, on panels, or on a diffuser that can distribute materials into the processing region, on the chamber walls that define the processing region, and on components that define the discharge path for subsequent deposition of materials and by-products. Once the deposition process is complete, the substrate can be removed from the processing area, and a cleaning operation can be performed. Chamber cleaning can form a plasma of one or more precursors that can etch or remove residual materials formed on chamber components, to substantially reset the chamber prior to subsequent processing operations, which can help maintain wafer-to-wafer consistency. However, these chamber cleaning operations present several challenges. For example, plasmas formed remotely, such as plasmas generated in a remote plasma source unit, can be easily controlled to ensure more complete cleaning can be performed, and cleaning materials can reach various architectural geometries in the processing area. However, remotely formed plasmas can be time-consuming, require the use of expensive equipment and materials, and generate greenhouse gases that must be processed before emission. The present invention can overcome these limitations by performing cleaning operations that do not include generating remote plasmas. Instead, the present invention can provide cleaning precursors in a plasma-free or non-plasma state. The present invention can also encompass providing additional precursors during the cleaning operation, such as activation precursors or co-reactants. The additional precursors can treat or activate silicon-containing materials or cleaning precursors to modify the chemical structure and render the silicon-containing materials more amenable to cleaning and removal. Although the remainder of the specification will routinely identify specific cleaning operations that utilize the disclosed technology, it will be readily understood that the systems and methods can be equally applied to other chambers, and the processing can occur as in the chambers described. Accordingly, the present invention should not be so limited as to be used solely with these specific deposition processes or chambers. Before describing additional details of embodiments in accordance with the present invention, the specification will discuss a possible system and chamber that can be used to perform the cleaning operations in accordance with embodiments of the present invention. FIG. 1 shows a cross-sectional view of an exemplary processing chamber 100 in accordance with some embodiments of the present invention. This illustration can depict an overview of a system incorporating one or more aspects of the present invention, and / or it can be specifically configured to perform one or more operations in accordance with embodiments of the present invention. Additional details of the chamber 100 or the methods performed will be described further below. The chamber 100 can be used to form a film layer in accordance with some embodiments of the present invention, however, it will be understood that this method can be similarly performed in any chamber in which film formation can occur. The processing chamber 100 can include a chamber body 102, a substrate support 104 disposed inside the chamber body 102, and a lid assembly 106 coupled to the chamber body 102 and enclosing the substrate support 104 within a processing volume 120. The substrate 103 can be provided to the processing volume 120 through an opening 126, which can be conventionally sealed using a slit valve or door for processing. The substrate 103 can rest on the surface 105 of the substrate support during processing. The substrate support 104 can be rotatable, as indicated by arrow 145, along an axis 147, and the shaft 144 of the substrate support 104 can be located on the axis 147. Alternatively, the substrate support 104 can be lifted for rotation when necessary during the deposition process. The plasma profile modulator 111 can be disposed in the processing chamber 100 to control the plasma distribution over the substrate 103 disposed on the substrate support 104. The plasma profile modulator 111 can include a first electrode 108, which can be disposed adjacent to the chamber body 102 and can separate the chamber body 102 from other components of the lid assembly 106. The first electrode 108 can be part of the lid assembly 106 or can be a separate sidewall electrode. The first electrode 108 can be an annular or toroidal member and can be a toroidal electrode. The first electrode 108 can be a continuous loop around the perimeter of the processing chamber 100 surrounding the processing volume 120 or can be discontinuous at selected locations (if desired). The first electrode 108 can also be a perforated electrode, such as a perforated torus or a mesh electrode, or can be a plate electrode, such as, for example, a second gas distributor. One or more isolators 110a, 110b can contact the first electrode 108 and electrically and thermally separate the first electrode 108 from the gas distributor 112 and the chamber body 102. The isolators 110a, 110b can be dielectric materials, such as ceramics or metal oxides, such as alumina and / or aluminum nitride. The gas distributor 112 can define holes 118 for distributing process precursors into the processing volume 120. The gas distributor 112 can be coupled to a first source of power 142, such as an RF generator, an RF power supply, a DC power supply, a pulsed DC power supply, a pulsed RF power supply, or any other power supply that can be coupled to the processing chamber. In some embodiments, the first source of power 142 can be an RF power supply. The gas distributor 112 can be a conductive gas distributor or a non-conductive gas distributor. The gas distributor 112 can also be formed of conductive and non-conductive components. For example, the body of the gas distributor 112 can be conductive while the faceplate of the gas distributor 112 can be non-conductive. The gas distributor 112 can be powered, such as by the first source of power 142, as shown in FIG. 1, or the gas distributor 112 can be coupled to ground in some embodiments. The first electrode 108 can be coupled to the first tuning circuit 128, and the first tuning circuit 128 can control the ground path of the processing chamber 100. The first tuning circuit 128 can include a first electronic sensor 130 and a first electronic controller 134. The first electronic controller 134 can be or include a variable capacitor or other circuit elements. The first tuning circuit 128 can be or include one or more inductors 132. The first tuning circuit 128 can be any circuit that can have a variable or controllable impedance under the plasma conditions present in the processing volume 120 during processing. In some illustrated embodiments, the first tuning circuit 128 can include a first circuit branch and a second circuit branch connected in parallel between ground and the first electronic sensor 130. The first circuit branch can include a first inductor 132A. The second circuit branch can include a second inductor 132B that is in series with the first electronic controller 134. The second inductor 132B can be disposed between the first electronic controller 134 and the node connecting the first and second circuit branches to the first electronic sensor 130. The first electronic sensor 130 can be a voltage or current sensor and can be coupled to the first electronic controller 134, which can provide a degree of closed-loop control of the plasma conditions inside the processing volume 120. The second electrode 122 can be coupled to the substrate support 104. The second electrode 122 can be embedded within the substrate support 104 or coupled to the surface of the substrate support 104. The second electrode 122 can be a distributed arrangement of plates, perforated plates, meshes, wire meshes, or any other conductive element. The second electrode 122 can be a tuning electrode and can be coupled to the second tuning circuit 136 by a wire 146, such as a cable having a selected resistance (such as 50 ohms), and is, for example, disposed in the shaft 144 of the substrate support 104. The second tuning circuit 136 can have a second electronic sensor 138 and a second electronic controller 140, which can be a second variable capacitor. The second electronic sensor 138 can be a voltage or current sensor and can be coupled to the second electronic controller 140 to provide further control of the plasma conditions in the processing volume 120. The third electrode 124 can be coupled to the substrate support 104. The third electrode 124 can be a bias electrode and / or an electrostatic chuck electrode. The third electrode can be coupled to a second source of power 150 through a filter 148, and the filter 148 can be an impedance matching circuit. The second source of power 150 can be a DC power source, a pulsed DC power source, an RF bias power source, a pulsed RF power source, or a bias power source, or a combination of these power sources and other power sources. In some embodiments, the second source of power 150 can be an RF bias power source. The lid assembly 106 and the substrate support 104 of FIG. 1 can be used in any processing chamber for plasma or heat treatment. In operation, the processing chamber 100 can provide real-time control of the plasma conditions in the processing volume 120. The substrate 103 can be placed on the substrate support 104, and the processing gas can flow through the lid assembly 106 using the inlet 114 according to any desired flow scheme. The inlet 114 can include a delivery from the remote plasma source unit 116, which can be fluidly coupled to the chamber, and a bypass 117 for the delivery of the processing gas that does not flow through the remote plasma source unit 116 in some embodiments. The gas can leave the processing chamber 100 through the outlet 152. A power source can be coupled to the gas distributor 112 to establish a plasma in the processing volume 120. The substrate is subjected to an electrical bias using the third electrode 124 in some embodiments. When the plasma is energized in the processing volume 120, a potential difference can be established between the plasma and the first electrode 108. A potential difference can be established between the plasma and the second electrode 122. However, the electronic controllers 134, 140 can be used to adjust the flow properties of the ground path represented by the two tuning circuits 128 and 136. A set point can be transmitted to the first tuning circuit 128 and the second tuning circuit 136 to provide independent control of the deposition rate and plasma density uniformity from the center to the edge. In embodiments where both electronic controllers can be variable capacitors, an electronic sensor can adjust the variable capacitors to independently maximize the deposition rate and minimize thickness non-uniformity. Each of the tuning circuits 128, 136 can have a variable impedance, which can be adjusted using the individual electronic controllers 134, 140. Where the electronic controllers 134, 140 are variable capacitors, the capacitance range of each variable capacitor, and the inductance of the first inductor 132A and the second inductor 132B, can be selected to provide an impedance range. This range can depend on the frequency and voltage characteristics of the plasma, which can have a minimum value within the capacitance range of the variable capacitors. Thus, when the capacitance of the first electronic controller 134 is at a minimum or maximum value, the first tuning circuit 128 will have a high impedance, resulting in a plasma shape with a minimum aerial or lateral coverage above the substrate support. When the capacitance of the first electronic controller 134 approaches a value that minimizes the impedance of the first tuning circuit 128, the aerial coverage of the plasma will grow to a maximum, effectively covering the entire working area of the substrate support 104. When the capacitance of the first electronic controller 134 deviates from the minimum impedance setting, the plasma shape will shrink from the chamber walls and the aerial coverage of the substrate support will decrease. The second electronic controller 140 can have a similar effect, as the capacitance of the second electronic controller 140 can be varied, increasing and decreasing the aerial coverage of the plasma above the substrate support. The electronic sensors 130, 138 can be used to tune the individual circuits 128, 136 in a closed loop. Depending on the type of sensor used, setpoints for current or voltage can be installed in each sensor, and the sensors can be provided with control software that determines the adjustments for each individual electronic controller 134, 140 to minimize the deviation from the setpoint. Thus, the plasma shape can be selected and dynamically controlled during processing. It will be understood that although the foregoing discussion is based on the electronic controllers 134, 140, which can be variable capacitors, any electronic component with adjustable characteristics can be used to provide the tuning circuits 128 and 136 with adjustable impedance. FIG. 2 shows an exemplary operation in method 200 of a processing chamber according to some embodiments of the present invention. This method can be performed in various processing chambers, including the processing chamber 100 described above. Method 200 can include one or more operations before the start of this method, including pre-processing, polishing, cleaning, deposition, etching, or any other operation that can be performed before the operations. Method 200 can include several optional operations, which may or may not be specifically related to some embodiments of the method according to the present invention. For example, many operations are described to provide a broader scope of structure formation, but are not critical to the present invention, or can be performed by alternative methods, as will be further discussed later. In operation 205, method 200 can include providing one or more deposition precursors to a semiconductor processing chamber. The substrate can be placed in the processing area of the semiconductor processing chamber. By a gas distributor, such as gas distributor 112, defining holes such as holes 118 for distributing the processing precursors into the processing area or processing volume, one or more deposition precursors can be provided. The one or more deposition precursors can include silicon-containing precursors. The silicon-containing precursors can include organosilanes, which can include silane, disilane, and other materials. Additional silicon-containing precursors can include silicon, carbon, oxygen, or nitrogen, such as trisilaneamine. Additional deposition precursors can include oxygen-containing precursors, nitrogen-containing precursors, or any other semiconductor precursor used to form a silicon-containing material. The one or more deposition precursors can include or not include the delivery of additional precursors, such as a carrier gas or one or more dopant precursors for doping the deposited silicon-containing material. At operation 210, method 200 may include depositing a silicon-containing material on a substrate. During method 200, the silicon-containing material may also be deposited on one or more components of a semiconductor processing chamber. For example, the silicon-containing material may be deposited on a chamber body or components within a processing region, such as above a substrate support, below a substrate support, adjacent to an outlet of the chamber, or around / on any other component. Depending on the deposition precursors provided to the semiconductor processing chamber at operation 205, various silicon-containing materials may be deposited. For example, if the deposition precursors include silicon and oxygen, a silicon and oxygen-containing material may be deposited. Alternatively, if the deposition precursors include silicon and nitrogen, a silicon and nitrogen-containing material may be deposited. It is contemplated that the deposition precursors may include any number of components. The deposition of the silicon-containing material at operation 210 may be performed at various temperatures and processes. Depending on the material to be formed, the processing conditions may be modified to deposit the silicon-containing material, such as a silicon and oxygen-containing material or a silicon and nitrogen-containing material. During operation 210, plasma power may be provided to generate a plasma effluent of one or more deposition precursors. Applying plasma power may increase the deposition rate of the silicon-containing material and / or may increase the conformality of the deposited material. At operation 215, method 200 may include providing one or more cleaning precursors to the semiconductor processing chamber. The one or more cleaning precursors may include fluorine-containing precursors. The fluorine-containing precursors may include one or more fluorine-containing materials, such as fluorocarbons, atomic fluorine (F), diatomic fluorine (F 2 ), interhalogen fluorides, such as bromine trifluoride (BF 3 ), or chlorine trifluoride (ClF 3 ), nitrogen trifluoride (NF 3 ), sulfur hexafluoride (SF 3 ), xenon difluoride (XF 2 ). In an embodiment, the fluorine-containing precursor may include hydrogen and may be, for example, hydrofluoric acid (HF), ammonium fluoride (NH 4 F), ammonium bifluoride (NH 4 HF 2 ), HF-pyridine, tetrafluorohydrazine (N 2 F 4 ), tetramethylammonium fluoride ((CH 3 ) 4 NF), tetrabutylammonium fluoride ((C 4 H 9 ) 4 NF), N 2 H 5 F, N 2 H 5 F 2 、 or hydrazinium fluorides. In some embodiments, the fluorine-containing precursor can be NH 3 , NH 3 will cause the formation of greenhouse gases and increased operating costs. As previously described, one or more deposition precursors can be provided by defining a gas distributor for the holes that distribute the processing precursors into the processing area or processing volume. Any one of the one or more cleaning precursors can be provided through the bottom of the chamber. For example, in an embodiment, one or more cleaning precursors can be provided from an opening in the chamber below a substrate support such as the substrate support 104. By providing one or more cleaning precursors below the substrate support, the cleaning of the chamber can be focused on the area below the substrate support, such as where undesired growth occurs. In addition, by providing one or more cleaning precursors below the substrate support, the interaction between the silicon-containing material deposited on the substrate and the one or more cleaning precursors can be minimized. In an embodiment, one or more cleaning precursors such as fluorine-containing precursors can be provided to the processing area without plasma. By providing the cleaning precursors without plasma, additional plasma generation steps such as in a remote plasma source unit are unnecessary, thereby reducing the complexity of method 200. In addition, the formation of remote plasma of one or more cleaning precursors will cause the release of greenhouse gases. Moreover, the operation of the remote plasma source unit will be expensive and unreliable. In operation 215, method 200 can also include providing an activation precursor or a co-reactant. It is also contemplated that the activation precursor or co-reactant can be provided with and / or before one or more cleaning precursors. For example, the activation precursor can be provided before one or more cleaning precursors and the co-reactant can be provided with the fluorine-containing precursor. Similar to one or more cleaning precursors, the activation precursor and / or co-reactant can be provided from an opening in the chamber below the substrate support. Before treating a silicon-containing material with a fluorine-containing precursor, an activation precursor can be provided to treat the silicon-containing material deposited on one or more components of a semiconductor processing chamber. The activation precursor can interact with the silicon-containing material and can weaken the bonds in the silicon-containing material. For example, in the case of a silicon and oxygen material, the activation precursor can weaken the Si-O bonds in the silicon-containing material. With weakened Si-O bonds, one or more cleaning precursors such as a fluorine-containing precursor can more easily remove the silicon-containing material deposited on the chamber and chamber components. Some activation precursors can activate the silicon-containing material to move positive charge centers to the central Si atom, allowing for easier nucleophilic attack and removal of the silicon-containing material. In an embodiment, the activation precursor can be or include water or steam (H 2 O), an alcohol (e.g., methanol, isopropyl alcohol, butanol, etc.), a diol (e.g., dimethyl diol), ammonia (NH 3 ), a primary amine, a secondary amine, or a tertiary amine, trifluoroacetic acid, or a combination of the foregoing. The activation precursor can additionally or alternatively include a plasma effluent of hydrogen, nitrogen, oxygen, fluorine, argon, or a combination of the foregoing. In some embodiments, an energy source such as microwave energy, IR energy, UV energy, laser energy, or a combination of the foregoing can be provided to activate the silicon-containing material. In addition to the activation precursor that enhances the kinetics of removing the silicon-containing material, the weakened silicon-containing material can direct / pull one or more cleaning precursors towards the weakened silicon-containing material, thereby increasing the selectivity and efficiency of removal, such as the selectivity for the silicon-containing material deposited on one or more chamber components and on, for example, aluminum or other metal chamber components. A co-reactant can be provided to modify one or more cleaning precursors, such as a fluorine-containing precursor. The co-reactant can interact with one or more cleaning precursors and can weaken the bonds in the cleaning precursors. For example, in the case of a fluorine-containing precursor, the co-reactant can weaken the fluorine bonds in the fluorine-containing precursor. With weakened fluorine bonds, the bonds can be more easily broken compared to unmodified fluorine bonds, which can more easily allow for the removal of the silicon-containing material by fluorine. In addition to weakening the fluorine bonds (which can enhance the polarization of the fluorine-containing precursor), the co-reactant can energize one or more cleaning precursors, such as through external ionization, again more easily allowing for the removal of the silicon-containing material by one or more cleaning precursors. In an embodiment, the co-reactant can be or include water or steam (H 2 O), an alcohol (e.g., methanol, isopropyl alcohol, butanol, etc.), a diol (e.g., dimethyl diol), ammonia (NH 3) a primary amine, a secondary amine, or a tertiary amine, trifluoroacetic acid, or a combination of the foregoing. The co-reactant may additionally or alternatively include a plasma effluent of hydrogen, nitrogen, oxygen, fluorine, argon, or a combination of the foregoing. In some embodiments, an energy source such as microwave energy, IR energy, UV energy, laser energy, or a combination of the foregoing may be provided to activate one or more deposition precursors. In optional operation 220, method 200 may include generating a plasma from a cleaning precursor in the processing region. For example, when one or more cleaning precursors include a fluorine-containing precursor, operation 220 may include generating a fluorine-containing plasma from the fluorine-containing precursor in the processing region. A plasma effluent of the fluorine-containing precursor or other cleaning precursor may be generated by applying RF power to the processing region. Alternatively or additionally, the fluorine-containing precursor may contact excited species purified from the processing region, which may thereby excite one or more cleaning precursors, thereby generating a plasma from the cleaning precursors in the processing region. In operation 225, method 200 may include contacting a silicon-containing material on one or more components of the semiconductor processing chamber with one or more cleaning precursors or a plasma effluent thereof. In operation 225, method 200 may include removing at least a portion of the silicon-containing material on one or more components of the semiconductor processing chamber with one or more cleaning precursors such as a fluorine-containing precursor. The one or more cleaning precursors may interact with the silicon-containing material to volatilize the silicon-containing material. For example, the fluorine-containing precursor may interact with the silicon-containing material to produce silicon tetrafluoride (SiF4) and oxygen or nitrogen gaseous by-products. The volatiles may then be purified from the chamber to remove the silicon-containing material from the chamber and / or chamber components. The removed silicon-containing material may not include the silicon-containing material formed on the substrate or may be selective for the silicon-containing material formed on the substrate. As previously discussed, the delivery of the one or more cleaning precursors may minimize interaction with the silicon-containing material deposited on the substrate. In some embodiments, the substrate may even be removed before the one or more cleaning precursors are provided to the processing region. As shown in FIG. 2, method 200 may include repeating operations 205-230 a number of cycles in operation 235. By repeating operations 205-230, the growth of semiconductor material on one or more components of the semiconductor processing chamber may be reduced. In an embodiment, the operations of method 200 may be repeated at least 2 cycles, at least 3 cycles, at least 4 cycles, at least 5 cycles, at least 10 cycles, at least 15 cycles, at least 20 cycles, at least 30 cycles, at least 40 cycles, at least 50 cycles, or more. In other embodiments, when different substrates are positioned in the processing region for depositing silicon material, the operations of method 200 may be continuously repeated. In an embodiment, a deposition operation and a cleaning operation can be performed simultaneously. Specifically, depositing a silicon-containing material and removing a portion of the silicon-containing material can be performed simultaneously. As previously discussed, by providing one or more cleaning precursors to a processing region in a different zone from one or more deposition precursors, deposition can be sustained without interference from the one or more cleaning precursors. The processing conditions can affect the operations performed in method 200. Each of the operations of method 200 can be performed during a fixed temperature period in an embodiment, and this temperature can be adjusted during different operation periods in some embodiments. In some embodiments of the present invention, method 200 can be performed at a substrate, pedestal, and / or chamber temperature less than or about 700 °C, and can be performed at a temperature less than or about 650 °C, less than or about 600 °C, less than or about 550 °C, less than or about 500 °C, less than or about 450 °C, less than or about 400 °C, less than or about 350 °C, less than or about 300 °C, less than or about 250 °C, less than or about 200 °C, less than or about 150 °C, or lower. The temperature can also be maintained at any temperature within these ranges, within a smaller range encompassed by these ranges, or between any of these ranges. In an embodiment, the temperature can be maintained at a temperature at which a silicon-containing material can be deposited, reducing downtime and increasing yield. Thus, in some embodiments, the pressure can be maintained between about 150 °C and about 650 °C. The pressure within the semiconductor processing chamber can also affect the operations performed. In an embodiment, the pressure can be maintained at less than about 20 Torr. Thus, the pressure can be maintained at less than or about 15 Torr, less than or about 14 Torr, less than or about 13 Torr, less than or about 12 Torr, less than or about 11 Torr, less than or about 10 Torr, less than or about 9 Torr, less than or about 8 Torr, less than or about 7 Torr, less than or about 6 Torr, less than or about 5 Torr, less than or about 4 Torr, less than or about 3 Torr, less than or about 2 Torr, less than or about 1 Torr, or less. The pressure can also be maintained at any pressure within these ranges, within a smaller range encompassed by these ranges, or between any of these ranges. Conventional techniques would require a higher temperature to activate the removal of the silicon-containing material. However, due to the activation of one or more deposition precursors and / or the activation of the silicon-containing material, a lower operating pressure can be given. Thus, in some embodiments, the pressure can be maintained between about 1 Torr and about 10 Torr. Conventional techniques can use plasma effluents of cleaning precursors such as fluorine-containing precursors formed remotely from the processing region. As previously discussed, the use of remote plasma source units can be time-consuming and generate greenhouse gases. In addition, remote plasma source units can be expensive, unreliable, and only allow sequential deposition and cleaning. Plasma-free cleaning operations have processing limitations such as slow kinetics, limited processing conditions (e.g., temperature), and can require extreme reaction chemistries. Embodiments of the present case can overcome the challenges regarding conventional techniques by utilizing plasma-free cleaning chemistries that allow for effective cleaning at various temperatures. The embodiments described herein do not require the use of remote plasma source units, and thus can increase throughput and maintain the life of the chamber and chamber components. In the foregoing description, for purposes of illustration, numerous details have been set forth in order to provide an understanding of the various embodiments of the invention. However, certain embodiments may be practiced without some of these details or with additional details, which will be apparent to a person of ordinary skill in the art. Having disclosed several embodiments, a person of ordinary skill in the art will recognize that various modifications, alternative architectures, and equivalents may be used without departing from the spirit of the embodiments. In addition, several well-known processes and elements have not been described in order to avoid unnecessarily obscuring the invention. Accordingly, the foregoing description should not be construed as limiting the scope of the invention. Moreover, a method or process may be described as sequential or stepwise, but it will be understood that the operations may be performed simultaneously or in a different order than recited. When a numerical range is provided, it is understood that each intermediate value between the upper and lower limits of the range to the smallest fraction of the unit of the lower limit is also explicitly disclosed, unless the context clearly dictates otherwise. Any narrower range between any stated value or unstated intermediate value in the stated range and any other stated or unstated intermediate value in the stated range is encompassed. The upper and lower limits of these smaller ranges may independently be included or excluded in the range, and ranges including any explicit exclusion limits in the stated range, ranges where either limit is included, ranges where neither limit is included, or ranges where both limits are included are also encompassed in the invention. When the stated range includes one or both of the limits, ranges excluding either or both of the included limits are also included. As used herein and in the appended claims, unless the context clearly dictates otherwise, the singular forms "a", "an", and "the" include plural references. Thus, for example, reference to "a precursor" includes a plurality of such precursors, and reference to "the material" includes reference to one or more materials and equivalents thereof known to a person of ordinary skill in the art, and so forth. Furthermore, when the terms "comprise(s)", "comprising", "contain(s)", "containing", "include(s)", and "including" are used in this specification and in the following claims, they are intended to specify the presence of stated features, integers, components, or operations, but they do not preclude the presence or addition of one or more other features, integers, components, operations, acts, or groups. 100: Chamber 102: Chamber body 103: Substrate 104: Substrate support 105: Surface 106: Cover assembly 108: First electrode 110a, 110b: Isolator 111: Plasma profile modulator 112: Gas distributor 114: Inlet 116: Remote plasma source unit 117: Bypass 118: Hole 120: Processing volume 122: Second electrode 124: Third electrode 126: Opening 128: First tuning circuit 130: First electronic sensor 132A: First inductor 132B: Second inductor 134: First electronic controller 136: Second tuning circuit 138: Second electronic sensor 140: Second electronic controller 142: Power source of the first source 144: Shaft 145: Arrow 146: Wire 147: Axis 148: Filter 150: Power source of the second source 152: Outlet 200: Method 205, 210, 215, 220, 225, 230, 235: Operations The essence and advantages of the disclosed technology can be further understood by referring to the remainder of the specification and the drawings. FIG. 1 shows an exemplary cross-sectional view of a processing chamber according to some embodiments of the present invention. FIG. 2 shows exemplary operations in a deposition method according to some embodiments of the present invention. Several illustrations are included for illustrative purposes. It will be understood that the illustrations are for illustrative purposes and are not to be regarded as to scale, unless explicitly stated to be to scale. Additionally, for illustrative purposes, the illustrations are provided to aid understanding and may not include all aspects or information compared to real-world representations, and may include exaggerated material for illustrative purposes. In the accompanying drawings, like components and / or features may have the same reference numerals. Furthermore, various components of the same type may be distinguished by letters following the reference numeral for like components. If only the primary reference numeral is used in the specification, this description may apply to any of the like components having the same primary reference numeral regardless of the letter. Domestic deposit information (please note in the order of deposit institution, date, number) None Foreign deposit information (please note in the order of deposit country, institution, date, number) None 200: Method 205,210,215,220,225,230,235: Operation

Claims

1. A semiconductor processing method comprising the steps of: i) providing one or more deposition precursors to a semiconductor processing chamber, wherein a substrate is disposed within a processing region of the semiconductor processing chamber; ii) depositing a silicon-containing material on the substrate and on one or more components of the semiconductor processing chamber; iii) providing an activation precursor to the processing region; iv) providing a fluorine-containing precursor to the processing region, wherein the fluorine-containing precursor is plasma-free when provided to the processing region; v) contacting the silicon-containing material on the one or more components of the semiconductor processing chamber with the fluorine-containing precursor; vi) removing at least a portion of the silicon-containing material on the one or more components of the semiconductor processing chamber with the fluorine-containing precursor; and vii) repeating operations i) to vi) a number of cycles, wherein a pressure within the semiconductor processing chamber is maintained at less than or about 20 Torr.

2. The semiconductor processing method as claimed in claim 1, wherein the one or more deposition precursors comprise a silicon-containing precursor.

3. The semiconductor processing method as claimed in claim 1, wherein the silicon-containing material comprises a silicon-oxygen-containing material or a silicon-nitrogen-containing material.

4. The semiconductor processing method as claimed in claim 1, wherein the fluorinated precursor comprises hydrofluoric acid (HF), ammonium fluoride (NH4F), ammonium hydrogen fluoride (NH4HF2), HF-pyridine, tetrafluorohydrazine (N2F4), tetramethylammonium fluoride ((CH3)4NF), tetrabutylammonium fluoride ((C4H9)4NF), N2H5F, N2H5F2, or hydrazine fluorides.

5. The semiconductor processing method as described in claim 1, further comprising the step of: providing a co-reactant and the fluorine-containing precursor to the processing region, wherein the co-reactant weakens the bonds in the fluorine-containing precursor.

6. The semiconductor processing method as described in claim 5, wherein the co-reactant comprises water or steam (H2O), a monool, a diol, ammonia (NH3), a monoamine, trifluoroacetic acid, hydrogen, helium, or argon.

7. The semiconductor processing method as described in claim 1 further comprises the step of: generating a fluorinated plasma from the fluorinated precursor in the processing region.

8. The semiconductor processing method as claimed in claim 1, further comprising the step of: contacting the silicon-containing material deposited on one or more components of the semiconductor processing chamber with the activation precursor, wherein the activation precursor weakens the bonds in the silicon-containing material.

9. The semiconductor processing method as claimed in claim 8, wherein the activation precursor comprises water or steam (H2O), a monool, a diol, ammonia (NH3), a monoamine, trifluoroacetic acid, hydrogen, helium, or argon.

10. The semiconductor processing method as claimed in claim 1, wherein a temperature within the semiconductor processing chamber is maintained at less than or about 700 °C.

11. The semiconductor processing method as claimed in claim 1, wherein a pressure within the semiconductor processing chamber is maintained at less than or about 10 Torr.

12. A semiconductor processing method comprising the steps of: i) providing one or more deposition precursors to a semiconductor processing chamber, wherein a substrate is disposed within a processing region of the semiconductor processing chamber; ii) depositing a silicon-containing material on the substrate and on one or more components of the semiconductor processing chamber; iii) providing an activation precursor to the processing region; iv) providing a fluorine-containing precursor and a co-reactant to the processing region, wherein the co-reactant weakens the bonds in the fluorine-containing precursor; v) contacting the silicon-containing material on the one or more components of the semiconductor processing chamber with the fluorine-containing precursor; vi) removing at least a portion of the silicon-containing material on the one or more components of the semiconductor processing chamber with the fluorine-containing precursor; and vii) repeating operations i) to vi) at least three cycles, wherein a temperature within the semiconductor processing chamber is maintained at less than or about 700 °C; and a pressure within the semiconductor processing chamber is maintained at less than or about 20 Torr.

13. The semiconductor processing method as described in claim 12, wherein: The substrate is placed on a substrate support within the processing area; and the fluorine-containing precursor is provided to the processing area below the substrate support.

14. The semiconductor processing method as described in claim 12 further comprises the following step: providing one or more of water or steam (H2O), a monool, a diol, ammonia (NH3), a monoamine, or trifluoroacetic acid with the fluorinated precursor in operation iii).

15. The semiconductor processing method as described in claim 12 further comprises the following step: providing one or more of hydrogen, helium, or argon with the fluorine-containing precursor in operation iii).

16. The semiconductor processing method as described in claim 12, wherein the fluorinated precursor does not contain ammonia (NH3).

17. The semiconductor processing method as claimed in claim 12, wherein a temperature within the semiconductor processing chamber is maintained between about 150 °C and about 650 °C.

18. A semiconductor processing method comprising the steps of: i) providing a silicon-containing precursor to a semiconductor processing chamber, wherein a substrate is disposed within a processing region of the semiconductor processing chamber; ii) depositing a silicon-containing material on the substrate and on one or more components of the semiconductor processing chamber, wherein the silicon-containing material comprises a silicon-oxygen-containing material or a silicon-nitrogen-containing material; iii) activating the silicon-containing material, wherein the activation step weakens the bonds in the silicon-containing material; iv) providing a fluorine-containing precursor to the processing region; v) contacting the silicon-containing material on the one or more components of the semiconductor processing chamber with the fluorine-containing precursor; vi) removing at least a portion of the silicon-containing material with the fluorine-containing precursor; and vii) repeating operations i) to vi) a plurality of cycles, wherein a temperature within the semiconductor processing chamber is maintained at less than or about 700 °C; and a pressure within the semiconductor processing chamber is maintained at less than or about 20 Torr.

19. The semiconductor processing method as described in claim 18, wherein the deposition of the silicon-containing material and the removal of that portion of the silicon-containing material are performed simultaneously.

20. The semiconductor processing method as claimed in claim 18, wherein the fluorine-containing precursor provided to the processing region is maintained as plasma-free.

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