Composite wiring board and semiconductor device
Patent Information
- Application Number
- TW113150674
- Authority / Receiving Office
- TW · TW
- Patent Type
- Patents
- Current Assignee / Owner
- Priority Date
- 2023-12-27
- Filing Date
- 2024-12-25
- Publication Date
- 2026-10-01
- Estimated Expiration
- 2044-12-24
AI Technical Summary
Existing techniques for mounting semiconductor devices on substrates via interposers face challenges in achieving high electrical connection reliability and thermal management due to differences in thermal expansion coefficients between components, leading to potential warping and instability.
A composite wiring substrate is designed with a base substrate comprising a ceramic core and organic resin layers, and a relay substrate with a ceramic core and organic resin layers, where the thermal expansion coefficient of the relay substrate is lower than that of the base substrate, and both substrates are connected via bonding materials with controlled thermal expansion properties to maintain stability and reliability.
The composite wiring substrate enhances electrical connection reliability and thermal management by minimizing warping and ensuring consistent thermal expansion, thereby improving the overall installation reliability of semiconductor devices.
Smart Images

Figure TWG2TB001913651_001 
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Abstract
Description
[Technical Field]
[0001] This invention relates to a composite wiring substrate and a semiconductor device. [Previous Technology]
[0002] Previously, a technique was known for mounting a plurality of semiconductor devices on a substrate via a relay substrate, referred to as an interposer. Patent Document 1 discloses an interposer substrate made of an organic resin. [Prior Art Documents] [Patent Documents]
[0003] [Patent Document 1] Japanese Patent Application Publication No. 2023-083003 [Summary of the Invention]
[0004] The composite wiring substrate of the present invention comprises: a base substrate; and a relay substrate electrically connected to the base substrate via a bonding material. The base substrate comprises: a first core substrate; a first organic substrate made of organic resin bonded to the first core substrate; and a plurality of first wirings located within the first organic substrate. The relay substrate comprises: a second core substrate; a second organic substrate made of organic resin bonded to the second core substrate; and a plurality of second wirings located within the second organic substrate. The thermal expansion coefficient of the relay substrate is less than that of the base substrate.
Implementation Method
[0006] Hereinafter, the configuration of the composite wiring substrate and semiconductor device for implementing the present invention (hereinafter referred to as "Embodiment") will be described in detail with reference to the drawings. Furthermore, the present invention is not limited to this embodiment. Also, the embodiments can be appropriately combined within a range that does not cause contradictions in the processing content. Furthermore, in the following embodiments, the same symbols are used to mark the same parts, and repeated descriptions are omitted.
[0007] Furthermore, in the embodiments shown below, terms such as "certain," "orthogonal," "perpendicular," or "parallel" are sometimes used, but these terms do not require strict adherence to the terms "certain," "orthogonal," "perpendicular," or "parallel." That is, the above terms allow for deviations, such as manufacturing precision or setting precision.
[0008] Furthermore, in the various figures referred to below, in order to make the explanation easier to understand, the mutually orthogonal X-axis direction, Y-axis direction and Z-axis direction are sometimes specified, showing an orthogonal coordinate system with the positive Z-axis direction as the vertical upward direction.
[0009] First, the configuration of the semiconductor device 100 according to the embodiment will be described with reference to FIG1. FIG1 is a schematic cross-sectional view showing the configuration of the semiconductor device 100 according to the embodiment.
[0010] As shown in Figure 1, the semiconductor device 100 has a motherboard 1, a composite wiring substrate 2, and a plurality of semiconductor elements 3.
[0011] The composite wiring substrate 2 has a base substrate 4 and a relay substrate 5.
[0012] The substrate 4 is mounted on the motherboard 1. Details about the substrate 4 will be described later.
[0013] The relay substrate 5 is the so-called interposer. The relay substrate 5 provides electrical connection between the relay base substrate 4 and the semiconductor device 3. The relay substrate 5 is bonded to the semiconductor device 3 via a bonding material 6 and to the base substrate 4 via a bonding material 7.
[0014] The Young's modulus of the relay substrate 5 may also be smaller than that of the base substrate 4. In this case, the relay substrate 5 may also have the flexibility to deform according to the surface shape of the base substrate 4. The bonding materials 6 and 7 are, for example, solder. Details regarding the relay substrate 5 will be described later.
[0015] Semiconductor element 3 is mounted on relay substrate 5. Semiconductor element 3 is, for example, a semiconductor wafer or a wafer or chiplet on a substrate made of a material other than semiconductor, such as a glass substrate, on which circuits or elements are formed. The chiplet is a functional block that constitutes part of the integrated circuit of semiconductor device 100.
[0016] Although two semiconductor elements 3 are shown in FIG1, the semiconductor device 100 may also include three or more semiconductor elements 3. Furthermore, the semiconductor device 100 may also include only one semiconductor element 3. For example, when the semiconductor element 3 is a small chip, an integrated circuit with one function can be formed by a plurality of semiconductor elements 3.
[0017] Next, the structure of the substrate 4 according to the embodiment will be described with reference to Figures 2 and 3. Figure 2 is a schematic cross-sectional view showing the structure of the substrate 4 according to the embodiment. Figure 3 is a schematic enlarged view of region III shown in Figure 2.
[0018] The substrate 4 has a first core substrate 10 and a first organic substrate 20. The substrate 4 is a laminate of the first core substrate 10 and the first organic substrate 20. Furthermore, the substrate 4 has a first conductor portion 30 and a second conductor portion 40.
[0019] <First Core Substrate> The first core substrate 10 is a ceramic substrate. The first core substrate 10 may also be formed using a ceramic composite material containing glass components, i.e., a so-called glass-ceramic. A glass-ceramic can be any of the following: a composite of a glass phase and ceramic particles, a composite of a glass phase and a crystalline phase formed by the partial crystallization of the glass phase, a form in which ceramic particles exist in a glass phase, or a form in which a glass phase exists at the grain boundaries between ceramic particles. The first core substrate 10 formed using ceramic has higher rigidity compared to a glass core material.
[0020] For example, the first core substrate 10 can also be LTCC (Low Temperature Co-fired Ceramics). When using LTCC as the first core substrate 10, low-melting-point metals such as copper or silver with relatively low resistance can be used as wiring. In this embodiment, "low-melting-point metal" refers to a metal with a lower melting point than metals commonly used for wiring ceramic substrates, such as tungsten or molybdenum.
[0021] The first core substrate 10 may also contain ceramic fillers as ceramic particles. For example, alumina (aluminum oxide), calcium titanate, or magnesium titanate can be used as ceramic fillers. In particular, the first core substrate 10 containing alumina has higher rigidity.
[0022] The first core substrate 10 has: a first surface 101; and a second surface 102, which is located on the opposite side of the first surface 101. The first core substrate 10 may also be a plate-like body with the first surface 101 and the second surface 102 as the main surfaces.
[0023] In this embodiment, the first core substrate 10 has a plurality of ceramic layers 11. The plurality of ceramic layers 11 are stacked along the thickness direction of the first core substrate 10. The substrate 4 having this first core substrate 10 has a high degree of design freedom. Furthermore, by using a plurality of ceramic layers 11 to form the first core substrate 10, the first core substrate 10 can be manufactured while confirming layer by layer whether the first conductor portion 30 is properly formed, thus improving the yield of the first core substrate 10.
[0024] Although in the examples shown in Figures 1 and 2, the first core substrate 10 has four ceramic layers 11, the number of ceramic layers 11 is not limited to four. The number of ceramic layers 11 may also be two or three, or even five or more.
[0025] <First Organic Substrate> The first organic substrate 20 is a substrate containing organic components. The organic components may also be organic resins. Organic resins may be, for example, epoxy resins, acrylic resins, polycarbonate resins, polyimide resins, olefin resins, or polystyrene resins.
[0026] Furthermore, the organic resin may be, for example, a fluoropolymer such as polytetrafluoroethylene (PTFE) or a polyphenylene ether resin. The first organic substrate 20 may also contain components other than the organic resin. Moreover, in this invention, the organic resin may be, for example, a material comprising 30% or more by mass of the materials constituting the first organic substrate 20.
[0027] The first organic substrate 20 has: a third surface 103; and a fourth surface 104, which is located on the opposite side of the third surface 103. The first organic substrate 20 may also be a plate-like body with the third surface 103 and the fourth surface 104 as the main surfaces.
[0028] The substrate 4 of the embodiment has two first organic substrates 20. One of the two first organic substrates 20 is bonded to the first surface 101 of the first core substrate 10, and the other is bonded to the second surface 102 of the first core substrate 10.
[0029] The third surface 103 of the first organic substrate 20 located on the first surface 101 of the first core substrate 10 is bonded to the first surface 101 of the first core substrate 10, and a plurality of semiconductor elements 3 are placed on the fourth surface 104 of the first organic substrate 20 via a relay substrate 5 (see Figure 1).
[0030] The third surface 103 of the first organic substrate 20 located on the second surface 102 of the first core substrate 10 is bonded to the first surface 101 of the first core substrate 10, and the fourth surface 104 of the first organic substrate 20 is bonded to the mother plate 1 via the bonding portion 8 (see Figure 1).
[0031] The first organic substrate 20 has a plurality of organic resin layers 21. The plurality of organic resin layers 21 are laminated along the thickness direction of the first organic substrate 20. The substrate 4 having this first organic substrate 20 has a high degree of design freedom. Although in the example shown in FIG2, the first organic substrate 20 has 4 organic resin layers 21, the number of organic resin layers 21 is not limited to 4. The number of organic resin layers 21 may also be 2 or 3, or even 5 or more.
[0032] In the examples shown in FIG1 and FIG2, an example is shown in which the substrate 4 has a first organic substrate 20 on each of the first surface 101 and the second surface 102 of the first core substrate 10. It is not limited to this, as long as the substrate 4 has a first organic substrate 20 on at least the first surface 101 of the first core substrate 10.
[0033] Compared with inorganic substrates, the first organic substrate 20 containing organic components is easier to form fine wiring patterns. On the other hand, the first core substrate 10 made of ceramic has higher rigidity and lower density than the first organic substrate 20.
[0034] By combining the first core substrate 10 and the first organic substrate 20, the substrate 4 of the embodiment can achieve miniaturization and narrowing of the wiring and improve rigidity. Since the larger the substrate, the more easily the substrate warping becomes obvious, the construction of the substrate 4, which uses the first core substrate 10 to compensate for the low rigidity of the first organic substrate 20, is particularly useful for the large-scale development of the substrate.
[0035] The first core substrate 10 and the first organic substrate 20 are bonded, for example, by hydrogen bonding. Specifically, the first core substrate 10 and the first organic substrate 20 are bonded together by the hydroxyl groups of the first core substrate 10 and the first organic substrate 20. In this case, the first core substrate 10 may be made of a ceramic material such as alumina with surface hydroxyl groups, and the first organic substrate 20 may be made of a resin material containing hydroxyl groups, i.e., epoxy resin. In this way, the first core substrate 10 and the first organic substrate 20 are directly bonded without solder or underfill adhesive, thereby suppressing the thickness of the substrate 4 and simplifying the manufacturing process.
[0036] Alternatively, the first core substrate 10 may contain a glass component, and the first organic substrate 20 may contain a coupling agent chemically bonded to the glass component. For example, a silane coupling agent may be used as the coupling agent. Alternatively, a titanium-based coupling agent or an aluminum-based coupling agent may be used. According to this configuration, the first core substrate 10 and the first organic substrate 20 are chemically bonded, thereby enabling a more robust bonding between the first core substrate 10 and the first organic substrate 20, which are materials of different kinds.
[0037] <First Conductor Section> The first conductor section 30 is a through-hole conductor located in the first core substrate 10. Specifically, the first conductor section 30 has: a through-hole 31 that penetrates the first core substrate 10; and a conductor 32. The conductor 32 is mainly composed of metal and is located inside the through-hole 31.
[0038] Furthermore, the first conductor portion 30 has solder pads 33 on the first surface 101 and the second surface 102 of the first core substrate 10.
[0039] <Second Conductor Section> The second conductor section 40 has a plurality of through holes 41, a plurality of solder pads 42, and a plurality of first wirings 43. The through holes 41 penetrate one or more organic resin layers 21. The solder pads 42 are located between adjacent organic resin layers 21, electrically connecting the plurality of through holes 41 to each other. The first wirings 43 are located inside the first organic substrate 20. The first wirings 43 may also have a diffusion inhibition layer 90 on their bottom surface. The diffusion inhibition layer 90 may also contain any one of Cr, Ti, Ni, and compounds formed by combining two or more of these.
[0040] The first wiring 43 located on the first organic substrate 20 bonded to the first surface 101 of the first core substrate 10 and the first wiring 43 located on the first organic substrate 20 bonded to the second surface 102 are electrically connected via a conductor 32 passing through the first core substrate 10. In this way, the density of the first wiring 43 can be achieved.
[0041] The first conductor portion 30 and the second conductor portion 40 may, for example, be metal conductors with copper or silver as the main component. For example, both the first conductor portion 30 and the second conductor portion 40 may be metal conductors with copper as the main component. Also, both the first conductor portion 30 and the second conductor portion 40 may be metal conductors with silver as the main component. Furthermore, one of the first conductor portion 30 and the second conductor portion 40 may be a metal conductor with copper as the main component, and the other may be a metal conductor with silver as the main component.
[0042] By setting both the first conductor portion 30 and the second conductor portion 40 as metal conductors with copper or silver as the main component, for example, compared with the case where one of the first conductor portion 30 and the second conductor portion 40 is set as a metal conductor other than copper and silver, higher electrical characteristics can be obtained.
[0043] Alternatively, only the first conductor portion 30 may contain a glass component, either the first conductor portion 30 or the second conductor portion 40. In this case, the first conductor portion 30 and the first core substrate 10, which also contains a glass component, are firmly bonded together via the glass component. Therefore, the rigidity of the first core substrate 10 can be improved.
[0044] Furthermore, during the firing step of manufacturing the substrate 4, the shrinkage rates of the first core substrate 10 and the first conductor portion 30 can be made to be consistent to some extent, thus making it less likely for the position of the first conductor portion 30 to shift.
[0045] The first conductor portion 30 may also be formed, for example, by printing a conductive paste containing copper and glass components onto a blank sheet that serves as the raw material for the ceramic layer 11 and co-firing the blank sheet. Specifically, the conductive paste may also contain, for example, copper powder, borosilicate glass powder, and silicon dioxide particles.
[0046] On the other hand, the second conductor portion 40 can also be formed by copper plating. In this way, it is possible to make only the first conductor portion 30 containing glass components among the first conductor portion 30 and the second conductor portion 40.
[0047] The second conductor portion 40 can also be electrically and thermally connected to the semiconductor element 3 via the relay substrate 5. By thermally connecting the second conductor portion 40, which is mainly composed of copper or silver and has relatively high thermal conductivity, to the semiconductor element 3, which becomes a heat source, the heat emitted from the semiconductor element 3 can be efficiently dissipated through the second conductor portion 40 and the first conductor portion 30.
[0048] Next, the configuration of the relay substrate 5 in the embodiment will be described with reference to Figures 4 and 5. Figure 4 is a schematic cross-sectional view showing the configuration of the relay substrate 5 and its surroundings in the embodiment. Figure 5 is a schematic enlarged view of region V shown in Figure 4.
[0049] The relay substrate 5 has a second core substrate 50 and a second organic substrate 60. The relay substrate 5 is a laminate of the second core substrate 50 and the second organic substrate 60. Furthermore, the relay substrate 5 has a third conductor portion 70 and a fourth conductor portion 80.
[0050] <Second Core Substrate> The second core substrate 50 is a ceramic substrate. The second core substrate 50 may also be formed using a ceramic composite material containing glass components, i.e., a glass-ceramic. A glass-ceramic can be any of the following: a composite of a glass phase and ceramic particles; a composite of a glass phase and a crystalline phase formed by the partial crystallization of that glass phase; a form in which ceramic particles exist within a glass phase; or a form in which a glass phase exists at the grain boundaries between ceramic particles. The second core substrate 50 formed using ceramics has higher rigidity compared to a glass core material.
[0051] For example, the second core substrate 50 can also be LTCC (Low Temperature Co-fired Ceramics). When using LTCC as the second core substrate 50, low-melting-point metals such as copper or silver with relatively low resistance can be used as wiring.
[0052] The second core substrate 50 may also contain ceramic fillers as ceramic particles. Examples of ceramic fillers include alumina (aluminum oxide), calcium titanate, or magnesium titanate. In particular, the second core substrate 50 containing alumina has higher rigidity.
[0053] The second core substrate 50 has: a fifth surface 501; and a sixth surface 502, which is located on the opposite side of the fifth surface 501. The second core substrate 50 may also be a plate-like body with the fifth surface 501 and the sixth surface 502 as the main surfaces.
[0054] <Second Organic Substrate> The second organic substrate 60 is a substrate containing organic components. The organic components may also be organic resins. Organic resins may be, for example, epoxy resins, acrylic resins, polycarbonate resins, polyimide resins, olefin resins, or polystyrene resins.
[0055] Furthermore, the organic resin may be, for example, a fluoropolymer such as polytetrafluoroethylene (PTFE) or a polyphenylene ether resin. The second organic substrate 60 may also contain components other than the organic resin. Moreover, in this invention, the organic resin may be, for example, a material comprising 30% or more by mass of the materials constituting the second organic substrate 60.
[0056] The second organic substrate 60 has: a 7th surface 603; and an 8th surface 604, which is located on the opposite side of the 7th surface 603. The second organic substrate 60 may also be a plate-like body with the 7th surface 603 and the 8th surface 604 as the main surfaces.
[0057] The 7th surface 603 of the second organic substrate 60 is bonded to the 5th surface 501 of the second core substrate 50 via bonding material 9. On the 8th surface 604 of the second organic substrate 60, a plurality of semiconductor elements 3 are placed via bonding material 6 (see Figure 1). The bonding material 9 is, for example, solder. Details about the bonding material 9 will be described later.
[0058] The second organic substrate 60 has a plurality of organic resin layers 61. The plurality of organic resin layers 61 are laminated along the thickness direction of the second organic substrate 60. The relay substrate 5 in this type of second organic substrate 60 has a high degree of design freedom. Although in the example shown in FIG4, the second organic substrate 60 has 3 organic resin layers 61, the number of organic resin layers 61 is not limited to 3. The number of organic resin layers 61 may also be 1, 2, or more than 4.
[0059] <Third Conductor Section> The third conductor section 70 is a through-hole conductor located in the second core substrate 50. Specifically, the third conductor section 70 has: a through-hole 71 that penetrates the second core substrate 50; and a conductor 72. The conductor 72 is mainly composed of metal and is located inside the through-hole 71.
[0060] Furthermore, the third conductor portion 70 has solder pads 73 on the fifth surface 501 and the sixth surface 502 of the second core substrate 50.
[0061] <Fourth Conductor Section> The fourth conductor section 80 has a plurality of through holes 81, a plurality of solder pads 82, and a plurality of second wirings 83. The through holes 81 penetrate one or more organic resin layers 61. The solder pads 82 are located between adjacent organic resin layers 61, electrically connecting the plurality of through holes 81 to each other. The solder pads 82 are integrally formed with the through holes 81 located in the same organic resin layer 61. The second wirings 83 are located inside the second organic substrate 60. The second wirings 83 may also have diffusion inhibition layers 90 on their side and bottom surfaces. Similarly, the side and bottom surfaces of the through holes 81, and the side surfaces of the solder pads 82, may also have diffusion inhibition layers 90. The diffusion inhibition layers 90 inhibit the diffusion of the metal components contained in the second wirings 83 into the second organic substrate 60. Therefore, by means of the diffusion inhibition layers 90, the conduction of adjacent second wirings 83 to each other via metal components diffused into the second organic substrate 60 can be reduced. That is, the insulation reliability is relatively high.
[0062] The third conductor portion 70 and the fourth conductor portion 80 may, for example, be metal conductors with copper or silver as the main component. For example, both the third conductor portion 70 and the fourth conductor portion 80 may be metal conductors with copper as the main component. Also, both the third conductor portion 70 and the fourth conductor portion 80 may be metal conductors with silver as the main component. Alternatively, one of the third conductor portion 70 and the fourth conductor portion 80 may be a metal conductor with copper as the main component, and the other may be a metal conductor with silver as the main component.
[0063] By setting both the third conductor portion 70 and the fourth conductor portion 80 as metal conductors with copper or silver as the main component, for example, compared with the case where one of the third conductor portion 70 and the fourth conductor portion 80 is set as a metal conductor other than copper and silver, higher electrical characteristics can be obtained.
[0064] Alternatively, only the first conductor portion 30 of the third conductor portion 70 and the fourth conductor portion 80 may contain a glass component. In this case, the third conductor portion 70 and the second core substrate 50, which also contains a glass component, are firmly bonded together via the glass component. Therefore, the rigidity of the second core substrate 50 can be improved.
[0065] Furthermore, during the firing step of manufacturing the relay substrate 5, the shrinkage rates of the second core substrate 50 and the third conductor portion 70 can be made to be consistent to some extent, thus making it less likely for the position of the third conductor portion 70 to shift.
[0066] The third conductor portion 70 may also be formed, for example, by printing a conductive paste containing copper and glass components onto a blank sheet that serves as the raw material for the second core substrate 50 and co-firing the blank sheet. Specifically, the conductive paste may also contain, for example, copper powder, borosilicate glass powder, and silicon dioxide particles.
[0067] On the other hand, the fourth conductor portion 80 can also be formed by copper plating. In this way, it is possible to make only the third conductor portion 70 containing glass components among the third conductor portion 70 and the fourth conductor portion 80.
[0068] The fourth conductor portion 80 can also be electrically and thermally connected to the semiconductor element 3 via the bonding material 6. By thermally connecting the fourth conductor portion 80, which is mainly composed of copper or silver and has relatively high thermal conductivity, to the semiconductor element 3, which becomes a heat source, the heat emitted from the semiconductor element 3 can be efficiently dissipated through the fourth conductor portion 80 and the third conductor portion 70.
[0069] As described above, the rigidity of the relay substrate 5 can be improved by providing the second core substrate 50. By increasing the rigidity of the relay substrate 5, it becomes less prone to warping, thereby improving the flatness of the mounting surface of the semiconductor element 3 in the relay substrate 5. Furthermore, the second wiring 83 of the relay substrate 5 is formed finer than the first wiring 43 of the substrate 4. According to the composite wiring substrate 2 of the embodiment, the relay substrate 5 is less prone to warping, thus reducing the likelihood of electrical connection instability caused by warping of the relay substrate 5. In other words, the composite wiring substrate 2 of the embodiment exhibits higher reliability of electrical connections.
[0070] Furthermore, as shown in FIG1, the composite wiring substrate 2 of the embodiment has the following configuration: a semiconductor element 3 is mounted on a relay substrate 5, and a motherboard 1 is mounted on a base substrate 4. In this configuration, from the viewpoint of ensuring installation reliability, it is ideal for the thermal expansion coefficient of the base substrate 4 to be similar to that of the motherboard 1, and for the thermal expansion coefficient of the relay substrate 5 to be similar to that of the semiconductor element 3. Installation reliability here refers to maintaining the electrical connection between the motherboard, the composite wiring substrate, and the semiconductor element even when the composite wiring substrate undergoes thermal expansion and contraction due to temperature changes. Generally, the thermal expansion coefficient of the semiconductor element is less than that of the motherboard. For example, the thermal expansion coefficient of the motherboard is approximately 40 ppm / K, while the thermal expansion coefficient of the semiconductor element is approximately 4 ppm / K. Therefore, the thermal expansion coefficients of the relay substrate and the base substrate are preferably in the order of relay substrate < base substrate. The thermal expansion coefficients of the motherboard 1, semiconductor element 3, substrate 4, and relay substrate 5 can be obtained, for example, based on the results obtained by thermomechanical analysis (TMA).
[0071] Therefore, in the composite wiring board 2 of the embodiment, the thermal conductivity of the relay substrate 5 is configured to be less than that of the base substrate 4. In other words, in the embodiment, the thermal expansion coefficients of the relay substrate 5 and the base substrate 4 are related as follows: relay substrate 5 < base substrate 4. Therefore, according to the composite wiring board 2 of the embodiment, the composite wiring board 2, which has the base substrate 4 mounted on the motherboard 1 and the semiconductor element 3 mounted on the relay substrate 5, has higher mounting reliability.
[0072] The relay substrate 5 and the base substrate 4, which have such different coefficients of thermal expansion, can be manufactured, for example, by adjusting the ratio of the third conductor portion 70 and the fourth conductor portion 80 in the relay substrate 5, and the ratio of the first conductor portion 30 and the second conductor portion 40 in the base substrate 4, during the manufacturing process of the composite wiring substrate 2. As another example, when the first core substrate 10 of the base substrate 4 and the second core substrate 50 of the relay substrate 5 are made of different materials, a difference in the coefficient of thermal expansion between the base substrate 4 and the relay substrate 5 occurs. Furthermore, when the content of inorganic material in the first organic substrate 20 of the base substrate 4 and the content of inorganic material in the second organic substrate 60 of the relay substrate 5 are changed, a difference in the coefficient of thermal expansion between the base substrate 4 and the relay substrate 5 occurs.
[0073] Furthermore, the relationship between the thermal expansion rates of the relay substrate 5 and the base substrate 4 is not necessarily that the thermal expansion rate of the relay substrate 5 is less than that of the base substrate 4. For example, the thermal expansion rate of the relay substrate 5 may be the same as that of the base substrate 4, or the thermal expansion rate of the relay substrate 5 may be greater than that of the base substrate 4.
[0074] Furthermore, in the semiconductor device 100 in which the semiconductor element 3 is mounted on the relay substrate 5 and the base substrate 4 is mounted on the motherboard 1, the thermal expansion coefficient of the semiconductor element 3 may be lower than that of the relay substrate 5. Alternatively, the thermal expansion coefficient of the relay substrate 5 may be lower than that of the base substrate 4, and the thermal expansion coefficient of the base substrate 4 may be lower than that of the motherboard 1. In other words, the relationship between the thermal expansion coefficients of the semiconductor element 3, the relay substrate 5, the base substrate 4, and the motherboard 1 in the embodiment may also be that the semiconductor element 3 < the relay substrate 5 < the base substrate 4 < the motherboard 1. According to this configuration, the semiconductor device 100 has higher installation reliability.
[0075] When the second core substrate 50 is provided on the relay substrate 5 as described above, in the manufacturing steps of the composite wiring substrate 2, it is considered that the second core substrate 50 and the second organic substrate 60 are first joined by the bonding material 9 to form the relay substrate 5, and then the relay substrate 5 and the base substrate 4 are joined by the bonding material 7. If the second core substrate 50 is provided on the relay substrate 5 in this way, at least two bonding steps, that is, two heat treatment steps, are sometimes required. Here, assuming that common bonding materials such as lead-free solder or lead-containing solder are used to join the second core substrate 50 and the second organic substrate 60, there is a risk that the bonding material may melt in the first heat treatment step and then remelt in the second heat treatment step, which may reduce the reliability of the connection between the second core substrate 50 and the second organic substrate 60.
[0076] Therefore, in the composite wiring board 2 of the embodiment, the bonding material for bonding the second core substrate 50 and the second organic substrate 60 is a bonding material 9 with a melting point variation.
[0077] The melting point-changing bonding material 9 has different melting points in its initial paste state and in its state after heating to become an intermetallic compound. Specifically, the melting point-changing bonding material 9 melts at a first melting point of around 140°C, and then remelts at a second melting point higher than the first melting point, for example, around 245°C. The second melting point of the melting point-changing bonding material 9 is higher than the first melting point. Specifically, the second melting point is higher than the melting point of the bonding material 7 used for bonding the relay substrate 5 and the base substrate 4. Therefore, even if the composite wiring substrate 2 is reheated during the bonding step of the relay substrate 5 and the base substrate 4, the melting point-changing bonding material 9, which is the bonding material for bonding the second core substrate 50 and the second organic substrate 60, will not remelt. Therefore, according to the embodiment, the composite wiring substrate 2 is less prone to the decrease in connection reliability of the second core substrate 50 and the second organic substrate 60 caused by the remelting of the bonding material 9.
[0078] Furthermore, the first melting point of the melting point-changing bonding material 9 is lower than that of commonly used bonding materials. Therefore, when using the melting point-changing bonding material 9, compared to using commonly used bonding materials, the difference in thermal expansion between the second core substrate 50 and the second organic substrate 60 during the step of bonding the second core substrate 50 and the second organic substrate 60 can be suppressed to a smaller extent. This makes it less likely for the bonding material 9 to deform during the aforementioned step. Furthermore, the difference in thermal shrinkage between the second core substrate 50 and the second organic substrate 60 during the subsequent cooling process is also reduced, thus the bonding material 9 is less prone to cracking. Therefore, according to the composite wiring board 2 of the embodiment, the connection reliability between the second core substrate 50 and the second organic substrate 60 is higher.
[0079] Furthermore, the bonding material 9 functions as a buffer material. In this way, the bonding material 9 can mitigate the difference in thermal expansion between the second core substrate 50 and the second organic substrate 60.
[0080] The bonding material 7 may also include, for example, at least one selected from Ag, Bi, In, Cu and Sb, and Sn.
[0081] Furthermore, the present technology may also be configured as follows. (1) The composite wiring substrate (for example, composite wiring substrate 2) has: a base substrate (for example, base substrate 4); and a relay substrate (for example, relay substrate 5), which is electrically connected to the base substrate via a bonding material (for example, bonding material 7). The base substrate has: a first core substrate (for example, first core substrate 10); a first organic substrate made of organic resin (for example, first organic substrate 20), which is bonded to the first core substrate; and a plurality of first wirings (for example, first wirings 43), which are all located inside the first organic substrate. The relay substrate has: a second core substrate (for example, the second core substrate 50); a second organic substrate made of organic resin (for example, the second organic substrate 60), which is bonded to the second core substrate; and a plurality of second wirings (for example, the second wirings 83), which are located inside the second organic substrate. The thermal expansion coefficient of the relay substrate is less than that of the base substrate. (2) In the composite wiring substrate described in (1) above, the relay substrate may also have a bonding material (for example, bonding material 9) for bonding the second core substrate and the second organic substrate, and the bonding material may also be a melting point changing bonding material. (3) In the composite wiring substrate described in (1) or (2) above, the first core substrate may also be made of ceramic. (4) In the composite wiring substrate described in (3) above, the first core substrate may also have a plurality of ceramic layers (for example, ceramic layer 11). (5) The composite wiring substrate described in (3) or (4) above may also have two first organic substrates, and the first core substrate may also have: a first side (for example, the first side 101); and a second side (for example, the second side 102), which is located on the opposite side of the first side; the first organic substrate may also be bonded to each of the first side and the second side. (6) The composite wiring substrate described in (5) above may also have a conductor (for example, conductor 32) penetrating the first side and the second side of the first core substrate, and the first wiring located on the first organic substrate bonded to the first side and the first wiring located on the first organic substrate bonded to the second side may also be electrically connected via the conductor. (7) In the composite wiring substrate described in any one of (3) to (6) above, the first core substrate may also contain a glass component, and the first organic substrate may also contain a coupling agent chemically bonded to the glass component. (8) The semiconductor device (for example, semiconductor device 100) may also include: a motherboard (for example, motherboard 1); a composite wiring substrate as described in any of (1) to (7) above, which is mounted on the motherboard; and a semiconductor element (for example, semiconductor element 3), which is mounted on a relay substrate; and the thermal expansion coefficient of the semiconductor element may be lower than the thermal expansion coefficient of the relay substrate, the thermal expansion coefficient of the relay substrate may be lower than the thermal expansion coefficient of the base substrate, and the thermal expansion coefficient of the base substrate may be lower than the thermal expansion coefficient of the motherboard. [Simplified Explanation of the Diagram]
[0005] Figure 1 is a schematic cross-sectional view showing the configuration of the semiconductor device according to the embodiment. Figure 2 is a schematic cross-sectional view showing the configuration of the substrate according to the embodiment. Figure 3 is a schematic enlarged view of region III shown in Figure 2. Figure 4 is a schematic cross-sectional view showing the configuration of the relay substrate and its periphery according to the embodiment. Figure 5 is a schematic enlarged view of region V shown in Figure 4.
Claims
1. A composite wiring substrate comprising: a base substrate; and a relay substrate electrically connected to the base substrate via a bonding material; wherein the base substrate comprises: a first core substrate; a first organic substrate made of organic resin bonded to the first core substrate; and a plurality of first wirings located within the first organic substrate; the relay substrate comprises: a second core substrate; a second organic substrate made of organic resin bonded to the second core substrate; and a plurality of second wirings located within the second organic substrate; wherein the thermal expansion coefficient of the relay substrate is less than that of the base substrate, the second wirings are formed such that the distance between the plurality of wirings within the second organic substrate is shorter than the distance between the first wirings, and the second wirings have diffusion suppression layers on their side surfaces and bottom surfaces, the diffusion suppression layers being formed to suppress short circuits between adjacent second wirings.
2. A composite wiring substrate comprising: a base substrate; and a relay substrate electrically connected to the base substrate via a bonding material; wherein the base substrate comprises: a first core substrate; a first organic substrate made of organic resin bonded to the first core substrate; and a plurality of first wirings located within the first organic substrate; wherein the relay substrate comprises: a second core substrate; a second organic substrate made of organic resin bonded to the second core substrate; and a plurality of second wirings located within the second organic substrate; wherein the thermal expansion coefficient of the relay substrate is less than that of the base substrate, and the relay substrate comprises a bonding material for bonding the second core substrate and the second organic substrate, wherein the bonding material is a melting point-change bonding material.
3. A composite wiring substrate comprising: a base substrate; and a relay substrate electrically connected to the base substrate via a bonding material; wherein the base substrate comprises: a first core substrate; a first organic substrate made of organic resin bonded to the first core substrate; and a plurality of first wirings located within the first organic substrate; wherein the relay substrate comprises: a second core substrate; a second organic substrate made of organic resin bonded to the second core substrate; and a plurality of second wirings located within the second organic substrate; wherein the thermal expansion coefficient of the relay substrate is less than that of the base substrate, the first core substrate comprises a glass component, and the first organic substrate contains a coupling agent chemically bonded to the glass component.
4. The composite wiring substrate of any one of claims 1 to 3, wherein the first core substrate is made of ceramic.
5. The composite wiring substrate of claim 4, wherein the first core substrate has a plurality of ceramic layers.
6. The composite wiring substrate of claim 4, having two of the first organic substrates, wherein the first core substrate has: a first surface; and a second surface located on the opposite side of the first surface; wherein the first organic substrate is bonded to each of the first surface and the second surface.
7. The composite wiring substrate of claim 6, having a conductor passing through the first surface and the second surface of the first core substrate, wherein the first wiring located on the first organic substrate bonded to the first surface and the first wiring located on the first organic substrate bonded to the second surface are electrically connected via the conductor.
8. A semiconductor device comprising: a motherboard; a composite wiring substrate, as claimed in any one of claims 1 to 7, mounted on the motherboard; and a semiconductor element mounted on the relay substrate; wherein the thermal expansion rate of the semiconductor element is lower than the thermal expansion rate of the relay substrate, the thermal expansion rate of the relay substrate is lower than the thermal expansion rate of the base substrate, and the thermal expansion rate of the base substrate is lower than the thermal expansion rate of the motherboard.
Citation Information
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